How is the integration time set for a camera?
It is quite a difficult system to get your head around, as you have noticed.  I'll try and break it down more logically for you...

An important thing to note is that there are two capacitors in each pixel - the integrating capacitor and the sampling capacitor. It's these two capacitors that lead to a certain amount of confusion, and it's vital to understand the role of each one.

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Under normal sampling operation light falling on the photodiode of a pixel generates charge through the internal amplifier which is stored in the integrating capacitor. Simultaneously that stored voltage level is mirrored in the sampling capacitor. 

When you send the pulse on SI a signal called HOLD is generated internally. This signal is sent to all of the pixels and tells them to disconnect their sampling capacitors. They do that through the switch S2.  At the same time the integrating capacitor is emptied by S1 causing a short circuit across it. That is held there for 18 clock cycles to make sure that it's completely empty. All this time the sampled voltage is still there in the sampling capacitor.

Then as you continue clocking the pulse you sent in through the SI pin is walked down a 128 bit shift register. As it pops out of each output in turn it connects the sampling capacitor of that pixel to the output buffer so you can read the voltage. It's then flushed out and re-connected to the integrating circuit again to sample the pixel again.

So there is actually multiple things happening during your 129 clocks. Reading and integrating are both happening at the same time. But you're not reading this set of clock's integration, but the last set of clocks integration.

So you have:


SI pulse - HOLD generated, samples frozen
18 clocks of clearing the integrators and reading nothing much.
110 clocks of reading nothing much (nothing is sampled yet) and integrating.
1 clock to terminate
SI pulse - HOLD generated, samples frozen
10 clocks of clearing the integrators and reading the previously integrated samples 1-18
110 clocks of reading the previously integrated samples 19-128 and integrating new ones
1 clock to terminate
... etc ...


So clocks 130 to 258 are reading the light that was sampled during clocks 19 to 128.

The upshot of all this is that your integrating period is the total time taken for the 110 clocks that occur between the end of the 18 clocks that clear the integrators and the next SI pulse that creates a new HOLD signal.