Why is the output on the MOSI line shifted 1 bit over from what I commanded?
CPOL is clock polarity, and CPHA is clock phase.

The SPI modes are:


Mode 0 (the default) - clock is normally low (CPOL = 0), and the data is sampled on the transition from low to high (leading edge) (CPHA = 0)





Mode 1 - clock is normally low (CPOL = 0), and the data is sampled on the transition from high to low (trailing edge) (CPHA = 1)





Mode 2 - clock is normally high (CPOL = 1), and the data is sampled on the transition from high to low (leading edge) (CPHA = 0)





Mode 3 - clock is normally high (CPOL = 1), and the data is sampled on the transition from low to high (trailing edge) (CPHA = 1)






According to your datasheet:


  Data from the SDIN line is clocked into the 24-bit input shift register on the falling edge of SCLK. 


Judging by the diagrams on the datasheet, Mode 1 is what you want. You want the trailing edge of high to low.

More information at SPI - Serial Peripheral Interface - for Arduino