Set SPI MOSI pin to idle low on a Due?
I have managed to set MOSI to low by setting bit 26 in PIOA-&gt;PIO_PER, PIOA-&gt;PIO_OER and  PIOA-&gt;PIO_CODR registers. To use SPI again, bit 26 in PIOA-&gt;PIO_PDR has to be set (this cancels the effect of PIOA-&gt;PIO_PER).