Shift register with relay board behaving erratically
If this is a noise issue, there are a number of mitigating actions to consider.  Also, consider that most if not all noise mitigating approaches are generic and may not apply to all situations.


It is almost always easier to mitigate noise at the source.  Filtering the power &amp; shielding are two approaches.
When laying out digital integrated circuits, it is common to include bypass or decoupling capacitors as near as possible to each integrated circuit.  If unfamiliar with these, these capacitors go across the power pins of the integrated circuit.
If an electrically noisy environment is anticipated, making all communication leads and cables as short as possible prevents the likely hood of unexpected results.
If cables need to be long different communications methods such as balanced line or differential signalling should be considered.
Bring all power grounds to a single point.  This mitigates current loops which can cause unexpected power voltage fluctuations.
Consider the power requirements and generally use a power supply that is rated for double to have a margin of safety.
Avoid running cables containing high power or switched power near or in parallel to cables containing low voltage logic.


For this particular application / design:


Likely the reversed bias diode on the relay power supply lines is not needed.  There appears to be optical isolators on the relay board which should prevent the inductance of the relays from feeding back.
Verify you are creating the correct signal to the 74HC595 chip.  Use the timing diagrams on page 8 of this ti.com 74HC595 specification sheet as a guide.
Consider the gauge of the power cables.  Thinner wires over longer runs will drop the voltage proportional to the current demand.  If all 8 relays are active, the current demand may be as much as an Amp.