ursts 10000 SSER events caused exclusively by package alphas at .03 alpha/cm2/hr ASER (Hits/hr) Figure 6.8. Correlation between system SER (SSER, from field testing) and accelerated SER (ASER, from intense alpha-particle source testing) [316]. The SSER exhibits a baseline error rate due to neutron-induced upsets. [318]. Neutron-induced single-event burnout has even caused destructive failures in large-area, high-voltage power diodes used for railroad applications in Europe [319]. 6.3.3 Mitigation Techniques Neutron-induced ground-level upset rates have been estimated to be 1-2x10 12 upsets/bit-hr across a range of commercial DRAMs and SRAMs [317]. For a computer workstation with 1 Gbit of memory (128 Mbytes), this could lead to as many as 1-2 errors per month, depending on how much of the memory space is in daily use [317]. Revelations such as these have significant implications for manufacturers of commercial memory chips and computer systems, because systems can't realistically be shielded against incident neutrons. Meeting specified failure rates is expected to be a significant challenge for commercial semiconductor manufacturers. Terrestrial soft error failure rate specifications are usually given in terms of FIT rates, where FIT = Failure in Time = 1 error in 109 device hours. A typical specification is to maintain a FIT rate less than 1000 [316]. A complicating factor is that since FIT rates are specified per device, meeting a constant FIT rate specification actually requires reducing the error rate per bit as the number of bits per device is increased. It has been suggested that because manufacturers of commercial microelectronics for terrestrial applications have had to deal with alpha-particle-induced upsets from packaging materials, commercial parts will by design remain hard to at least the alpha-particle threshold, as illustrated in Figure 6.9 [207]. This figure shows the critical charge to upset as a function of gate II-63 length, with the horizontal line indicating the maximum charge supplied by a 5