s the syndrome of the received (possibly corrupt) codeword, using an LFSR circuit exactly as in the coder. The contents of the shift register after the nth cycle are the remainder (i.e., the required syndrome). Other forms of syndrome are sometimes used, but the decoder operation is very similar in either case. Cyclic Codes Input Feedback Connections Syndrome Register Error Pattern Detector (combinatorial logic circuit) Fig. 4.3 General form of a r(x)o Meggitt, or error-trapping cyclic Buffer Register error-correcting decoder. Input Output A nonzero syndrome means there are one or more errors. In an error-correcting decoder, further processing is required to correct the error. The general form of a "Meggitt," or "error- trapping," decoder is shown in Figure 4.3. During the first n cycles, control line C is ON and the syndrome is calculated as already described; while this is happening the received codeword is stored in a buffer register. During the second n cycles, C is OFF and the received codeword is output from the buffer register. The error pattern detector circuit outputs a 1 (in the binary case) whenever the corresponding bit of the received codeword has been deduced to be in error. This inverts, and hence corrects, the output codeword. Because the code is systematic, its first k digits are the required dataword. It can be seen from Figure 4.3 that the signal from the error pattern detector circuit is also fed back to the LFSR input. This produces an "updated" syndrome; after the whole codeword has been corrected, the remaining syndrome in the shift register should be 0. If it is not, it indicates that more errors have occurred than can be corrected by the code. Depending on the system requirements, this condition can be detected and flagged. The internal details of the error pattern detector are simple for single ECCs. In this case, the syndrome corresponding to an error in the first (most significant) bit of the codeword is calculated. The error pattern detector is then simply a circuit that outputs a 1 w