coder. If the received codeword is this is happening the received codeword is stored in a buffer register. represented as r(x), the circuit performs the polynomial division During the second n cycles, c is OFF and the received codeword is x'r(x)/g(x), and the contents of the shift register after the nth cycle output from the buffer register. The error pattern detector circuit are the remainder of this calculation, in other words the required outputs a 1 (in the binary case) whenever the corresponding bit of syndrome. As mentioned above, other syndromes are sometimes the received codeword has been deduced to be in error. This inverts, used; in particular it is possible to produce a circuit to perform the and hence corrects, the output codeword. Since the code is syste- division r(x)/g(x). This is achieved by removing the input from the matic, its first k digits are the required data word. It can be seen from right-hand end of the LFSR circuit and instead placing an adder at Figure 14.3 that the signal from the error pattern detector circuit is the left-hand end, one of whose inputs is the input data word, and also fed back to the linear feedback shift register input. This pro- the other the output of the -go multiplier. Although this produces a duces an 'updated' syndrome; after the whole codeword has been In = d(x) 2 to 1 Out = c(x) Figure 14.2 A systematic binary cyclic coder Convolutional codes 14/9 corrected the remaining syndrome in the shift register should be of the coefficients of a certain LFSR. A further technique for zero. If it is not, it indicates that more errors have occurred than can decoding RS codes is called transform decoding, which uses a finite be corrected by the code. Depending on the system requirements, field analogue of the Fourier transform. this condition can be detected and flagged. A particularly important ability of RS codes (and non-binary BCH The internal details of the error pattern detector are simple for codes in general) is their ability to perform errors and erasures single e