e V.76 SDL model, observed by two MSCs: a basic MSC, representing the XID scenario and a hierarchical MSC, containing a hierarchy of scenarios linked by temporal operators (such as AND, OR, REPEAT... .), representing the rest of the expected behaviors. The basic XID MSC is not integrated into the hierarchical MSC because the XID scenario can occur at any moment. Thus, there is no need to sequence it with the other behaviors (connection, data transfer and disconnection). 5.3.3.1 Create the hierarchical MSC With the MSC Editor, you will rework a copy of the basic MSC testl.msc generated by the Simulator in Chapter 4, to obtain the hierarchical MSC testlops.msc, shown in Figure 5.47. This MSC testlops represents the following behavior expected from the V.76 SDL model: 1. one connection phase (cnx_0), 2. followed or not by the repetition of data transfers from A to B (data_a2b_0) or from B to A (data_b2a_0), 3. followed by the disconnection phase initiated by A (disc_0_by_a) or initiated by B (disc_0_by_b)¹². To simplify the example, this MSC is incomplete: connection initiated by B is missing, DLC number 1 is not tested and SO on. Automatic Observation of Simulations 143 AND operator OR operator (sequence) v76_and (alternative) cnx_0 data_repeat disc_or REPEAT data_or operator disc_0_by_a disc_0_by_b data_a2b_0 data_b2a_0 disc_0_by_b inst datalink inst_dlcb datalink leaf scenario I_releasereq( 0 v76frame( disc (.0.) ) v76frame( ua (.0.) ) I_releaseind( 0) Figure 5.47 The hierarchical MSC testlops.msc To save time, you will first cut testl into four MSCs as shown in Figure 5.50. A. Unload testl.msc from the Editor. B. In Windows (or Unix), make a copy of the file testl.msc into testlops.msc. C. Open testlops.msc with the Editor13. D. In the Editor Framework window, select testl as in Figure 5.48, copy it and paste it three times. E. Rename the four scenarios as in Figure 5.49. FrameWork F:ADONNEES\TRANS test1 test1 test1 Figure 5.48 The Framework window after duplicating scenario testl 13 The MSC Editor is integrated