0) Hardware is SPA-4XT3/E3 Framing is c-bit, Clock Source is Line Bandwidth limit is 44210, DSU mode 0, Cable length is 10 feet rx FEBE since last clear counter 792, since reset 3693 No alarms detected. No FEAC code is being received MDL transmission is disabled PXF interface number = 0x12 Configuring DS3s SPA carrier card counters: Input: packets = 81583462, bytes = 6466441470, drops = 7 Output: packets = 80614617, bytes = 5460208896, drops = 0 Egress flow control status: XON Per bay counters: General errors: input = 0, output = 0 SPI4 errors: ingress dip4 = 0, egress dip2 0 SPA FPGA Packet Counters: Transmit : 80614638, Drops : 0 Receive : 81583490, Drops : 0 SPA FPGA Invalid Channel Packets: Transmit : 0, Receive : 0 SPA FPGA IPC Counters: Transmit : 1057496, Drops : 0 Receive : 1057496, Drops : 0 SPA FPGA Packet Error Counters: 202 Receive error packets Framer (PM5383) Counters: Transmit : 80614555 packets, 1165231422 bytes Errors : 0 aborts, 0 underruns Receive : 81583399 packets, 2171463422 bytes Errors : 10 crc, 1072 runts, 0 giants, 54 aborts This output shows a healthy clear-channel DS3. The framing is C-bit. Notice that there are FEBEs shown. FEBEs may increment in small numbers over time without serious impact. The preceding output indicates that the counters cleared six days ago. Since then, 792 FEBEs have accumulated, which translates to about 5.5 per hour (assuming an even distribution). Another possibility is that some- thing happened within the past six days that caused FEBEs to increment in a short amount of time. In this case, it would be a good idea to clear the counters again, and keep an eye on the interface. If FEBEs increment regularly, you might want to start troubleshooting further. The show controllers output shows that there are no errors active, and no FEAC codes have been received. This information indicates a relatively healthy clear- channel DS3. A known problem with the PA-A3-T3 and NM-1A-T3 modules results in the receiver being too sensitive (see Cisco bug ID CSCds15318). If you'r