es are available that implement specific functions. One of these modules might be a powerful embedded DSP core (as offered now by several companies such 40. John G. Ackenhusen, Real-Time Signal Processing; Design and Implementation of Signal Processing Systems (Upper Saddle River, New Jersey: Prentice-Hall, 1999). 41. Lars Wanhammar, DSP Integrated Circuits (New York: Academic Press, 1999). 42. Stephen B. Furber, ARM System-on-a-Chip Architecture (Reading, Massachusetts: Addison-Wesley, 2000). Downloaded from Digital Engineering Library @ McGraw-Hill (www.digitalengineeringlibrary.com) Copyright © 2004 The McGraw-Hill Companies. All rights reserved. Any use is subject to the Terms of Use as given at the website. THE EVOLUTION OF NETWORK TECHNOLOGY: DISTRIBUTED COMPUTING AND THE CONVERGENCE OF NETWORKS 22 NETWORK PROCESSORS as TI, Infineon, and DSP Group) on which specialized DSP code runs along with the main SOC man- agement/supervision software that runs on the main embedded CPU. The SOC die is completed with embedded read-only memory (ROM) for storing executable code, programmable ROM (PROM) for prototyping, flash memory for retaining something beyond the power constraints, and random access memory (RAM) for storing data during operation. RAM comes in various types and flavors. The computing paradigm would then become as follows: The intended application would be partitioned into parts that would be implemented in hardware and parts whose behavior and func- tionality would be written in software. Special logic blocks or megacells would cover the hardware aspects. Some of them already existed in the company's logic block (cores) arsenal or would have to be developed. Some might have to be found outside the company among numerous third-party providers of IP cores. The rest of the application would be implemented in software, which would have to be running on the main embedded CPU or one of its adjacent peer CPUs or DSP inside the die. software engineers would then develop the code using high-level languages and c