s filter followed by a limiter. IN - LOCK DETECTOR PN CODE ESTIMATE PN GENERATOR PN CODE FEEDBACK LOGIC AND MODULO 2 ADDER TRACK CLOCK RECEIVED SIGNAL PN CODE PLUS NOISE DETECTOR TO CODE TRACKING LOOP TRACK EXAMINATION LOAD/TRACK PN CODE FEEDBACK LOGIC PERIOD LOGIC AND MODULO 2 ADDER GENERATOR SYNC WORTHINESS INDICATOR (SWI) Figure 1.5. A recursion-aided rapid acquisition by sequential estimation (RARASE) technique. Historical Survey which is used along with the in-lock indicator to determine when the n-stage shift register should switch from a reload to a tracking condition (see Figure 1.5). When compared with the basic RASE system, which uses only a sim- ple in-lock detector, the RARASE system, was shown [5] to achieve an acquisition time reduction by a factor of 7.5 for a PN code of length 2 Superscript(1) - 1 (15 stage shift register). Other modifications of Ward's initial RASE system have also been investigated [15], [16] which use the recursion relation of the PN code to improve the initial n-chip estimates. For example, Kilgus [15] sug- gests obtaining a number (n) of independent estimates of each of the n chips and making a majority logic vote among all n estimates to determine the ini- tial n-chip load of the local shift register. Alternately, Pearce and Ristenblatt [16] suggest a threshold decoding type of estimator similar to that used for block codes. Finally, Alem and Weber [2] suggest replacing the simple threshold decision contained within the in-lock detector of the RASE sys- tem with an optimum Bayes detector based on the first two statistical moments of the decision random variable, which is assumed to be Gaussian distributed. Historically, the serial synchronization of pseudonoise signals as intro- duced by Sage [17] was reported one year earlier than the RASE system. In this original version, a serial search was performed by linearly varying the time difference between the PN modulation on the incoming carrier and the PN waveform generated at the receiver with a continuous decision process det