3, we can estimate performance target of 2 CPU cores/4 X 100 MHz layer for this operation. While not to be interpreted as a hard perfor- mance target, we can use this number to track achieved performance versus target perfor- mance and quickly identify major misses. Chapter 9 Software performance Physical Layer complexity analysis We show a deployment example of the NXP LX2160 multicore Arm processor in a 5G Physical Layer processing scenario as per Fig. 9-1, assuming a high-level functional map- ping as shown in the figure, with the shaded areas offloaded to an accelerator: A generalized use case is defined through the following key parameters: 5G/NR eMBB DL/UL OFDMA modem Downlink slot: 2 symbols PDCCH, 1 symbol DMRS, 11 symbols Transmit Uplink slot: 2 symbols PDCCH, 1 symbol DMRS, 10 symbols Receive, 1 symbol Rx/Tx switch up to 100 MHz single carrier RF bandwidth 30-KHz subcarrier spacing, 0.5 ms TTI. 1 X DMRS/slot 8 antennas, 4 layers 16 UE/TTI downlink/uplink throughputs of 2.5 Gbps at MAC/PHY level DL From MAC UL To MAC CRC Attachment Code Block Concatenation Code Block Segmentation CRC validation Forward Error Correction Forward Error Correction Rate Matching Rate De-Matching Code Block Concatenation Scrambling De-Scrambling Modulation De-Modulation Layer Mapping Layer De-Mapping Precoding Channel Estimate, Equalize Option 7-2 To RU From RU FIGURE 9-1 L1 processing in DU for Shared Channel complexity analysis. DU, distributed unit. 314 Open Radio Access Network (O-RAN) Systems Architecture and Design Phase 1: theoretical analysis We do a performance analysis for the eMBB receive operation by breaking down the processing chain into low-level operations that can be counted in a spreadsheet calculator, for example: Channel estimation. The received eCPRI channel carries post-fast Fourier transform (frequency domain) IQ samples. In the DMRS symbol, extract all subcarriers which contain DMRS pilot sequence. The frequency-domain channel estimation function implies multiplying each subcarrier with the known transm