s case, the TDM link between B and C is solely an IP data transport for the application. Again, the QL information could be carried in SSM bits or an equivalent for the transport type. Router C will recover the frequency from the line clock as it can see it is traceable to a PRC and use it as the network clock for the node. However, the network from router C to router D does not support SyncE, but router C supports the G.8265.1 packet master function. Router C uses the reference frequency recovered from the TDM circuit as a source for the PTP G.8265.1 master. The QL information, signaling traceability to a PRC/PRS, is mapped onto the appropriate PTP clock quality information such as the clockClass at- tribute. This information is carried in the Announce message forwarded to router D. Router D supports the PTP slave function and sees the Announce message indicating traceability to a PRC/PRS source of frequency. It then initiates a PTP message flow with the master port on router C (see the section "Negotiation" in Chapter 7). Router D uses the flow of PTP timestamps to re- cover the frequency and derive the network clock from it. That clock is then used as a source of fre- quency for other circuits-such as SyncE-onto other nodes further downstream. For all this interoperability to work effectively, there must be an understanding of how to map the different clock QL levels between the different systems of carrying frequency. Table 9-2 shows the mapping of QL information between the different mechanisms, which is outlined in Table 1 of G.8265.1. To take the example in Figure 9-9 and assuming it is an Option I network, if router A gets an SSM value of 0x2, it interprets it as QL-PRC. The ESMC value would then also be QL-PRC, and router B would turn it back to an SSM value of 0x2. Router C would recover that SSM and map it to clockClass of 84 for the PTP link. Router D would then interpret that clockClass as QL-PRC for the downstream SyncE/ESMC. Table 9-2 Mapping of QL Values Between Different Frequency Transport Techn