atible with digital computers. It is also compatible with signaling. A digital exchange is lossless. There is no insertion loss as a result of a switch inserted in the network. It exploits the continuing cost erosion of digital logic and memory; LSI, VLSI, and VHSIC insertion. 13 Two technical issues may be listed as disadvantages: 1. A digital switch deteriorates error performance of the system. A well-designed switch may only impact network error performance minimally, but it still does it. 2. Switch and network synchronization, and the reduction of wander and jitter, can be gating issues in system design. 6.11.2 Approaches to PCM Switching 6.11.2.1 General. A digital switch's architecture is made up of two elements, called T and S, for time-division switching (T) and space-division switching (S), and can be made up of sequences of T and S. For example, the AT&T No. 4 ESS is a TSSSST switch; No. 3 EAX is an SSTSS; and the classic Northern Telecom DMS-100 is TSTS-folded. Many of these switches (e.g., DMS-100) are still available. One thing these switches have in common is that they had multiple space (S) stages. This has now changed. Many of the new switches, or enhanced versions of the switches just mentioned, have very large capacities (e.g., 100,000 lines) and are simply TST or STS switches. We will describe a simple time switch, a space switch, and methods of making up an architecture combining T and S stages. We will show that designing a switch with fairly high line and trunk capacity requires multiple stages. Then we will discuss the "new look" at the time stage. 6.11.2.2 Time Switch. On a conceptual basis, Figure 6.16 shows a time-switch or time-slot interchanger (TSI). A time slot is the 8-bit PCM word. Remember, it expresses the voltage value of a sample taken at a certain moment in time. Of course, a time slot consists of 8 bits. A time-slot represents one voice channel, and the time slot is repeated 13 VHSIC stands for very high speed integrated circuit. DIGITAL NETWORKS ABCDEFGH Figure 6.16 A time-d