on. Microlatch may be very difficult to detect; the anomalous current consumption may be within the normal operating range of the device. Latchup of devices often exhibits differing current signatures depending on the region of the circuit which is affected. Characterization testing must be capable of identifying each of these conditions in order to set valid criteria for the detection mechanism. Consideration may be given to design at the module applications level for protection, detection, and recovery provisions, or the procurement of modules which incorporate such features within multi-chip modules. Latchup Protection Technology (LPTT) circuitry from Space Electronics Inc., for example, includes current limiting protection to prevent device damage due to latchup occurrence, detection of the increase in current, shutdown of the device for the required interval, and return of the powered device to normal operation within specially designed multi-chip modules. Characterization testing of the device requiring protection must identify the current signature which is indicative of SEL occurrence, the shutdown time necessary to ensure recovery from latchup, and the current limiting value necessary to preserve device reliability. The elimination of susceptibility to Single Event Burnout (SEB) requires the use of n- channel power-MOSFET devices from manufacturers which are designed and processed to prevent SEB. Applications techniques require derating of the drain-to-source voltage by an amount sufficient to achieve immunity, or to utilize p-channel power-MOSFETS which do not exhibit susceptibility. Elimination of the susceptibility to Single Event Gate Rupture (SEGR) requires the use of power-MOSFET devices from manufacturers which are designed and processed to reduce susceptibility. As in SEB, application techniques to prevent SEGR also require derating of the drain-to-source voltage by an amount sufficient to achieve immunity. Elimination of failure due to the presence of micro-dose or single event dielectric ruptur