fference product." In particular, the DLL com- BAND-PASS DETECTOR EARLY n;(1) VOLTAGE- PN CODE CONTROLLED FILTER GENERATOR CLOCK F (s) S (1) -q(f) BAND-PASS DETECTOR DITHER GENERATOR Figure 2.21. A non-coherent double dither loop. FROM BPD, FROM BPD, ERROR + OUTPUT ERROR OUTPUT FROM BPD2 FROM BPD2 Figure x 2.22. A simplification of the implementation in Figure 2.21. 92(1) BAND-PASS y2(f) DETECTOR E + (f) 9, (f) n;(+) BAND-PASS DETECTOR 242 (1) BAND-PASS y2(+) DETECTOR E (f) BAND-PASS 12(1(1) DETECTOR PN CODE VOLTAGE- GENERATOR CONTROLLED FILTER CLOCK Figure 2.23. An equivalent loop model for the double dither loop. The Modified Code Tracking Loop putes as its error signal8 e(t) = (2.88) where E'+(t) and y'+(t) are normalized versions of their counterpart defini- tions in (2.3) and (2.5), respectively, e.g., (2.89) and similarly for y'+(t). On the other hand, the DLL (Figure 2.24) com- putes as its error signal e(t) = [Km.H(p)(8'(t) + Et(t))][Km_H(p)(s_(t) 8'+(t))] = KmKm(y'_(t)+y(t))(y_(t)-y(t)) (2.90) Clearly, from (2.88), any unbalance in the arm gains, i.e., Km # Km+, will produce an undesirable loop dc offset, whereas (2.90) is insensitive to this effect. Certainly, if Km_ K Km = the two loops will have identical theoretical performance. Any further merits of the DLL over the conventional DLL are a matter of practical implementation and a detailed discussion of these considerations is beyond the scope of our presentation here. The interested reader is referred to [9]. 2.7 THE MODIFIED CODE TRACKING LOOP Still another PN code tracking loop configuration that attempts to combat the gain imbalance problem of the DLL without sacrificing tracking per- formance, but now with hardware simplicity rivalling the TDL, is the mod- ified code tracking looop (MCTL) [10], [11] illustrated in Figure 2.25. The principal idea of this configuration is to replace the sum channel signal of the DLL with a reference signal derived from the on-time PN code, the primary advantage being the elimination of an entire processing channel.