00 m 1/cm -S sea-level flux Figure 6.5. Illustration of the terrestrial cosmic ray shower caused by the interaction of galactic cosmic rays with the Earth's atmosphere [308]. II-60 Altitude, Thousands of Feet Latitude, degrees Figure 6.6. Variation of the atmospheric neutron flux with a) altitude, and b) latitude [307]. 6.3.2 Historical Perspective and Recent Studies Oddly enough, the first paper to ever deal with the issue of SEU was not a paper on the use of electronics in the space environment, but a paper assessing scaling trends in terrestrial microelectronics [311]. Interestingly, the authors predicted that the minimum volume of semiconductor devices would be limited to about 10 um on a side due to terrestrial cosmic ray upsets! The actual occurrence of soft errors in terrestrial microelectronics did not manifest itself until some time later, shortly after the first observations of SEU in space [73]. This first from authors at Intel found a significant error rate in DRAMs as integration density increased paper to 16K and 64K, spurring a flurry of SEU-related work in the late 1970's [312]. The primary cause of soft errors at the ground level was quickly diagnosed as alpha-particle contaminants in packaging materials. For example, according to Ziegler, the Intel problem was traced to a new LSI ceramic packaging plant that had just been built downstream from the tailings of an abandoned uranium mine [308]. Radioactive contaminants in the water used by the factory were contaminating the ceramic packages they manufactured. After considerable early activity, the II-61 terrestrial soft error problem was mostly alleviated by using low-activity materials and on-chip shielding coatings [308,313]. Occasionally, changes in suppliers or procedures have caused semiconductor manufacturers temporary but considerable headaches due to raised radioactive contaminant levels in materials such as nitric and phosphoric acid [308,314]. The march toward higher integration densities has made soft-error concerns a continual design co