t, a layered software services architecture. (Source: AMCC) Downloaded from Digital Engineering Library @ McGraw-Hill (www.digitalengineeringlibrary.com) Copyright © 2004 The McGraw-Hill Companies. All rights reserved. Any use is subject to the Terms of Use as given at the website. AMCC nPTM FAMILY OF NETWORK PROCESSORS AMCC NPTM FAMILY OF NETWORK PROCESSORS 97 processor inside the same network processor. Writing task distribution algorithms in such a comput- ing model remains tedious. It also does not offer any guarantee of performance. In addition, even if a designer experiments with a certain traffic load context and creates superbly crafted code that imple- ments such a fine-tuned task distribution, the code will still need to be radically rewritten as soon as some new feature or functionality is introduced into the overall application code. This can happen at any time as part of mere upgrading or maintaining the code. In AMCC's single-image computing model, software engineers write software in one logical block of code as if they were programming one single logical CPU. They do not worry about allocating tasks or scheduling. As long as the clock cycle budget allows more tasks to be executed, the model, which is based in zero-cycle task switching overhead, guarantees that the written code will be executed at wire speed without any further tweaking and tinkering. Perpetual load balancing is no longer neces- sary among multiple cores. In addition to the fully functional preintegrated hardware development systems that enable the par- allel development and testing of hardware and systems code in real-life networks, AMCC also offers a C/C + + compiler, an assembler, and a debugger, which facilitate the software development cycle. However, compared to the extent and quality of the development tools offered by some other vendors, this set of tools may be considered insufficient for enabling the wider-scale adoption of the company's platform by many more network equipment vendors (NEVs). TRAFFIC MANAGEMENT To scale p