ponents from optoelectronic transceivers, SONET and POS framers, and PHY and MAC chips all the way to powerful and scalable switch fabrics, backplane interconnects, and serdes chips. The IQ2000 is positioned as an OC-48 processor capable of performing all the necessary opera- tions for packet processing between layers 4 and 7. These operations include packet inspection, clas- sification, filtering, encryption, modification, address translation, policy enforcement, traffic shaping, and multicast management. The chip features four full-duplex 1.6 Gbps interfaces which combine to give up to 12.8 Gbps of aggregate bandwidth, properly designed to match the needs of four embedded 32-bit RISC processor cores that run at 200 MHz. The cores are inspired by the MIPS-I architecture, but their instruction set is not fully MIPS compatible. Vitesse provides all the required development tools. The IQ2000 can be configured in multichip schemes, enabling the company's customers to build and scale more pow- erful systems as needed. The IQ2000 is unusual among NPUs in the sense that it uses RambusTM. based RDRAM memory to store packet payloads. However, with only one RDRAM channel that provides a peak data transfer rate of 1.6 GBps, the IQ2000 does not perform as well as other com- petitive OC-48 network processors in memory bandwidth. Vitesse is supporting development with a series of hardware evaluation/development boards/kits/ platforms and software development tools, including layer 2 and layer 3 application reference code, software support libraries, compilers, and SO on. The latest member of the company's network processor family is the IQ2200. The IQ2200 is not only fully pin compatible with the IQ2000, but it also operates at twice the core frequency of the IQ2000 and therefore provides twice the packet-processing performance. In addition to providing OC-48 performance, another major characteristic of the IQ2200 is that it has an integrated Common Switch Interface (CSIX) interface that enables it to natively connect on Vite