entually look at network processor architectures and discuss the appropriate design choices by ven- dors. The arguments will only make sense if the reader can put them in the context of their applica- bility in a bottom-up approach, knowing what feature is useful in which context and what would actually be desirable (if something is missing) from a specific architecture. Downloaded from Digital Engineering Library @ McGraw-Hill (www.digitalengineeringlibrary.com) Copyright © 2004 The McGraw-Hill Companies. All rights reserved. Any use is subject to the Terms of Use as given at the website. NETWORK PROCESSORS: JUSTIFICATION Downloaded from Digital Engineering Library @ McGraw-Hill (www.digitalengineeringlibrary.com Copyright © 2004 The McGraw-Hill Companies. All rights reserved. Any use is subject to the Terms of Use as given at the website. Source: NETWORK PROCESSORS CHAPTER 3 PACKET PROCESSING In the previous chapter, we provided a general overview of the various switching technologies that possess evolving applicability, flexibility, and sophistication. The evolution of the concept and the technology were explained in relation to both time and complexity. We discussed how switching meth- ods perform specific tasks. We also identified the engineering trade-offs and caveats that designers most often confront when using these approaches. Most of these technologies are currently implemented in some of the most representative cutting- edge routing and switching gear in the world. However, these switching engines are not just suspended in thin air. They are invariably an integral part of an overall routing/switching system architecture. Within the architecture, a mind-boggling amount of complex operations takes place in real time in orchestrated fashion. These operations usually become targets for network processing units (NPUs) in the most recent designs. We need to step back and examine several factors that must occur on the actual switching/routing system engine, SO that the reader can understand the full scope of