 GPPs comes in the instruction set and memory management. are the processors that power desktop computers and are The instruction set of a DSP is customized to particular at the center of the computer revolution that began in the applications. 1970s. The landscape of microprocessor design is dotted For example, a common signal processing function is with a large number of devices from a variety of manu- a filter, an example of which is the Direct Form II infinite facturers. These different processors, while unique in impulse response (IIR) filter. Such a filter is seen in their own right, do share some similarities, namely, a ge- Figure 2.4a-2. neric instruction set, an instruction sequencer, and As seen in Figure 2.4a-2, the signal path is composed a memory management unit (MMU). of delays on the incoming signal of one sample, z-1, There are two general types of instruction sets: (1) and the multiplication of each delayed sample by machines with fairly broad instruction sets, known as a coefficient of the polynomial describing either the complex instruction set computers (CISCs); and (2) poles (a) or zeros (b) of the filter. If each delayed machines with a narrow instruction set, known as re- sample is considered to be a different memory loca- duced instruction set computers (RISCs). Generally, the tion, then to quickly implement this filter, it is desir- CISC instructions give the assembly programmer pow- able to perform a sample shift in the circular buffer, erful instructions that address efficient implementation perform a multiply and an add that multiplies each of certain common software functions. RISC instruction delayed sample times the corresponding polynomial sets, while narrower, are designed to produce efficient coefficients, and store that result either in the output code from compilers. The differences between the CISC register, in this case y[n], or into the register that is and RISC are arbitrary, and both styles of processors are added to the input, x[n]. converging into a single type of instruc