ceiver is shut down, their clocks must differ by at least 2 X 10-4 sec before signif- icant errors take place once the clocks start back up again. This means that the leading edge of the receiver-clock equivalent timing pulse is 2 X 10-4 in advance or retarded from the leading edge of the pulse received from the distant end. Often an idling signal is sent on synchronous data circuits during periods of no traffic to maintain the timing. Some high-stability systems need resynchronization only once a day. Note that thus far in our discussion we have considered dedicated data circuits only. With switched (dial-up) synchronous circuits, the following problems exist: No two master clocks are in perfect phase synchronization. The propagation time on any two paths may not be the same. Thus such circuits will need a time interval for synchronization for each call setup before traffic can be passed. To summarize, synchronous data systems use high-stability clocks, and the clock at the receiving device is undergoing constant but minuscule corrections to maintain an in-step condition with the received pulse train from the distant transmitter, which is accom- plished by responding to mark-to-space and space-to-mark transitions. The important considerations of digital network timing were also discussed in Chapter 6. 10.7.4 Bits, Bauds, and Symbols There is much confusion among professionals in the telecommunication industry over terminology, especially in differentiating, bits, bauds, and symbols. The bit, a binary digit, has been defined previously. The baud is a unit of transmission rate or modulation rate. It is a measure of transitions per second. A transition is a change of state. In binary systems, bauds and bits per second (bps) are synonymous. In higher-level systems, typically m-ary systems, bits and bauds have different meanings. For example, we will be talking about a type of modulation called QPSK. In this case, every transition carries two bits. Thus the modulation rate in bauds is half the bit rate. The industry 