e PLL's effective steady-state control voltage. This ensures that the frequency-divided VCO reference signal S1/N(t) oscillates at the same frequency as in(t). Fig. 4.6 shows a setup that can be used to determine the reference waveforms Svco(t) and S1/N(t). 4.2.3 Signal phases and phase-modulated signal models Sin(t) Svco(t+Oop(t)) S1/N(t+Oop,1/N(t) Svco(t) S1/N(t) Figure 4.6: Setup for determining the reference waveforms Svco(t) and S1/N(t). These waveforms are chosen to equal the steady-state output of the VCO (frequency divider) with the VCO input being driven by a control voltage with constant value. This value is hereby chosen to equal the DC component of the PLL's effective periodic steady-state control voltage. This ensures that S1/N(t) oscillates at the same frequency as Sin (t). With respect to the above reference waveforms, the actual VCO and frequency-divided VCO signals are described as Xvco(t) = (4.15) X1/N(t) . (4.16) Here, ((t) and 01/N(t) are small-signal phase variations that arise in response to small- signal phase variations Oin(t) at the input. Furthermore, Oop(t) and Oop,1/N(t) are pe- riodic operating point phase variations due to periodic variations in the VCO's control voltage when the PLL is operating in steady state (i.e. Oin(t) = 0). Although these operating-point phase changes are typically small, they can be of importance in small- signal computations. This especially holds for PLLs based on mixing-type PFDs. By now, the reader is probably wondering what's SO important about these signal mod- els to spend this much time on their construction. The reason for this lies in the fact that for some types of PLLs, especially those using a mixing PFD, correct signal mod- els are of utmost importance in obtaining valid results. Being sloppy in constructing the signal models may give rise to non-physical behavior and results that disagree with numerical simulations and measurements. Example (Determining signal models): Fig. 4.7 shows a PLL with a mixing PFD and sinusoidal input and output signa