tains a half-size PI40C card. This means that for redundancy and relia- bility, this configuration must be doubled. Assume that six slots will be devoted to switch fabric cards. If the physical arrangement of the serdes links can be handled properly, this can possibly be brought down to five if the two redundant PI40C cards are combined in one slot of the chassis as half-size cards. If the switching bandwidth requirements for the future of our MSR dictate a fifth PI40X, then a new PI40C will automatically be needed. However, the elegance of the approach starts appearing when our designer visualizes a second shelf in the same rack, where 12 new slots are available. A new PI40C or a combination of a PI40C and several PI40Xs can be put together in the new shelf and pro- duce a multiple-shelf MSR that expands reliably and spectacularly. It should also be clear that the switch fabric cards do not exhibit a density of integration that is anywhere close to the one encountered on line cards. As a result, power density is not as big a con- cern as it is with line cards. This corroborates the designer's initial hunch that the switch fabric cards could and should be redesigned in half-size to save slots. However, the limiting factor for the tight integration will be the physical management of the numerous links interfacing these multiple fabric cards with the backplane. System Considerations The designer now starts thinking about the overall system functionality. First, he or she must consider what happens on the line cards. Line Cards Line cards will be based on Agere's network processors. The APP550 will be used for each line card, as shown in Figure 16.5, handling the 4X1 GbE or OC-48c ATM/POS links, whereas the APP750NP/TM chipset will be used for the 10 GbE line cards. Depending on the applications that are expected to run, a further level of granular thinking is required. For example, the APP5XX fam- ily offers different NPU components optimizing the cost solution. The APP550 is a good choice for a full-fledged and va