ores. © 2009 by Taylor & Francis Group, LLC Long Term Evolution: 3GPP LTE Radio and Cellular Technology of two, proper decimation is performed by dividing the DFT output by a num- ber representing the occupied bandwidth. Taking the 1.200-point DFT, we have used divisors 300, 150, 75, and 19 to realize variable bandwidths of 20, 10, 5, and 1.25 MHz, respectively. From the resulting 23-b output signal, the sign and least significant 11 b are further used (see Figure 11.5). The power fluctuations of DFT- precoded waveforms are significant despite DFT precoding because raised cosine filtering is not included in LTE. 11.1.5 Uplink System Integration The complete physical layer for the joint detection of two users with a base station using two antennas in the uplink is summarized in Figure 11.6. At the terminal side, it comprises the DFT precoding, mapping to resource units, IFFT, multiplex- ing with pilot signals, adding of the CP, and the frequency advance, based on the fine synchronization in the downlink. At the BS side, after removal of the CP and FFT, pilots are separated, the channel is interpolated, and the residual phase drift is obtained. The equalizer weight matrices are computed for each subcarrier and the users are separated in the frequency domain using the linear MMSE detector. Finally, because of the residual fine frequency estimation error in the downlink, the instantaneous phase offset is individually corrected for each terminal before the signals are fed into the IDFT. The entire physical layer of one LTE transceiver is implemented in two FFP basic motherboards, each containing two Virtex2Pro/100 FPGAs. At the receiver, in both uplink and downlink directions, four TI 6713 DSPs are used for channel interpolation and equalizer weight matrix calculations. FPGAs operate at a 30.72- MHz clock. The functional mapping on hardware is sketched in Figure 11.7 at the terminal side. Framing and forward error encoding (FEC) in the uplink direction and decoding and demapping for the downlink direction are hosted i