4 Mbps Added process and its complexity 24-DS-Os + framing bit Overhead 6.312 Mbps Added 4-DS-1s 44.736 Mbps 7-DS-2s form an outbound 1.544 Mbps signal (I call this the M01 stage; that's my nomenclature, used for the sake of naming continuity). That signal then enters the intermediate M12 stage of the multiplexer, where it is combined (bit interleaved) with three others and a good dollop of align- ment overhead to form a 6.312 Mbps DS2 signal. That DS2 then enters the M23 stage of the mux, where it is bit interleaved with six others and another scoop of overhead to create a DS3 signal. At this point, we have a relatively high-bandwidth circuit that is ready to be moved across the wide area network. Of course, as our friends in the UK are wont to say, there is always the inevitable spanner that gets tossed into the works (those of us on the left Downloaded from Digital Engineering Library @ McGraw-Hill (www.digitalengineeringlibrary.com Copyright © 2004 The McGraw-Hill Companies. All rights reserved. Any use is subject to the Terms of Use as given at the website. Telephony Telephony side of the Atlantic call it a wrench). Keep in mind that the 28- (do the math) bit-interleaved DS1s may well come from 28 different sources- which means that they may well have 28 different destinations. This translates into the pre-SONET digital hierarchy's greatest weakness, and one of SONET's greatest advantages. In order to drop a DS1 at its intermediate destination, we have to bring the composite DS3 into a set of back-to-back DS3 multiplexers (sometimes called M13 multiplexers). There, the ingress mux removes the second set of overhead, finds the DS2 in which the DS1 we have to drop out is carried, removes its over- head, finds the right DS1, drops it out, and then rebuilds the DS3 frame including reconstruction of the overhead, before transmitting it on to its next destination. This process is complex, time consuming, and expen- sive. So, what if we could come up with a method for adding and dropping signal components that elim