ect occurs upon the detec- tion of no transitions on the incoming signal (before descambling) for time T, where 2.3<T<100 us. The LoS defect is terminated after a time period equal to the greater of 125 us or 2.5XT" containing no transition-free inter- vals of length T', where 2.3<T<100 us. VT1.5 Rate-Electrical Interface A Loss of Signal/Line VT Interface (LoS-LV) defect occurs when no transitions on the incoming signal for a time period equal to 175 + 75 contiguous pulse positions are detected. A LoS-LV defect is terminated upon detecting at least 20 percent of the transitions on the incoming signal over a time period equal to 175 +1 75 con- tiguous positions. Traditional SONET Architectures Primitives for failure and performance monitoring Figure 3-31 Near-end events and Physical Section Path (facility) media far-end reports. Defect Anomaly Defect Anomaly Defect Anomaly Defect Near-end BIP-N SEF/LoF BIP-N (L) AIS-L BIP-N (P) LoP-P BIP-2 (LV) SEF-LV AIS-P LoF-LV TIM-P UNEQ-P Far-end REI-L RDI-L REI-P RDI-P REI-LV RDI-LV ERDI-P LoS = Loss of Signal BIP-N = Bit-Interleaved Parity-N SEF = Severely Errored Frame REI-L = Remote Error Indication-Line REI-LV = Remote Error Indication-Line, VT Interface AIS = Alarm Indication Signal SEF-LV = Severely Errored Frame/Line, VT Interface LoS-LV = Loss of Signal/Line VT Interface RDI-L = Remote Defect Indication-Line RDI-LV = Remote Defect Indication-Line, VT Interface TIM-P = Trace Identifier Mismatch-Path UNEQ-P = Unequipped-Path ERDI-P = Enhanced RDI-Path Section The following primitives apply to the STS-N section level: Section BIP-8 error A BIP-8 error event is an anomaly that occurs when the locally computed BIP-8 does not agree with the BIP-8 sent by the signal source. A BIP code represents the even parity of a given signal for each bit position. Section BIP-8 is computed over all bits of the previous STS- N(c) frame after scrambling. The computed BIP-8 is placed in the first B1 byte of the next frame before scrambling. Loss of frame (LoF) An LoF defect occurs when a 