 multiplexed within a DS3. Each of those DS1s has its own clocking, framing, and encoding that must be maintained within the DS3. The DS3 must also have its own clocking, framing, and encoding, which must not interfere with the multiplexed circuits within it. There are a couple of different framing methods you can use. Your choice should be dictated by the intended use. M13 (pronounced M-one-three, not M-thirteen) is short for Multiplexed DS1 to DS3. When a multiplexer builds a DS3, it goes through two steps: M12 and M23. The com- bination of these steps is referred to as M13. Figure 22-1 shows the steps involved in converting 28 DS1s into a single DS3. 1.544 Mbps DS1 #01 6.312 Mbps DS1 #02 DS2 #1 DS1 #03 DS1 #04 DS1 #05 DS1 #06 DS2#2 DS1 #07 DS1 #08 44.736 Mbps DS1 #21 DS1 #22 DS2 #6 DS1 #23 DS1 #24 DS1 #25 DS1 #26 DS2 #7 DS1 #27 DS1 #28 Step one Step two Channelized M13 (Multiplexed DS1 to DS3) Figure 22-1. M13 multiplexing Originally, DS3s were used for aggregating T1s. Imagine 28 T1s, all terminating at a CO but originating at 28 different locations at varying distances from it. Because the T1s are not related, they may be out of sync with each other. The original designers knew that this was a probability, SO they designed the first stage of the multiplexing process to deal with the problem. The speed of a T1 is generally reported as 1.544 Mbps. If you multiply 1.544 Mbps by 4, you get 6.176 Mbps. Why, then, is a DS2, which is four T1s, shown as 6.312 Mbps? To compensate for T1s that are not delivering bits in a timely manner (+/- 77 Hz), the M12 multiplexer stuffs bits into the signal to get them up to speed with the other T1s in the group. Chapter 22: DS3 Each T1 is brought up to a line rate of 1,545,796 bits per second after bit stuffing. In all, 128,816 additional framing and overhead bits are added, which brings the total to 6.312 Mbps (1,545,796 * 4 + 128,816). The receiving multiplexer removes the extra bits. Overclocking the T1s ensures that the DS3 should never cause a timing problem with the indivi