g latency when working at wire speeds, especially with time-sensitive applications such as slot-based time division multiplexing (TDM). Traditional NPU customers (such as ASIC designers) often struggle to fine-tune and balance multiple aspects of an entire design in order to maintain adequate levels of performance. Implementing a complete solution around a design that is based on a Net ASIC requires some soft- ware development, but that development must occur along more traditional software-engineering directions. In fact, it entails writing control plane code that will run on a supervisory host central pro- cessing unit (CPU) and not in the packet-processing piece of fast silicon. The host is programmed with languages, tools, and methodologies that are familiar to anyone in the engineering field. Therefore, these companies are not confronted with the need to suddenly have their engineers climb up a new and steep learning curve. This further justifies the decision to use a Net ASIC instead of using an NPU or having to design a complex networking ASIC. Traditional network processors and Net ASICs are in fierce competition. Given the global com- mercial and technological prowess of the main NPU vendors (IBM, Intel, and Motorola), it will not be surprising that some of the Net ASIC vendors will soon disappear. In fact, as of this writing, Entridia, a promising and well-funded startup from Southern California, which had actually been one of the pioneers of the Net ASIC concept, was forced to lay off its staff, close its doors, and sell its technology to Stratigos Networks. At the same time, Internet Machines (www.internetmachines.com) announced that it was suspending its Net ASIC offering. These are just a few examples of the major shake-up and consolidation that this new industry will undergo before the fittest platforms, technologies, and vendors survive. These winners will then divide up the market in a pragmatic way. This usually happens in new industries right after the initial phase fades away and the associate