al bus with the FPGA via the external memory interface and is responsible for 300 carriers. Customized routines for multiplication of small matrices provided by TI have been used in the MMSE equalizer weight calculation. A complex-valued calculation is always used. For the matrix inversion step in the MMSE weight calculation, a closed-form expression of the inverse 2 X 2 matrix is used instead of Gauss-Jordan. This is less complex for two transmit and two receive antennas. A noise variance estimate is needed for the MMSE calculation. The estimated values from the local- ized channel interpolation are used for this purpose. Reading coarse channel estimates into the DSP, performing channel interpola- tion and MMSE weight matrix calculation, and writing weight matrices back into © 2009 by Taylor & Francis Group, LLC Long Term Evolution: 3GPP LTE Radio and Cellular Technology the FPGA have been finished in about 0.3 ms in downlink and 0.45 ms in uplink, where the additional phase estimation is needed. In this way, the 20-MHz LTE channel variation over frequency and time is tracked in real time. The stream of received signals is buffered after FFT for 12 OFDM symbol durations before entering the MIMO-MMSE equalizer (see Figure 11.4). In this way, weight matrices arrive time aligned with received signals. The buffer consumes 90-kbyte on-chip memory. This buffering allows a higher mobility, but time for buffering (=0.85 ms) must be regarded when latency is evaluated. The MIMO-MMSE equalizer implementation is implemented in the FPGA (see VTS Magazine). It uses a pipelined matrix-vector multiplication where mul- tiple on-chip multipliers are operated in parallel and weight matrices are exchanged from one subcarrier to the next. 11.1.3.2 Frequency Offset Issues Despite the frequency advance introduced at the terminal, there is an inevitable frequency offset for each terminal due to the residual estimation error for the down- link CFO. It can be visualized directly after the MMSE equalizer in the frequency domain. In our te