ix will allow the receiver to synchronize to the adequate frame by acquiring its bit synchronization signal. Applications of synchronization are observed in video, digital audio, and digital tele- phony, for example. In the Synchronous Digital Hierarchy (SDH) standards, synchronization is very important because of the need to synchronize different multiplexed data frames, which usually hold different clock patterns. For this reason, several clock sources are used for synchronization. As priority one, an atomic cesium clock or a clock derived from a satellite can be used to synchronize the data frames. If the first priority is lost, the frames lock to a priority-two clock, which can be derived from another element within the network. If no other clock is available, the SDH network element clocks are locked to themselves, falling in a stage of "holdover"; meanwhile, a higher-priority clock is found in the network. Jitter The decision-making process at the receiver requires optimum timing of the digital signal (i.e., at the maximum eye opening of the demodulated bitstream). Variations from the optimum timing might exist, which are known as jitter. The effect of jitter on the decision-making process is illustrated in Figure 2.18. From this figure it can be seen that clock edge jitter can cause decisions to be made at less favorable times. Therefore, the probability of error can increase. Incoming noise and data-dependent timing effects Chapter 2 Data Transmission Data Eye Eye Jitter Clock Edge Jitter Clock Edge Jitter Fig. 2.18 Timing jitter and data eye: (a) clock edge jitter; (b) effect of jitter accumulation. Resulting Waveform unwanted clock resultant wanted clock Funwanted F. wanted Frequency component clock Fig. 2.19 Spectrum and resulting waveform of the jitter originated from an interfering spectral component: (a) spectrum of the desired clock frequency; (b) phasor representation of (a); (c) amplitude and phase modulation of resulting waveform. that arise from imperfections and limitations in the clock extrac