Preamble PCPCH(UL) T p-p T p-cdp T cdp-pcp Information and Control Data Figure 4.33 Timing of PCPCH and AICH transmission as seen by the UE, with Tcpch= 0. 4.3.11.4 DPCH/PDSCH Timing Figure 4.34 illustrates relative timing between a DPCH frame and the associated PDSCH frame, where the start of a DPCH and of an associated PDSCH frames are de- noted TDPCH and T PDSCH, respectively. Any DPCH frame associates itself to one PDSCH frame through the relation 46080 chips < TPDSCH - TDPCH < 84480 chips, i.e. the associ- ated PDSCH frame starts anywhere between three slot after the end of the DPCH frame up to 18 slots behind the end of the DPCH frame [1]. DPCH frame Associated PDSCH frame T DPCH TPDSCH Figure 4.34 Timing relation between DPCH frame and associated PDSCH frame. 4.3.11.5 DPCCH/DPDCH Timing Relations In the uplink the DPCCH and all the DPDCHs transmitted from one UE have the same frame timing. Likewise, in the downlink the DPCCH and all the DPDCHs carrying CCTrCHs of dedicated type to one UE have the same frame timing. 4.3.11.6 UE Uplink/Downlink Timing At the UE, the uplink DPCCH/DPDCH frame transmission takes place approximately To chips after the reception of the first significant path of the corresponding downlink The UMTS Network and Radio Access Technology DPCCH/DPDCH frame, where T is a constant defined as 1024 chips. Other timing relations for initialization of channels are in [1] and [5]. 4.3.12 Downlink Spreading All downlink physical channels (i.e. P-CCPCH, S-CCPCH, CPICH, AICH, PICH, PDSCH, and downlink DPCH) but excluding the SCH, follow the spreading operation represented by Figure 4.35. The non-spread physical channel consists of a sequence of three (i.e. +1, -1, and 0) real-valued symbols, where 0 indicates DTX. However, for the AICH, the symbol values depend on the exact combination of acquisition indicators to be transmitted. In the first step each pair of two consecutive symbols pass from serial-to-parallel and get mapped to an I and Q branch, where even and odd numbered symbols are mapped t