sible for a PTO to interconnect line terminals from two tion also entails the addition of 'wander' buffers at every multi- different manufacturers. This operational constraint is destined plexer, in order to accommodate slow variations in the inherent to because an increasing problem due to the progressive frag- delay of the transmission media (usually optical fibres these days). mentation of the erstwhile monopoly transmission networks These buffers themselves give rise to further undesirable trans- into a patchwork of smaller operations, all of which need to mission delays, which could push some PTOs towards the otherwise OPTICAL LINE TERMINAL FIBRE PROPRIETARY INTERFACE Non standard line code and STANDARD ELECTRICAL optical levels (G. 703) INTERFACE STANDARD FIBRE INTERFACE Standard Network Node Interface (NNI) OPTICS signal, at standard optical levels Functional integration of MUX and LTE has made G.703 electrical interface superfluous Figure 42.2 Comparison of interfaces needed in PDH and SDH environments: (a) current PDH; (b) SDH The basis of SDH 42/5 125 S 125 S INFORMATION PAYLOAD INFORMATION PAYLOAD 1 frame = 2430 bytes 81 + 2349 bytes Frame header = 81 bytes known as the Section Overhead SOH (This is not one continuous Information payload = 2349 bytes block, but is actually distributed Each byte represents a 64kbit/s channel throughout the Information Payload) Figure 42.3 The basis of SDH frame structure unnecessary adoption of costly echo cancellers on 64kbit/s circuits Mbit/s circuits, plus their North American counterparts at 1.5Mbit/s, throughout their networks. 6Mbit/s and 45Mbit/s. The general way that any of these PDH rate circuits are trans- ported by SDH is to map such a circuit into a 'Synchronous Con- 42.3 The basis of SDH tainer'. (See Figure 42.4.) A Synchronous Container can be viewed as a subdivision of the basic SDH frame structure, and it consists of Before investigating the SDH standards in detail, it is worth pausing a predefined number of 64kbit/s channels. The entire family of for a