 GET commands to the centralized network manager that runs on the system CPU card. Things can run either by periodic polling of the line cards or in some cases by exception. In the latter case, an SNMP trap is thrown when a special event occurs and the manager catches it for logging and reporting and perhaps subsequent actions. The last issue of interest to our designer is that the OC-48c card proposed by Agere can be con- figured with two different approaches in mind: to optimize performance or to optimize equipment density. On the OC-48 card, two NPUs will be needed in the highest-performance setting-one for each direction (ingress and egress). Something such as Agere's VPP chip can also be placed at the coproces- sor port to handle AAL2 traffic in a very dense configuration, if necessary. If security is needed, the possibility of a security coprocessor configuration must be evaluated. System CPU Card The level of expected activity on the system CPU card tells our designer to ori- ent his or her attention toward candidate boards with multiple CPUs. In addition to a native PowerPC, processors are available such as QED from PMC that embed multiple MIPS cores, which can handle many of these side chores that line cards conveniently offload onto the system card. To achieve the level of activity the designer expects on the host CPU where the routing protocols such as BGP and OSPF run usually requires a PowerPC of the caliber of a 7410. PMC is an example of a vendor that offers a multitude of processors that can fit on such cards. They will connect to the rest of the switch through the Compact PCI over the midplane, which also handles serdes-based connections between the cards. The host CPU will run embedded Linux or VxWorks as the operating system. The control CPU on the line cards usually runs VxWorks as the operating system, although Linux is sometimes chosen on the line cards as well. It often becomes more of an issue about the development tools and envi- ronment that is available to design, package, and deliver a