l in two possible ways (rotated 90 degrees with The standard also provides for a separate and distinct respect to each other) according to a 256-bit fixed se- method of achieving the same 5.5- and 11-Mbps quence. Because there are 11 megachips per second and rates: PBCC. PBCC is based on a convolutional code each chip carries one input data bit coded into two y's, (Figure 5.1-13). The coding is performed using a series of the net data rate is 11 Mbps. The 256-bit sequence helps shift registers, shown here as z superscript(1) through z6. At each step, to remove any periodicity in the output signal and thus a new input bit is presented to the coder and all bits are helps smooth the spectrum of the output. The relatively shifted to the right one step. The "+" symbols represent long period of the sequence means that any other in- modulo-2 additions that produce the output bits yo and terfering transmission is unlikely to be synchronized with y1 from the input and the stored bits. The coder can be it and will appear as noise rather than as valid code words, regarded as a machine with 26 = 64 possible states. In any making it easier to reject the interference. given state of the coder, two transitions to the next state Convolutional codes are usually decoded with the aid are possible (which occurs being determined by the new of a Viterbi trellis decoder. (Trellis algorithms can also be input bit) and two of the four possible outputs are used to decode block codes.) The trellis tracks all the allowed (again determined by the input). Thus, the se- possible state transitions of the code and chooses the quence of allowed outputs is highly constrained relative trajectory with the lowest total error measure. It would to the sequence of possible outputs. This code is known seem at first glance that such a procedure would lead to as a rate 1/2 code, because each input bit produces two an exponentially growing mess as the number of possible output bits. trajectories doubles with each additional bit received, input fixed 256-bit