rs, are multi-rack machines and the reduction of the real estate needed to accommodate them is one of the important design tasks, that involve mainly line cards that occupy in almost all the configurations the major part of the platform space. Dense line cards are not only beneficial due to the smaller occupation of platform space, but also allow evolutions of the electronics to be exploited at best. As a matter of fact, while full functionality adoption of the automatically switched optical network (ASON)/gener- alized multiprotocol label switching (GMPLS) control plane could push distribution of the OXC intelligence to perform correctly and on time all the needed protocols, in the routers the great part of the distributed processing is already carried in the line cards. This trend has a very important impact on the whole telecommunication network. Core routers are characterized by completely distributed architectures. In order to exploit very high-speed queues and processors, two techniques can be used: either the transmission speed is also increased SO to directly send to the elaboration part of the line card the received data streams after suitable adaptation (regeneration and physi- cal layer overheads termination, layer 2 header stripping, and SO on), or lower bit rate streams received from the transmission lines are suitably serialized taking into account the packet dimension SO to feed the electronic processing unit that is faster than the transmission lines. The second solution is better suited to optimize the transmission systems, but it is much less efficient in terms of density of the line cards. As a matter of fact, not only four 10 Gbit/s interfaces occupy much more space in the line card with respect to a single 40 Gbit/s inter- face, but also a certain amount of auxiliary electronics have to be deployed on the card for adaptation, serialization, and deserialization, and SO on. For this reason, router vendors have been the first to push for the adoption of 40 Gbit/s formats in transmission systems 