ted to scheduling and flow control. Among these issues, we discuss the LB algorithm and how it applies to a policy that decides how and when to discard packets. In the ASI chip, Agere has implemented a very flexible model that serves the traffic constraints in ATM networks extremely well. In a classical single LB implementation, the algorithm uses two parameters: the Limit (L) and the Increment (I) value. The Limit value corresponds to the bucket depth, whereas the Increment value corresponds to the leak rate of the bucket. In a dual leaky bucket (DLB) implementation, two buckets are applied to each connection. Depending on the application, each of the Limit and Increment parameters of the two buckets can be assigned to several connection parameters. For instance, in the context of an ATM connection, one bucket may be made to leak at the sustained cell rate (SCR), whereas the other may be made to leak at the peak cell rate (PCR). In that case, the ATM cells that do not conform can be tagged appropri- ately by setting their Cell Loss Priority (CLP) bit equal to one. Several variations of the DLB, including how to use the CLP bit as a policing parameter, are stip- ulated in the ATM Forum TM 4.0 specification. In Agere's approach, both cells with CLP = 0 or CLP = 1 are added to both buckets. All discarded cells are marked as either SCR or PCR discards. All action that will be taken is determined ultimately by the FPP and RSP programming, thereby giving tremendous flexibility to the systems designer. More specifically, it enables systems to be imple- mented that can answer the following questions for each connection: Which algorithm will be used? What will the negotiated cell rates be, including the SCR and the PCR? What will the ATM tolerance parameters be, including the maximum burst size (MBS), the burst tol- erance (BT), and the cell delay variation tolerance (CDVT)? What are the supported access line rates for frame-relay connections, such as the committed infor- mation rate (CIR)? AGERE'S APP750NP (EX-NP10) AND