without any degradation in performance. This enables the systems designer to deal with a table that is 72 bits X512K. It is cascadable (but with a degradation in performance) up to a maximum chain of 32 CAMs that together handle a very large lookup table of 72 bits X2M size. When a CAM is initialized, some design-specific procedures need to be followed. These proce- dures depend on the vendor and the actual chip. One system may require that all bit positions in every possible table entry be reset to 0, whereas all bit positions in the mask registers may have to be set to 1 before the table to be loaded is written into the CAM. We say that "we write the table to be searched into the memory" by initializing the CAM. The term learning refers to updating specific table entries. The common industry phrase denoting a usual search operation is "writing search keys to the CAM." We must accept it even though it is an unfortunate misnomer since loading a comparand to initiate search does not involve writing anything into memory. Most CAMs use key (comparand) sizes that are 72 bits long. Some applications require wider keys that are 144, 288, and lately even 576 bits. In fact, many CAM designs can easily handle several of them in native hardware. It is also interesting to keep in mind that some applications still require shorter keys-namely, 36-bit keys. This can pose a performance problem to CAM devices that are designed to support 72-bit keys. However, these can be handled at the systems level in various ways. We discuss some impacts of these variations on the overall systems design later in this chapter. CAMs are designed to run at different speeds and are typically clocked anywhere within the 66 to 133 MHz range. However, although a search is issued within one clock cycle, these frequencies only Downloaded from Digital Engineering Library @ McGraw-Hill (www.digitalengineeringlibrary.com) Copyright © 2004 The McGraw-Hill Companies. All rights reserved. Any use is subject to the Terms of Use as given at the website. SEARC