ses are absorbing processor clock cycles with the express purpose of achieving a net gain in system performance that can be translated into supporting higher data rates at lower power (the end-user benefit). The challenge is to deliver these benefits consistently given that user expectations increase over time and that physics tends to dictate the limits of any process that we are using to realise performance gain. In the context of HSPA, it is a real challenge to implement the PHY and MAC sufficiently robustly to provide a realistic chance of achieving the theoretical gains. The same imple- mentation issues apply to future iterations of 1XEV/DO. In practice, it always tends to be combination of techniques that together deliver performance improvements that are translat- able into a better more consistent single-user experience. But now we need to establish how or whether this translates into an experience gain for multiple users. 3.5 Contention Algorithms The well-established principle used in wire line and wireless systems is that a bidirectional communications channel is established between two communicating entities, people or ma- chines for example. Making Telecoms Work In a digital system, whether wireless or wire line, the channel can be a specific time slot within a frame and the time-domain space can be shared with other users. Multiple time slot channels can also carry multiple information streams between two discrete end points or multiple end points. These information streams as stated earlier may be variable rate or in other words asynchronous. They may also have varying degrees of asymmetry as a session progresses. In many telecommunications networks, asynchronous and asymmetric traffic is mapped on to an ATM (asynchronous transfer mode) multiplex for at least part of the end-to-end journey. Time slots in an ATM network are allocated in units of ten milliseconds. ATM and related traffic-shaping protocols are covered in substantial detail in Chapter 8 of '3G Handset and Network Design' SO will not be