 descending summation from the last CARRY gate outputs. As expected from the property of its universal, reversible-logic gate components, the above plain-adder circuit is fully reversible, meaning that no information is lost (the simultaneous knowledge of A and D=A+1 B giving knowledge of B). The function of the circuit (also referred to as a "quantum network" in QIT jargon), can by symbolized by the notation B) - (A, A - B). (15.6) In the same jargon, the operands A, B are also called registers, by analogy with the classical or von Neumann (VN) computer, which was described in the previous section. A remarkable feature of the (A, B) (A,A+B) network is that the many "garbage bits," which are generated by the intermediate computation steps, are eventually disposed of. Furthermore, the ancilla bits 0 used at the input (see Fig. 15.12) are all reset to their initial values, which makes them available for any future use in a larger quantum network. The reverse operation of CARRY is effected by the same gate as shown in Fig. 15.12, but with the operations performed in the reverse order, as in a mirror version of the circuitry, or reading the diagram from right to left. Reversible computation But we aren't finished yet with the plain-adder network: it also reserves some interesting surprises!! First, the plain-adder network can be used in the reverse order, i.e., feeding input- register data A, B from right to left in Fig. 15.12, which yields the operations (A, B) (A, A - B) for A>B (15.7) 4,2n+1-(B-A)] for A<B (15.8) where n + 1 is the size of the second output register. In both cases (A > B or A< B), the network performs the subtraction function. In the second case it can be shown that the bit of highest weight is always 1, which represents a "negative-sign bit" for the result of the difference A - B. Second, the plain-adder network also makes it possible to perform modular algebra with the functions of multiplication, and exponentiation. Indeed, modular multiplication and exponentiation, i.e., (A, B) -> (A, A x B ) 