ard off-the-shelf CPU. The more recent hardware implementations of packet content search and classification are completely focused toward supporting designs realized with network processors. The classification algorithms themselves depend on the application at hand. Generally, when one looks for match, several criteria actually constitute the required degree of matching. To give an anal- ogy, if one needs to assert whether a specific phone number is from the Boston area, one does not need to exhaustively list all the numbers in Boston among telephone users in the United States and then check where each number is located in a more elaborate way. One just has to check the area code and ensure it is the number 617 in this example. On the other hand, if one wants to sort out the numbers that are in Boston and belong to the same local exchange, say, 754, one simply has to match all num- bers against the area code 617 and the prefix 754 using wildcard characters for the rest. The same principle works with IP addresses. Depending on the application itself, one may require an exact match for a specific address search or may just need a prefix match. Mask bits can be applied to select whatever bit positions one decides based on the appropriate criteria. The system will then find the most suitable entry by looking it up in a content-addressable memory (CAM), which will yield the necessary address. In the most rudimentary setting, today's routers use the Classless InterDomain Routing (CIDR) routing protocol to calculate the address to which a packet must be forwarded. For example, CIDR uses the longest-prefix match (LPM) algorithm for the calculation of the next-hop address. We will discuss the internals of this algorithm in more detail later in Chapters 12 and 13. For the moment, we will just mention that in order to implement this type of classification environment, until very recently, switching/routing systems designers in conjunction with an ASIC or a RISC/CISC CPU would involve a CAM module, which allows a fast and ef