 cost, power, and size than before. The following added features accompany the main features of this technology generation: Downloaded from Digital Engineering Library @ McGraw-Hill (www.digitalengineeringlibrary.com) Copyright © 2004 The McGraw-Hill Companies. All rights reserved. Any use is subject to the Terms of Use as given at the website. AMCC nPTM FAMILY OF NETWORK PROCESSORS AMCC NPTM FAMILY OF NETWORK PROCESSORS 103 The company's hardware-based functionality that was previously available in its nPX5700 fine- grained traffic management coprocessor is now integrated into the new platform. This tight inte- gration enables designers to take advantage of the flexibility that can be afforded by software programmability. At the same time, the actual delivery of feature-rich subscriber services can be completed at high wire speeds. A richer programming model and the associated process flow inside the company's nPcore-based network processors allow a more extensive range of application coding without the programming complexity that is associated with another on-chip control plane CPU, which would obviously also impose its own extra power consumption and silicon real-estate requirements. While differentiating applications and services, customers require equipment that is designed around NPUs with significant "lung" capacity. AMCC's fifth-generation technology offers a respectable fivefold increase in performance over previous generations; therefore, it offers a signif- icant amount of headroom to pursue sophisticated and differentiable applications. The previous on-chip coprocessors are now enhanced to allow simultaneous operations with the embedded traffic manager. This enables layers 2 to 7 packet processing together with a wire-speed OC-48 ATM SAR within one and the same device. The adoption of the latest NPF and Optical Internetworking Forum (OIF) interface standards allows a flexible and low-cost integration of memory subsystems along standardized ways, thereby enabling low-cost system solutions and creating 