duces the SEU-sensitive area, because the reverse-biased drain junction area is limited to the depletion region between the drain and the body of the transistor, as shown in Fig. 3.19. Charge deposited in the silicon substrate underneath the BOX cannot be collected at the drain due to the dielectric isolation. Unfortunately, as briefly mentioned in Section 3.2.2, charge deposited in the body region (for example, by a particle strike to the gate region) can trigger a bipolar mechanism that limits the SEU hardness of SOI circuits [71,140]. Following a LT GaAs Conventional Time, ps Figure 3.18. Measured charge-collection transients in LT GaAs and conventional GaAs HIGFETs following a 3-MeV alpha-particle strike [44]. Charge collection is greatly reduced by the incorporation of the LT GaAs buffer layer. II-29 ~2000 A Source Drain Buried Oxide ~2000 A Substrate Figure 3.19. Diagram of a thin-film partially-depleted n-channel SOI transistor. The charge- collection volume is greatly reduced because the top silicon active layer is very thin. Unfortunately, ion strikes to the body region can initiate a bipolar conduction mechanism that limits the SEU hardness of SOI circuits. particle strike to the body of an n-channel SOI transistor, electrons can be collected at the source and drain electrodes. Holes can only escape through the body tie contact, if there is one, or slowly through recombination if there is no body tie. Residual holes left in the body raise the body potential and trigger the lateral parasitic bipolar transistor inherent to the SOI transistor, with the source serving as the emitter, the body as the base, and the drain as the collector. This bipolar current considerably lowers the SEU hardness of SOI and can even lead to a single-event induced latch-up condition in SOI transistors without body ties if the bipolar conduction is sustained [72]. Body ties are sometimes used commercially to reduce floating-body effects under DC operation, and careful attention to body tie design is crucial to maintaining good S