ules contained multiple specialized chips that handled all instruction fetch- ing, decoding, and scheduling, as well as all arithmetic and logic processing functions and the neces- sary memory support and I/O interface logic. However, the market for powerful microprocessors started taking off in the early 1980s with the arrival of the PC. The establishment of the IBM-compatible architecture as the de facto standard using the Intel platform (and later Advanced Micro Devices) dealt a severe blow to Motorola's then com- peting 68000 architecture. Motorola never really recovered in the PC market. Astronomical Intel sales funneled profits toward more R&D and plant/equipment investment. These sales were also profitable since PCs had not yet become a sales commodity item with razor-thin profit margins. New semicon- ductor fab lines were being built and existing ones expanded to meet demand. This economic cycle would further affect the improvement of the design and manufacture of more sophisticated, more com- plex, and less expensive semiconductor chips, due to the ever-increasing profits from larger, profitable, and enhanced operations. Microprocessors, dynamic and static memory, and I/O interface chips all profited from this progress. The computing landscape started changing dramatically. Soon microprocessors were deemed SO complex that new computing architecture paradigms had to be found. Research from academia (University of California Berkeley and Stanford) as well as from the industry (IBM) pioneered the concept of reduced instruction set computers (RISCs) as a means of shedding the unnecessary capabilities of the traditional microprocessors, which had come to be known as complex instruction set computers (CISCs). 38,39 The RISC CPUs used more optimized approaches that were heavily based on pipelines of multiple stages for fetching, decoding, and sched- uling code instructions ahead of their time in a program. RISC CPUs would certainly offer simpler and faster hardware. However, software that was written for these 