ancy rely on the use of significant redundancy in space or time to perform error detection and correction. However, in some applications less redundancy is adequate for detection and correction of errors. In these schemes, information redundancy and encoding are utilized such that in the presence of errors, the information is internally inconsistent, enabling error detection and correction implementations. Error detection and correction coding theory is the most widely developed mechanism for detection and recovery in digital systems. This typically requires less redundancy than other detection and correction schemes. Replication is effective in detection and correction capability, but has large size, weight, power, and cost implications for some types of applications where coding provides a more effective solution. Error detection and correction codes can vary widely in detection and correction capabilities, code efficiency, and complexity of encoding and decoding circuitry. The simplest form is the use of an additional parity bit to provide single error detection in buses, registers, and memory. A code's error detection and correction properties are based on its ability to partition a set of 2n, n-bit words into a code space of 2m code words and a non-code space of 2n - 2m words. The most common block code used in memory systems is the single error correcting, double error detecting (SEC-DED) Hamming code, the version providing single correction and double bit detection for 64 information bits requiring 8 check bits. A characteristic of error detection and correction codes is the Hamming distance between words in the code space; the single correcting, double detecting code has Hamming distance four. More powerful codes may be constructed by using appropriate generating polynomials; a Hamming distance six code can be utilized to provide the ability to correct all double bit errors in 84 bit words using 15 check bits in a microprocessor physical address translation table implementation. Cyclic redundancy checks, 