M is working on new single-chip products that will be able to comfortably handle that speed. To further emphasize the scalability of the architecture, we must mention that up to 64 NP4GS3 NPU chips can communicate with each other through an external switch fabric under the control of an external CPU in order to provide massive scalability to higher bandwidths. In such an arrangement, each NPU will only handle a portion of packet-processing operations. Figure 4.2 depicts this scheme. IBM sees the NP4GS3 as a candidate for customer premises network equipment, edge network devices, or even core network gear. Due to its performance and scalability, it is targeted to locallmet- ropolitanlwide area network (LAN/MAN/WAN) routers, Multiprotocol Label Switching (MPLS) routers, Internet Protocol (IP) over Synchronous Optical Network (SONET), SONET Transport, dig- ital subscriber line access multiplexer (DSLAM), Internet service provider (ISP) access boxes (qual- ity of service [QoS]), firewalls, server adapters, storage area network (SAN) and LAN adapters, and SO on. IBM PRS Packet Routing Switch (fabric) Guided Frames NP4GS3 NP4GS3 NP4GS3 NPU#1 NPU#2 NPU#64 Control Point NP function split over multiple NP4SG3 chips function FIGURE 4.2 Up to 64 NP4GS3 network processors can be connected via an external switch fabric. (Source: IBM) Downloaded from Digital Engineering Library @ McGraw-Hill (www.digitalengineeringlibrary.com Copyright © 2004 The McGraw-Hill Companies. All rights reserved. Any use is subject to the Terms of Use as given at the website. IBM POWERNP™ 64 NETWORK PROCESSORS In order to help consolidate a data plane network-processing idea into a complete product design, IBM also provides a wide selection of other necessary components. The components include the lead- ing switch fabric chips, SONET/Synchronous Digital Hierarchy (SDH) framers, optical transceivers, backplanes, and interface converters. Almost all types of dynamic and static memory needed for packet buffering and lookup tables can be added to this im