 Depending on the crossbar state (which in this case can be encoded by a control bit of 1 or 0, denoting either one of the two pos- sible states), every input can be connected to every output. Arriving packets or frames are stored into input buffers before the data are presented to the fab- ric's core. A mapping mechanism (a concept that is only applicable in packet switching) reads a packet's destination address or a VCI (in the case of ATM) from the packet's header. Then based on some lookup operation, it decides which is the appropriate output port. In many fabric cores, the term packet does not refer to an IP packet; it is a generic expression about a series of segmented frames that are created transparently by the switch fabric chipset. These frames have a different name with each switch fabric vendor-some vendors call them frames, whereas others call them cells. This process automatically segments an IP packet to optimize the internal switching over the crossbar. After the switching process has concluded, the fabric automatically reassembles the packet prior to releas- ing it downstream to the network processor or traffic manager. An individual time slot in TDM links that use circuit-switched systems always specifies which path is to be associated with the switching operation. Therefore, we can safely conclude that no port mapping is needed inside circuit switches. The switch fabric core connects data from any ingress port to any egress port. It can be modeled and conceptualized as a simple central processing unit (CPU) that reads from one address (ingress port) and writes to another address (egress port). Recent switch fabrics are extremely sophisticated Crossbar switch Bar state Cross state FIGURE 14.1 Rudimentary crossbar switch and its two possi- ble states. 1. It is worth noting here that the Network Processing Forum (NPF) in the CSIX-L1 specification has defined the concept of the CFrame, which is a standardized shape and structure for the segmented packets while they traverse the fabric core in a pro