andling of the voice traffic itself and the combination of Real-Time Control Protocol (RTCP)/Transmission Control Protocol (TCP)/IP for the associated control packet traffic. Although the design approach is clean-cut and straightforward, in several cases, significant help will be offered to customers either from Intel or from third parties in the form of Verilog code or even a complete FPGA design (at a price, of course). However, in some cases, the need and the associated cost to design and include a special FPGA the implementation of glue logic or interfaces from one realm to another may discourage some poten- tial users, who could choose to approach a network-processor vendor that offers a more integrated and seamless solution. Another example of a single IXP1200's ability to handle a traditional enterprise/campus routing system for modest performance proportions is shown in Figure 5.4. The router of this example con- nects eight 10/100 Mbps Fast Ethernet RJ-45 ports on one side with a Synchronous Optical Network (SONET) OC-12 optics backbone pipe to the wide area network (WAN) handling layer 3 IP switch- ing and routing functions along with key routing protocol support. Simple Network Management Protocol (SNMP) network management can be handled via a specially assigned Fast Ethernet port. The Intel IXF6012 SONET Framer properly encapsulates IP packets coming into the router from the Ethernet realm, as it is capable of both SONET and Synchronous Digital Hierarchy (SDH) encap- sulation of ATM or High-level Data Link Control (HDLC) frames. It offers either a Packet over SONET PHY Level 3 (POS-PL3) or a standard Utopia interface to higher-level protocols. It can oper- ate in single OC-12c or quad OC-3c mode on the line side. A generic 16-bit processor interface is pro- vided for configuration and network management. To explain the other shown parts of the design, we will briefly say that the IXB8055 is a POS-to- Utopia bridge-an implementation in Verilog that Intel can provide to its customers. Customers will the