 and C.J. Marshall, "Anatomy of an In-Flight Anomaly: Investigation of Proton-Induced SEE Test Results for Stacked IBM DRAMs", IEEE Transactions on Nuclear Science, Vol. 45, No. 6, pp2898-2903, (December 1998) [Layton97] P.J. Layton, D.R. Czajkowski, J.C. Marshall, H.F.D. Anthony, and R.W. Boss, "Single Event Latchup Protection of Integrated Circuits", Fourth European Conference on Radiation and its Effects on Components and Systems, pp327-331, (September 1997) [Lin83] Shu Lin and Daniel J. Costello, Jr., "Error Control Coding - Fundamentals and Applications", Prentice-Hall, (1983) [Liu92] M. Norely Liu, and Sterling Whitaker, "Low Power SEU Immune CMOS Memory Circuits", ", IEEE Transactions on Nuclear Science, Vol. 39, No. 6, pp1679-1684, (December 1992) [Loftus97] Loftus, J.P., "Feedback Department", Launchspace, vol. 2, no. 2, pp10, (June/July97) [Loos94] James R. Loos, "Fuzzy Logic and Neural Networks", Intech, pp26-29, (November 1994) [Majewski95] P.P. Majewski, E. Normand, and D.L. Oberg, "A New Solar Flare Heavy Ion Model and Its Implementation Through MACREE, An Improved Modeling Tool to Calculate single Event Effects Rates in Space", IEEE Transactions on Nuclear Science, Vol. 42, No. 6, pp2043-2050, (December 1995) [Marshall95`] P.W. Marshall, C.J. Dale, T.R Weatherford, M. LaMacchia, and K.A. LaBel, "Particle-Induced Mitigation of SEU Sensitivity in High Data Rate GaAs HIGFET Technologies", IEEE Transactions on Nuclear Science, Vol. 42, No. 6, pp1844-1849, (December1995) [Marshall952] P.W. Marshall, C.J. Dale, T. Weatherford, M. Carts, D. McMorrow, A. Peczalski, S. Baier, J. Hohava, and J. Skogen, "Heavy Ion SEU Immunity of a GaAs Complementary HIGFET Circuit Fabricated on a Low Temperature Grown Buffer Layer", IEEE Transactions on Nuclear Science, Vol. 42, No. 6, pp1850-1855, (December1995) [Mavis98] D.G. Mavis and P.H. Eaton, "Temporally Redundant Latch for Preventing Single Event Disruptions in Sequential Integrated Circuits", Mission Research Corporation Technical Report P8111.29, (October 1998) [Mc