ry, and certain electronic power supplies, to name a few sources. 10.5.3 Error Detection and Error Correction Error detection just identifies that a bit (or bits) has been received in error. Error correction corrects errors at a far-end receiver. Both require a certain amount of redundancy to carry out the respective function. Redundancy, in this context, means those added bits or symbols that carry out no other function than as an aid in the error-detection or error-correction process. One of the earliest methods of error detection was the parity check. With the 7-bit ASCII code, a bit was added for parity, making it an 8-bit code. This is character parity. It is also referred to as vertical redundancy checking (VRC). We speak of even parity and odd parity. One system or the other may be used. Either system is based on the number of marks or 1s in a 7-bit character, and the eighth bit is appended accordingly, either a 0 or a 1. Let us assume even parity and we transmit the ASCII bit sequence 1010010. There are three 1s, an odd number. Thus a 1 is appended as the eighth bit to make it an even number. Suppose we use odd parity and transmit the same character. There is an odd number of 1s (marks), SO we append a 0 to leave the total number of 1s an odd number. With odd parity, try 1000111. If you added a 1 as the eighth bit, you'd be correct. Character parity has the weakness that a lot of errors can go undetected. Suppose two bits are changed in various combinations and locations. Suppose a 10 became a 01; a 0 became a 1, and a 1 became a 0; and two 1s became two Os. All would get by the system undetected. To strengthen this type of parity checking, the longitudinal redundancy check (LRC) was included as well as the VRC. This is a summing of the 1s in a vertical column of all characters, including the 1s or Os in each eighth bit location. The sum is now appended at the end of a message frame or packet. Earlier this bit sequence representing the sum was called the block check count (BCC). Today it may consist of tw