. Downloaded from Digital Engineering Library @ McGraw-Hill (www.digitalengineeringlibrary.com Copyright © 2004 The McGraw-Hill Companies. All rights reserved. Any use is subject to the Terms of Use as given at the website. NETWORK PROCESSORS: JUSTIFICATION NETWORK PROCESSORS: JUSTIFICATION 37 However, two negative factors of the design of ASICs in network gear should be considered: ASICs suffer from limited, if any, programmability, which causes them to be a rigid solution deliv- ery platform. When new functionality is required, or when new protocols must be supported, the vendor does not have many other options than to drop the evolution of the product or to redesign the ASIC-a costly proposition for both the vendor and user. It is costly for the vendor because of the design and time. It is costly for the user because in order to benefit from the new functionality, the equipment must be upgraded. In the worst case, a user would have to buy a new system alto- gether. In the best case, a user would have to buy a new adapter (for example, a line card) with the new ASIC in order to replace the older one. This type of continuous quasi-forced upgrade is highly undesirable to the user community. In the long run, it hurts the relationship between the customer and the vendor. Seen from a different angle, the same lack of programmability is a serious impediment for ASICs. Consider the amount of protocols and data formats that are encountered at the different layers of a typical protocol stack. The higher a user goes on the stack, the more protocols a user is bound to run into. The device all of a sudden loses flexibility, despite the fact that it has improved in per- formance with the inclusion of specially designed ASICs. Designing a sophisticated ASIC requires more time than can be afforded. This is probably the most important downside of this approach, because the type of ASICs needed in high-speed networking devices usually requires a design cycle of somewhere between 12 and 18 months. Although the ASIC design proces