of counter. When it is clocked it adds a preset number to the one already held. When it fills up, it resets and starts counting from zero again. In other words this corresponds to reaching one complete circle on the phase diagram and restarting again. Once the phase has been determined it is necessary to convert this into a digital representation of the waveform. This is accomplished using a waveform map. This is a memory which stores a number corresponding to the voltage required for each value of phase on the waveform. In the case of a synthesizer of this nature it is a sine look-up table as a sine wave Frequency information (phase increment) Waveform Digital to Phase map (ROM analogue accumulator or PROM) converter filter Clock signal Figure 5.27 Block diagram of a direct digital synthesizer Receivers 143 is required. In most cases the memory is either a read only memory (ROM) or programmable read only memory (PROM). The next stage in the process is to convert the digital numbers into an analogue voltage using a digital to analogue converter (DAC). This signal is filtered to remove any unwanted signals and amplified to give the required level as necessary. There are a number of spurious signals that are generated by a direct digital synthesizer. The most important of these is one called an alias signal. Here images of the signal are generated on either side of the clock frequency and its multiples. For example, if the required signal had a frequency of 3 MHz and the clock was at 10 MHz then alias signals would appear at 7 MHz and 13 MHz as well as 17 MHz and 23 MHz, etc. These can be removed by the use of a low-pass filter. Tuning is accomplished by varying the size of the step or phase increment between different sample points. By doing this, the speed at which the system advances around the cycle is increased or decreased. This can be done because there will be many more points stored in the waveform map than it is necessary to regenerate the signal. For example, one frequency may be generated by adding 5067