, decreases with increasing values of Eb/N To see this analytically, differentitate (3.42) with respect to p to find that the value of p that maximizes Pb is (3.44) which results in the maximum bit error probability 0.083 Eb/N, > 0.709 (3.45) E,/N,<0.709. Basic Concepts and System Models .0005 .0001 EB/NJ (dB) Figure 3.7. DS/BPSK pulse jammer. Figure 3.8 illustrates the huge difference between a constant power jam- mer (p = 1) and the worst case pulse jammer with p = p* for uncoded DS/BPSK systems. Note that at a bit error probability of 10-6 there is almost a 40 dB difference in EIN Here for the same fixed average power J, the jammer can do considerably more harm to an uncoded DS/BPSK anti- jam system with pulse jamming than with constant power jamming. This can be explained by noting in Figure 3.8 the rapidly dropping bit error proba- bility curve for p = 1. A small decrease in EBIN1 results in a large increase in . The jammer can vary the value of Eb/N, with pulse jamming, resulting in the net average bit error probability skewed toward the high error prob- abilities associated with the small values of EIN, that occur during a pulse. In general, if the jammer were to vary its power over several values while maintaining time-averaged power J, the resulting bit error probability would be the weighted sum of the bit error probabilities at each of the possible jam- Coded Direct-Sequence Spread Binary Phase-Shift-Keying p=1.0 EB/N, (dB) Figure 3.8. Constant power and worst case pulse jammer for DS/BPSK. mer power levels. In this sum, the largest error probabilities tend to domi- nate. We show in Volume II, Chapter 1 that the worst jammer power distri- bution is the "on" and "off" pulse jammer considered here. In practice, the jammer may not be able to achieve small values of p or high peak power. Also when a jammer pulse length is shorter than a data bit time this analysis does not apply. In general, however, (3.45) represents an upper bound on the bit error probability. 3.5 CODED DIRECT-SEQUENCE SPREAD BINARY PHAS