Digital predistortion Digital Predistortion is one of the more complex topics to define in the RF system as it com- bines aspects of regulatory and 3GPP standards compliance (Adjacent Channel Leakage Ration (ACLR, also known as Adjacent Channel Power Ratio or ACPR) limits) with efficiency (DC power consumption) and compute complexity (clock cycles, FPGA Lookup Tables (LUTs), or gates spent on implementing the DPD algorithms). Striking a balanced tradeoff between these aspects can become an iterative and complex process. Characterization of the Power Amplifier (PA) is typically done in a dedicated testbench environment, often operated by the manufacturer of the PA. These testbed environments characterize the output power, efficiency, gain, and ACLR of the device under varying condi- tions such as temperature, applied bias, input signal conditions (signal type, spectral width,...) frequency band of operations. Analysis results are shared in component data- sheets or characterization reports that are unique to the PA and depend on implementation technology, operating frequency, bandwidth, and so on and can greatly range over cost. An example of such characterization is shown below in Fig. 3-19. Performance of a PA with DPD applied is analyzed subsequently to determine best possi- ble performance targets after linearization and the impact of different DPD algorithms. An example is shown below in Fig. 3-20. Although the absolute numbers of this benchmark are not necessarily relevant, we can validate two intuitive characteristics of the PA. First, as the bandwidth of the transmitted HIGH BIAS, HIGH LINEARITY = = = 5 Vdc, f = 3500 MHz MHz 3GPP TM1.1 Signal -40°C Pout OUTPUT POWER (dBm) FIGURE 3-19 ACPR/ACLR characterization example. 132 Open Radio Access Network (O-RAN) Systems Architecture and Design ACLR vs Bandwidth no DPD 8 coeff 56 coeff 3GPP limit RF Bandwidth/IBW (MHz) FIGURE 3-20 ACLR versus bandwidth for a typical low-power power amplifier (PA). signal becomes wider, the ACLR performance drops-for the example h