ror voltage is such that it tries to reduce the error between the two signals entering the phase comparator. This means that the voltage controlled oscillator will be pulled towards the frequency of the reference, and when in lock there is a steady state error voltage. This is proportional to the phase error between the two signals, and is constant. Only when the phase between two signals is changing is there a frequency difference. As there is no phase change when the loop is in lock this means that the frequency of the voltage controlled oscillator is exactly the same as the reference. A phase locked loop needs some additional circuitry if it is to be converted into a frequency synthesizer. A frequency divider is added into the loop between the voltage controlled oscillator and the phase comparator as shown in Figure 5.21. The divider divides the frequency of Output Reference Phase Programmable n X f Voltage (n xf) controlled (1 MHz) parator divider (n) (1 MHz) (2 MHz) oscillator (Division ratio = 2) filter Figures in brackets are those used in the example in the text Figure 5.21 A programmable divider added into a phase locked loop enables the frequency to be changed 138 Newnes Guide to Radio and Communications Technology Input signal Output signal Figure 5.22 Operation of a divider the incoming signal by a certain ratio. If the divide ratio is set to three, then the output frequency is a third of the input, and SO forth. Programmable dividers are widely used in a variety of applications, including many radio frequency uses. Essentially they take in a pulse train like that shown in Figure 5.22, and give out a slower train. In a divide by two circuit only one pulse is given out for every two that are fed in, and SO forth. Some are fixed, having only one division ratio. Others are programmable and digital or logic information can be fed into them to set the division ratio. When the divider is added into the circuit the loop still tries to reduce the phase difference between the two signals entering the phase com