ADC, realizing that under many bias could be used to properly set the conversion gain and conditions the ADC may be overspecified. Still other IP3 of the device to correspond to the desired signal times, air interface standards may not be directed to- conditions. wards multi-carrier receivers and require much better Some receiver architectures utilize a quadrature de- ADCs than are required when deployed in the field, modulator in addition to, or instead of, a mixer. The simply because of the test methodology specified by the purpose of the demodulator is to separate the I and Q standard. For the ADC it may be desirable to change the components. Once they have been separated, the I and Q sample rate, input range, and potentially the active paths must maintain separate signal conditioning. In the bandwidth. digital domain this is not a problem; in the analog The digital preprocessor can take many forms. For very domain, however, the signal paths must be perfectly high sample and data rates, this is usually implemented as matched or I/Q imbalances will be introduced, poten- either an FPGA or ASIC. These circuits by nature are tially limiting the suitability of the system. Many SDR quite flexible in their functions and range of parameters. receivers avoid this problem by utilizing "real" sampling An FPGA can of course be programmed for any function (as opposed to complex sampling), as shown in the desired. Typically, an FPGA would be programmed to single-carrier example, and using a digital quadrature perform the quadrature demodulation and tuning, chan- demodulator in the digital preprocessor that will provide nel filtering, and data rate reduction. Other functions perfect quadrature. such as RF power measurement and channel lineariza- The local oscillator (LO) is used to generate the proper tion are possible. All of these elements are easily gener- IF when mixed with the incoming RF signal. Generally, ated using a variety of digital techniques and are readily a LO is variable in frequency and easily programmable p