ocessor architecture (platform). These chipsets are distinct with every vendor, but the overall partitioning of the platform archi- tectures is quite similar among most of them. Their chipsets include PHY layer interface chips, NPUs, switch fabrics, traffic managers, and SO on. Peripheral network processors are microchips that have been designed to optimize a very specific function among the many that need to be handled in a packet-processing environment. Examples of a peripheral network processor include a compressor chip (such as the ones that HiFn offers) or an IP Security (IPsec) acceleration chip (such as the ones proposed by Broadcom, Cavium, or Corrent). These are highly specialized functions that require specific circuitry capabilities to handle the exceed- Downloaded from Digital Engineering Library @ McGraw-Hill (www.digitalengineeringlibrary.com) Copyright © 2004 The McGraw-Hill Companies. All rights reserved. Any use is subject to the Terms of Use as given at the website. NETWORK PROCESSORS: JUSTIFICATION 40 NETWORK PROCESSORS ingly heavy computational load efficiently in real time; therefore, it makes sense to offload them onto specialized co-processors. Specialized peripheral processor chips also conduct lookup/classification. In some cases, however, a full-fledged network processor conducts these operations instead. This processor operates in a sort of a slave-like mode adjacent to a master network processor that handles the live traffic flow. Other peripheral network processors are also available in the market to parse and frame specific layer 2 protocols, such as ATM cells, Gigabit Ethernet, and SO on. Yet another way of categorizing network-processing chips is based on whether they are imple- mented on configurable or unconfigurable hardware. Field-programmable gate array (FPGA) man- ufacturers have come up with very fast, highly integrated, and programmable chips over the last year or SO. Network device vendors have also tried this alternative approach. We will not elaborate on this point, as i