, the output sequence would eventually become the specified period 21 sequence. Pseudonoise generators are similar to oscillators in the sense that they pro- vide an output signal but are not driven by an input signal, their next mem- ory state being a prescribed function of their present memory state. The period N of the output sequence, therefore, is upper bounded by the num- ber of distinct states, that number being 2m when the memory is composed of m binary storage elements. Hence, when implemented in binary, the min- imum number m of memory elements necessary to support period N oper- ation is given by m = [log2(N) (5.5) where [x denotes the smallest integer greater than or equal to X. If design- ing a PN generator for a specified, randomly selected sequence, using a shift register design with feedback logic as in Example 5.2, one can typically expect that the number of binary memory elements needed will be approx- imately twice the minimum number given by (5.5). It is worth noting that the period of a sequence should be long enough to preclude the possibility that natural delays caused by multipath or artificial delays created by repeater jamming result in a signal delay of an integral number of periods. Such integral period delays could result in situations in which an SS receiver could not discriminate between the desired SS signal and the multipath or jammer interference. It is possible to size the minimum memory requirements needed to preclude this situation by evaluating (5.5). As indicated by Table 5.3, it clearly is within the realm of possibility to achieve a practically non-repetitive PN generator with a modest investment in memory. Table 5.3 Memory requirements (measured in binary storage elements) for memory-efficient PN generators operating at 106 or 109 bits/sec. Memory Memory Requirement Requirement Period (106 bits/sec) (10' bits/sec) 1 second 1 minute 1 hour 1 day 1 year 1 century NON - LINEAR FUNCTION MEMORY an +N-1 an + N+2 LINEAR FUNCTION Figure 5.4. A linear feedback shift register with 