ary @ McGraw-Hill (www.digitalengineeringlibrary.com) Copyright © 2004 The McGraw-Hill Companies. All rights reserved. Any use is subject to the Terms of Use as given at the website. INTEL IXATM NETWORK PROCESSORS 84 NETWORK PROCESSORS SOFTWARE ARCHITECTURE Optimized microengine libraries and tools provide continuity between changes in the microengine instruction set and architecture. The libraries include a hardware abstraction library that provides interoperability across multiple hardware configurations, a protocol library, and a utility library for hardware-optimized operations on protocol-created packet headers and data structures in general. Figure 5.6 shows the model. Microblock code can be easily developed using the high-level Microengine C language environment. The Portability Framework is an integral part of the Intel IXA Software Developer's Kit (SDK). A modular programming model, which is also part of the IXA Portability Framework, enables optimal partitioning of an application across the microengines and threads. Therefore, it facilitates the integration of customer-written code along with microblocks, which can be supplied by Intel or third parties. These microblocks are independent building blocks of software that are specifically written for the microengines. These blocks perform a clearly defined set of functions. This modular model enables software reuse-that is, the flexible mixing and matching of software components. Intel's microblock library is also designed to support the pipelined architecture of the network processor microengines by providing the flexible connection of these microblocks. Intel's XScale microarchitecture source code libraries enable modular core component develop- ment. They also enhance portability between multiple operating environments. Third parties provide several compilers, assemblers, linkers, and debuggers to support Intel's XScale architecture. Of course, programming the embedded StrongARM core can be done with an equally wide array of tools and software developme