orithm. Two approaches, in which the complete sequence is stored simultaneously within the generator, are shown in Figure 5.1. One is ROM-based, the other a simple cyclic shift register. Both have the property that they work equally well with any desired sequence {bn}. Obviously, the price for this versatility is memory: N binary storage elements and supporting hardware are needed. The Storage/Generation Problem ADDRESS GENERATOR (a) ROM-Based - Generator 10n+1 (b) Cyclic - Shift -Register Generator Figure 5.1. Sequence generators based on complete sequence storage. The storage requirements indicated by these designs can be reduced by the insertion of Boolean functions at the proper places. The ROM in Figure 5.1 (a) can be replaced by a boolean function which calculates bn directly from the address an. Similarly, all but M of the binary memory elements of the cyclic shift register in Figure 5.1 (b) can be eliminated if a Boolean func- tion can be mechanized which, for all n, computes bn+M from the stored val- ues = - 1. The following two examples illustrate these procedures. Example 5.1. A ROM-based generator for the sequence 1010110010110010 having period 16 can be specified as follows. For simplicity assume the address generator is a 4-bit binary counter producing consecutive addresses in the range 0 to 15, that is, (5.2) where (...)2 is the binary representation of N. Table 5.1 identifies the map- ping which has to be accomplished by the ROM or its replacement function. One possible implementation of this Boolean function is (5.3) where + and . represent arithmetic modulo 2, + being the EXCLUSIVE OR and . being the AND logic functions. The resulting PN generator is shown in Figure 5.2. Pseudonoise Generators Table 5.1 Address-to-bit mapping Notice that the function (5.3) in Example 5.1 is described in terms of two operations, + and . modulo 2, on the pair of elements 0 and 1. This struc- ture has all the mathematical properties of a field, and is usually referred to as the Galois field GF(2) of two elements. C