remains the same even for phase/time. The following sections cover the key aspects of these performance metrics for each clock type. The section "Testing Timing" in Chapter 12 covers the process of testing and validating timing behavior and metrics. Refer to the section "Node and Clock Performance Recommendations" in Chapter 8 for a list of the various ITU-T recommendations concerning the timing characteristics of clocks. 9.4.1 PRTC and ePRTC Currently, the ITU-T defines two levels of PRTCs in G.8272, and new enhanced PRTCs (ePRTC) in G.8272.1. G.8272 retained the original PRTC specification of +100 ns but renamed it to PRTC Class A (PRTC-A), and added a new Class B (PRTC-B), improving that accuracy to +40 ns. Refer to the section "Primary Reference Time Clock: PRTC" in Chapter 3 for details on the differ- ent classes of PRTC and the performance specifications. Table 9-5 summarizes the different PRTC classes along with their accuracy and holdover performance. Table 9-5 Classes of PRTC Performance Class of Clock Accuracy Holdover ITU Recommendation PRTC-A +100 ns G.8272 PRTC-B +40 ns G.8272 ePRTC-A +30 ns 100 ns / 14 days G.8272.1 ePRTC-B +30 ns For further study G.8272.1 The TE (or noise generation) of a PRTC is characterized by the following: Time of day error: The ToD interface is used to determine the time accuracy at its output as compared to the reference. This refers to any error in the time of the day and time offset, if any, in comparison to UTC. If the PRTC is combined with a T-GM inside a single device, this time error can be measured using PTP packets received from an Ethernet interface. Phase error: The wander limits specified by recommendations are expressed using MTIE and TDEV masks. The signal output by the 1PPS interface is used to measure the phase error and plot the MTIE and TDEV graphs. Again, if the PRTC is combined with a T-GM, this phase er- ror can be measured using PTP packets received from an Ethernet interface. Note that the output for PRTC-B is expected to be accurate to +40 ns when mea