 needed in order to support fundamental SAN capabilities such as SCSI termination, FCP-to-iSCSI mediation, and storage virtualization. In terms of presentation, the SPP design is fully integrated in a system-on-a-chip (SOC). As shown in Figure 11.6, it packs the following items inside the same piece of silicon: Switch Fabric Interface SAN Protocol Processor Virtualization (SPP) interface Classification (Layers 5-7) Storage I/O TCP offload Engine (TOE) (flow) context Classification (Layers 2-4) Multiple MACs Support for various Security processing technologies Multiple Multiple FC MACs GbE PHY FIGURE 11.6 The architecture of Trebia's SPP. (Source: Trebia Networks) Downloaded from Digital Engineering Library @ McGraw-Hill (www.digitalengineeringlibrary.com) Copyright © 2004 The McGraw-Hill Companies. All rights reserved. Any use is subject to the Terms of Use as given at the website. STORAGE NETWORK PROCESSORS (SNPS) STORAGE NETWORK PROCESSORS (SNPs) 211 Multiple storage network interfaces. Two-tiered classification capabilities (below and above layer 4). The powerful TCP termination engine. The main SPP processor of the multiple storage network protocols. A module that handles security functionality. In terms of scalability of performance, the Trebia SPP is capable of handling today's Gigabit Ethernet or Fibre Channel network infrastructure. However, more importantly, it is already capable of dealing with requirements for the next improvement in SAN throughput-the 10+ Gbps realm. From a business standpoint, Trebia offers higher performance, higher integration, and lower cost per port than current solutions, which rely on a group of chips. At a minimum, these will include the following: An off-the-shelf TOE, which often performs nothing more than a checksum acceleration and auto- matic issuance of ACKs.2 A previous-generation network processor, which usually does not have the stamina for the sustained classification workload at 10 Gbps full-duplex rates. The appropriate PHY/MAC and heavy-duty security coprocessing 