ad has somehow become corrupted bi-directional 2Mbit/s plesiochronous circuit, which, for part of its during its journey across the SDH network. Although path level journey, is transported across an SDH based network. (See Figure monitoring is sufficient for a PTO to ascertain what error rate is 42.8.) Such a 2Mbit/s circuit could be a channel between two PSTN being inflicted by the SDH network on his customers' 2Mbit/s switches, or it could be a private leased line which is connecting two circuit, it provides no information whatsoever on the source of the PBXs. Although the 2Mbit/s circuit is bi-directional, the SDH errors i.e. which network element has gone faulty. This task is dealt operations are identical in both directions, hence we shall concen- with by the addition of still further overhead information, which will trate on just one direction of transmission, that from A to D. be described shortly. Before this, it is necessary to examine the way At point B, where the 2Mbit/s circuit meets the SDH network, the in which several VC12s are multiplexed into a higher rate signal. first operation is to take the incoming plesiochronous bit stream and selectively add 'stuffing' bits in order to 'pad-out' this bit stream to 42.4.2 Multiplexing of Virtual Containers the exact rate required to fill the appropriate Synchronous Con- tainer. In this case, the Synchronous Container size would be a C12, The general principle of this multiplexing operation is fairly straight which is sufficiently large to accommodate a 2Mbit/s plesio- forward. Several VC12s, which should, hopefully, be synchronous chronous bit stream at the limits of its 50 ppm tolerance, together with one another, are loaded into a larger Synchronous Container, with some additional 'fixed stuffing' bytes. The stuffing of the which subsequently has its own POH added, thus creating a larger plesiochronous bit stream should ideally be done relative to the i.e. higher bit rate, VC. (See Figure 42.6.) In CEPT countries, this clock to which the whole SDH network