 com- puter memory into micro-instructions making the ALU capable to handle the register bits. The ALU is complete with an internal buffer register. Today, the integrated version of the ALU, internal buffer, and micromachine decoder represents what is referred to as a CPU, for central processing unit. 7 The CPU is, thus, a machine to "crunch bits" from the higher-level instructions of the central memory, hence the popular name "computer," which today means far more than just a calculator, although the appellation remains conceptually exact. Note that the VN architecture is not the only one possible. Indeed, several VN machines, or CPUs can be set to work in parallel, each being dedicated to an independent fraction of the computing algorithm, or more simply being assigned a share of the number-crunching groundwork. This is referred to as parallel or multi- processor architecture, to be viewed either as a magnified VN master machine ruling over many CPU slaves, or a "democratic" group of VN machines putting their effort towards some common-interest goals. The VN architecture yet remains crucial to the orchestration of the ensemble, whether the master is a ruling dictator or simply a discreet facilitator. Before taking a closer look at the characteristics of binary logic gates forming the ALU circuitry, it is worth considering the Turing machine (TM), which was described in Chapter 7. To recall, the generic TM architecture, which is illustrated in Fig. 7.1, consists of a bidirectional tape of infinite length, and a head, which is able to read and write bits or symbols onto the tape. The TM is set into motion according to a stack of instructions, called an "action table." This action table is the program from which the tape input data are processed bit by bit (or symbol by symbol), resulting in the generation of output data, which are recorded on the tape. It includes a "halting instruction," which forces the machine to halt on completion of the task. The tape is a memory of infinite size, which puts no restriction a