for RF circuitry has also assisted in the integration of RF transceivers and BP. The semiconductor manufacturing technique of transceivers has changed from BiCMOS4 in early 2000 to the current RF CMOS. High density interconnects will also expedite the process of integration. High density interconnects (HDI) are defined as substrates or boards with a higher wiring density per unit area than conventional printed circuit boards (PCB). They have finer lines and spaces (<75 um), smaller vias (<150 um) and capture pads (<400 um), and higher connection pad density (>20 pads/cm2) than employed in conventional PCB technology. HDI is used to reduce size and weight, as well as to enhance electrical performance. In addition to HDI, terms such as "build-up board" in Japan and "sequential build-up (SBU)" or "microvia technology" in the US are used interchangeably. The key techniques that are commonly considered for integration are SIP and SoC [7, 8, 12]. SIP: System in Package (SIP) approach can be used to put RFIC and BBIC chips into a single package. SIP reduces component count on circuit boards, board footprint and power consumption but not necessarily the system cost. Since SIP allows a conventional analog RF transceiver to be utilized, no new transceiver architectures or special IC technology is required. However, at the system level, SIP integration suffers from several drawbacks. Most notably, analog transceiver technology normally suffers significant parametric yield loss at IC final test. Since it is very difficult to perform fully parametric RF testing at wafer level (wafer probe), there will undoubtedly be some parametric yield loss at module test for the case of SIP integration. And, since the entire SIP module must be discarded 4 BiCMOS refers to the integration of bipolar junction transistors and CMOS technology into a single device. 5 IC parametric yield is the percentage of the circuits that satisfy all the performance specifications (it is design's sensitivity to process variations). Smart Wireless Devices due