rk processor uses two NPUs: one for ingress and one for egress connected with their respective nPX5720. Both NPUs would share a search engine or have their own engine (a much more expensive proposition). They would also be connected toward the line side through a ViX-to-SPI-4.1 bridge to an OC-192 framer or a 10 Gigabit Ethernet Media Access Control (MAC), which offer SPI-4.1 interfaces. As the nPX5800 switch fabric is a single-chip product, if a designer wants to combine chips for a 16-port fabric solution, then up to eight of them can be connected. Each of these fabric ports can support a quad (4x) OC-48c line card; therefore, a system can be put together with up to 64 OC-48c ports. Looking at compromises in chip count, in a quad OC-48 line card, one nP7250 would be required per OC-48 link connected with the framer through a POS-PHY or Universal Test and Operations PHY Interface for ATM (UTOPIA) interface. With 10 Gbps line rates, a pair of nP7510s will replace four 7250 chips. The interface of the 7520 with the search engine is a request/response type of interface that can be configured as dual 8-bit ports or as a single 16-bit wide port. A systems designer can connect AMCC's nPC2110 search engine or other devices without any further glue logic as recently announced by ven- dors such as IDT and NetLogic. Typical search engine devices will require glue logic implementation using a field-programmable gate array (FPGA). The nP7520 has two symmetric ports that are used on the switch and on the line side, respectively. These ports can be configured in any one of five modes: UTOPIA 3, POS PHY Level 3 (POS-PL3), FlexBus 3, dual RGGI, and AMCC's own ViX v.3. The line port where a framer is connected is usu- ally configured as UTOPIA, POS-PHY, or FlexBus. The dual RGGI is used to connect Gigabit Ethernet MAC controllers. The switch side is configured as AMCC's ViX bus. If the switch port of an nP7520 is connected to the line port of another similar NPU, the system bandwidth is effectively doubled by processing the pack