hese paths received their names. The former Downloaded from Digital Engineering Library @ McGraw-Hill (www.digitalengineeringlibrary.com) Copyright © 2004 The McGraw-Hill Companies. All rights reserved. Any use is subject to the Terms of Use as given at the website. PACKET PROCESSING PACKET PROCESSING 51 deals with processing operations about packets, such as network management, routing protocol han- dling and routing table updating, and traffic regulation. The latter deals with operations that are directly performed on packets, such as header modification, filtering based on content, classification, and the encryption of fields. The slow processing path takes place on a parallel data path implemented by slower central pro- cessing units (CPUs) without the tremendous pressure of having to keep up with many packets that require special and different attention arriving in real time at wire speed. This is the responsibility of the fast processing path. In order for the switch/router to be able to cope with the high-speed packet- processing requirements during packet parsing, classification, forwarding, field processing, potential encapsulation, scheduling, and switching, blazing-fast circuitry and a smart and efficient architecture are required. This is why we say that on the fast processing path, the system operations are exercised directly on packets. Two other mainstream terms that are equally used by the network equipment community to describe this processing reality are control plane processing, which is another way of referring to the slow processing path, and data plane processing, which is a synonym for what occurs along the fast processing path. Some people even extend these terms further and adapt them to the actual hardware choices for the implementation of the two processing data paths. For example, a control processor could refer to a CPU or an application-specific integrated circuit (ASIC) that is used to handle the slow processing path functions, whereas a data plane processor could refer to either an