econd. Figure 4.6 shows what types of external memory are used and for what type of storage. The abbre- viation Z stands for ZBT SRAM memory. The pattern search control blocks (PSCBs) are structures that define trees. They are used by the TSEs to locate or update tree data. Since trees are used exten- sively in the NP4GS3, the PSCBs are set up deliberately in ZBT SRAM memory where very fast tree searches can occur. The abbreviation S stands for SRAM, and the abbreviation D denotes DDR SDRAM. The two high-speed 7 Gbps switch fabric interfaces can be used to connect the NP4GS3 to two different switch fabrics (such as IBM PowerPRSTM chips) to provide redundancy and fault tolerance. The use of an IBM-provided DASL-to-CSIX converter chip in conjunction with a fabric interface chip enables the use of other non-IBM switch fabrics. If both interfaces are used, these two extra chips must be doubled. Downloaded from Digital Engineering Library @ McGraw-Hill (www.digitalengineeringlibrary.com) Copyright © 2004 The McGraw-Hill Companies. All rights reserved. Any use is subject to the Terms of Use as given at the website. IBM POWERNPTM 70 NETWORK PROCESSORS Memory Z1 Memory DO Memory Z0 Scheduler Leaf Storage Memory D1 Direct tables Leaf Storage PSCBs Probe Data Memory DS1 NP4GS3 Memory D2 Egress EDS Network Leaf Storage Frame Data Counters Processor Memory DSO Memory D3 Egress EDS Direct tables Frame Data Memory D6 Memory D4 PSCBs Code Storage Egress Mailbox Structures FIGURE 4.6 Types of external memory used in systems built with the IBM NP4GS3 (Source: IBM) An external PCI bus operating at either standard 33 MHz or 66 MHz is provided for the interface of the NP4GS3 with a host CPU or an external CP processor. SOFTWARE ARCHITECTURE Picocode is designed for the NPU's EPC part called General-Purpose Processors (GPPs). These processors contain array registers, scalar registers, and general-purpose registers. The picocode threads execute in the EPC's DPPUs, which contain what IBM calls Core Language Processor (CLP) engines. The