ers by several concurrent users. Schematic block diagrams of an MC-CDMA transmitter and receiver are shown in Figure 14-5. From the left, a series to parallel converter splits the input bit stream into N parallel stream and each of these is further split into M parallel chip streams by the XOR operation with the M chips of the code word (C1 to CM). This results in the input bit stream being spread over a total of N X M subcarriers. The parallel chip streams of multiple users are XOR'd together and a modulator maps each resulting chip stream onto the amplitude/phase constellation in use, chip by chip for BPSK or in 6-chip symbols for 64-QAM. The N X M amplitude and phase points drive the inputs of an Inverse FFT and the computed output signal is transmitted after insertion of a guard interval. At the receiver, after guard interval removal the FFT computes the amplitude and phase of each of the N X M subcarriers and a demodulator Chapter Fourteen Chipping code, user A A, n-3 A, n-2 A, n-1 A, in A, n-3 B, n-3 Subcarrier n-3 C, n-3 Chipping code, user B D, n-3 B, n-3 B, n-2 B, n-1 B, n A, n-2 B, n-2 Chipping code, user C Subcarrier n-2 C, n-2 C, n-3 C, n-2 C, n-1 C, n D, n-2 A, n-1 Chipping code, user D B, n-1 Subcarrier n-1 1 C, n-1 D, n-3 D, n-2 D, n-1 D, n-1 in-chip Chipped user codes user data Chipped data spread over n sub-carriers Figure 14-4: Data Spreading in OFDMA/MC-CDMA Input Guard interval insertion stream Transmission channel M parallel chip streams from nth user Output Guard interval removal stream Figure 14-5: Schematic MC-CDMA Transmitter and Receiver Leading Edge Wireless Networking Technologies translates these constellation points into the equivalent input chips or multi-chip symbols. The M chips of the receiver's code word are XOR'd with each set of M demodulated chip streams to recover the N parallel bit streams which are finally converted back to a serial bit stream. Gigabit Wireless in Practice Siemens AG, a member of the WIGWAM consortium, announced the first 1 Gbps wireless link operating in 