of wander will accumulate, SO the eEEC clock should be able to tolerate the higher wander from an EEC network. Tolerance to jitter noise from the input (reference) signal: The tester applies jitter to the in- put signal and the engineer monitors the clock behavior for compliance. The amount and char- acteristics of the jitter can be configured on a tester. Compliance, like all forms of tolerance test- ing, means that the clock did not trigger errors, switch references, or go into holdover. Because eEEC clocks must be compatible with EEC clocks, they should also meet the G.8262 jitter tolerance limits. Of course, a timing chain based solely on eEEC clocks will result in lower jitter accumulation due to the lower maximum bandwidth of 3 Hz and lower noise gener- ation of the eEEC. Characteristics of the transfer of noise through the clock: This relates mainly to the band- width of the low-pass filter (for option 1 clocks; for option 2 there is a pass/fail TDEV mask in G.8262). The tester generates a series of input wander at different frequencies, both outside and inside the range of the passband. For option 1, the passband is 1-10 Hz, and for the eEEC, it is 1-3 Hz. For option 1 and eEEC, the tester measures the behavior of wander (phase gain less than 0.2 dB inside the passband) across the range of the frequencies. For option 2, the TDEV (from the measured TIE) is compared to the G.8262 Wander Transfer mask. Transient response: Testing phase error movements during a short-term reference switch (less than 15 s) as well as other longer-term scenarios. The input signal from the tester to the DUT is cut (or signaled to be invalid with ESMC), and the TIE of the output signal of the DUT is meas- ured. The result of the TIE is compared to the G.8262 mask for short-term transient for option 1, G.8262.1 mask for eEEC, and the MTIE to the mask for option 2. For details of the methodology to test SyncE transients, there is some helpful information in Appendix II of G.8273. Holdover, or long-term transient: Measures the wande