o the I and Q branch, respectively. In all channels excluding AICH, we define symbol number zero as the first symbol in each frame. In the AICH, we define symbol number zero as the first symbol in each access slot. Then we spread I and Q branches at the chip rate by the same real-valued channelization code Cch,SF,m. Afterwards, we treat the quences of real-valued chips on the I and Q branch as a single complex-valued sequence of chips. This sequence of chips is scrambled (complex chip-wise multiplication) by a complex-valued scrambling code Sdl,n. For the P-CCPCH, we apply the scrambling code aligned with the P-CCPCH frame boundary, i.e. we multiply the first complex chip of the spread P-CCPCH frame with chip number zero of the scrambling code. For other downlink channels, we apply the scrambling code aligned with the scrambling code directed to the P-CCPCH. In this case, the scrambling code application does not align with the frame boundary of the physical channel under scrambling. Sdl,n Any downlink Serial physical channel Cch, SF,m except SCH Parallel Figure 4.35 Spreading for all downlink physical channels, excluding the SCH. 4.3.12.1 Downlink Channelization Codes The same uplink channelization codes presented in Section 4.3.4 apply to the downlink, i.e. Orthogonal Variable Spreading Factor (OVSF) codes that preserve the orthogonality between downlink channels of different rates and spreading factors. The specifications fix the channelization code for the primary CPICH to Cch,256,0 and the channelization The UTRA Physical Layer Design code for the primary CCPCH to Cch,256,1- The UTRAN assigns the channelization codes for all other physical channels. Spreading Factor (SF) 512 has specific restriction in its application. For example, if we use the code word Cch,512,n with n = 0,2,4, 510 in soft handover, then we do not allo- cate the code word Cch,512,n+1 in the Node B, because we need the usage of timing ad- justment. Likewise, if we use Cch,512,n with n=1,3,5,...,511, then we do not allocate the code word Cch