ch keys (comparands) in mind, some designs use two operations on 72-bit words to accomplish a search operation based on a 36-bit key. This is done by soft implementation. Although it gives the systems designer the convenience of both key sizes, it decreases performance for 36-bit search keys. Soft solutions for 36-bit search keys provide less than half of the maximum-rated search speed performance, precisely due to the problem just described. Some CAMs are hardwired to natively support both 36- and 72-bit search keys. These are fast in both modes and are easier to use if flexibility in the designs of various search keys must be maintained. However, because of the extra complexity in hardware, it should not come as a surprise that they are a little more expensive. We have already discussed the performance rating of CAMs. An interesting case appears when the hardware limits the systems designer to a comparand bus that is 72 bits wide, but the actual applica- tion's search key is wider-for example, 144 bits. The systems architect has two choices: Use a double data rate (DDR) bus and load meaningful bits for the comparand at both the rising and dropping edge of the clock. Double the clock frequency of the bus that loads the comparands. Now let's turn our attention to another important issue. We alluded to the fact that CAMs cannot be updated in a location while searching at the same location. Therefore, the systems designer must do some juggling. For example, all search requests can be steered to a backup CAM every time that an update operation must be performed on the primary CAM. Some systems don't allow searches to go on while an update operation is being performed. It decreases the overall performance of the system. As a result, traffic will need to slow down and packets will need to be buffered up until the update operation is concluded and safe search operations can be allowed to resume. Some designs offer a third port that allows convenient table maintenance without inhibiting search operations. SiberCore CAMs