ommunicate with each other through) a common bus or logical ring. This would be used to directly forward packets from line card to line card and could obviously be the poten- tial source of a bottleneck in the performance of such an architecture. In ATM switches, in order to decrease the cost of the line cards, which because of the local rout- ing intelligence and cache memory would necessarily carry a significant cost, an interesting approach was to create a special centralized port-mapping card, which would be shared by all line cards. On this port-mapping card, the architect would provide the routing table, which would be updated by the switch controller at call setup time. All incoming packets were to be forwarded by their ingress line card to the port-mapping card. The port-mapping card would read the header and consult the routing table. It would then forward the packet to the appropriate egress line card. The danger of local cache misses was eliminated as all setup calls would have a table entry in this central location. However, in this case, the probability of contention on the bus/ring doubled, as all packets would have to traverse it twice-once when they went from the ingress card to the port-mapping card and once when they went from the port-mapping card to the switch/router's egress port. An interesting, but obsolete, vari- Downloaded from Digital Engineering Library McGraw-Hill (www.digitalengineeringlibrary.com) Copyright © 2004 The McGraw-Hill Companies. All rights reserved. Any use is subject to the Terms of Use as given at the website. SWITCH FABRICS SWITCH FABRICS ation of this approach was to use two unidirectional buses in order to effectively minimize this prob- ability; however, this also increased the complexity and cost. The ever-increasing capacity requirements from the exploding demand due to new IT applications and required Internet connectivity pushed the switch/router designers to confront the challenges further improving this generic design. The fundamental breakthrough was the deci