to hard or permanent hardware faults arising from incorrect specification, design, or common implementation defects; in this sense it is analogous to design diversity or N- version programming in software based fault tolerance schemes. If, however, the module contains complex logic functions which have a characteristic of exhibiting very limited failure signatures as a result of a large number of independent single event fault occurrences, this technique may help to enable the development of suitable detection provisions. In the use of complex off-the-shelf circuits that generate, transform, or process information, such as microprocessors, microcontrollers, and complex application specific circuits (ASICs), the most cost-effective hardware-based approach for error detection and correction may be modular replication. The use of off-the-shelf functions embedded in system-on-a-chip implementations are similar in nature. The constraint which mandates an application level strategy such as modular redundancy is the inability to modify the internal design of such devices to impart fault tolerance provisions at a lower level. As indicated above, modular redundancy uses multiple replicas of hardware modules and a comparison/voter mechanism to evaluate the results from the individual modules and determine the correct output. In its simplest form, two replicas are utilized with comparison logic to provide error detection; correction capability is not provided; and rollback and repeat performance of the operation is required to develop the corrected result. The most common form of this technique is triple modular redundancy (TMR) in which the voter compares the output of three modules and determines the correct result based upon a simple two-out-of-three vote. In the case of TMR the ability to detect a single fault is excellent, and the ability to deliver the most probable correct result based upon the two-out-of-three vote is also reliable. The element of difficulty in complex circuits using redundancy of this type is the a