n Figure 7.13. As we have used the depth-first simulation mode, the Simulator first executes process count1 until n = 100, state S100, then n in count2 takes the value 2, 100 transitions are executed in count1 and SO on. From state S10000, n in count2 is incremented and returns to 1, therefore the Simulator discovers that the obtained global state is S1. Note that the exhaustive simulation stops after executing once all the transitions between the 10000 global states, the result being difficult to obtain by interactive or random simulation, where it is difficult to avoid repeating loops several times. 7.3 CASE STUDY WITH TAU SDL SUITE You will run the exhaustive simulation on the V.76 SDL model to discover errors auto- matically, and much faster and with much better dynamic coverage than with interactive or random simulation. 192 Validation of Communications Systems with SDL 7.3.1 One second to detect missing save of v76frame 7.3.1.1 Prepare the SDL model Our V.76 SDL system is symmetric because two identical instances DLCa and DLCb of block type V76_DLC are used: the Validator allows to transmit signals to both instances, but it is not possible, for example, to define signal L_DataReq to be transmitted to DLCa and not to DLCb. This leads to a configuration with many global states, which is longer to simulate. To reduce the number of global states, we split the channel DLCbSU in two, one carrying the signals not to be transmitted to the DLCb: L_EstabReq, L_ReleaseReq, L_SetparmReq and L_DataReq; a Validator command will be used to disable this channel. A. In the Organizer, double-click the system V76test to open it in the SDL Editor. Use the version of V76test without observer process. B. In the SDL Editor, select File > Save As and enter v76test_dis.ssy. C. In the SDL Editor, modify V76test to obtain the configuration shown in Figure 7.14: rename one signallist su2dlcl, add the channel dis and declare the signallists su2dlc1 and disabled. USE V76; system V76test (dlc2su) (dlc2su) DLCaSU DLCbSU (su2dlc) (su2dlc1)