e detail behind each of the proposed tests, but clear reference information is available on each in the recommendations-in this case, mostly in G.8273.2 and the network requirements from G.8271.1. Additionally, there are references at the end of the chapter to numerous application notes, written by Calnex Solutions, that cover most testing scenarios. The following represents a synopsis of the performance tests of a T-BC/T-TSC clock from G.8273.2: Noise generation: The tester applies an ideal signal and measures the phase error on the signal returning from the DUT (via PTP for T-BC and 1PPS for T-TSC). So, the tester generates time signals (PTP with SyncE), sends them out a master port, receives the return signal on a slave port, and measures the amount of TE introduced by the time signal passing through the DUT. The tester measures the 2wayTE (see Chapter 9) and confirms a pass/fail against the max|TE| T- BC clock limit configured on the tester. The appropriate limit would be 100 ns for Class A, 70 ns for Class B, and 30 ns for Class C. The value for Class D is specified only after filtering by a low-pass filter (LPF) (0.1 Hz) and allows a max|TEL| of 5 ns. The tester calculates the cTE (averaged over 1000 s) and the MTIE and TDEV for the (filtered) dTE. Each of these calculated values is used to confirm compliance to the class (A, B, C, or D) for noise generation. For cTE, Class A is +50 ns, Class B is +20 ns, and Class C is +10 ns (Class D is not yet specified). The dTE (after filtering) is compared to the relevant MTIE and TDEV mask for each class of performance (see Table 12-2 for details of the limits). As previously mentioned, if the DUT has a 1PPS output, you should confirm the result is also within specification and shaped the same as the result from the PTP. The peak-to-peak TE on the 1PPS should be close to that of the PTP 2wayTE. That ensures that the 1PPS can be used as an accurate measurement port after it is placed in a remote location. Remember that if you configure any impairment or do not have Sy