protocols on different parts of the platform. Design Approach Assuming the visible and hidden cost issues that we discussed earlier in the chapter will eventually be uncovered, our designer first looks at two broad categories of component choices: switch fabric scalability and network-processing platform. We anticipate that this context with four distinct 1 GbE LANs and a 10 GbE server connection in conjunction with double OC-48c traffic (ATM or POS) made redundant starts from 40 Gbps switching bandwidth. It can eventually scale to a massive 640 Gbps bandwidth with more 10 GbE server uplinks. This fundamental requirement will steer the feasibility study team to choose an appropriate switch fabric chipset. Let's say that our designer is intrigued by Agere's PI40 switch fabric's scalability and implementation robustness. While considering the switch fabric from this vendor as well as from oth- ers, our designer also starts considering other systems-related issues. Let us assume that the team can- not afford to design ASICs, due to a lack of budget, time, and/or skills. Off-the-shelf components need to be chosen as much as possible. The following items attract the designer's attention: A powerful network-processing platform from the same vendor that offers the switch fabric (always a good idea) for both the 1 GbE and the 10 GbE environments. The vendor's ability to offer chips that can handle TDM and ATM/POS traffic. The convenience of integrated serialization/deserialization (serdes) for the switch interfaces. Physical (PHY) interface/Media Access Control (MAC) capabilities in-house with the main vendor, which can provide one-stop shopping from an established vendor. All of these are very important for our hard-pressed designer. The designer also notices that Agere's NPUs are based on a computational model and architecture that allow the optimal allocation of tasks to threads running on multiple pipelines. Unfortunately, the designer cannot count on getting application software for free like other vendors would try