 RT, the TDM multiplexed signal has to have a bit rate equal to R=2RT (7.9) The operation of a TDM multiplexer is schematically shown in Figure 7.15. The work- ing of the TDM multiplexer is divided into two phases: first the incoming tributaries are Telecommunication Networks TDM multiplexer Output TDM frame FIGURE 7.15 Scheme of the operation of a simple TDM multiplexer. In the figure, ch1, ch2, are the payload and h1 h2 the headers of the individual tributaries while hh is the header of the TDM frame. synchronized with the multiplexer clock, which will be the multiplexed signal clock, then the tributary data are inserted into the suitable frame slot besides the header, whose con- tent is produced by the multiplexer. Generally, the incoming tributaries are not only asynchronous, but they are also affected by time jitter. The only way to synchronize different fluxes and compensate the time jitter is to operate with variable delays to align the bits. Since it is not possible to anticipate a flux, delays increase more and more up to the moment in which an overall delay equal to a bit duration is accumulated. At this point, we will assume that the multiplexer inserts a void bit, operating the so- called bit stuffing. The positions of void bits are indicated in the frame header SO that they can be eliminated at the demultiplexer. If the multiplexer creates the frame, the demultiplexer divides again the tributaries, sending them on separated output lines. In general, TDM multiplexing has also to manage the jitter due to the presence in differ- ent equipment of different clocks. In our case, the multiplexer and the demultiplexer will belong to the same equipment; thus, this problem will not be present. Simple TDM multiplexers and demultiplexers, like those considered in this chapter, can be realized with fast memories, where the memory is written in parallel and read in series for the multiplexer and the inverse for the demultiplexer. Besides the multiplexers and demultiplexers, the base element of a time domain switch