tremely worrisome for a carrier-grade-reliability systems architect as the mere possibility exists that two serdes lanes on different fabric planes fail. This will inevitably cause the system to go down. The counterargument is that it all comes down to trade-offs. IBM, for instance, is an example of a major vendor using shared memory architecture in its switch fabrics along with striping. As we will see later in this chapter, their approach includes some interesting features such as native multicast and unicast support and in-band flow control. More specifically, regarding the striping of traffic, IBM's philosophy has been that once a link fails, the entire port must switch over to the backup fabric. IBM believes it is much more important to offer a graceful degradation of service. When talking about a switching system with several ports at 10 Gbps, for example, degrading a single port to 7.5 Gbps can cause congestion on the other ports and have an impact on some port performance that was not sup- posed to be affected. IBM's striping (byte slicing) enables its fabrics to operate in full multicast mode, 15. Refer to Note 6. Downloaded from Digital Engineering Library @ McGraw-Hill (www.digitalengineeringlibrary.com) Copyright © 2004 The McGraw-Hill Companies. All rights reserved. Any use is subject to the Terms of Use as given at the website. SWITCH FABRICS NETWORK PROCESSORS From PHY/MAC Switch fabric chip or card 1 To TM & NPU Switch fabric chip or card 2 From PHY/MAC Shared To TM & NPU memory From PHY/MAC To TM & NPU Control module serdes serdes FIGURE 14.10 Shared memory switch fabric. whereas other implementations (such as sending a full packet per serial link) will cause a bandwidth degradation by a factor of 2 (in the case of multicast packets). MULTISTAGE SWITCHES We discussed earlier that in the case of a crossbar network, a potential failure at one junction might catastrophically affect the entire switch. One solution for that problem is to design a multistage switch, where the architect configures a man