in a row, the run lengths, are just one in a row half the time, two in a row one-quarter of the time, three in a row one-eighth of the time, n in a row 1/2n of the time. 3. Two sequences have half their bits equal and half not equal. Generated sequences that follow these three rules are pseudorandom sequences (or codes). It is far easier to have the transmitter and receiver agree on a generating func- tion than to have them agree beforehand on a truly random sequence long enough for a telephone call.² A maximal length linear shift register sequence satisfies these three properties and is easy to generate. We generate a sequence of zero-one bits an from an=C1an-1ta2an-2 + + CrAn-r (8.7) The Ci are connections, and they are 1 when an is connected to An-i and 0 when there is no connection. Multiplication is done the usual way: 0x0=0 0x1=0 (8.8) 1 x 0 = 0 1 x 1 = 1 2A 10-minute cdmaOne telephone call is 750,000,000 chips long. Downloaded from Digital Engineering Library @ McGraw-Hill (www.digitalengineeringlibrary.com) Copyright © 2004 The McGraw-Hill Companies. All rights reserved. Any use is subject to the Terms of Use as given at the website. The CDMA Principle The CDMA Principle whereas addition is done modulo 2: 0 + 0 = 0 0+1=1 (8.9) 1+0=1 1+1=0 Mathematically speaking, these operations form an algebraic field with almost all the nice properties of the real numbers we use in regular algebra. An example of a linear shift register sequence of four stages is to connect each bit to its four predecessors, a1=a2 A3 a4 1. This means that an = An-1 + An-2 An-3 An-4. Consider a starting seed of 0001, and we get 0001100011000110001 (8.10) This linear shift register sequence repeats every 5 bits. Another example of a linear shift register sequence of four stages is to connect each bit to its first and fourth predecessors, C1 C4 1 and C2 = C3 = 0, so an = an-1 An-4 without the middle two terms. With the same starting seed of 0001, we get 0001111010110010001 (8.11) Note that this linear shift register sequence repeats every 