 we gave node 2 (time 0) in Figure 7.9(a), for a grand total of 1. 2. For node 3 (time 0) as starting node moving to node 1 (time 1), the output is 01. Comparing this to the first two bits of V, which are 00, we say "1 bit error if parent node is node 3 (time 0)." We add this 1 to the 0 number that we gave node 3 (time 0) in Figure 7.9(a), for a grand total of 1. Since starting at node 2 (time 0) or node 3 (time 0) and moving to node 1 (time 1) creates the same total bit errors, we proclaim that the parent node for node 1 (time 1) is node 2 (time 0) (we use a tie-breaker rule of "always choose the top node in case of a tie"). That carries with it the number 1 (for one total error with this selection). We repeat this for node 2 (time 1) and node 3 (time 1), and the result of doing this is shown in Figure 7.9 (d). That is all we do for our first move from left to right through the trellis. At the next time, we do a very similar thing. We start again at the top node, this time starting with node 0 (time 2). Looking at Figure 7.10(a), we can see that this node has two possible parent nodes, which are node 0 (time 1) and node 1 (time 1). We decide between these two nodes as follows: 1. If we started at node 0 (time 1) and moved to node 0 (time 2), the second set of output bits would be 00. Comparing this to V where the second set of output bits are 00, we say "O bit errors if parent is node 0 (time 0)." We add this 0 to the 0 number that we gave node 0 (time 1) in Figure 7.9(b), for a grand total of 0. 2. If we started at node 1 (time 1) and moved to node 0 (time 2), the second two output bits would be 11. Comparing this to V where the second two output bits are 00, we say "2 bit errors if parent is node 1 (time 1)." We add this 2 to the 1 num- ber that we gave node 1 (time 1) in Figure 7.9(c), for a grand total of 3. Since starting at node 0 (time 1) and moving to node 0 (time 2) creates the fewest total bit errors (0), we proclaim that the parent node for node 0 (time 2) is node 0 (time 1), and that it carries with 