 next-generation products based on its TOPcore architecture for 10 Gigabit Ethernet and multigigabit applications. The company has stated that development of its NP-2 product will take high priority when the market demand for 40 Gbps applications picks up. The EZchip NP-1 network processor includes a PCI bus with the host CPU and a DDR interface with external SDRAM. On the fabric side, it includes a CSIX interface with the switch fabric itself (or to cascade multiple NP-1 chips and increase system capacity), or an XGMII interface with an inte- grated 10 Gigabit Ethernet MAC. On the line side, it includes an SPI-4.2 interface with an external OC-192 POS framer, another XGMII interface connecting with yet another 10 Gigabit Ethernet MAC, or a GMII/TBI interfacing with eight 1 Gigabit Ethernet MACs. This flexibility allows the NP-1 to function as a standalone box connecting a 10 Gigabit Ethernet port to another 10 Gigabit Ethernet port. It can also be configured as an aggregator of eight 1 Gigabit Ethernet ports onto one 10 Gigabit Ethernet port in addition to working in a more traditional PHY-to-NPU-to-serdes-to-fabric chain. Obviously, systems designed around the EZchip NP-1 network processor can be programmed to deliver layer 2 functionality and MPLS switching, along with IPv4/IPv6 routing, packet tunneling, flow classification, QoS, and policing. In general, they can manipulate packet payloads with a large flexibility for numerous types of applications. As we mentioned in the beginning of this section, the NP-1 can handle up to layer 7 processing. You may wonder which layer 7 functionality is required for a 10 Gbps processor. This seems more geared toward carrier-class applications. Parsing, classification, and modification capabilities are, of course, highly desirable in systems such as server load balancers or URL-based web switches. In gen- eral, the NP-1 enables advanced services that must rely on fine-grained flow classification, URL matching, and per-flow state updating. The beauty of layer 7 processing is