pability, T4 depends on cell size, T1 and T3 are NR standard driven, and gNB implementation dependent. Lower THARQ improves performance-low latency is a key 5G target-as well as reducing system (memory) resources. This drives reduction of T1 and T5. Key aspects of this reduction include Linux scheduling performance. The MAC/RLC portion of the application assumes Linux as an OS, and the Linux scheduler as thread scheduling mechanism. To maintain hard- Real Time (RT) operation, the PREEMPT_RT patch is applied. The maximum RT response time is defined as the worst-case response time to a trigger such as a frame timer or Interrupt Request (IRQ). When applying the PREEMPT_RT patch, the latency bound is to <20 microseconds (see section PREEMPT_RT). Memory and interface throughput. The latency of a data transfer through a link such as PCIe SerDes is inverse proportional to the utilization of the link. For example, a PCIe gen3 dual lane controller supports a goodput of approximately 14 Gbps. When connecting to a 5 Gbps 5G/NR modem with a 125microseconds TTI ( 80KByte/TTI), the Transport Block transfer time consumes approximately 45 microseconds or 36% of the frame latency. DU/RU latency which is accounted for multiple times-both during transmit and receive operation. With reduced frame times in 5G/NR, the impact of PREEMPT_RT performance becomes more important. Mitigation options include "Early wakeup" where the trigger to the core running MAC layer is offset by the expected PREEMPT_RT latency. This comes at the cost of potential underutilization of the core (e.g., a wait-loop for ACK/NACK reception). Minimize the overhead of interacting between MAC and PHY. For example, move to a push model where the MAC host uses a Direct Memory Access (DMA) write (as opposed to PHY DMA read) to transfer the data to the PHY. Increase THARQ (and accept increased HARQ process count). Increase the link capacity of the MAC/PHY physical interface. Radio unit RU implementation is about dimensioning of the analog processing chain and the digit