hat comes out. Looking at Figure 7.3, we see that when a 1 comes into the shift register, it enters into position 1 and a 00 ends up bumped into position 2 and 3. So the shift register contents are 100. That means that output 1 is 1+0+0 (modulo 2) 1, and the output 2 is 0 (modulo 2) 1. So the output at this time is 1. Input bit Shift register Output bits contents bit 1 bit 2 Figure 7.3 Showing the workings of the convolutional coder Similarly, at time 2 a 0 comes in, and it bumps the 1 0 into position 2 and 3 in the shift register. As a result, the two output bits are: 0 + 1 + 0 = 1 (for the first output bit), and 0+0=0 for the second output bit. We can continue in this way for all the output bits, and soon we end up with the outputs shown in Figure 7.3. Chapter Seven 7.1.3 Polynomial Representation 1 + X + X ² Another way to express the operations of the convolutional coder is through the use of polynomials. Let me explain by example. Consider the convolutional coder shown in Figure 7.4, looking specifically at the lines connecting the shift register to the top adder, (which outputs the first output bit). We have a line connecting shift register position 1 to the adder, and we represent this as a 1. We also have a line connecting shift register position 2 to the adder, and we Figure 7.4 Polynomial representation of represent this as X. Finally, we have a convolutional coder line connecting shift register position 3 to the adder, and we represent this as X2. We denote all these connections that feed the top adder outputting bit 1 by the polynomial g(X)=1+X+X- (7.1) Similarly, we describe the bottom adder, outputting bit 2, in this way. As this adder is connected to shift register position 1, this gets represented by a 1. As it is also connected to bit register position 3, this gets represented using an X2. Putting this together, the bottom adder outputting bit 2 is described by the polynomial g,(X)=1+X2 (7.2) Using g((X) and g2 (X), we have a full description of the channel coder, and we can use this description 