, ▁there ▁was ▁very ▁little ▁in ▁common ▁between ▁these ▁two ▁computer ▁architect ures . ▁ ▁This ▁chip ▁was ▁never ▁commer cially ▁available . ▁ ▁This ▁ 1 2 ▁bit ▁processor ▁was ▁the ▁only ▁commer cially ▁available ▁chip ▁to ▁feature ▁all ▁four ▁mathematical ▁functions ▁( add ition , ▁sub tra ction , ▁multiplication ▁and ▁division ) ▁at ▁the ▁time . ▁ ▁The ▁choice ▁of ▁ 1 2 ▁bits ▁was ▁not ▁accident al . ▁ ▁For ▁accuracy , ▁it ▁was ▁determined ▁that ▁formulas ▁needed ▁to ▁be ▁able ▁to ▁resolve ▁ 1 ▁part ▁in ▁ 1 0 0 0 ▁or ▁about ▁ 1 0 ▁bits . ▁ ▁Another ▁bit ▁was ▁required ▁for ▁sign . ▁ ▁This , ▁log ically , ▁was ▁rounded ▁up ▁to ▁ 1 2 ▁bits ▁which ▁also ▁resulted ▁in ▁an ▁address ▁space ▁of ▁ 1 6 ▁kil o - words . ▁ ▁There ▁was ▁no ▁" stack " ▁for ▁sub rout ine ▁calls ▁and ▁returns . ▁ ▁R ather ▁the ▁Inst ruction ▁Po inter ▁Register ▁was ▁" sw apped " ▁with ▁another ▁register ▁that ▁had ▁been ▁previously ▁filled ▁with ▁the ▁address ▁of ▁the ▁target ▁sub rout ine . ▁ ▁Return ing ▁was ▁accomplished ▁by ▁sw apping ▁back . ▁ ▁All ▁code ▁was ▁written ▁in ▁assembly ▁language . ▁ ▁Another ▁feature ▁on ▁the ▁E EC ▁I / II ▁modules ▁was ▁the ▁use ▁of ▁a ▁separate ▁memory ▁module ▁that ▁bol ted ▁to ▁the ▁housing ▁of ▁the ▁control ▁module . ▁ ▁This ▁was ▁done ▁to ▁facil itate ▁changing ▁the ▁software , ▁a ▁combination ▁of ▁algorithms ▁("