▁F PG As ▁contain ▁an ▁array ▁of ▁program m able ▁logic ▁blocks , ▁and ▁a ▁hierarchy ▁of ▁" re config urable ▁inter connect s " ▁that ▁allow ▁the ▁blocks ▁to ▁be ▁" w ired ▁together ", ▁like ▁many ▁logic ▁gates ▁that ▁can ▁be ▁inter - w ired ▁in ▁different ▁configurations . ▁Log ic ▁blocks ▁can ▁be ▁configured ▁to ▁perform ▁complex ▁combin ational ▁functions , ▁or ▁merely ▁simple ▁logic ▁gates ▁like ▁AND ▁and ▁X OR . ▁In ▁most ▁F PG As , ▁logic ▁blocks ▁also ▁include ▁memory ▁elements , ▁which ▁may ▁be ▁simple ▁f lip - f lo ps ▁or ▁more ▁complete ▁blocks ▁of ▁memory . ▁Many ▁F PG As ▁can ▁be ▁re program med ▁to ▁implement ▁different ▁logic ▁functions , ▁allowing ▁flexible ▁re config urable ▁computing ▁as ▁performed ▁in ▁computer ▁software . ▁F PG As ▁have ▁a ▁remarkable ▁role ▁in ▁the ▁embedded ▁system ▁development ▁due ▁to ▁cap ability ▁to ▁▁ ▁start ▁system ▁software ▁( SW ) ▁development ▁simultaneously ▁with ▁hardware ▁( H W ) ▁ ▁enable ▁system ▁performance ▁simulations ▁at ▁very ▁early ▁phase ▁of ▁the ▁development ▁ ▁allow ▁various ▁system ▁partition ing ▁( SW ▁and ▁H W ) ▁tri als ▁and ▁iterations ▁before ▁final ▁free zing ▁of ▁the ▁system ▁architecture ▁ ▁Techn ical ▁design ▁ ▁Contempor ary ▁field - program m able ▁gate ▁arrays ▁( F PG As ) ▁have ▁large ▁resources ▁of ▁logic ▁gates ▁and ▁RAM ▁blocks ▁to ▁implement ▁complex ▁digital ▁comput ations . ▁As ▁F P GA ▁designs ▁employ ▁very ▁fast ▁I / O ▁rates ▁and ▁bid irection al ▁data ▁bus