▁it ▁is ▁un real istic ▁to ▁simply ▁scale ▁this ▁number ▁by ▁processor ▁clock ▁speed . ▁The ▁arbitr ation ▁unit ▁impos es ▁additional ▁constraints ▁which ▁are ▁discussed ▁in ▁the ▁Band width ▁Ass ess ment ▁section ▁below . ▁ ▁IBM ▁Senior ▁Engine er ▁David ▁K ro lak , ▁E IB ▁lead ▁designer , ▁explains ▁the ▁conc urrency ▁model : ▁ ▁Each ▁particip ant ▁on ▁the ▁E IB ▁has ▁one ▁ 1 6 ▁byte ▁read ▁port ▁and ▁one ▁ 1 6 ▁byte ▁write ▁port . ▁The ▁limit ▁for ▁a ▁single ▁particip ant ▁is ▁to ▁read ▁and ▁write ▁at ▁a ▁rate ▁of ▁ 1 6 ▁byte ▁per ▁E IB ▁clock ▁( for ▁simplicity ▁often ▁regarded ▁ 8 ▁byte ▁per ▁system ▁clock ). ▁Note ▁that ▁each ▁S PU ▁processor ▁contains ▁a ▁dedicated ▁D MA ▁management ▁queue ▁capable ▁of ▁sched uling ▁long ▁sequences ▁of ▁transactions ▁to ▁various ▁end points ▁without ▁inter fer ing ▁with ▁the ▁S PU ' s ▁on going ▁comput ations ; ▁these ▁D MA ▁que ues ▁can ▁be ▁managed ▁locally ▁or ▁rem ot ely ▁as ▁well , ▁providing ▁additional ▁flex ibility ▁in ▁the ▁control ▁model . ▁ ▁Data ▁flows ▁on ▁an ▁E IB ▁channel ▁step wise ▁around ▁the ▁ring . ▁Since ▁there ▁are ▁twelve ▁participants , ▁the ▁total ▁number ▁of ▁steps ▁around ▁the ▁channel ▁back ▁to ▁the ▁point ▁of ▁origin ▁is ▁twelve . ▁Six ▁steps ▁is ▁the ▁longest ▁distance ▁between ▁any ▁pair ▁of ▁participants . ▁An ▁E IB ▁channel ▁is ▁not ▁permitted ▁to ▁convey ▁data ▁requiring ▁more ▁than ▁six ▁steps ; ▁such ▁data ▁must ▁take ▁the