▁engine . ▁ ▁Since ▁the ▁S PE ' s ▁load / store ▁instructions ▁can ▁only ▁access ▁its ▁own ▁local ▁scratch pad ▁memory , ▁each ▁S PE ▁entirely ▁depends ▁on ▁D MA s ▁to ▁transfer ▁data ▁to ▁and ▁from ▁the ▁main ▁memory ▁and ▁other ▁S PE s ' ▁local ▁mem ories . ▁A ▁D MA ▁operation ▁can ▁transfer ▁either ▁a ▁single ▁block ▁area ▁of ▁size ▁up ▁to ▁ 1 6 KB , ▁or ▁a ▁list ▁of ▁ 2 ▁to ▁ 2 0 4 8 ▁such ▁blocks . ▁One ▁of ▁the ▁major ▁design ▁dec isions ▁in ▁the ▁architecture ▁of ▁Cell ▁is ▁the ▁use ▁of ▁D MA s ▁as ▁a ▁central ▁means ▁of ▁int ra - ch ip ▁data ▁transfer , ▁with ▁a ▁view ▁to ▁en abling ▁maximal ▁as ynchron y ▁and ▁conc urrency ▁in ▁data ▁processing ▁inside ▁a ▁chip . ▁ ▁The ▁P PE , ▁which ▁is ▁capable ▁of ▁running ▁a ▁conventional ▁operating ▁system , ▁has ▁control ▁over ▁the ▁S PE s ▁and ▁can ▁start , ▁stop , ▁interrupt , ▁and ▁schedule ▁processes ▁running ▁on ▁the ▁S PE s . ▁To ▁this ▁end ▁the ▁P PE ▁has ▁additional ▁instructions ▁rel ating ▁to ▁control ▁of ▁the ▁S PE s . ▁Un like ▁S PE s , ▁the ▁P PE ▁can ▁read ▁and ▁write ▁the ▁main ▁memory ▁and ▁the ▁local ▁mem ories ▁of ▁S PE s ▁through ▁the ▁standard ▁load / store ▁instructions . ▁Despite ▁having ▁T uring ▁complete ▁architect ures , ▁the ▁S PE s ▁are ▁not ▁fully ▁autonom ous ▁and ▁require ▁the ▁P PE ▁to