, ▁P CI ▁Express ▁does ▁not ▁have ▁separate ▁interrupt ▁p ins ▁at ▁all ; ▁instead , ▁it ▁uses ▁special ▁in - band ▁messages ▁to ▁allow ▁pin ▁assertion ▁or ▁de assert ion ▁to ▁be ▁em ulated . ▁ ▁Some ▁non - P CI ▁architect ures ▁also ▁use ▁M SI ; ▁as ▁another ▁example , ▁H P ▁G SC ▁devices ▁do ▁not ▁have ▁interrupt ▁p ins ▁and ▁can ▁generate ▁interrupt s ▁only ▁by ▁writing ▁directly ▁to ▁the ▁processor ' s ▁interrupt ▁register ▁in ▁memory ▁space . ▁The ▁Hyper Transport ▁protocol ▁also ▁supports ▁M SI . ▁ ▁Adv antages ▁ ▁While ▁more ▁complex ▁to ▁implement ▁in ▁a ▁device , ▁message ▁sign alled ▁interrupt s ▁have ▁some ▁significant ▁advantages ▁over ▁pin - based ▁out - of - band ▁interrupt ▁sign alling . ▁ ▁On ▁the ▁mechanical ▁side , ▁fewer ▁p ins ▁makes ▁for ▁a ▁simpler , ▁che aper , ▁and ▁more ▁reliable ▁conne ctor . ▁While ▁this ▁is ▁no ▁advantage ▁to ▁the ▁standard ▁P CI ▁conne ctor , ▁P CI ▁Express ▁takes ▁advantage ▁of ▁these ▁sav ings . ▁ ▁M SI ▁increases ▁the ▁number ▁of ▁interrupt s ▁that ▁are ▁possible . ▁While ▁conventional ▁P CI ▁was ▁limited ▁to ▁four ▁interrupt s ▁per ▁card ▁( and , ▁because ▁they ▁were ▁shared ▁among ▁all ▁cards , ▁most ▁are ▁using ▁only ▁one ), ▁message ▁sign alled ▁interrupt s ▁allow ▁do z ens ▁of ▁interrupt s ▁per ▁card , ▁when ▁that ▁is ▁useful . ▁ ▁There ▁is ▁also ▁a ▁slight ▁performance ▁advantage . ▁In ▁software , ▁a ▁pin - based ▁interrupt