, ▁since ▁no ▁public ▁information ▁is ▁available ▁about ▁negoti ations ▁between ▁the ▁two ▁companies ▁on ▁this ▁issue . ▁ ▁The ▁use ▁of ▁the ▁ 8 F ▁byte ▁requires ▁that ▁the ▁m - bits ▁( see ▁V EX ▁coding ▁scheme ) ▁have ▁a ▁value ▁larger ▁than ▁or ▁equal ▁to ▁ 8 ▁in ▁order ▁to ▁avoid ▁overlap ▁with ▁existing ▁instructions . ▁The ▁C 4 ▁byte ▁used ▁in ▁the ▁V EX ▁scheme ▁has ▁no ▁such ▁restriction . ▁This ▁may ▁prevent ▁the ▁use ▁of ▁the ▁m - bits ▁for ▁other ▁purposes ▁in ▁the ▁future ▁in ▁the ▁X OP ▁scheme , ▁but ▁not ▁in ▁the ▁V EX ▁scheme . ▁Another ▁possible ▁problem ▁is ▁that ▁the ▁pp ▁bits ▁have ▁the ▁value ▁ 0 0 ▁in ▁the ▁X OP ▁scheme , ▁while ▁they ▁have ▁the ▁value ▁ 0 1 ▁in ▁the ▁V EX ▁scheme ▁for ▁instructions ▁that ▁have ▁no ▁legacy ▁equivalent . ▁This ▁may ▁comp licate ▁the ▁use ▁of ▁the ▁pp ▁bits ▁for ▁other ▁purposes ▁in ▁the ▁future . ▁ ▁A ▁similar ▁compatibility ▁issue ▁is ▁the ▁difference ▁between ▁the ▁F MA 3 ▁and ▁F MA 4 ▁instruction ▁sets . ▁Intel ▁initially ▁proposed ▁F MA 4 ▁in ▁AV X / F MA ▁specification ▁version ▁ 3 ▁to ▁su pers ede ▁the ▁ 3 - oper and ▁F MA ▁proposed ▁by ▁A MD ▁in ▁S SE 5 . ▁After ▁A MD ▁adopted ▁F MA 4 , ▁Intel ▁can ce led ▁F MA 4 ▁support ▁and ▁revert ed ▁to ▁F MA 3 ▁in ▁the ▁AV X / F MA ▁specification ▁version ▁ 5