NT SC ) ▁ 1 4 - bit ▁multiple x ed ▁data / address ▁bus ▁shared ▁with ▁CPU ▁▁ 2 0 x 1 2 ▁t iled ▁play field , ▁t iles ▁are ▁ 8 x 8 ▁pixels ▁for ▁a ▁resolution ▁of ▁ 1 5 9 x 9 6 ▁( right ▁pixel ▁not ▁displayed ) ▁ 1 6 ▁color ▁p alette , ▁two ▁colors ▁per ▁tile For eground / Background ▁mode ; ▁all ▁ 1 6 ▁colors ▁available ▁for ▁background ▁and ▁colors ▁ 1 – 8 ▁available ▁for ▁for eground ▁per ▁tile ; ▁g rom ▁cards ▁limited ▁to ▁the ▁first ▁ 6 4 Color ▁Stack ▁mode ; ▁all ▁ 1 6 ▁colors ▁available ▁for ▁for eground ▁per ▁tile ; ▁background ▁colour ▁from ▁a ▁four ▁colour ▁rot ating ▁stack ▁of ▁any ▁four ▁colors , ▁all ▁ 2 7 7 ▁g rom ▁and ▁gram ▁cards ▁available Color ed ▁S qu ares ▁mode ▁allows ▁each ▁tile ▁to ▁have ▁four ▁different ▁colored ▁ 4 x 4 ▁blocks ▁as ▁in ▁S na fu ); ▁first ▁seven ▁colors ▁available ▁for ▁for eground ▁blocks ; ▁background ▁colour ▁from ▁the ▁color ▁stack ▁ 8 ▁spr ites ▁( all ▁visible ▁on ▁the ▁same ▁scan line ). ▁Hard ware ▁supports ▁the ▁following ▁features ▁per - spr ite : ▁coordinate ▁address able ▁off ▁screen ▁for ▁smooth ▁edge ▁entries ▁and ▁ex its ▁Size ▁selection : ▁ 8 x 1 6 ▁or ▁ 8 ▁pixels ▁wide ▁by ▁ 8 ▁half - p ix els ▁high ▁St retch ing : ▁horizontal ▁( 1 × ▁or ▁ 2 ×