process ors ▁based ▁on ▁Electron ika ▁NC ▁micro architecture , ▁however ▁only ▁the ▁first ▁one , ▁the ▁K 1 8 0 1 VE 1 ▁micro controller , ▁used ▁the ▁Electron ica ▁NC ▁instruction ▁set . ▁O thers ▁have ▁an ▁updated ▁micro code ▁implementing ▁the ▁L SI - 1 1 ▁architecture . ▁Vari ous ▁models ▁differ ed ▁in ▁clock ▁speed , ▁instruction ▁set ▁( the ▁first ▁models ▁lack ed ▁the ▁M UL ▁and ▁D IV ▁commands , ▁for ▁example ), ▁package ▁and ▁address ▁bus ▁width ▁( the ▁latest ▁models ▁supported ▁ 2 2 - bit ▁address ing ). ▁ ▁K 1 8 0 1 VE 1 ▁ ▁Inst ruction ▁set : ▁Ele ktr on ika ▁NC ▁ ▁Technology : ▁n M OS ▁ ▁Bus : ▁Q - bus , ▁multiple x ed ▁ ▁C lock ▁speed : ▁ 1 0 0   k Hz ▁— ▁ 2   M Hz ▁ ▁Package : ▁ 4 2 - pin ▁cer am ic ▁plan ar , ▁kind ▁of ▁cross ▁between ▁C ER DI P ▁and ▁SO IC ▁ ▁Micro controller ▁ ▁RAM : ▁ 2 5 6 ▁bytes ▁( 1 2 8 ▁ 1 6 - bit ▁words ) ▁ ▁R OM : ▁ 2 ▁K ib ▁( 1 0 2 4 ▁ 1 6 - bit ▁words ) ▁ ▁K 1 8 0 1 VM 1 ▁▁ ▁Inst ruction ▁set : ▁L SI - 1 1 ; ▁supported ▁E IS ▁instructions : ▁X OR , ▁SO B , ▁M UL ▁( M UL ▁only ▁in