3 0 0 A 1 GB ▁ ▁C X D 5 3 0 1 D GB ▁ ▁C X D 5 3 0 2 D GB ▁ ▁C X D 5 3 0 2 A 1 GB ▁ ▁Local ▁G DD R 3 ▁physical ▁memory ▁structure ▁ ▁Total ▁Memory ▁ 2 5 6 MB ▁▁ 2 ▁Part itions ▁( 1 2 8 MB ) ▁▁ 6 4 bit ▁bus ▁per ▁partition ▁▁ 8 ▁B anks ▁per ▁partition ▁( 1 6 MB ) ▁▁ 4 0 9 6 ▁P ages ▁per ▁bank ▁( 4 KB ) ▁-> ▁ 1 2 bit ▁Row ▁Address ▁ ▁Memory ▁block ▁in ▁a ▁page ▁-> ▁ 9 bit ▁Column ▁Address ▁ ▁Min imum ▁access ▁gran ular ity ▁= ▁ 8 ▁bytes ▁-> ▁same ▁as ▁bus width ▁between ▁R S X ▁<> ▁G DD R ▁ ▁R S X ▁memory ▁map ▁▁ ▁Although ▁the ▁R S X ▁has ▁ 2 5 6 MB ▁of ▁G DD R 3 ▁RAM , ▁not ▁all ▁of ▁it ▁is ▁us able . ▁The ▁last ▁ 4 MB ▁is ▁reserved ▁for ▁keeping ▁track ▁of ▁the ▁R S X ▁internal ▁state ▁and ▁issued ▁commands . ▁The ▁ 4 MB ▁of ▁GPU ▁Data ▁contains ▁RAM IN , ▁RAM HT , ▁RAM FC , ▁D MA ▁Object s , ▁Graph ic ▁Object s , ▁and ▁the ▁Graph ic ▁Context . ▁The ▁following ▁is ▁a ▁break down ▁of ▁the ▁address ▁within ▁ 2 5 6 MB ▁of ▁the ▁R S X . ▁ ▁Besides ▁local ▁G DD R 3