▁need ▁only ▁be ▁set ▁when ▁adding ▁or ▁removing ▁an ▁item ▁from ▁the ▁queue . ▁ ▁The ▁register ▁set ▁is ▁in ▁the ▁visible ▁address ▁space . ▁ ▁Register s ▁appear ▁to ▁exist ▁in ▁the ▁first ▁ 1 2 8 ▁words ▁( 2 0 0 8 ) ▁of ▁the ▁current ▁instruction ▁bank ▁( B 0 ) ▁when ▁referenced ▁as ▁a ▁data ▁item . ▁ ▁This ▁does ▁imp ose ▁a ▁restriction ▁on ▁comp ilers ▁to ▁not ▁place ▁any ▁data ▁constants ▁in ▁the ▁first ▁ 1 2 8 ▁words ▁of ▁a ▁code ▁bank . ▁ ▁The ▁result ▁of ▁this ▁is ▁an ▁expansion ▁of ▁the ▁instruction ▁set ▁without ▁requiring ▁additional ▁operation ▁codes . ▁ ▁Register - to - register ▁operations ▁are ▁accomplished ▁with ▁the ▁register - storage ▁operation ▁codes . ▁ ▁Typ ical ▁instructions ▁contain ▁a ▁function ▁code , ▁the ▁target ▁( or ▁source ) ▁register , ▁an ▁index ▁register , ▁a ▁base ▁register ▁and ▁a ▁disp lacement ▁field . ▁ ▁When ▁the ▁function ▁code ▁with ▁its ▁qual ifier ▁indicates ▁immediate ▁data , ▁the ▁disp lacement , ▁base , ▁i , ▁and ▁h ▁fields ▁combine ▁to ▁form ▁a ▁single ▁ 1 8 - bit ▁immediate ▁value . ▁ ▁This ▁allows ▁loading , ▁adding , ▁multip lying , ▁etc . ▁by ▁small ▁constants ▁to ▁eliminate ▁a ▁memory ▁reference ▁and ▁the ▁associated ▁storage . ▁ ▁Process or ▁state ▁as ▁captured ▁on ▁a ▁stack ▁at ▁an ▁interrupt ▁contains ▁the ▁information ▁needed ▁to ▁both ▁return ▁control ▁to ▁the ▁interrupted ▁activity ▁and ▁to ▁determine ▁the ▁type ▁of ▁the ▁interrupt . ▁ ▁Inter rupt