▁( M UL / DI V ▁included , ▁F IS ▁codes ▁implemented ▁by ▁R OM ▁interrupt ▁rout ines ) ▁ ▁Technology : ▁ 4   μ m ▁n M OS ▁( a ▁later ▁C M OS ▁version ▁was ▁designated ▁ 1 8 0 6 VM 2 ) ▁ ▁Die ▁size : ▁ 5 . 3 x 5 . 3 5   mm , ▁ 1 8 5 0 0 ▁trans ist ors ▁ ▁Bus : ▁М П И ▁( Q - Bus , ▁multiple x ed ) ▁ ▁C lock ▁speed : ▁ 2 ▁— ▁ 1 0   M Hz ▁ ▁Vol t age : ▁+ 5 ▁V ▁ ▁Power : ▁ 1 . 7 ▁W ▁ ▁Package : ▁ 4 0 - pin ▁C ER DI P ▁( K M 1 8 0 1 VM 2 ) ▁or ▁P DI P ▁( K R 1 8 0 1 VM 2 , ▁military ▁variant ▁R 1 8 0 2 VM 2 ) ▁ ▁Second ▁source : ▁SE M Z ▁Sol ne chn og or sk ▁ ▁It ▁has ▁two ▁different ▁address ▁spaces ▁and ▁the ▁ability ▁to ▁quickly ▁switch ▁between ▁them . ▁They ▁were ▁used ▁in ▁implementing ▁the ▁F IS ▁instruction ▁subset , ▁with ▁instructions ▁processed ▁not ▁in ▁micro code , ▁but ▁as ▁interrupt ▁handlers ▁in ▁shadow ▁R OM . ▁ ▁K 1 8 0 1 VM 3 ▁ ▁Inst ruction ▁set : ▁L SI - 1 1 ; ▁E IS ▁and ▁MM U ▁( M TP D , ▁M T PI ,