<filename>doc/latex/group___d_a_c___peripheral___access___layer.tex<gh_stars>0
\hypertarget{group___d_a_c___peripheral___access___layer}{}\section{D\+AC Peripheral Access Layer}
\label{group___d_a_c___peripheral___access___layer}\index{DAC Peripheral Access Layer@{DAC Peripheral Access Layer}}
\subsection*{Modules}
\begin{DoxyCompactItemize}
\item 
\mbox{\hyperlink{group___d_a_c___register___masks}{D\+A\+C Register Masks}}
\end{DoxyCompactItemize}
\subsection*{Data Structures}
\begin{DoxyCompactItemize}
\item 
struct \mbox{\hyperlink{struct_d_a_c___type}{D\+A\+C\+\_\+\+Type}}
\end{DoxyCompactItemize}
\subsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\#define \mbox{\hyperlink{group___d_a_c___peripheral___access___layer_gada12ca8452e773fd8f38041872934efc}{D\+A\+C0\+\_\+\+B\+A\+SE}}~(0x4003\+F000u)
\item 
\#define \mbox{\hyperlink{group___d_a_c___peripheral___access___layer_gadfe0025fe66918c644e110c3b055c955}{D\+A\+C0}}~((\mbox{\hyperlink{struct_d_a_c___type}{D\+A\+C\+\_\+\+Type}} $\ast$)\mbox{\hyperlink{group___d_a_c___peripheral___access___layer_gada12ca8452e773fd8f38041872934efc}{D\+A\+C0\+\_\+\+B\+A\+SE}})
\item 
\#define \mbox{\hyperlink{group___d_a_c___peripheral___access___layer_ga2e056d497cd21aa7a51e188e005e9b37}{D\+A\+C\+\_\+\+B\+A\+S\+E\+\_\+\+A\+D\+D\+RS}}~\{ \mbox{\hyperlink{group___d_a_c___peripheral___access___layer_gada12ca8452e773fd8f38041872934efc}{D\+A\+C0\+\_\+\+B\+A\+SE}} \}
\item 
\#define \mbox{\hyperlink{group___d_a_c___peripheral___access___layer_gab47690040e4d63adc4f324358c27157a}{D\+A\+C\+\_\+\+B\+A\+S\+E\+\_\+\+P\+T\+RS}}~\{ \mbox{\hyperlink{group___d_a_c___peripheral___access___layer_gadfe0025fe66918c644e110c3b055c955}{D\+A\+C0}} \}
\item 
\#define \mbox{\hyperlink{group___d_a_c___peripheral___access___layer_gac003cc87c636841f96fbf9084f536c43}{D\+A\+C\+\_\+\+I\+R\+QS}}~\{ \mbox{\hyperlink{group___interrupt__vector__numbers_gga666eb0caeb12ec0e281415592ae89083a6029e7bffa10f584e060a5448a456927}{D\+A\+C0\+\_\+\+I\+R\+Qn}} \}
\end{DoxyCompactItemize}


\subsection{Detailed Description}


\subsection{Macro Definition Documentation}
\mbox{\Hypertarget{group___d_a_c___peripheral___access___layer_gadfe0025fe66918c644e110c3b055c955}\label{group___d_a_c___peripheral___access___layer_gadfe0025fe66918c644e110c3b055c955}} 
\index{DAC Peripheral Access Layer@{DAC Peripheral Access Layer}!DAC0@{DAC0}}
\index{DAC0@{DAC0}!DAC Peripheral Access Layer@{DAC Peripheral Access Layer}}
\subsubsection{\texorpdfstring{DAC0}{DAC0}}
{\footnotesize\ttfamily \#define D\+A\+C0~((\mbox{\hyperlink{struct_d_a_c___type}{D\+A\+C\+\_\+\+Type}} $\ast$)\mbox{\hyperlink{group___d_a_c___peripheral___access___layer_gada12ca8452e773fd8f38041872934efc}{D\+A\+C0\+\_\+\+B\+A\+SE}})}

Peripheral D\+A\+C0 base pointer \mbox{\Hypertarget{group___d_a_c___peripheral___access___layer_gada12ca8452e773fd8f38041872934efc}\label{group___d_a_c___peripheral___access___layer_gada12ca8452e773fd8f38041872934efc}} 
\index{DAC Peripheral Access Layer@{DAC Peripheral Access Layer}!DAC0\_BASE@{DAC0\_BASE}}
\index{DAC0\_BASE@{DAC0\_BASE}!DAC Peripheral Access Layer@{DAC Peripheral Access Layer}}
\subsubsection{\texorpdfstring{DAC0\_BASE}{DAC0\_BASE}}
{\footnotesize\ttfamily \#define D\+A\+C0\+\_\+\+B\+A\+SE~(0x4003\+F000u)}

Peripheral D\+A\+C0 base address \mbox{\Hypertarget{group___d_a_c___peripheral___access___layer_ga2e056d497cd21aa7a51e188e005e9b37}\label{group___d_a_c___peripheral___access___layer_ga2e056d497cd21aa7a51e188e005e9b37}} 
\index{DAC Peripheral Access Layer@{DAC Peripheral Access Layer}!DAC\_BASE\_ADDRS@{DAC\_BASE\_ADDRS}}
\index{DAC\_BASE\_ADDRS@{DAC\_BASE\_ADDRS}!DAC Peripheral Access Layer@{DAC Peripheral Access Layer}}
\subsubsection{\texorpdfstring{DAC\_BASE\_ADDRS}{DAC\_BASE\_ADDRS}}
{\footnotesize\ttfamily \#define D\+A\+C\+\_\+\+B\+A\+S\+E\+\_\+\+A\+D\+D\+RS~\{ \mbox{\hyperlink{group___d_a_c___peripheral___access___layer_gada12ca8452e773fd8f38041872934efc}{D\+A\+C0\+\_\+\+B\+A\+SE}} \}}

Array initializer of D\+AC peripheral base addresses \mbox{\Hypertarget{group___d_a_c___peripheral___access___layer_gab47690040e4d63adc4f324358c27157a}\label{group___d_a_c___peripheral___access___layer_gab47690040e4d63adc4f324358c27157a}} 
\index{DAC Peripheral Access Layer@{DAC Peripheral Access Layer}!DAC\_BASE\_PTRS@{DAC\_BASE\_PTRS}}
\index{DAC\_BASE\_PTRS@{DAC\_BASE\_PTRS}!DAC Peripheral Access Layer@{DAC Peripheral Access Layer}}
\subsubsection{\texorpdfstring{DAC\_BASE\_PTRS}{DAC\_BASE\_PTRS}}
{\footnotesize\ttfamily \#define D\+A\+C\+\_\+\+B\+A\+S\+E\+\_\+\+P\+T\+RS~\{ \mbox{\hyperlink{group___d_a_c___peripheral___access___layer_gadfe0025fe66918c644e110c3b055c955}{D\+A\+C0}} \}}

Array initializer of D\+AC peripheral base pointers \mbox{\Hypertarget{group___d_a_c___peripheral___access___layer_gac003cc87c636841f96fbf9084f536c43}\label{group___d_a_c___peripheral___access___layer_gac003cc87c636841f96fbf9084f536c43}} 
\index{DAC Peripheral Access Layer@{DAC Peripheral Access Layer}!DAC\_IRQS@{DAC\_IRQS}}
\index{DAC\_IRQS@{DAC\_IRQS}!DAC Peripheral Access Layer@{DAC Peripheral Access Layer}}
\subsubsection{\texorpdfstring{DAC\_IRQS}{DAC\_IRQS}}
{\footnotesize\ttfamily \#define D\+A\+C\+\_\+\+I\+R\+QS~\{ \mbox{\hyperlink{group___interrupt__vector__numbers_gga666eb0caeb12ec0e281415592ae89083a6029e7bffa10f584e060a5448a456927}{D\+A\+C0\+\_\+\+I\+R\+Qn}} \}}

Interrupt vectors for the D\+AC peripheral type 