SSE4

SSE4 (Streaming SIMD Extensions 4) is a SIMD CPU instruction set used in the Intel Core microarchitecture and AMD K10 (K8L). It was announced on September 27, 2006, at the Fall 2006 Intel Developer Forum, with vague details in a white paper; more precise details of 47 instructions became available at the Spring 2007 Intel Developer Forum in Beijing, in the presentation. SSE4 is fully compatible with software written for previous generations of Intel 64 and IA-32 architecture microprocessors. All existing software continues to run correctly without modification on microprocessors that incorporate SSE4, as well as in the presence of existing and new applications that incorporate SSE4.
SSE4 subsets.
Intel SSE4 consists of 54 instructions. A subset consisting of 47 instructions, referred to as "SSE4.1" in some Intel documentation, is available in Penryn. Additionally, "SSE4.2", a second subset consisting of the 7 remaining instructions, is first available in Nehalem-based Core i7. Intel credits feedback from developers as playing an important role in the development of the instruction set.
Starting with Barcelona-based processors, AMD introduced the "SSE4a" instruction set, which has 4 SSE4 instructions and 4 new SSE instructions. These instructions are not found in Intel's processors supporting SSE4.1 and AMD processors only started supporting Intel's SSE4.1 and SSE4.2 (the full SSE4 instruction set) in the Bulldozer-based FX processors. With SSE4a the misaligned SSE feature was also introduced which meant unaligned load instructions were as fast as aligned versions on aligned addresses. It also allowed disabling the alignment check on non-load SSE operations accessing memory. Intel later introduced similar speed improvements to unaligned SSE in their Nehalem processors, but did not introduce misaligned access by non-load SSE instructions until AVX.
Name confusion.
What is now known as SSSE3 (Supplemental Streaming SIMD Extensions 3), introduced in the Intel Core 2 processor line, was referred to as SSE4 by some media until Intel came up with the SSSE3 moniker. Internally dubbed Merom New Instructions, Intel originally did not plan to assign a special name to them, which was criticized by some journalists. Intel eventually cleared up the confusion and reserved the SSE4 name for their next instruction set extension.
Intel is using the marketing term "HD Boost" to refer to SSE4.
New instructions.
Unlike all previous iterations of SSE, SSE4 contains instructions that execute operations which are not specific to multimedia applications. It features a number of instructions whose action is determined by a constant field and a set of instructions that take XMM0 as an implicit third operand.
Several of these instructions are enabled by the single-cycle shuffle engine in Penryn. (Shuffle operations reorder bytes within a register.)
SSE4.1.
These instructions were introduced with Penryn microarchitecture, the 45 nm shrink of Intel's Core microarchitecture. Support is indicated via the CPUID.01H:ECX.SSE41[Bit 19] flag.
SSE4.2.
SSE4.2 added STTNI (String and Text New Instructions), several new instructions that perform character searches and comparison on two operands of 16 bytes at a time. These were designed (among other things) to speed up the parsing of XML documents. It also added a CRC32 instruction to compute cyclic redundancy checks as used in certain data transfer protocols. These instructions were first implemented in the Nehalem-based Intel Core i7 product line and complete the SSE4 instruction set. Support is indicated via the CPUID.01H:ECX.SSE42[Bit 20] flag.
POPCNT and LZCNT.
These instructions operate on integer rather than SSE registers, because they are not SIMD instructions, but appear at the same time and although introduced by AMD with the SSE4a instruction set, they are counted as separate extensions with their own dedicated CPUID bits to indicate support. Intel implements POPCNT beginning with the Nehalem microarchitecture and LZCNT beginning with the Haswell microarchitecture. AMD implements both beginning with the Barcelona microarchitecture.
AMD calls this pair of instructions "Advanced Bit Manipulation" (ABM).
The encoding of "lzcnt" is similar enough to "bsr" (bit scan reverse) that if "lzcnt" is performed on a CPU not supporting it such as Intel CPU's prior to Haswell, it will perform the "bsr" operation instead of raising an invalid instruction error despite the different result values of "lzcnt" and "bsr".
Trailing zeros can be counted using the "bsf" (bit scan forward) or "tzcnt" instructions.
SSE4a.
The SSE4a instruction group was introduced in AMD's Barcelona microarchitecture. These instructions are not available in Intel processors. Support is indicated via the CPUID.80000001H:ECX.SSE4A[Bit 6] flag.


Nobody (username)

In many Unix variants, "nobody" is the conventional name of a user identifier which owns no files, is in no privileged groups, and has no abilities except those which every other user has. It is normally not enabled as a user account, i.e. has no home directory or login credentials assigned. Some systems also define an equivalent group "nogroup".


SETVER.EXE


Kim Jones (Sun)

Kim Jones (born ) is an American IT business leader, who is currently the CEO, Chairman and Co-Founder of Curriki, a non-profit, global online community focused on improving education through technology. Curriki currently has nearly 15 million users and over 260,000 learning resources making extensive use of digital media and social networking.
Formerly, she was President and Managing Director of Sun Microsystems UK & Ireland. In this role she oversaw all of Sun's UK operations and a P&L of over $1 billion. Prior to this role, Kim was Vice President of Global Education, Government and Healthcare, which she established as Sun's first independent line of business.
Kim has served on a number of boards, public and private, including John Wiley & Sons (where she chaired the governance committee for 5 years), Curriki, chairman of the board, MIT OpenCourseWare advisory committee, Cornerstone OnDemand Foundation board of directors, the Confederation of British Industry, the UK Climate Change Board, UK Corporate Leadership Group, Western Governors University Board of Trustees, the Jason Foundation Board of Trustees, and the World Bank Institute Advisory Board.
Kim has received numerous awards and recognition throughout her career including the Sun Leadership Award, the prestigious YWCA Award for Women in Business, and in 2006, she was inducted into the Women in Technology International (WITI) Hall of Fame. Kim has an honorary PhD from the University of Edinburgh, and graduated with a Bachelor of Arts degree from University of California, San Diego, where she has recently been named as one of their "50 Years, 50 Leaders" honorees.


Intel Museum

The Intel Museum located at Intel's headquarters in Santa Clara, California, United States, has exhibits of Intel's products and history as well as semiconductor technology in general. The museum is open weekdays and Saturdays except holidays. It is open to the public with free admission.
The museum was started in the early 1980s as an internal project at Intel to record its history. It opened to the public in 1992, later being expanded in 1999 to triple its size and add a store. It has exhibits about how semiconductor chip technology works, both as self-paced exhibits and by reservation as grade-school educational programs.
A fully functional 130x scale replica of the Intel 4004 CPU was built using discrete transistors and put on display in 2006.


Penryn (microprocessor)

Penryn is the code name of a processor from Intel that is sold in varying configurations as Core 2 Solo, Core 2 Duo, Core 2 Quad, Pentium and Celeron.
During development, Penryn was the Intel code name for the 2007/2008 "Tick" of Intel's Tick-Tock cycle which shrunk Merom to 45 nanometers as CPUID model 23. The term "Penryn" is sometimes used to refer to all 45 nm chips with the Core architecture.
Chips with Penryn architecture come in two sizes, with 6 MB and 3 MB L2 cache.
Low power versions of Penryn are known as the Penryn-L; these are single-core processors. The Penryn-QC quad-cores are made from two chips with two cores and 6 MB of cache per chip.
The desktop version of Penryn is Wolfdale and the dual-socket server version is Wolfdale-DP.
Penryn-QC is related to Yorkfield on the desktop and Harpertown in servers. The MP server Dunnington chip is a more distant relative based on a different chip but using the same 45 nm Core microarchitecture.
Penryn was replaced by the Nehalem-based Arrandale (dual core) and Clarksfield (quad core).
Variants.
Penryn.
The successor to the Merom core for the Core 2 Duo T5000/T7000 series mobile processors, code-named Penryn, debuted on the 45 nanometer process. Many details about Penryn appeared at the April 2007 Intel Developer Forum.
Important advances include the addition of new instructions including SSE4 (also known as Penryn New Instructions) and new fabrication materials; most significantly a hafnium-based high-k dielectric.
Penryn is paired with the 2007 desktop chipset series, Bearlake, some of whose models include an increase in bus performance (connection to the northbridge, etc.) to 1333 MT/s and support for DDR3 SDRAM. In notebooks and other mobile equipment, Penryn pairs with the mobile chipset series Crestline, which does not support DDR3, although Intel believes future DDR3 support will benefit mobile equipment's power- and heat-constrained environments.
Intel's new 45 nm Penryn-based Core 2 Duo and Core 2 Extreme processors were released on January 6, 2008. The new processors launched exclusively with a TDP of 35 W. HP began to offer the first model, the T9500, from late January 2008. The T9500 offers a 2.6 GHz clock rate, higher than all but the Extreme Edition of the Merom range, and 6 MB (rather than 4 MB) of Level 2 Cache.
Intel released an Apple-only Exxx chip on April 28, 2008 that increased the clock rate to 3.06 GHz as well as increasing the Front Side Bus to 1066 MT/s, and changed the Cache to 6 MB shared L2. While it is used in desktop computers and has an E8xxx name, it uses the same packaging as mobile CPUs and is therefore considered a Penryn and not Wolfdale.
All SL9xxx, SP9xxx, P9xxx, T9xxx and X9xxx processors are Penryn with the full 6 MB L2 cache enabled, while P7xxx, P8xxx and T8xxx can be either Penryn-3M or Penryn with only 3 MB cache enabled. They are indistinguishable by software, but Penryn uses product code 80576.
Penryn-3M.
The smaller (82 mm² instead of 107 mm²) Penryn-3M is used in mobile processors with an L2 Cache 3 MB or less as a successor to Merom-2M. Its product code is 80577.
The entry level Penryn-3M Core 2 processor is the T6xxx series, with 2 MB L2 Cache and begins with the T6400 at a clock rate of 2 GHz.
Other Penryn-3M based processor series are Celeron T3xxx, Pentium T4xxx, as well as most Core 2 Duo SU9xxx, P7xxx, P8xxx, T8xxx processors.
In September 2009, Intel introduced new Consumer Ultra-Low Voltage processors based on Penryn-3M, as Celeron SU2xxx series, Pentium SU4xxx series and Core 2 Duo SU7xxx series, with 1, 2 and 3 MB of active L2 cache. Like the earlier Core 2 Duo SU9xxx series, they are always soldered on using a BGA956 package and have a TDP of only 10 W.
Penryn-L.
Penryn-L does not actually seem to be a separate chip but only a version of Penryn-3M with a single core enabled. However, it has a separate product code of 80585. Penryn-L is used in the ultra-low voltage Core 2 SU3xxx, the standard voltage Celeron 9xx and the CULV Celeron 7xx and Pentium SU2xxx series. The Celeron versions have only 1 MB active L2 cache, Pentium versions have 2 MB.
Penryn-QC.
In August 2008 Intel released their first two quad-core processors for notebooks, the Core 2 Quad Q9100 and Core 2 Extreme QX9300. As these require more power (45 W) and cooling than other Penryn processors they are not automatically compatible with all Centrino 2 notebooks. Also the Extreme version requires the GS45/GM45/PM45 chipset.
Fixes.
Microsoft has released a microcode update (KB2493989) for Windows 7 that addresses several stability issues on selected "Penryn" and "Merom" CPUs.


Opteron

Opteron is AMD's x86 former server and workstation processor line, and was the first processor which supported the AMD64 instruction set architecture (known generically as x86-64 or AMD64). It was released on April 22, 2003, with the "SledgeHammer" core (K8) and was intended to compete in the server and workstation markets, particularly in the same segment as the Intel Xeon processor. Processors based on the AMD K10 microarchitecture (codenamed "Barcelona") were announced on September 10, 2007, featuring a new quad-core configuration. The most-recently released Opteron CPUs are the Piledriver-based Opteron 4300 and 6300 series processors, codenamed "Seoul" and "Abu Dhabi" respectively.
In January 2016, the first ARMv8-A based Opteron-branded SoC was released, though it is unclear what, if any, heritage this Opteron-branded product line shares with the original Opteron technology other than intended use in the server space.
Technical description.
Two key capabilities.
Opteron combines two important capabilities in a single processor:
The first capability is notable because at the time of Opteron's introduction, the only other 64-bit architecture marketed with 32-bit x86 compatibility (Intel's Itanium) ran x86 legacy-applications only with significant speed degradation. The second capability, by itself, is less noteworthy, as major RISC architectures (such as SPARC, Alpha, PA-RISC, PowerPC, MIPS) have been 64-bit for many years. In combining these two capabilities, however, the Opteron earned recognition for its ability to run the vast installed base of x86 applications economically, while simultaneously offering an upgrade-path to 64-bit computing.
The Opteron processor possesses an integrated memory controller supporting DDR SDRAM, DDR2 SDRAM or DDR3 SDRAM (depending on processor generation). This both reduces the latency penalty for accessing the main RAM and eliminates the need for a separate northbridge chip.
Multi-processor features.
In multi-processor systems (more than one Opteron on a single motherboard), the CPUs communicate using the Direct Connect Architecture over high-speed HyperTransport links. Each CPU can access the main memory of another processor, transparent to the programmer. The Opteron approach to multi-processing is not the same as standard symmetric multiprocessing; instead of having one bank of memory for all CPUs, each CPU has its own memory. Thus the Opteron is a Non-Uniform Memory Access (NUMA) architecture. The Opteron CPU directly supports up to an 8-way configuration, which can be found in mid-level servers. Enterprise-level servers use additional (and expensive) routing chips to support more than 8 CPUs per box.
In a variety of computing benchmarks, the Opteron architecture has demonstrated better multi-processor scaling than the Intel Xeon which didn't have a point to point system until QPI and integrated memory controllers with the Nehalem design. This is primarily because adding another Opteron processor increases memory bandwidth, while that is not always the case for Xeon systems, and the fact that the Opterons use a switched fabric, rather than a shared bus. In particular, the Opteron's integrated memory controller allows the CPU to access local RAM very quickly. In contrast, multiprocessor Xeon system CPUs share only two common buses for both processor-processor and processor-memory communication. As the number of CPUs increases in a typical Xeon system, contention for the shared bus causes computing efficiency to drop. Intel migrated to a memory architecture similar to the Opteron's for the Intel Core i7 family of processors and their Xeon derivatives.
Multi-core Opterons.
In April 2005, AMD introduced its first multi-core Opterons. At the time, AMD's use of the term multi-core in practice meant dual-core; each physical Opteron chip contained two processor cores. This effectively doubled the computing performance available to each motherboard processor socket. One socket could then deliver the performance of two processors, two sockets could deliver the performance of four processors, and so on. Because motherboard costs increase dramatically as the number of CPU sockets increase, multicore CPUs enable a multiprocessing system to be built at lower cost.
AMD's model number scheme has changed somewhat in light of its new multicore lineup. At the time of its introduction, AMD's fastest multicore Opteron was the model 875, with two cores running at 2.2 GHz each. AMD's fastest single-core Opteron at this time was the model 252, with one core running at 2.6 GHz. For multithreaded applications, or many single threaded applications, the model 875 would be much faster than the model 252.
Second-generation Opterons are offered in three series: the 1000 Series (single socket only), the 2000 Series (dual socket-capable), and the 8000 Series (quad or octo socket-capable). The 1000 Series uses the AM2 socket. The 2000 Series and 8000 Series use Socket F.
AMD announced its third-generation quad-core Opteron chips on September 10, 2007
with hardware vendors announcing servers in the following month. Based on a core design codenamed "Barcelona", new power and thermal management techniques were planned for the chips. Earlier dual core DDR2 based platforms were upgradeable to quad core chips.
The fourth generation was announced in June 2009 with the "Istanbul" hexa-cores. It introduced "HT Assist", an additional directory for data location, reducing the overhead for probing and broadcasts. HT Assist uses 1 MB L3 cache per CPU when activated.
In March 2010 AMD released the "Magny-Cours" Opteron 6100 series CPUs for Socket G34. These are 8- and 12-core multi-chip module CPUs consisting of two four or six-core dies with a HyperTransport 3.1 link connecting the two dies. These CPUs updated the multi-socket Opteron platform to use DDR3 memory and increased the maximum HyperTransport link speed from 2.40 GHz (4.80 GT/s) for the "Istanbul" CPUs to 3.20 GHz (6.40 GT/s).
AMD changed the naming scheme for its Opteron models. Opteron 4000 series CPUs on Socket C32 (released July 2010) are dual-socket capable and are targeted at uniprocessor and dual-processor uses. The Opteron 6000 series CPUs on Socket G34 are quad-socket capable and are targeted at high-end dual-processor and quad-processor applications.
Socket 939.
AMD released Socket 939 Opterons, reducing the cost of motherboards for low-end servers and workstations. Except for the fact they have 1 MB L2 Cache (versus 512 KB for the Athlon64) the Socket 939 Opterons are identical to the San Diego and Toledo core Athlon 64s, but are run at lower clock speeds than the cores are capable of, making them more stable.
Socket AM2.
Socket AM2 Opterons are available for servers that only have a single-chip setup. Codenamed Santa Ana, rev. F dual core AM2 Opterons feature 2 × 1 MB L2 cache, unlike the majority of their Athlon 64 X2 cousins which feature 2 × 512 KB L2 cache. These CPUs are given model numbers ranging from 1210 to 1224.
Socket AM2+.
AMD introduced three quad-core Opterons on Socket AM2+ for single-CPU servers in 2007. These CPUs are produced on a 65 nm manufacturing process and are similar to the "Agena" Phenom X4 CPUs. The Socket AM2+ quad-core Opterons are code-named "Budapest." The Socket AM2+ Opterons carry model numbers of 1352 (2.10 GHz), 1354 (2.20 GHz), and 1356 (2.30 GHz.)
Socket AM3.
AMD introduced three quad-core Opterons on Socket AM3 for single-CPU servers in 2009. These CPUs are produced on a 45 nm manufacturing process and are similar to the "Deneb"-based Phenom II X4 CPUs. The Socket AM3 quad-core Opterons are code-named "Suzuka." These CPUs carry model numbers of 1381 (2.50 GHz), 1385 (2.70 GHz), and 1389 (2.90 GHz.)
Socket AM3+.
Socket AM3+ was introduced in 2011 and is a modification of AM3 for the Bulldozer microarchitecture. Opteron CPUs in the AM3+ package are named Opteron 3xxx.
Socket F.
Socket F (LGA 1207 contacts) is AMD’s second generation of Opteron socket. This socket supports processors such as the Santa Rosa, Barcelona, Shanghai, and Istanbul codenamed processors. The “"Lidded land grid array"” socket adds support for DDR2 SDRAM and improved HyperTransport version 3 connectivity. Physically the socket and processor package are nearly identical, although not generally compatible with socket 1207 FX.
Socket G34.
Socket G34 (LGA 1944 contacts) is one of the third generation of Opteron sockets, along with Socket C32. This socket supports "Magny-Cours" Opteron 6100, Bulldozer-based "Interlagos" Opteron 6200, and Piledriver-based "Abu Dhabi" Opteron 6300 series processors. This socket supports four channels of DDR3 SDRAM (two per CPU die). Unlike previous multi-CPU Opteron sockets, Socket G34 CPUs will function with unbuffered ECC or non-ECC RAM in addition to the traditional registered ECC RAM.
Socket C32.
Socket C32 (LGA 1207 contacts) is the other member of the third generation of Opteron sockets. This socket is physically similar to Socket F but is not compatible with Socket F CPUs. Socket C32 uses DDR3 SDRAM and is keyed differently so as to prevent the insertion of Socket F CPUs that can use only DDR2 SDRAM. Like Socket G34, Socket C32 CPUs will be able to use unbuffered ECC or non-ECC RAM in addition to registered ECC SDRAM.
Micro-architecture update.
The Opteron line saw an update with the implementation of the AMD K10 microarchitecture. New processors, launched in the third quarter of 2007 (codename "Barcelona"), incorporate a variety of improvements, particularly in memory prefetching, speculative loads, SIMD execution and branch prediction, yielding an appreciable performance improvement over K8-based Opterons, within the same power envelope.
In 2007 AMD introduced a scheme to characterize the power consumption of new processors under "average" daily usage, named average CPU power (ACP).
Socket FT3.
The Opteron X1150 and Opteron X2150 APU are used with the BGA-769 or Socket FT3.
Models.
For Socket 940 and Socket 939 Opterons, each chip has a three-digit model number, in the form "Opteron XYY. For Socket F and Socket AM2 Opterons, each chip has a four-digit model number, in the form "Opteron XZYY. For all first, second, and third-generation Opterons, the first digit (the X) specifies the number of CPUs on the target machine:
For Socket F and Socket AM2 Opterons, the second digit (the Z) represents the processor generation. Presently, only 2 (dual-core, DDR2), 3 (quad-core, DDR2) and 4 (six-core, DDR2) are used.
Socket C32 and G34 Opterons use a new four-digit numbering scheme. The first digit refers to the number of CPUs in the target machine:
Like the previous second and third generation Opterons, the second number refers to the processor generation. "1" refers to AMD K10-based units ("Magny-Cours" and "Lisbon"), "2" refers to the Bulldozer-based "Interlagos", "Valencia", and "Zurich"-based units, and "3" refers to the Piledriver-based "Abu Dhabi", "Seoul", and "Delhi"-based units.
For all Opterons, the last two digits in the model number (the YY) indicate the clock frequency of a CPU, a higher number indicating a higher clock frequency. This speed indication is comparable to processors of the same generation if they have the same amount of cores, single-cores and dual-cores have different indications despite sometimes having the same clock frequency.
The suffix HE or EE indicates a high-efficiency/energy-efficiency model having a lower TDP than a standard Opteron. The suffix SE indicates a top-of-the-line model having a higher TDP than a standard Opteron.
Starting from 65 nm fabrication process, the Opteron codenames have been based on Formula 1 hosting cities; AMD has a long term sponsorship with F1's most successful team, Ferrari.
Opteron (45 nm SOI).
Released June 1, 2009.
Released March 29, 2010.
Released March 29, 2010
Released June 23, 2010
Released June 23, 2010
Opteron (32 nm SOI) – First Generation "Bulldozer" Microarchitecture.
Released March 20, 2012.
Released March 20, 2012.
Released November 14, 2011.
Released November 14, 2011.
Released November 14, 2011.
Released November 14, 2011.
Released November 14, 2011.
Released November 14, 2011.
Opteron (32 nm SOI) – "Piledriver" microarchitecture.
Released December 4, 2012.
Released December 4, 2012.
Released December 4, 2012
Released December 4, 2012
Released December 4, 2012
Released November 5, 2012.
Released November 5, 2012.
Released November 5, 2012.
Released November 5, 2012.
Opteron X (28 nm bulk) – "Jaguar" microarchitecture.
Released May 29, 2013
Released May 29, 2013
Opteron A (28 nm) – "ARM Cortex-A57" ARM microarchitecture.
A1100-series.
The Opteron A1100-series "Seattle" (28 nm) are SoCs based on ARM Cortex-A57 cores that use the ARMv8-A instruction set. They were first released in January 2016.
Opteron X (28 nm bulk) – "Excavator" microarchitecture.
Released June, 2017
Supercomputers.
Opteron processors first appeared in the top 100 systems of the fastest supercomputers in the world list in the early 2000s. By the summer of 2006, 21 of the top 100 systems used Opteron processors, and in the November 2010 and June 2011 lists the Opteron reached its maximum representation of 33 of the top 100 systems. The number of Opteron-based systems decreased fairly rapidly after this peak, falling to 3 of the top 100 systems by November 2016, and in November 2017 only one Opteron-based system remained.
Several supercomputers using only Opteron processors were ranked in the top 10 systems between 2003 and 2015, notably:
Other top 10 systems using a combination of Opteron processors and compute accelerators have included:
The only system remaining on the list (as of November 2017), also using Opteron processors combined with compute accelerators:
Issues.
Opteron without Optimized Power Management.
AMD released some Opteron processors without Optimized Power Management (OPM) support, which use DDR memory. The following table describes those processors without OPM.
Opteron recall (2006).
AMD recalled some E4 stepping-revision single-core Opteron processors, including ×52 (2.6 GHz) and ×54 (2.8 GHz) models which use DDR memory. The following table describes affected processors, as listed in AMD Opteron ×52 and ×54 Production Notice of 2006.
The affected processors may produce inconsistent results if three specific conditions occur simultaneously:
A software verification tool for identifying the AMD Opteron processors listed in the above table that may be affected under these specific conditions is available, only to AMD OEM partners. AMD will replace those processors at no charge.
Recognition.
In the February 2010 issue of "Custom PC" (a UK-based computing magazine focused on PC hardware), the AMD Opteron 144 (released in Summer 2005) appeared in the "Hardware Hall of Fame". It was described as "The best overclocker's CPU ever made" due to its low cost and ability to run at speeds far beyond its stock speed. (According to "Custom PC", it could run at "close to 3 GHz on air".)


PlayStation Mouse

The PlayStation Mouse (US/UK: SCPH-1090, JP: SCPH-1030) is an input device for the PlayStation that allows the player to use a mouse as a method of control in compatible games. The mouse was released in Japan on December 3, 1994, the launch date of the PlayStation.
The mouse itself is a simple two-button ball mouse that plugs directly into the PlayStation controller port without adapters or conversions and is a fully supported Sony accessory. It was packaged along with a mouse mat bearing the PlayStation logo.
The mouse is mainly of use to point and click adventures and other mouse-driven games to control the cursor. In later years, first-person shooters also make use of the peripheral to aim the player's view in the same manner as similar games on the PC. It is also used by the arcade lightgun shooting game "Area 51" as an aiming device instead of a light gun compatibility.


Quik (boot loader)

quik is a boot loader designed to start Linux on Apple Macintosh PowerPC systems based on the Old World ROM architecture. It was originally written by Paul Mackerras, and portions of its code were reused in all other Linux boot loaders for PowerPC, including the one known as BootX (not to be confused with the Mac OS X boot loader of the same name), which is dependent on the Mac OS. Quik's loader boots from Open Firmware and bypasses the Mac OS entirely. New World ROM systems use yaboot.
It does not work on systems that do not have Open Firmware; older PowerPC hardware based on the NuBus architecture must boot into the Mac OS first and then use a separate boot loader. Quik is the only method of booting Linux on an Apple Network Server.
iQUIK.
iQUIK is a maintained version of the quik bootloader. Whereas the original follows a LILO-like booting model, with the second stage embedded inside an OS partition, iQUIK normally boots using its second stage in the first non-partitionmap partition, i.e. the second partition of the APM-partitioned storage device. This makes for a more robust system, making it more difficult to end up with a completely unbootable system. This also means it's possible to create rescue floppies and install media with iQUIK. Other improvements include -


Doctor V64

The Doctor V64 (also referred to simply as the V64) is a development and backup device made by Bung Enterprises Ltd that is used in conjunction with the Nintendo 64. The Doctor V64 also had the ability to play Video CDs, audio CDs and had an option for applying stereo 3D effects to the audio.
History.
The V64 came out in 1996 and was priced around $450 USD. Some third-party developers used a number of V64s in their development process. In comparison, the Partner N64 development kit sold by Nintendo, manufactured by Silicon Graphics, was an expensive development machine. The CPU of the V64 is a 6502 chip (the CPU from the Nintendo Entertainment System); the operating system is stored in the BIOS chip. It is likely that Bung reused most of the design of their earlier NES clones in the Doctor V64.
The V64 unit contains a CD-ROM drive which sits underneath the Nintendo 64 and plugs into the expansion slot on the underside of the Nintendo 64. The expansion slot is essentially a mirror image of the cartridge slot on the top of the unit, with the same electrical connections; thus, the Nintendo 64 reads data from the Doctor V64 in the same manner as it would from a cartridge plugged into the normal slot.
Using the V64 involved the solution of two problems: how to boot a game and how to save. In order to get around Nintendo's lockout chip, when using the Doctor V64 a game cartridge is plugged into the Nintendo 64 through an adaptor which connects only the lockout chip. The game cart used for the operation had to contain the same lockout chip used by the game back up. The second problem concerned saving progress. Most N64 games are saved to the cart itself instead of external memory cards. If the player wanted to keep their progress, then the cartridge used had to have the same type of non-volatile memory hardware.
Following the Doctor V64's success, Bung released the Doctor V64 Jr. in December 1998. This was a cost-efficient condensed version of the original V64. The V64jr had no CD drive and plugged into the normal cartridge slot on the top of the Nintendo 64. Data was loaded into the V64jr's battery-backed RAM from a PC via a parallel port connection. The V64Jr had up to 512 megabits (64 MB) of memory storage. At the time, this was done to provide for future Nintendo 64 carts that employed larger memory storage. The prohibitively high costs associated with ordering large storage carts kept this occurrence at a minimum. Only a handful of 512 megabit games were released for the Nintendo 64 system.
During the N64's lifetime, Nintendo made one model revision which made the serial port area smaller. This slight change in the N64's plastic casing made the connection to the Doctor V64 difficult to achieve without user modification. This revision may have been a direct reaction of Nintendo to discourage the use of V64 devices. It also explains why Bung decided to drop the use of this port in the later V64Jr models.
The Doctor V64 could be used to read the data from a game cartridge and transfer the data to a PC via the parallel port. This allowed developers and homebrew programmers to upload their game images to the Doctor V64 without having to create a CD backup each time. It also allowed users to upload game images taken from the Internet.
Promotions.
In 1998 and 1999, there was a homebrew competition known as "Presence of Mind" (POM), an N64 demo competition led by dextrose.com. The contest consisted of submitting a user-developed N64 program, game, or utility. Bung Enterprises promoted the event and supplied prizes (usually Doctor V64 related accessories). Though a contest was planned for 2000, the interest in the N64 was already fading, and so did the event. POM contest demo entries can still be found on the Internet.
Legal issues.
The Doctor V64 unit was the first commercially available backup device for the Nintendo 64 unit. Though the unit was sold as a development machine, it could be modified to enable the creation and use of commercial game backups. Unlike official development units, the purchase of V64s was not restricted to software companies only. For this reason, the unit became a popular choice among those looking to proliferate unlicensed copies of games.
Original Doctor V64 units sold by Bung did not allow the playing of backups. A person would have to modify the unit by themselves in order to make it back up friendly. This usually required a user to download and install a modified Doctor V64 BIOS. Additionally, the cartridge adapter had to be opened and soldered in order to allow the operational procedure described early on in this article. Though Bung never sold backup enabled V64s, many re-sellers would modify the units themselves.
Nintendo made many legal efforts worldwide in order to stop the sale of Doctor V64 units. They sued Bung directly as well as specific store retailers in Europe and North America for copyright infringement. Eventually, Nintendo managed to have the courts prohibit the sale of Doctor V64 units in the United States.
Main menu.
As with many backup devices of its time, the Doctor V64 implemented text-based menu-driven screens. The menus were spartan and purely functional in nature. Utilizing the buttons on the V64 unit, a user would navigate the menus and issue commands. It was mainly designed for game developers even though it is possible to backup cartridges with it (through the use of an unofficial V64 bios). Some of the menu items related to game backups were removed from the V64's BIOS near the end of its life due to pressure from Nintendo. These items are only available by obtaining a patched V64 BIOS.


Lorinda Cherry

Lorinda Cherry is a computer programmer. She received her Masters in computer science from Stevens Institute of Technology in 1969. She joined Bell Labs in 1972 as an assembly language programmer, and worked there on the Unix operating system for several years.
Biography.
Cherry has worked on mathematical tools, such as bc and dc, and co-authored eqn with Brian Kernighan. Her work on libplot inspired the later GNU plotutils package. She also worked on "analyzing the federalist papers and compressing digital phone books."
Her non-mathematical work included the dictionary for the Unix spell checker and the Bell Labs's Writer's Workbench (wwb). The Writer's Workbench was meant to help students learn to edit their work:
My feeling about a lot of those tools is their value in education is as much pointing out to people who are learning to write that they have choices and make choices when they do it. They don’t think of a writing task as making choices per se. Once they get it on paper they think it’s cast in stone. So it makes them edit.
Cherry also contributed to the Plan 9 operating system, cowrote "Typing Documents on the UNIX System: Using the –ms and –mcs Macros with Troff" with Mike Lesk for the Unix Tenth Edition Manual, and coded up the non-dictionary based spellchecker, typo, conceived by Bob Morris. Lorinda Cherry also worked with Lee McMahon along with Morris collecting a substantial corpus of text and studying it statistically. "Some of their tools, particularly uniq and comm became staples. Out of that work came the remarkable typo, which spotted typing errors by statistical inference."
"Cherry’s work on approximate parsing and Aho’s on fast pattern search turned out to be just the right foundation for an English style-appraiser suggested by Prof. William Vesterman of Rutgers. That in turn was elaborated into Writer's Workbench by Nina MacDonald and others in the Human Performance Engineering Department."
Cherry is one of three co-inventors for AT&T's patent on a "Method and system for verifying the status of 911 emergency telephone services".
Cherry raced rally cars as a hobby. Cherry has always been fascinated by text processing.


2nd Super Robot Wars

 was the first game to be produced in the "Classic" canon timeline, the second game in the overall series, and the first (and only) game produced for the Famicom video game system on December 12, 1991.
A remake of the "2nd Super Robot Wars" was ported to Game Boy on June 30, 1995, under . However, it was not part of the "Classic" canon to the timeline. "2nd Super Robot Wars" was ported to Sony PlayStation on June 10, 1999, as part of the Super Robot Wars Complete Box then separately on December 2, 1999; and to the Game Boy Advance as an exclusive "Famicom Mini" game, available only as a bonus with the purchase of Super Robot Taisen GC. The PSX version was digitally released on January 26, 2011 on the PlayStation Network.
Story.
You must stop Bian Zoldark and the Divine Crusaders all while fighting the familiar foes from various robot anime that make up DC's ranks like Char Aznable from Mobile Suit Gundam and Baron Ashura from Mazinger Z.
Reception.
On release, "Famicom Tsūshin" scored the Game Boy version of the game (entitled "2nd Super Robot Wars G") a 28 out of 40.


Pinguy OS

Pinguy OS is a free computer operating system (a Linux distribution) for x86-based PCs, based on Ubuntu Linux.
General info.
Pinguy OS is an Ubuntu-based distribution with many applications and tweaks installed by default, rather than having to manually install them like some other Linux distributions. Such software includes ZRam and Preload.
Pinguy OS "features numerous user-friendly enhancements, out-of-the-box support for multimedia codecs and browser plugins, a heavily tweaked GNOME user interface with enhanced menus, panels and dockbars, and a careful selection of popular desktop applications for many common computing tasks", according to Distrowatch.com.
Although the distribution comes with many pre-installed applications, browser plugins, multimedia codecs and system utilities, many users could perceive this as unnecessary bloat, given that Ubuntu and many of its descendants come with a lot of useful software as well, without retaining a large memory and storage footprint.
Features.
The following features are found in the Pinguy OS distribution:
Release history.
The following is the release history for Pinguy OS
Beta: The 6 month Pinguy OS releases will be missing features that will be in the final LTS, but the release will be very usable.
Availability.
Pinguy OS is available in both 32-bit and 64-bit versions.


Display Data Channel

The Display Data Channel, or DDC, is a collection of protocols for digital communication between a computer display and a graphics adapter that enable the display to communicate its supported display modes to the adapter and that enable the computer host to adjust monitor parameters, such as brightness and contrast.
Like modern analog VGA connectors, the DVI and DP connectors include pins for the display data channel (DDC), but DP supports DDC within its optional Dual-Mode DP (DP++) feature in DVI/HDMI mode only.
The standard was created by the Video Electronics Standards Association (VESA).
Overview.
The DDC suite of standards aims to provide a "plug and play" experience for computer displays.
DDC1 and DDC2B/Ab/B+/Bi protocols are a physical link between a monitor and a video card, which was originally carried on either two or three pins in a 15-pin analog VGA connector.
Extended display identification data (EDID) is a companion standard; it defines a compact binary file format describing the monitor's capabilities and supported graphics modes, stored in a read-only memory (EEPROM) chip programmed by the manufacturer of the monitor. The format uses a description block containing 128 bytes of data, with optional extension blocks to provide additional information. The most current version is "Enhanced EDID (E-EDID) Release A, v2.0".
The first version of the DDC standard was adopted in August 1994. It included the EDID 1.0 format and specified DDC1, DDC2B and DDC2Ab physical links.
"DDC version 2", introduced in April 1996, split EDID into a separate standard and introduced the DDC2B+ protocol.
"DDC version 3", December 1997, introduced the DDC2Bi protocol and support for VESA Plug and Display and Flat Panel Display Interface on separate device addresses, requiring them to comply with EDID 2.0.
The DDC standard has been superseded by E-DDC in 1999.
Physical link.
Prior to the DDC, the VGA standard had reserved four pins in the analog VGA connector, known as ID0, ID1, ID2 and ID3 (pins 11, 12, 4 and 15) for identification of monitor type. These ID pins, attached to resistors to pull one or more of them to ground (GND), allowed for the definition of the monitor type, with all open (n/c, not connected) meaning "no monitor".
In the most commonly documented scheme, the ID3 pin was unused and only the 3 remaining pins were defined. The ID0 was pulled to GND by color monitors, while the monochrome monitors pulled ID1 to GND. Finally, the ID2 pulled to GND signaled a monitor capable of 1024×768 resolution, such as IBM 8514. In this scheme, the input states of the ID pins would encode the monitor type as follows:
More elaborate schemes also existed that used all of the 4 ID pins while manipulating the HSync and VSync signals in order to extract 16 bits (4 ID pin values for each of the 4 combinations of HSync and VSync states) of monitor identification.
DDC changed the purpose of the ID pins to incorporate a serial link interface. However, during the transition, the change was not backwards-compatible and video cards using the old scheme could have problems if a DDC-capable monitor was connected. The DDC signal can be sent to or from a video graphics array (VGA) monitor with the I2C protocol using the master's serial clock and serial data pins.
DDC1.
DDC1 is a simple, low-speed, unidirectional serial link protocol. Pin 12, ID1 functions as a data line that continuously transmits the 128-byte EDID block, and the data clock is synchronised with vertical sync, providing typical clock rates of 60 to 100 Hz.
Very few display devices implemented this protocol.
DDC2.
The most common version, called DDC2B, is based on I²C, a serial bus. Pin 12, ID1 of the VGA connector is now used as the data pin from the I²C bus, and the formerly-unused pin 15 became the I²C clock; pin 9, previously used as a mechanical key, supplied +5V DC power up to 50mA to drive the EEPROM, this allows the host to read the EDID even if the monitor is powered off. Though I²C is fully bidirectional and supports multiple bus-masters, DDC2B is unidirectional and allows only one bus master - the graphics adapter. The monitor acts as a slave device at the 7-bit I²C address 50h, and provides 128-256 bytes of read-only EDID. Because this access is always a read, the first I²C octet will always be A1h.
DDC2Ab is an implementation of the I²C-based 100 kbit/s ACCESS.bus interface, which allowed monitor manufacturers to support external ACCESS.bus peripherals such as a mouse or keyboard with little to no additional effort; such devices and monitors were briefly available in the mid 1990s, but disappeared with the introduction of USB.
DDC2B+ and DDC2Bi are scaled-down versions of DDC2Ab which only support monitor and graphics card devices but still allow bidirectional communication between them.
DDC2 is not exclusive to the VGA connector, as both DVI and HDMI connectors feature dedicated DDC2B wires.
DDC/CI.
DDC/CI (Command Interface) standard was introduced in August 1998. It specifies a means for a computer to send commands to the monitor, as well as receive sensor data from the monitor, over a bidirectional link. Specific commands to control monitors are defined in a separate Monitor Control Command Set (MCCS) standard version 1.0, released in September 1998.
DDC/CI monitors are sometimes supplied with an external color sensor to allow automatic calibration of the monitor's color balance. Some tilting DDC/CI monitors support an auto-pivot function, where a rotation sensor in the monitor enables the operating system to keep the display upright as the monitor is moved between its portrait and landscape positions.
Most DDC/CI monitors support only a small subset of MCCS commands and some have undocumented commands. Many manufacturers did not pay attention to DDC/CI in the past, but now almost all monitors support such general MCCS commands as brightness and contrast management.
"DDC/CI" standard describes a full suite of bidirectional control protocols - DDC2Ab, DDC2Bi and DDC2B+ - in a single standard and provides a means for packaging Monitor Control Command Set commands.
DDC/CI version 1.1 was adopted in October 2004.
"Monitor Control Command Set" version 2.0 was adopted in October 2003. A new MCCS V3 was introduced in July 2006, though did not gain enough industry attention yet. The latest release of V2 standard is version 2.2, adopted February 2009.
OS support for DDC/CI.
Despite its ubiquity in post-2016 displays, DDC/CI is not generally used by the operating system by default for brightness control on external displays. Additional software can be used to send commands to the display, but the degree of system integration vary.
Windows exposes DDC/CI as the "Monitor Configuration" Win32 API series.
E-DDC.
Enhanced Display Data Channel (E-DDC) is the most recent revision of the DDC standard. Version 1 was introduced in September 1999 and featured the addition of a segment pointer which allowed up to 32 Kbytes of display information storage for use by the Enhanced EDID (E-EDID) standard.
Earlier DDC implementations used simple 8-bit data offset when communicating with the EDID memory in the monitor, limiting the storage size to 28 bytes = 256 bytes, but allowing the use of cheap 2-Kbit EEPROMs. In E-DDC, a special I²C addressing scheme was introduced, in which multiple 256-byte segments could be selected. To do this, a single 8-bit segment index is passed to the display via the I²C address 30h. (Because this access is always a write, the first I²C octet will always be 60h.) Data from the selected segment is then immediately read via the regular DDC2 address using a repeated I²C 'START' signal. However, VESA specification defines the segment index value range as 00h to 7Fh, so this only allows addressing 128 segments × 256 bytes = . The segment index register is volatile, defaulting to zero and automatically resetting to zero after each NACK or STOP. Therefore, it must be set every time access to data above the first 256-byte segment is performed. The auto-reset mechanism is to provide for backward compatibility to, for example, DDC2B hosts, otherwise they may be stuck at a segment other than 00h in some rare cases.
Other important changes were removal of the DDC1 and DDC2Ab protocols, deprecation of separate VESA P&D and FPDI device addresses, and clarifications to the DDC power requirements.
"E-DDC Version 1.1", approved March 2004, featured support for HDMI and consumer electronics.
"E-DDC Version 1.2", approved December 2007, introduced support for DisplayPort (which has no dedicated DDC2B links and uses its bidirectional auxiliary channel for EDID and MCCS communication) and DisplayID standards.
"E-DDC Version 1.3" from September 2017 contains corrections for errata and minor clarifications.
Disabling DDC.
Some KVM switches (keyboard-video-mouse) and video extenders handle DDC traffic incorrectly, making it necessary to disable monitor plug and play features in the operating system, and maybe even physically remove pin 12 (serial data pin) from the analog VGA cables that connect such device to multiple PCs.
Microsoft Windows features a standard "Plug and Play Monitor" driver which uses the display's EDID information to construct a list of supported monitor modes. The Display Resolution control panel applet allows the user to disable this driver's Plug and Play features and manually select any resolution or refresh rate supported by the video card. Many video card manufacturers and third parties provide control applications which allow the user to select a custom display mode that does not conform to the EDID information or the monitor .INF file.


DRBIO.SYS


Rossmann (supercomputer)

Rossmann is a supercomputer at Purdue University that went into production September 1, 2010. The high-performance computing cluster is operated by Information Technology at Purdue (ITaP), the university's central information technology organization. ITaP also operates clusters named Steele built in 2008, Coates built in 2009, Hansen built in the summer of 2011 and Carter built in the fall of 2012 in partnership with Intel. Rossmann ranked 126 on the November 2010 TOP500 list.
Hardware.
The Rossmann cluster consists of HP ProLiant DL165 G7 compute nodes with 64-bit, dual 12-core AMD Opteron 6172 processors (24 cores per node), either 48 or 96 GB of memory and 250 GB of local disk for system software and scratch storage. Nodes with 192 GB of memory and either 1 terabyte or 2 TB of local scratch disk also are available. Rossmann consists of five logical sub-clusters, each with a different memory and storage configuration. All nodes have 10 Gigabit Ethernet interconnects.
Software.
Rossmann nodes run Red Hat Enterprise Linux 5.5 (RHEL5) and use portable batch system Professional 10 (PBSPro 10) for resource and job management. The Rossmann cluster also has compilers and scientific programming libraries installed.
Funding.
The Rossmann supercomputer and Purdue's other clusters are part of the Purdue Community Cluster Program, a partnership between ITaP and Purdue faculty. In Purdue's program, a "community" cluster is funded by hardware money from grants, faculty startup packages, institutional funds and other sources. ITaP's Rosen Center for Advanced Computing administers the community clusters and provides user support. Each faculty partner always has ready access to the capacity he or she purchases and potentially to more computing power when the nodes of other investors are idle. Unused, or opportunistic, cycles from Rossmann are made available to the National Science Foundation's Extreme Science and Engineering Discovery Environment (XSEDE) system and the Open Science Grid.
Users.
The Purdue departments and schools by which Rossmann and Purdue's clusters are used vary broadly, including Aeronautics and Astronautics, Agriculture, Agronomy, Biology, Chemical Engineering, Chemistry, Civil Engineering, Communications, Computer and Information Technology, Computer Science, Earth, Atmospheric and Planetary Sciences, Electrical Engineering, Electrical and Computer Engineering, Electrical and Computer Engineering Technology, Industrial Engineering, Materials Engineering, Mathematics, Mechanical Engineering, Medicinal Chemistry and Molecular Pharmacology, Physics, the Purdue Terrestrial Observatory and Statistics, among others.
DiaGrid.
Unused, or opportunistic, cycles from Rossmann are made available to XSEDE and the Open Science Grid using Condor software. Coates is part of Purdue's distributed computing Condor flock, which is the largest publicly disclosed distributed computing system in the world and the center of DiaGrid, a nearly 43,000-processor Condor-powered distributed computing network for research involving Purdue and partners at nine other campuses.
Naming.
The Rossmann cluster is named for Michael Rossmann, Purdue's Hanley Distinguished Professor of Biological Sciences, who is a pioneer in employing high-performance computing in research to reveal the structure of viruses and their component protein molecules. Rossmann gained worldwide attention in 1985 by determining the structure of human rhinovirus serotype14, HRV-14, one of about 100 known cold virus strains. The Rossmann cluster continues ITaP's practice of naming new supercomputers after notable figures in Purdue's computing history.


GeForce FX series

The GeForce FX or "GeForce 5" series (codenamed NV30) is a line of graphics processing units from the manufacturer Nvidia.
Overview.
Nvidia's GeForce FX series is the fifth generation of the GeForce line. With GeForce 3, the company introduced programmable shader functionality into their 3D architecture, in line with the release of Microsoft's DirectX 8.0. The GeForce 4 Ti was an enhancement of the GeForce 3 technology. With real-time 3D graphics technology continually advancing, the release of DirectX 9.0 brought further refinement of programmable pipeline technology with the arrival of Shader Model 2.0. The GeForce FX series is Nvidia's first generation Direct3D 9-compliant hardware.
The series was manufactured on TSMC's 130 nm fabrication process. It is compliant with Shader Model 2.0/2.0A, allowing more flexibility in complex shader/fragment programs and much higher arithmetic precision. It supports a number of new memory technologies, including DDR2, GDDR2 and GDDR3 and saw Nvidia's first implementation of a memory data bus wider than 128 bits. The anisotropic filtering implementation has potentially higher quality than previous Nvidia designs. Anti-aliasing methods have been enhanced and additional modes are available compared to GeForce 4. Memory bandwidth and fill-rate optimization mechanisms have been improved. Some members of the series offer double fill-rate in z-buffer/stencil-only passes.
The series also brought improvements to the company's video processing hardware, in the form of the Video Processing Engine (VPE), which was first deployed in the GeForce 4 MX. The primary addition, compared to previous Nvidia GPUs, was per-pixel video-deinterlacing.
The initial version of the GeForce FX (the 5800) was one of the first cards to come equipped with a large dual-slot cooler. Called "Flow FX", the cooler was very large in comparison to ATI's small, single-slot cooler on the 9700 series. It was jokingly referred to as the "Dustbuster", due to a high level of fan noise.
The advertising campaign for the GeForce FX featured the "Dawn", which was the work of several veterans from the computer animation . Nvidia touted it as "The Dawn of Cinematic Computing".
Nvidia debuted a new campaign to motivate developers to optimize their titles for Nvidia hardware at the Game Developers Conference (GDC) in 2002. In exchange for prominently displaying the Nvidia logo on the outside of the game packaging, the company offered free access to a state-of-the-art test lab in Eastern Europe, that tested against 500 different PC configurations for compatibility. Developers also had extensive access to Nvidia engineers, who helped produce code optimized for the company's products.
Hardware based on the NV30 project didn't launch until near the end of 2002, several months after ATI had released their competing DirectX 9 architecture.
Overall performance.
GeForce FX is an architecture designed with DirectX 7, 8 and 9 software in mind. Its performance for DirectX 7 and 8 was not even close to ATI's competing products with the mainstream versions of the chips, and somewhat faster in the case of the 5900 and 5950 models, but it is much less competitive across the entire range for software that primarily uses DirectX 9 features.
Its weak performance in processing Shader Model 2 programs is caused by several factors. The NV3x design has less overall parallelism and calculation throughput than its competitors. It is more difficult, compared to GeForce 6 and ATI Radeon R300 series, to achieve high efficiency with the architecture due to architectural weaknesses and a resulting heavy reliance on optimized pixel shader code. While the architecture was compliant overall with the DirectX 9 specification, it was optimized for performance with 16-bit shader code, which is less than the 24-bit minimum that the standard requires. When 32-bit shader code is used, the architecture's performance is severely hampered. Proper instruction ordering and instruction composition of shader code is critical for making the most of the available computational resources.
Hardware refreshes and diversification.
Nvidia's initial release, the GeForce FX 5800, was intended as a high-end part. At the time, there were no GeForce FX products for the other segments of the market. The GeForce 4 MX continued in its role as the budget video card and the older GeForce 4 Ti cards filled in the mid-range.
In April 2003, the company introduced the GeForce FX 5600 and the GeForce FX 5200 to address the other market segments. Each had an "Ultra" variant and a slower, budget-oriented variant and all used conventional single-slot cooling solutions. The 5600 Ultra had respectable performance overall but it was slower than the Radeon 9600 Pro and sometimes slower than the GeForce 4 Ti series. The FX 5200 did not perform as well as the DirectX 7.0 generation GeForce 4 MX440 or Radeon 9000 Pro in some benchmarks.
In May 2003, Nvidia launched the GeForce FX 5900 Ultra, a new high-end product to replace the low-volume and disappointing FX 5800. Based upon a revised GPU called NV35, which fixed some of the DirectX 9 shortcomings of the discontinued NV30, this product was more competitive with the Radeon 9700 and 9800. In addition to redesigning parts of the GPU, the company moved to a 256-bit memory data bus, allowing for significantly higher memory bandwidth than the 5800 even when utilizing more common DDR SDRAM instead of DDR2. The 5900 Ultra performed somewhat better than the Radeon 9800 Pro in games not heavily using shader model 2, and had a quieter cooling system than the 5800.
In October 2003, Nvidia released the GeForce FX 5700 and GeForce FX 5950. The 5700 was a mid-range card using the NV36 GPU with technology from NV35 while the 5950 was a high-end card again using the NV35 GPU but with additional clock speed. The 5950 also featured a redesigned version of the 5800's FlowFX cooler, this time using a larger, slower fan and running much quieter as a result. The 5700 provided strong competition for the Radeon 9600 XT in games limited to light use of shader model 2. The 5950 was competitive with the Radeon 9800 XT, again as long as pixel shaders were lightly used.
In December 2003, the company launched the GeForce FX 5900XT, a graphics card intended for the mid-range segment. It was similar to the 5900 Ultra, but clocked slower and used slower memory. It more thoroughly competed with Radeon 9600 XT, but was still behind in a few shader-intense scenarios.
The GeForce FX line moved to PCI Express in early 2004 with a number of models, including the PCX 5300, PCX 5750, PCX 5900, and PCX 5950. These cards were largely the same as their AGP predecessors with similar model numbers. To operate on the PCIe bus, an AGP-to-PCIe "HSI bridge" chip on the video card converted the PCIe signals into AGP signals for the GPU.
Also in 2004, the GeForce FX 5200 / 5300 series that utilized the NV34 GPU received a new member with the FX 5500.
Discontinued support.
NVIDIA has ceased driver support for GeForce FX series.


TenDRA Distribution Format

The abstract machine TDF (originally the Ten15 Distribution Format, but more recently redefined as the TenDRA Distribution Format) evolved at the Royal Signals and Radar Establishment in the UK as a successor to Ten15. Its design allowed support for the C programming language. TDF is the basis for the Architecture Neutral Distribution Format.


Chudnovsky algorithm

The Chudnovsky algorithm is a fast method for calculating the digits of , based on Ramanujan’s formulae. It was published by the Chudnovsky brothers in 1988 and was used in the world record calculations of 2.7 trillion digits of in December 2009, 10 trillion digits in October 2011, 22.4 trillion digits in November 2016, 31.4 trillion digits in September 2018–January 2019, and 50 trillion digits on January 29, 2020.
The algorithm is based on the negated Heegner number formula_1, the "j"-function formula_2, and on the following rapidly convergent generalized hypergeometric series:
A detailed proof of this formula can be found here:
For a high performance iterative implementation, this can be simplified to
There are 3 big integer terms (the multinomial term "Mq", the linear term "Lq", and the exponential term "Xq") that make up the series and equals the constant "C" divided by the sum of the series, as below:
The terms "Mq", "Lq", and "Xq" satisfy the following recurrences and can be computed as such:
The computation of "Mq" can be further optimized by introducing an additional term "Kq" as follows:
Note that
This identity is similar to some of Ramanujan's formulas involving , and is an example of a Ramanujan–Sato series.
The time complexity of the algorithm is formula_16.


List of Unix daemons

This is a list of Unix daemons that are found on various Unix-like operating systems. Unix daemons typically have a name ending with a "d".


Nokia X5

Nokia X5-00/01 are a pair of smartphones in the X-Series of Nokia's mobile phones. The original China model comes with Symbian OS 9.3, while the worldwide model uses S60 3rd Edition FP2.
Release history.
The X5-00 was released in China in the second quarter of 2010 as the X6 could not be released in that region. This is due to China is still using the partial-3G TD-SCDMA mobile network for their mobile phones unlike other selected countries which started to use the 3.5G HSDPA mobile network. Although the original version of the X5 is China's alternative version of the original X6, it does not have a large on-board memory and the Comes with Music service.
Later in June 2010, Nokia announced that the X5 will gain a release in countries other than China. Named the X5-01, it features a wider but smaller 2.36-inch screen, better microSDHC support (up to 32 GB SDHC) and will use the HSDPA network mode. It was released in September 2010.
In July 2018, HMD global released a new Android phone with the same name, Nokia X5 (2018).
Features.
The original X5 is a candybar mobile phone with an alpha-numeric keypad and features a Carl Zeiss 5-megapixel camera equipped with a dual LED flash, 256 MB internal memory and can use up to an 8 GB microSD card while Nokia X5-01 is a slider mobile phone with a QWERTY/QWERTZ keypad (depending on country of sale) and features the same five megapixels camera with the same LED flash, ARM 11 600 MHz processor, 200 MB internal memory and up to 32 GB microSD (2 GB card included with sales package). Only the X5-01 has Wi-Fi and both phone models have Bluetooth connectivity, running the Symbian OS 9.3, Series 60 v3.2 UI.
Design.
While the design of the original X5 having mixed reviews despite it being a China-only release, the design of the X5-01 has come under great criticism as being vastly deficient.
The dimensions of the phone are 74.3 × 66.4 × 16.8 mm with a weight of 129 grams and a display of 2.36". The phone comes with a full QWERTY keypad and is available in six colors: Yellow, Green, Purple, Pink, Azure and Graphite Black. The phone comes with an additional 3 labeled soft keys, Media Keys, Volume Keys and Navi Keys.


Ultra 5


KateOS

KateOS was a Linux distribution originally based on Slackware. It was designed for intermediate users. Its package management system used so called TGZex (.tgz) packages, which unlike Slackware packages support dependency tracking (optional), internationalized descriptions, and were designed for ease of update. There were two native tools for package management: "codice_1" and "codice_2".
The last version released was KateOS III (3.6), including as a Live CD, in 2007.
History.
The KateOS project was founded at the end of 2003 by Damian Rakowski.
Kate Linux 1.0 Rabbit (series I)
The first version of the system was published on 2004-10-09. The system was based on Slackware 9.0 but unlike Slackware, it used the PAM authentication mechanism, and possessed an enriched package set. Due to the problems with the main server which worked only infrequently, hardly anyone learned about the existence of Kate 1.0. After a move to another server, the project has begun to gradually acquire users. After some time, Kate 1.0.1 (a fix release including UpdatePack 1), and a Live version were published.
Kate Linux 2.0 Zyklon (series II)
Version 2.0 was published on 2005-04-09, and was no longer based on Slackware. It was a long-term edition, the base for further development. It was also the first edition using Linux 2.6.
On 2005-05-06 the name of the project has been changed to KateOS.
On 2005-05-22 version 2.0.1 was published, providing a tool for managing and remote updating the TGZex packages. The tool was called Updates, and was written by Piotr Korzuszek.
On 2005-06-23 version 2.1 was published. Updates now could install packages remotely.
On 12 August 2005, the first Live edition of series II was published. It had a more distinctive graphical design, used the squashfs technology (2 GB of data packed on just one CD) and unionfs. It detected the hardware and configured the X Server automatically.
On 2005-10-13 the last version of Version II was published - 2.3. Updates gained new possibilities, and the system had a better hardware autodetection with the Discover tool.
KateOS 3.0 Virgen (series III)
On 12 April 2006 the first snapshot of KateOS 3.0 was published.
On 2006-07-09 version 3.0.1 was published. The packaging system was completely rewritten resulting in the PKG and codice_3 tools, and the codice_4 and codice_5 libraries. The functionality of the TGZex packages was widened, this time to include dependency tracking and descriptions in many languages. The installation process was simplified to allow a full install in only 15 minutes. The system used udev, D-Bus and HAL to detect hardware and mount devices automatically.
On 4 August 2006 the first "'Live" edition of Version III was published. It was aimed to demonstrate the possibilities of KateOS 3.0, and to be used as a data rescue system. The CD contained 2GB of data, including the Xfce desktop environment and many office and multimedia applications. It detected and configured hardware automatically.
On 7 October 2006 version 3.1 was published. It contained fixes, and the updated GNOME desktop environment. It was the first edition of Gnome adjusted especially to the KateOS system. It also included Update-notifier, a daemon for which the system trace icon changed and blinked when new updates were discovered. It let the user choose packages to be updated and update them. It was based on the codice_4 library, and only supported the KateOS packages and repositories.
On 21 December 2006 version 3.2 was published. Apart from fixes and updates, it included a new tool, KatePKG. KatePKG is a graphical package manager written in PHP with the PHP-GTK library, making KateOS the first system to include this library in the default distribution. It was designed to allow users to easily install, update, and remove packages from the system. It supports any number of repositories, including local ones (located on the user's hard drive). Also, the libsmarttools library had been optimized, resulting in up to a 60% speed boost in the applications using it (such as codice_7). With this version KateOS has switched its bootloader from LILO to GRUB, to make kernel updates easier.
On 17 September 2007 version 3.6 was released after eight months of development. This version brought several new and updated features to KateOS such as software driven suspend mode, improved internalization support, and the addition of several new programs such as KateLAN and Realm to help make configuring the system more user friendly. The Live CD version of 3.6 was the first KateOS to provide an on disc installer called Install Agent, allowing the user to directly install to their hard disk after trying the system live.
Additional information.
All new KateOS releases were planned to be supported for around two years. Users were encouraged to update via the codice_8 command to newer versions of the distribution, although major version updates (series updates), e.g. II--->III were not recommended.
Damian Rakowski, the 'project initiator, leader, and 1st developer', stated that the project was named after a friend and because the name Kate is "simple, nice and everybody knows it."


Glyder 2

Glyder 2 is a mobile tilt-control flying adventure game developed by Glu Mobile and released on December 16, 2009.
Critical reception.
The game has a rating of 93% on Metacritic based on 5 critic reviews.
AppSmile said "Replay value is very high, as the game itself is perfect for killing a few minutes or a few hours. " SlideToPlay wrote "Glyder 2 is a Must Have for any flight game enthusiasts who just want to take it easy without being pinned down by a red-flashing control panel and a seating area full of screaming passengers. " PocketGamerUK said "Glyder 2 is a one-way ticket to fantastic gameplay, its combination of self-motivated exploration and dynamic goals ensuring a first class flight. " 148Apps said "Technically the game is fantastic. The graphics are great, the controls are responsive and well done, and the soundtrack is just fantastic. The only real hick-up I found was the occasional heavy frame dropping on the mushroom world of Sporelle. " TouchArcade said "Glyder 2 delivers a fanciful, aerial questing experience to your iPhone or iPod touch. It, like its forerunner, is a highly enjoyable game that's challenging, and at the same time, relaxing. "


Blast Radius

Blast Radius is a space combat simulator video game developed by Psygnosis and published by Psygnosis for the PlayStation in 1998-1999.
Reception.
The game received mixed reviews according to the review aggregation website GameRankings. "Next Generation" said, "It doesn't matter how much of a space-fighter fan you are, "Blast Radius" is just plain bad."


The Adventures of Rocky and Bullwinkle and Friends (video game)

The Adventures of Rocky and Bullwinkle and Friends is a video game released by THQ between 1992 and 1994 for Gameboy, NES, SNES, and Sega Genesis adapted from "The Adventures of Rocky and Bullwinkle and Friends" TV series.
Plot summary.
In the NES version, Bullwinkle learns that his ancestor left sums of money for him to collect. Rocky and Bullwinkle need to go through perilous levels that feature their enemies Boris and Natasha, before they could reach the home of the moose's ancestor.
In the Genesis, SNES, and Game Boy versions, three artifacts are stolen from a museum. It is up to Rocky and Bullwinkle to get them back.
Gameplay.
The NES version includes a countryside house, a futuristic city, a train, a desert, and a mansion. The player can switch between Rocky and Bullwinkle during a game. Bullwinkle can ram into enemies while Rocky can fly. Both characters can hurl bombs at foes.
The Genesis and SNES versions consist of seven levels that take players through various locales: A Swiss Alps-style mountain, a cavern, a mine, a submarine, a haunted ship, a port town, and a castle. Instead of bombs, the title characters hurl mooseberries and acorns at enemies. Mini-games are available at certain points that allows players to collect extra lives. The mini-games are "Peabody and Sherman", where players control Sherman and blow bubble gum bubbles to clog a dragon's mouth, and "Dudley Do-Right", where players ride a horse and avoid an ever-approaching train which is driven by Snidely Whiplash.
The Game Boy version only has three levels, although generally with multiple sections. The first level, Frostbite Falls, has the player control Bullwinkle. The second, on the Moon, uses Rocky, and the final one, the Abominable Manor, uses Bullwinkle again. Before the final section, a bonus level that has Bullwinkle running to the end of a football field to catch Rocky, avoiding and head-butting football players on the way, can grant the player an extra life upon completion. The final section has a time limit to defeat the Fearless Leader and rescue your friend. Dying three times sends the player back to the first section of the level. Despite the absence thereof, the game label still showed the "Friends" (e.g. Dudley Do-Right).
The Game Boy version's level design is the same as "" (also developed by Imagineering).
Reception.
"Electronic Games" gave the Genesis version 80%. French magazine "Consoles+" gave the SNES version 75%. German magazine "Video Games", however, gave the Game Boy version only 29%
When reviewing the NES version, "GamePro" stated that the slow-paced action may not appeal to experienced NES players but the absence of continues may provide an interesting challenge. The reviewer also stated that fans of the TV series might play the game for nostalgic reasons.


ICL operating systems


Dave Sifry

Dave Sifry is an American software entrepreneur and blogosphere icon known for founding Technorati in 2004, formerly a leading blog search engine. He also lectures widely on wireless technology and policy, weblogs, and open source software.
Early years.
Sifry grew up on Long Island, and learned to program on a Commodore PET. While in his teens, he decided that someday he would move to Silicon Valley and start a company. After studying computer science at Johns Hopkins University, he worked for Mitsubishi.
Career.
Sifry cofounded Sputnik, a Wi-Fi gateway company, Linuxcare, and Offbeat Guides.
He has been a founding member of the board of Linux International, and a technical advisor to the National Cybercrime Training Partnership for law enforcement.
Dave worked as a business developer for Mozilla/Mozillamessaging, trying to bring partners to Mozilla Thunderbird.
Personal life.
David is married to Noriko and has two kids, Melody and Noah.


Model M keyboard

Model M designates a group of computer keyboards designed and manufactured by IBM starting in 1985, and later by Lexmark International, Maxi Switch, and Unicomp. The keyboard's many variations have their own distinct characteristics, with the vast majority having a buckling-spring key design and swappable keycaps. Model M keyboards have been praised by computer enthusiasts and frequent typists due to their durability and consistency, and the tactile and auditory feedback they provide.
The popularity of the IBM PC and its successors made the Model M's design tremendously influential, to the point where almost all later general-purpose computer keyboards would mimic not only its key layout but other aspects of its ergonomics as well. That layout would become standardized by ISO in 1994 and ANSI in 1998; with minor additions, notably of the Windows key and Menu key, it continues to dominate today.
The Model M is also regarded as a timeless and durable piece of hardware. Although the computers and computer peripherals produced concurrently with the Model M are considered obsolete, many Model M keyboards are still in use due to their physical durability and the continued validity of their ANSI 101-key and ISO 102-key layouts, through the use of a PS/2 female to USB male adapter with a built-in level converter. Since their original popularity, new generations have rediscovered their unique functionality and aesthetics.
It is estimated that during the IBM/Lexmark years over 10 million Model Ms were shipped, but the keyboard's mass-market success ended in the 1990s amidst an industry-wide switchover to lower-cost dome-switch devices. After the end of its product lifetime it became the focus of an enthusiast community that puts a remarkable amount of effort into salvaging vintage model Ms, restoring them, and adapting them for use with modern computers.
The Kentucky-based company Unicomp continues to manufacture and sell new Model M keyboards as an upgrade to customers who require ruggedness, long-term reliability, and the ergonomic benefits of tactile feedback.
History.
The Model M keyboard was designed to be more cost effective than the Model F keyboard it replaced. Principal design work was done at IBM in 1983-1984 and drew upon a wide range of user feedback, ergonomic studies, and examination of competing products. The keyboard layout, significantly different from that of the Model F, owed much (including notably the inverted-T arrangement of its arrow keys) to the LK-201 keyboard shipped with the VT220 serial terminal.
Production of model M keyboards began in 1985, and they were often bundled with new IBM computers. While today primarily associated with the IBM PC and its successors, it actually first shipped with the 3161 terminal and was deployed across several other IBM product lines as well, notably including the 5250 terminal and the RS/6000.
They were produced at IBM plants in Lexington, Kentucky, Greenock, Scotland, and Guadalajara, Mexico. The most common variant is the IBM Enhanced Keyboard identified by IBM assembly part number 1391401, the U.S. English layout keyboard bundled with the IBM Personal System/2. Until around 1993, most Model Ms included a sturdy, coiled, detachable cable, with either an AT (pre-1987) or PS/2 connector, in 5- and 10-foot lengths (1.5 and 3 metres). From about 1994 onwards, flat non-detachable cables were used to reduce manufacturing costs; however, IBM retained its 101-key layout, never implementing the Microsoft Windows keys common on other keyboards from that time. Unicomp later designed a 104-key Model M with Windows keys.
On March 27, 1991, IBM divested a number of its hardware manufacturing operations, including keyboard production, forming Lexmark International. Lexmark continued manufacturing model M keyboards in the United States, United Kingdom, and Mexico, with IBM being Lexmark's major customer. Many of these keyboards are identified by IBM assembly part numbers 52G9658, 52G9700, 71G4644, 82G2383, and 42H1292, which were bundled with IBM PS/ValuePoint and IBM PC Series. Because of pricing pressures, these keyboards were manufactured with a new, lower-cost design, including lighter plastic, an integrated cable, and a single color for key legends.
During the Lexmark years a few Model M variants were manufactured with rubber-dome keyswitches rather than buckling springs. Due to the comparatively short lifetime of these switches not many have survived. Despite their rarity, today's enthusiasts and collectors do not value them anywhere near as highly as the more common buckling-spring variants.
A five-year agreement obligating IBM to purchase nearly all of its keyboards from Lexmark expired on March 27, 1996. Lexmark exited the keyboard business, selling related assets to IBM and Maxi Switch. When Lexmark discontinued keyboard production in April 1996, IBM continued producing buckling-spring model M keyboards in Scotland until 1999. Maxi Switch purchased assets for rubber-dome keyboards and the Lexmark Select-Ease Keyboard (model M15), including a buckling-spring switch patent. Maxi Switch continued to manufacture the IBM Enhanced Keyboard with TrackPoint II (model M13) in Mexico until 1998.
Some of Lexmark's keyboard manufacturing assets were also sold to a group of Lexmark employees, who formed Unicomp. Unicomp's basic version of the Model M was similar to part number 42H1292 but first renamed 42H1292U and subsequently the "Customizer". There have been other configurations including updated 104- and 105-key layouts; a Unix layout (where the Ctrl and Caps Lock keys and Esc and tilde keys are transposed); models with integrated pointing sticks or trackballs; and POS-specific models such as those with built-in magstripe readers.
Unicomp continued to use the original IBM machinery to produce Model Ms, leading to a gradual decline in build quality as the tooling became increasingly worn. This, and various problems with their USB controllers helped keep a market for vintage Model Ms thriving. In 2020 Unicomp replaced its tooling and shipped a "New Model M" with noticeably improved build quality that more resembles the classic 1391401 (though with a 104- or 103-key layout and USB); many older variants are no longer sold on Unicomp's website and some still on sale have been deprecated.
Due to their extreme durability and now-classic styling, IBM and Lexmark original production models retain their value well among collectors and computer enthusiasts, often selling for as much as their original sticker price or (for a few rare variants) even more.
Variations.
The Model M's numerous variations (referred to as "part numbers") incorporated alternative features and/or colors. One of the most popular variants is the Space Saving Keyboard, which integrates the number pad into the keyboard's main section, substantially reducing its width.
IBM released the standard and Space Saving Model M's in an alternative 'gray/pebble' colour for use with their Industrial computers; this darker color was designed to conceal discoloration from handling in production environments. Other variable features include a grounded spacebar and, on some later models, drainage holes to deter damage from spilled drinks.
The M2 was a late Lexmark variation issued under cost pressure from competing rubber-dome keyboards. It retained buckling springs but had a much thinner, lighter case and discarded the metal backplate. It can easily be distinguished from the Model M proper by the flat, unsculpted front case section; also the manufacturing label, if present, will say "M2" rather than "M". M2s were poorly fabricated and notoriously unreliable; comparatively few survived into the 21st century, and Model M enthusiasts do not value them.
The M2 should in turn be distinguished from the M5, another Lexmark variant which returned to the rugged Model M case/backplate construction but added a built-in trackball; and those two from the M13, which was also built like rugged Model Ms but featured a pointing stick. The M5 and M13 designs are still carried by Unicomp in 2021 under the names "Trackball Classic" and "Endura Pro".
Design.
The variant most commonly referred to as "Model M" is Part No. 1391401, on which many other variants were based. This model, known as the Enhanced Keyboard, included IBM's patented buckling spring design and swappable keycaps.
The Model M's design has been widely praised as durable and reliable, and has remained basically the same since the 1980s, while virtually all other computing hardware, from PCs to monitors to mice, has changed dramatically. The M's sturdy design, including its heavy steel backplate and strong plastic frame, has allowed even the most abused examples to survive for years.
The Model M's buckling spring key design gives it a unique feel and sound. Unlike more common and cheaper dome switch designs, buckling springs give users unmistakable tactile and auditory feedback. Because of its more defined touch, some users report they can type faster and more accurately on the Model M than on other keyboards. Additionally, many model M enthusiasts believe that tactile-feedback keyboards like the model M reduce stress on the hands, preventing or even reversing Repetitive Strain Injury.
Unlike competitors such as Cherry and Alps-style keyswitches, buckling-spring keyswitches don't have a plunger part with sliding surfaces that can be fouled by contaminants. This makes model Ms much more resistant to dirt, dust, and grit, and is a significant factor in their long service lifetimes and appeal in challenging industrial environments.
Until the late 4th-generation variants, most Model Ms have a 1.25" slotted, circular speaker grille in their bottom surfaces. Relatively few contain an actual speaker, however, which was useful only for sounding beep codes on older terminal systems. The most common P/Ns with speakers are 1394540 and 51G872, made for RS/6000 UNIX workstations.
Model Ms have been manufactured to quite a number of different interface and connector standards, some of which (such as the 5-pin DIN used on 5250 terminals) are poorly documented and have had to be reverse-engineered by enthusiasts. Early variants shipped with the PC XT and AT used connectors specific to those systems. After the introduction of the PS/2 most shipped with a connector for a PS/2 port; these included the 1391401. Unicomp introduced support for USB.
Older model Ms used a detachable cable with an SDL connector on the keyboard, later Lexmark and Unicomp variants used a fixed cable, and one very recent variant from Unicomp has a detachable cable with a rare locking variant of the USB Type A jack on the keyboard.
There are some drawbacks to the Model M design:
Identification.
All Model M keyboards made by IBM, Lexmark and Unicomp have an ID label on the underside indicating the assembly part number, individual serial number, and manufacturing date. The general period in which a Model M was made can also often be distinguished by the type of logo "badge" above its keys. The first model Ms (part numbers 1390120 or 1390131) have a square aluminum logo badge in the top right corner. Part number 1391401, and most variants based on it, has a gray IBM logo in a recessed oval at the board's upper left. Later IBM-made Model Ms, and variants subsequently made by Lexmark in the early 1990s (part numbers 1370477, 52G9658, 52G9700, 59G7980, 92G7453, 82G2383, 42H1292, etc.), have a similar oval badge area with a blue logo. Unicomp Model Ms have a blue and red Unicomp logo on the lock-light panel.
Features by part number.
Layout types:
Logo position legend:
Click [show] to display the table's contents.
Note: Manufacture dates are approximate.


Nokia Nseries

The Nokia Nseries was a lineup of smartphones and tablets marketed by Nokia Corporation from 2005 to 2011. The Nseries devices commonly supported multiple high-speed wireless technologies at the time, such as 3G, or Wireless LAN. Digital multimedia services, such as music playback, photo/video capture or viewing, gaming or internet services were the central focus of the lineup. The lineup was replaced in 2011 by the Nokia Lumia line as the company's primary smartphone lineup.
The Nokia N1 tablet was introduced in November 2014 and so revived the 'N' prefix, but it was not marketed as 'Nseries'.
History.
On 27 April 2005, Nokia announced a new brand of multimedia devices at the press conference of mobile phone manufacturers in Amsterdam. The first three Nseries devices introduced at the conference consists of N70, N90 and N91. On 2 November 2005, Nokia announced the N71, N80 and N92, and on 25 April 2006, Nokia announced the N72, N73 and N93, and on 26 September 2006, Nokia announced the N75 and N95. On 8 January 2007, Nokia announced the Nokia N76, Nokia N77 and Nokia N93i. On 29 August 2007, Nokia announced the N95 8GB, N81, N81 8GB, and on 14 November 2007, Nokia announced the N82, the first Nokia with xenon flash. At the 2008 GSMA held in Barcelona, the N96 and N78 were unveiled. Two new Nseries devices were revealed at the end of August 2008, the Nokia N79 and Nokia N85. On 2 December 2008, Nokia Nseries announced the Nokia N97. On 17 February 2009, Nokia announced the Nokia N86 8 MP, which is Nokia's first 8-megapixel phone. The Nokia N8 with 12-megapixel camera was announced in April 2010 and on 21 June 2011 Nokia showcased their Nokia N9 smartphone based on the MeeGo OS, their fourth non-Symbian Nseries device (after the Maemo OS-based N800 and N810 Internet tablets, and N900 smartphone). The Nseries was retired and replaced by Lumia that year. The company introduced the Nokia N1 tablet on 18 November 2014, which marked the return of the N prefix, but 'Nseries' branding has still been absent.
Features.
The Nokia Nseries is aimed at users looking to pack as many features as possible into one device. The better-than-average cameras often found on Nseries devices (with many using the higher-quality Carl Zeiss optics) are one such example, as are the video and music playback and photo viewing capabilities of these devices, which resemble those of standalone portable media devices. As of 2008, in all recently launched devices GPS, MP3 player and WLAN functionality also have been present.
The numbers describe the traits of the phone:
There are exceptions though - considering N8x, both the N82 and N86 8MP were top-of-the-range smartphones with advanced cameras, so are clearly 'high-end' as their fellow N9x models.
Operating systems.
The first Nseries device was the Nokia N90 in 2005, which ran the Symbian OS 8.1 mobile operating system with Series 60 2nd Edition Feature Pack 3, as did the simultaneously-announced Nokia N70.
The Nokia N8, released in September 2010, was the world's first phone to run Symbian^3, and the first phone by Nokia featuring a 12-megapixel autofocus lens. It was also the last Nseries phone to run any Symbian OS.
On the Nokia N800 and Nokia N810 Internet tablets (2007), and Nokia N900 smartphone (2009), Nokia chose to use the Linux-based Maemo operating system.
The last Nseries mobile phones were the developer-only Nokia N950 in mid-2011 and the Nokia N9, released in September 2011. Maemo had merged with Intel's Moblin to create MeeGo in May 2010, so Nokia opted to use MeeGo "Harmattan" 1.2 for these devices.
List of Nseries devices.
In June at the Nokia Connections in Singapore Nokia launched the new N9 with MeeGo 1.2 Harmattan OS which the company calls Qt device as the whole app and UI framework is written in Qt. It is also the world's first pure touch phone with no buttons for home screen and a great new swipe UI. Reviews have been average to good for this phone, with most reviewers liking the phone's good quality and operating system, but expressing concern over the fact that it loses out to competitors in terms of specs. The device was expected to be sold in selected regions in Q3 2011.


Bio-ship Paladin

Bio-ship Paladin, known in Japan as , is a 1990 horizontally scrolling shoot 'em up arcade game. It was later ported to the Sega Mega Drive. While the game is essentially a standard horizontally scrolling shoot 'em up, it has an innovation that makes it unique in the genre. The player flies a spaceship (specifically, a bioship) which has the standard forward guns to be found in all horizontal scrollers, but it also possesses a weapon that can be manually targeted with a crosshair, in the same manner as in the game "Missile Command". This allows the player to fire in any direction with pinpoint accuracy, and adds an extra level of strategy to the game. The game saw an almost arcade perfect port on the Sega Mega Drive. What few changes there were actually enhanced the look of the game such as added parallax scrolling backgrounds in level 2.
Story.
Taking place on the planet Atlantal, a huge battleship and space fleet suddenly appears and attacks Atlantal's largest city, Delila, leaving the city in ruins. The fleet, known only as The Aggressors, continue to spread throughout the planet and further into the galaxy, past the Galegino Path, the sea of flames. To drive out and stop The Aggressors, the best twin-seat space fighter on the planet - the Paladin - is sent out; a powerful bioship that can grow larger in strength and size. The Aggressors are suggested to have come from Earth as the enemies, bosses all have vehicle names of different languages and many of the bosses are actually named after alcoholic drinks.
Gameplay.
The Paladin had a variety of offenses. Unlike most shoot 'em ups, the Paladin actually had an armor gauge, meaning that the ship would not be destroyed with one hit or after brushing up against a foreground object. The ship had a semi-automatic Laser weapon that, when held down, would charge up and unleash a stronger laser blast. The ship also had the Beam weapon. Once selected, players could use a manual aiming crosshair that could be placed anywhere on the screen, allowing the player to shoot any visible enemy fighter.
The player or players had to fight through nine levels filled with clever foreground obstacles and slews of enemies. Many of the bosses had to be destroyed by first shooting off their guns, missile launchers and jets before destroying the whole ship. However, there were no Extend bonuses.
Reception.
In Japan, "Game Machine" listed "Bio-ship Paladin" on their December 15, 1990 issue as being the eleventh most-successful table arcade unit of the year.