Nokia DX 200

DX 200 is a digital switching platform currently developed by Nokia Networks.
Architecture.
DX 200 is a versatile, fault-tolerant, modular and highly scalable telephone exchange and general purpose server platform, designed for high performance, high availability applications. Its hardware is built from loosely coupled redundant computer units, backed by distributed software architecture.
Architecture of DX 200 allows live migration as well as software update during live operation. Unlike in many other switching platforms, DX 200 performs live software update without code patching. Therefore, running code is not polluted by unnecessary jump instructions. Furthermore, as opposed to "integration guessing" of various software patches, DX 200 architecture makes proper integration testing of software components possible.
Live software update requires two computer units. One executing the old code ("working"), the other with new software loaded, otherwise idle ("spare"). During the process called "warming" memory areas (e.g. dynamically allocated memory, with the exception of stack of procedures) are moved from the old to the new computer unit. That implies that handling of data structures must be compatible in the old and the new software versions. Copying data does not require any programming effort, as long as allocation of data is done using TNSDL language.
Developing software for DX 200 platform is rather straightforward for any well educated software developer. TNSDL language, which plays vital role in producing asynchronously communicating fault-tolerant software modules, is easy to learn. Software architecture of DX 200 is a fine combination of highly efficient traditional solutions as well as modern actor model based, highly concurrent design.
DX 200 products are famous for availability exceeding 99.999% "five nines" as well as unrivaled performance.
Applications.
DX 200 is a generic architecture. It is suitable for versatile computing applications.
Applications include traditional Mobile Switching Centers (MSC), LTE mobile packet switching gateways as well as VoIP application servers.
Operating Systems.
Any generic operating system can be ported to DX 200 relatively easily. Linux, ChorusOS and DMX are the most frequent operating systems used on DX 200.
DMX is the 'native' OS of DX 200. DMX has microkernel architecture. Advanced functions, like TCP/IP stack and live migration components are implemented as separate libraries.
Hardware Flavors.
DX 200 has several hardware flavors.
Reborn.
Nokia Networks shifted its focus from hardware products to software and services. The highly valuable business logic was kept, while the products which used to be running on DX 200 hardware variants now available as cloud solutions, working on generic multi-purpose hardware of various vendors.
History.
Development of the system started at Televa, the Finnish state owned telecom equipment producer in the early 1970s, under the leadership of Keijo Olkkola.
The first order was received in 1973 for a 100 subscriber local exchange for the small and remote island community of Houtskär, to be delivered in 1979. After the first installation in 1982, the DX 200 captured a 50% share of the Finnish fixed line exchange market.
The exchange's modular design and development of microprocessors technology enabled a gradual increase in the system's capacity. By 1987 the installation base had grown to 400,000 subscriber lines.
Early export markets included China, Nepal, United Arab Emirates, Sri Lanka, Sweden, Turkey and the Soviet Union. In 1984 development of a version of the exchange for the Nordic Mobile Telephone network was started.
In 1991, the world's first GSM call was made using Nokia devices. Core network components were based on DX 200 platform.
In 2005, DX 200 based VoIP server was provided to Finnish operator Saunalahti, providing state of the art fixed-mobile convergence solution. This is a prime example on how well DX 200 is suitable for internet server development and the overall flexibility of the whole DX 200 platform.
In 2009, world’s first voice calls in LTE networks using commercial, 3GPP-standardized user and network equipment.
In 2013, NSN showed its truly operational telco cloud solution. That actually marks the end of the traditional DX200 hardware product line.


Samsung Wave III s8600

The Samsung Wave III S8600 (or "Samsung Wave III") is a smartphone running the Bada 2.0 operating system designed by Samsung, which was commercially released on August, 2011. The Wave is a slim touchscreen phone powered by "Scorpion" CPU, which includes 1.4 GHz ARM Cortex-8 CPU and a powerful graphics engine, "Super LCD" screen and 720p high-definition video capture capabilities. Shortage of Super AMOLED screens was one of the primary reasons for the release of this model.
Hardware features.
Design
The phone is made of mostly metal alloy and is measured at 12.9 mm thick. In terms of form factor, it is a slate style featuring 3 physical buttons on the front: call, reject/ shutdown, and main menu button.
Screen
The screen is a capacitive touchscreen Super LCD with an anti-smudge oleophobic coating on top of the scratch-resistant tempered-glass (Gorilla Glass Display) touch panel which has been shown to be capable of resisting extreme friction (scratch-resistant). The screen resolution is 800x480 WVGA and an area of 45.5 cm^2 (~233 ppi).
Processor
The phone features a Scorpion processor Qualcomm S2 MSM8255T 1.4 GHz SoC, which internally contains an ARM Cortex A8 CPU core.
Camera
The phone features a 5 megapixel which supports 2592 × 1944 pixels, along with autofocus, LED flash, Geo-tagging, face, blink detection, image stabilization, touch focus, etc. Other than these features it has various shooting modes such as beauty shot, smile shot, continuous, panorama and vintage shot. As a camcorder it is able to shoot 720p HD recording (1280x720) at 30 FPS with flash.
Other features
Other feature includes A-GPS, 2 GB/8 GB of internal storage with a microSDHC slot for an additional 32 GB. It also has a magnetometer, a proximity sensor, an accelerometer, 5.1-channel surround sound Mobile Theater, music recognition, a fake call service, smart search, Social Hub and it is the first phone to support Bluetooth version 3.0.
In addition to Bluetooth 3.0, the phone also features Wi-Fi 802.11 b/g/n, HSDPA 3.2 Mbit/s and HSUPA 2 Mbit/s.
This phone is available with both European/Asia 3G bandings and the North American 3G bandings.
Software features.
User interface
The phone is one of the few smartphone to feature the Samsung bada 2.0 operating system platform.
Applications
By default, the phone comes with Picsel Viewer which is capable of reading. pdf and Microsoft Office file formats.
As for Samsung apps, users can also download applications, games and widgets from the application store.
Media support
Android porting
There are many Android Custom ROMs on this mobile, they go up to Android 4.4


AltiVec

AltiVec is a single-precision floating point and integer SIMD instruction set designed and owned by Apple, IBM, and Freescale Semiconductor (formerly Motorola's Semiconductor Products Sector) — the AIM alliance. It is implemented on versions of the PowerPC processor architecture, including Motorola's G4, IBM's G5 and POWER6 processors, and P.A. Semi's PWRficient PA6T. AltiVec is a trademark owned solely by Freescale, so the system is also referred to as Velocity Engine by Apple and VMX (Vector Multimedia Extension) by IBM and P.A. Semi.
While AltiVec refers to an instruction set, the implementations in CPUs produced by IBM and Motorola are separate in terms of logic design. To date, no IBM core has included an AltiVec logic design licensed from Motorola or vice versa.
AltiVec is a standard part of the Power ISA v.2.03 specification. It was never formally a part of the PowerPC architecture until this specification although it used PowerPC instruction formats and syntax and occupied the opcode space expressly allocated for such
purposes.
Comparison to x86-64 SSE.
Both VMX/AltiVec and SSE feature 128-bit vector registers that can represent sixteen 8-bit signed or unsigned chars, eight 16-bit signed or unsigned shorts, four 32-bit ints or four 32-bit floating-point variables. Both provide cache-control instructions intended to minimize cache pollution when working on streams of data.
They also exhibit important differences. Unlike SSE2, VMX/AltiVec supports a special RGB "pixel" data type, but it does not operate on 64-bit double-precision floats, and there is no way to move data directly between scalar and vector registers. In keeping with the "load/store" model of the PowerPC's RISC design, the vector registers, like the scalar registers, can only be loaded from and stored to memory. However, VMX/AltiVec provides a much more complete set of "horizontal" operations that work across all the elements of a vector; the allowable combinations of data type and operations are much more complete. Thirty-two 128-bit vector registers are provided, compared to eight for SSE and SSE2 (extended to 16 in x86-64), and most VMX/AltiVec instructions take three register operands compared to only two register/register or register/memory operands on IA-32.
VMX/AltiVec is also unique in its support for a flexible vector permute instruction, in which each byte of a resulting vector value can be taken from any byte of either of two other vectors, parametrized by yet another vector. This allows for sophisticated manipulations in a single instruction.
Recent versions of the GNU Compiler Collection (GCC), IBM VisualAge compiler and other compilers provide intrinsics to access VMX/AltiVec instructions directly from C and C++ programs. As of version 4, the GCC also includes auto-vectorization capabilities that attempt to intelligently create VMX/Altivec accelerated binaries without the need for the programmer to use intrinsics directly. The "vector" type keyword is introduced to permit the declaration of native vector types, e.g., "codice_1" declares a 128-bit vector variable named "foo" containing sixteen 8-bit unsigned chars. The full complement of arithmetic and binary operators is defined on vector types so that the normal C expression language can be used to manipulate vector variables. There are also overloaded intrinsic functions such as "codice_2" that emit the appropriate opcode based on the type of the elements within the vector, and very strong type checking is enforced. In contrast, the Intel-defined data types for IA-32 SIMD registers declare only the size of the vector register (128 or 64 bits) and in the case of a 128-bit register, whether it contains integers or floating-point values. The programmer must select the appropriate intrinsic for the data types in use, e.g., "codice_3" for adding two vectors containing eight 16-bit integers.
Development history.
The Power Vector Media Extension (VMX) was developed between 1996 and 1998 by a collaborative project between Apple, IBM, and Motorola.
Apple was the primary customer for Power Vector Media Extension (VMX) until Apple switched to Intel-made, x86-based CPUs on June 6, 2005. They used it to accelerate multimedia applications such as QuickTime, iTunes and key parts of Apple's Mac OS X including in the Quartz graphics compositor. Other companies such as Adobe used AltiVec to optimize their image-processing programs such as Adobe Photoshop. Motorola was the first to supply AltiVec enabled processors starting with their G4 line. AltiVec was also used in some embedded systems for high-performance digital signal processing.
IBM consistently left VMX out of their earlier POWER microprocessors, which were intended for server applications where it was not very useful. The POWER6 microprocessor, introduced in 2007, implements AltiVec. The last desktop microprocessor from IBM, the PowerPC 970 (dubbed the "G5" by Apple) also implemented AltiVec with hardware similar to that of the PowerPC 7400.
AltiVec is a brandname trademarked by Freescale (previously Motorola) for the standard "Category:Vector" part of the Power ISA v.2.03 specification. This category is also known as VMX (used by IBM), and "Velocity Engine" (a brand name previously used by Apple).
The Cell Broadband Engine, used in (amongst other things) the PlayStation 3, also supports Power Vector Media Extension (VMX) in its PPU, with the SPU ISA being enhanced but architecturally similar.
Freescale is bringing an enhanced version of AltiVec to e6500 based QorIQ processors.
VMX128.
IBM enhanced VMX for use in Xenon (Xbox 360) and called this enhancement VMX128. The enhancements comprise new routines targeted at gaming (accelerating 3D graphics and game physics) and a total of 128 registers. VMX128 is not entirely compatible with VMX/Altivec, as a number of integer operations were removed to make space for the larger register file and additional application-specific operations.
VSX (Vector Scalar Extension).
Power ISA v2.06 introduced VSX vector-scalar instructions which extend SIMD processing for the Power ISA to support up to 64 registers, with support for regular floating point, decimal floating point and vector execution. POWER7 is the first Power ISA processor to implement Power ISA v2.06.
New instructions are introduced by IBM under the Vector Media Extension category for integer operations as part of the VSX extension in Power ISA 2.07.
New integer vector instructions were introduced by IBM following the VMX encodings as part of the VSX extension in Power ISA v3.0. Shall be introduced with POWER9 processors.
Issues.
In C++, the standard way of accessing AltiVec support is mutually exclusive with the use of the Standard Template Library codice_4 class template due to the treatment of "vector" as a reserved word when the compiler does not implement the context-sensitive keyword version of vector. However, it may be possible to combine them using compiler-specific workarounds; for instance, in GCC one may do codice_5 to remove the codice_6 keyword, and then use the GCC-specific codice_7 keyword in its place.
AltiVec prior to Power ISA 2.06 with VSX lacks loading from memory using a type's natural alignment. For example, the code below requires special handling for Power6 and below when the effective address is not 16-byte aligned. The special handling adds 3 additional instructions to a load operation when VSX is not available.
typedef __vector unsigned char uint8x16_p;
typedef __vector unsigned int uint32x4_p;
int main(int argc, char* argv)
 /* Natural alignment of vals is 4; and not 16 as required */
 unsigned int vals[4] = { 1, 2, 3, 4 };
 uint32x4_p vec;
 vec = vec_xl(0, vals);
 const uint8x16_p perm = vec_lvsl(0, vals);
 const uint8x16_p low = vec_ld(0, vals);
 const uint8x16_p high = vec_ld(15, vals);
 vec = (uint32x4_p)vec_perm(low, high, perm);
AltiVec prior to Power ISA 2.06 with VMX lacks 64-bit integer support. Developers who wish to operate on 64-bit data will develop routines from 32-bit components. For example, below are examples of 64-bit add and subtract in C using a vector with four 32-bit words on a big-endian machine. The permutes move the carry and borrow bits from columns 1 and 3 to columns 0 and 2 like in school-book math. A little-endian machine would need a different mask.
typedef __vector unsigned char uint8x16_p;
typedef __vector unsigned int uint32x4_p;
/* Performs a+b as if the vector held two 64-bit double words */
uint32x4_p add64(const uint32x4_p a, const uint32x4_p b)
 const uint8x16_p cmask = {4,5,6,7, 16,16,16,16, 12,13,14,15, 16,16,16,16};
 const uint32x4_p zero = {0, 0, 0, 0};
 uint32x4_p cy = vec_addc(vec1, vec2);
 cy = vec_perm(cy, zero, cmask);
 return vec_add(vec_add(vec1, vec2), cy);
/* Performs a-b as if the vector held two 64-bit double words */
uint32x4_p sub64(const uint32x4_p a, const uint32x4_p b)
 const uint8x16_p bmask = {4,5,6,7, 16,16,16,16, 12,13,14,15, 16,16,16,16};
 const uint32x4_p amask = {1, 1, 1, 1};
 const uint32x4_p zero = {0, 0, 0, 0};
 uint32x4_p bw = vec_subc(vec1, vec2);
 bw = vec_andc(amask, bw);
 bw = vec_perm(bw, zero, bmask);
 return vec_sub(vec_sub(vec1, vec2), bw);
Power ISA 2.07 used in Power8 finally provided the 64-bit double words. A developer working with Power8 needs only to perform the following.
typedef __vector unsigned long long uint64x2_p;
/* Performs a+b using native vector 64-bit double words */
uint64x2_p add64(const uint64x2_p a, const uint64x2_p b)
 return vec_add(a, b);
/* Performs a-b using native vector 64-bit double words */
uint64x2_p sub64(const uint64x2_p a, const uint64x2_p b)
 return vec_sub(a, b);
Implementations.
The following processors have AltiVec, VMX or VMX128 included


NEOGEO Station

NEOGEO Station was a service handled by M2 for downloadable Neo Geo games that were previously available to be purchased from the PlayStation Store for Sony's PlayStation 3 (PS3), PlayStation Portable (PSP) and PlayStation Vita (PSV) video game consoles in all regions. All games in this series have been de-listed from the PlayStation Store. This list does not include PlayStation games ported from Neo Geo that were released as PS One Classics.


Nokia E7-00

The Nokia E7-00, also known as Nokia E7, is a business-oriented QWERTY smartphone by Nokia from the Nokia Eseries. It was announced at Nokia World in September 2010 together with the Nokia C6-01 and Nokia C7 and started shipping in February 2011. It is the second phone after the Nokia N8 to be running the Symbian^3 operating system.
When compared with the Nokia N8, it has fixed mass storage of 16GB without a memory card slot, no FM transmitter and a less advanced camera, with Extended Depth of Field, instead of autofocus as in the N8 and the E90. Like the Nokia N8, it comes with an HDMI-out connector and a non-user-replaceable battery that is smaller than the E90's.
It has the same keyboard spring mechanism as the Nokia N97 mini, but has like the N8 an anodized aluminium casing. All this is different from the bulkier and heavier E90.
Compared to the Nokia N97 mini and E90, the E7-00 has a multitouch capacitive touchscreen. Unlike the N8, N97 mini, and the E90, the E7-00 has an Active-matrix OLED (AMOLED) ClearBlack technology with a slightly lower resolution than the E90.
Vlasta Berka, general manager of Nokia Singapore, Malaysia and Brunei, talked about the trend of users who are using their smartphones for business.
Criticism.
The Parliament of Finland bought 200 E7s in spring 2011; by late April 2012, over 50 of these phones had been serviced under warranty. Most of them were fixed by OS update
The E7's battery is not user-removable, although unofficial online tutorials on how to replace the battery exist.
Being one of Nokia's first phone designs without a dedicated connector for charging, the USB connector in the E7 is also used for charging, and is a common point of failure.


QuickStart

QuickStart is a loading method used by several different software applications, designed to speed up the loading time of their software. Some load the core files and libraries during computer startup and allows the applications to start more quickly when selected later. QuickStarters typically place an icon in the System Tray. When the full application needs to be loaded, the base components are already in RAM, which significantly reduces load time.
QuickStarters are controversial because they use up RAM even when the application is not open. For this reason, QuickStarters can actually decrease performance as a whole. For example, if six applications load a QuickStarter into the System Tray at 50 megabytes per piece, that is 300 megabytes of RAM that could otherwise be used for working applications. If the user only has 256 megabytes of RAM, this will cause running applications to page to virtual memory and drastically reduce performance. On the other hand, if the user has one gigabyte of RAM, running applications will probably not be paged, and load times for QuickStart applications will be reduced (resulting in higher overall performance). The point from where the user powers on the system and when the system is ready for use will be delayed, as the system must incur a performance penalty in the form of reading the QuickStart applications from the hard drive and additional CPU processing and sub-system usage as the QuickStart application is loaded into memory.
The following are examples of applications which use the QuickStart method:
QuickStarters are a workaround for the poor performance of hard disk drives (HDDs) which have traditionally been the standard for desktop computers. Solid-state drives (SSDs) have lower latency and faster seek times than HDDs, so there is less need for QuickStarters on SSDs. SSD are slowly becoming more popular on certain types of computers.
In a business setting.
In a business setting, a quickstart can also be an informal, often short description of how to accomplish some specific task. It is generally meant to help non-experts, leave out details that are only important to experts, and may also be greatly simplified from an overall discussion of the topic.


TEST (x86 instruction)

In the x86 assembly language, the codice_1 instruction performs a bitwise AND on two operands. The flags codice_2, codice_3, codice_4 are modified while the result of the AND is discarded. The codice_5 and codice_6 flags are set to codice_7, while codice_8 flag is undefined. There are 9 different opcodes for the TEST instruction depending on the type and size of the operands. It can compare 8-bit, 16-bit, 32-bit or 64-bit values. It can also compare registers, immediate values and register indirect values.
TEST opcode variations.
The TEST operation sets the flags codice_6 and codice_5 to zero. The codice_2 is set to the most significant bit of the result of the AND. If the result is codice_7, the codice_3 is set to codice_14, otherwise set to codice_7. The parity flag is set to the bitwise XNOR of the least significant byte of the result, codice_14 if the number of ones in that byte is even, codice_7 otherwise. The value of codice_8 is undefined.
Examples.
test cl,cl ; set ZF to 1 if cl == 0
jz 0x804f430 ; jump if ZF == 1
test cl, cl ; set ZF to 1 if cl == 0
jnz 0x804f430 ; jump if ZF == 0
test eax, eax ; set SF to 1 if eax < 0 (negative)
js error ; jump if SF == 1


Nokia E73 Mode

The Nokia E73 Mode is a feature phone from the Nokia E series range manufactured by Nokia Company. It is the successor to the Nokia E73. The Nokia E73 Mode is an enterprise-based feature phone (as all Nokia Eseries devices) and has standard features including mobile email, calendar and instant messaging among many others like the Nokia E72.


GeForce 7 series

The GeForce 7 series is the seventh generation of Nvidia's GeForce graphics processing units. This was the last series available on AGP cards.
Features.
The following features are common to all models in the GeForce 7 series except the GeForce 7100, which lacks GCAA(Gamma Corrected Anti-Aliasing):
The GeForce 7 supports hardware acceleration for H.264, but this feature was not used on Windows by Adobe Flash Player until the GeForce 8 Series.
GeForce 7100 series.
The 7100 series was introduced on August 30, 2006 and is based on GeForce 6200 Series architecture. This series supports only PCI Express interface. Only one model, the 7100 GS, is available.
Features
The 7100 series supports all of the standard features common to the GeForce 7 Series provided it is using the ForceWare 91.47 driver or later releases, though it lacks opencl/CUDA support, and its implementation of Intellisample 4.0 lacks GCAA.
However it is important to note that 7100 series does not support technologies such as: high dynamic range rendering (HDR) and UltraShadow II.
GeForce 7100 GS.
Although the 7300 LE was originally intended to be the "lowest budget" GPU from the GeForce 7 lineup, the 7100 GS has taken its place. As it is little more than a revamped version of the GeForce 6200TC, it is designed as a basic PCI-e solution for OEMs to use if the chipset does not have integrated video capabilities. It comes in a PCI Express Graphics Bus and up to 512MB DDR2 VRAM.
Performance specification
GeForce 7200 series.
The 7200 series was introduced October 8, 2006 and is based on (G72) architecture. It is designed to offer a low-cost upgrade from integrated graphics solutions. This series supports only PCI Express interface. Only one model, the 7200 GS, is available.
Features
In addition to the standard GeForce 7 Series features, the 7200 series supports the following features:
However it is important to note that 7200 series does not support Scalable Link Interface (SLI).
GeForce 7200 GS.
The 7200 GS has the same memory speed as the 7300 GS, and the core frequency is the same as the 7300 LE. It has two pixel pipelines. Nvidia stated that the 7200 GS performance is 50% higher than the latest integrated graphics, it's the slowest card of the GeForce 7 Series and of the GeForce 6 Series but supports HDR and Nvidia PureVideo. NVIDIA GeForce 7200 GS desktop Graphics Processing Unit was launched in January 2006. The GPU uses Second Generation CineFX Shading architecture, and it is manufactured on 90 nm technological process. The card's graphics frequency is 450 MHz. It also has 2 pixel shaders, 4 texture units, together with 2 ROPs. The GeForce 7200 GS embeds 256 MB of DDR2 memory, utilizing 64 bit bus. The memory is clocked at 400 MHz, which results in 6.4 GB/s memory bandwidth. The GPU supports PCI Express 1.0 interface, and needs a single motherboard slot.
GeForce 7300 series.
Nvidia designed the 7300 series to be entry level gaming video cards. Four models were available: the 7300 GT, the 7300 GS, the 7300 LE, and the 7300 SE.
This series was released to replace the older Geforce 6200 series.
Features
In addition to the standard GeForce 7 Series features, the 7300 series supports following advanced features:
GeForce 7300 SE.
It uses the same core frequency and memory speed as the 7300 LE, and has two vertex and pixel shaders. In many ways, this card is actually inferior to the 7100 GS, although it still retains the HDR support.
GeForce 7300 LE.
The 7300 LE (LE stands for "light edition") is a scaled-down version of the 7300 GS. It has DDR2 memory, and a slightly lower core clock speed (450 MHz vs. 550 MHz). It is only available in the PCI Express interface. ASUS have produced a 7300 series card based on the 7300 LE core, running it at 580 MHz rather than 450 MHz.
GeForce 7300 GS.
Card with the highest core clock speed of the 7300 series. Better performance than the 7300SE/LE.
GeForce 7300 GT.
Card with the 128-bit memory interface and the highest memory bandwidth, but slightly lower 3D vertex rendering.
GeForce 7500 series.
GeForce 7500 LE (OEM).
The GeForce 7500 LE is an OEM GPU and is like the 7300 GS based on the G72 core. It has either 128 MB or 256 MB of dedicated video memory, however it also supports TurboCache, giving it up to 512 MB of video memory. It has DDR2 type memory and uses 64-bits memory interface. The card also has 550 MHz core clock speed and 263 MHz or 324 MHz memory clock speed (526 MHz or 648 MHz effective).
GeForce 7600 series.
Nvidia announced immediate availability of the GeForce 7600 series on March 9, 2006. Currently, two Models are available and these are GeForce 7600 GT and 7600 GS. This series is available with AGP and PCI-Express interfaces, covering a wide range of market segments.
This series was released to replace the older GeForce 6600 series.
Features
In addition to the standard GeForce 7 Series features, the 7600 series supports following advanced features:
GeForce 7600 GS.
On March 22, 2006, Nvidia announced the immediate availability of the GeForce 7600 GS GPU targeted at the low-mid end. This new GPU assumed the place of the GeForce 6600 GT, which had been around for quite some time.
The AGP version was introduced on July 21, 2006. According to Nvidia, this card is identical to the PCI-e version other than the interface. In addition, the AGP version uses Nvidia's AGP-PCIe bridge chip.
Preliminary testing showed that the GeForce 7600 GS outperforms a GeForce 6600 GT and ATI's counterpart, the ATI Radeon X1600 Pro.
GeForce 7600 GT.
This is the high-mid range product in the 7 Series family.
The 7600 contains all the features of the GeForce 7 family. It was made to provide a Geforce 7 series card to the mass market. Some companies released AGP versions. It incorporates DDR3 memory.
GeForce 7650 series.
GeForce 7650 GS (OEM).
The GeForce 7650GS was limited to a few OEM cards only. Not much is known about this card, other than that it uses the 80 nm process and uses DDR2 memory, with examples having 256MB of DDR2 ram.
GeForce 7800 series.
The 7800 series was designed to deliver exceptional performance and was targeted towards high-end market segment. This series was discontinued and replaced with the 7900 series in early 2006.
A total of 4 models were available: GeForce 7800 GTX 512, GeForce 7800 GTX, GeForce 7800 GT, and GeForce 7800 GS.
Features
In addition to the standard GeForce 7 Series features, the 7800 series supports following advanced features:
GeForce 7800 GT.
The GeForce 7800 GT is the second GPU in the series, launched on August 11, 2005 with immediate retail availability. It has 20 pixel pipelines, 7 vertex shaders, 16 ROPs and a 400 MHz core clock, 500 MHz memory clock (1 GHz effective) using GDDR3 memory.
The GeForce 7800 GT had been introduced as a more affordable alternative to the 7800 GTX. At the time it was considered the performance/cost champion of video cards.
GeForce 7800 GS AGP.
On February 2, 2006, Nvidia announced the 7800 GS as the first AGP video card in the GeForce 7 series lineup, an AGP version of the high-end GeForce 7 Series.
This card was promoted by several hardware enthusiasts as "the last high-ended AGP card in existence". It has 16 pixel shader units instead of the 20 that the 7800 GT has, but still benefits from the optimizations of the other 7-series GPUs enjoy. Clock speeds are 375 MHz for the GPU and 1200 MHz for the (GDDR3) memory. According to all benchmark tests, the performance of this card is faster than the GeForce 6800 GT and GeForce 6800 Ultra. Different vendors may deviate from the stated specification. It serves to provide a great upgrade path for those with high-end AGP systems who don't want to switch to a new high-end PCI-Express system.
There was a special "Golden Sample" release from Gainward that was called "7800 GS+" or officially "Bliss 7800 GS 512 MB GS+" that had default clock speeds of 450 MHz core and 1250 MHz memory. Unlike a standard 7800 GS, the 7800 GS+ actually used a 7900 GT GPU that had the full 24 pixel shaders instead of the regular 16 pixel shaders that are normally found on a 7800 GS video card.
Gainward had previously released a "Bliss 7800 GS 512MB GS" card that was based on a 7800 GT but utilized the AGP bus. Its external appearance and name make it nearly indistinguishable from the 7900 GT-based Bliss 7800 GS 512MB GS+. Leadtek produced a similar card with 256MB memory.
In late 2006 Gainward released a third '7800 GS' card with 20 pixel shaders running at 500 MHz core and 1400 MHz memory called the "BLISS GS-GLH". This card is also based on the 7900 GS core.
GeForce 7800 GTX.
The GeForce 7800 GTX (codenamed G70, and previously NV47) was the first GPU in the series, launched on June 22, 2005 with immediate retail availability. The GeForce 7800 GTX supported the highest specification DirectX 9 vertex and pixel shaders, at the time: Version 3.0. It was natively a PCI Express chip. SLI support had been retained and improved from the previous generation.
According to PC World, the 7800 GTX was "one of the most complex processors ever designed". The GPU had 302 million transistors (the Athlon 64 X2 4800+ CPU has 233.2 million transistors), along with 24 pixel and 8 vertex shaders. It was succeeded by the 7900 GTX on March 9, 2006.
GeForce 7800 GTX 512.
The 512 MB version of the GeForce 7800 GTX was released on November 14, 2005. The card features more than simply an increased frame buffer from 256 MB to 512 MB. The card features a much improved core clock speed of 550 MHz vs. 430 MHz (27.9% increase) and fast 1.1 ns GDDR3 memory clocked at 1.7 GHz vs. 1.2 GHz (41.7% increase), when compared to the original version. Like ATI's X1800 XT, the addition of another 256 MB of memory, and to a lesser extent, the increased clock speeds, have raised the heat and power output significantly. To combat this, the GeForce 7800 GTX 512 sports a much larger yet quieter dual slot cooling solution when compared to the original 256 MB version.
GeForce 7900 series.
Nvidia officially announced availability of the GeForce 7900 series on March 9, 2006.
Nvidia's 7900 series is a product refresh and not a new generation of Nvidia's GPU, running at 650 MHz. Officially, this series was meant to support only PCI Express Interface but some companies released AGP versions.
A total of 5 models have been developed and are available: 7900 GX2, 7900 GTX, 7900 GT, 7900 GTO and 7900 GS.
Features
In addition to the standard GeForce 7 Series features, the 7900 series supports following advanced features:
GeForce 7900 GS.
Introduced during the fall of 2006, At a MSRP of US$199, the 7900 GS filled the gap between the mid-end GeForce 7600 GT and the high-end GeForce 7900 GT. The card was unofficially launched August 23 by woot! as a white box OEM. However, the product's company, MSI, made claims that these cards were stolen from MSI during transportation and sold to woot!. The referenced MSI customer notice has been changed to remove explicit references to woot!. As of March 2007, Nvidia had discontinued production of a number of GeForce 6 and 7 series products, including the 7900 GS.
The GeForce 7900 GS has 20 pixel processors, 7 vertex processors, 256-bits memory bus, and comes clocked at approximately 450 MHz/1320 MHz for core/memory, which should provide slightly lower performance than the 7900 GT. The GeForce 7900 GS is powered by the graphics chip code-named G71, thus, shares the same advantages as the G71 did over its immediate predecessor G70: dual-link DVI outputs, reduced power consumption, higher performance.
GeForce 7900 GT.
This video card was released on March 9, 2006. Like the 7900 GTX, it uses the G71 GPU that is produced at 90 nm. It too offers all the features of the 7800 series as well as an attractive performance-to-price ratio.
GeForce 7900 GTX.
The GeForce 7900 GTX is a 90 nm produced G70 (named G71) and features all the same features of the 7800 GTX but is built upon the smaller manufacturing process. Due to shortages of memory modules for the 512 MB GTX, more readily available 1600 MHz memory was used.
GeForce 7900 GTO.
The 7900 GTO is a close cousin of the 7900 GTX. The GTO first arrived at a handful of retailers around October 1, 2006. At the time of launch, GTO boards sold for around US$250, compared to the 7900 GTX boards that cost in excess of $400 at the time. The GTO was essentially identical to the GTX, with the exception that it lacked HDCP and VIVO support, had underclocked memory running at 1320 MHz, and used tighter memory timings. Other than that, the two boards were identical: same PCB, same cooler, same GPU. The GTO used extremely fast 1.1ns Samsung BJ11 GDDR3 memory running at 1.8V, as opposed to the 2.1V it is rated at. Clock speeds on the two cards are identical, at 650 MHz. At stock memory speeds, most comparisons found the GTO to lag behind the GTX by roughly a 5-10% margin.
The majority of owners find that their GTO will overclock to 1600 MHz memory speeds, despite the under-volted RAM. Many flash their GTO to a GTX BIOS to officially make it a GTX. GTO owners having trouble reaching GTX speeds with BIOS version 5.71.22.39.13 or newer are advised to simply flash to an older BIOS version such as 5.71.22.39.08, this seems to solve overclocking problems for most users.
The GTO was an extremely popular card among enthusiasts as it offered near GTX performance at a considerably lower price. It was a limited production card aimed at cleaning out G70 inventories before the release of the G80, and only spent about a month in retail channels before selling out.
GeForce 7900 GX2.
The GeForce 7900 GX2 is two videocards stacked to fit as a dual slot solution. This is not like products such as the ASUS Dual GeForce 7800 GT or nVidia's own 7950 GX2, where two GPUs are on the same card. This enables quad-SLI on two PCI Express x16 slots. Other OEM companies have access to the GX2 and it is available from numerous vendors.
The card features a 500 MHz GPU and 1200 MHz effective RAM speed. Although the power of the GX2 is less than the 7900 GTX, each card is more powerful than the 7900 GT.
Many issues in this implementation of a dual-GPU unit convinced Nvidia to restrict its sale to OEM companies. The card is extremely long, with only the largest e-ATX cases being able to hold it. Two of the cards operating in quad-SLI also required extremely well designed airflow to function, and demanded a 1000 watt power supply unit.
GeForce 7950 series.
GeForce 7950 Series is the last addition in the GeForce 7 series. Officially, this series was meant to support only PCI Express Interface but some companies released AGP versions.
Two models are available: 7950 GT and 7950 GX2.
Features
In addition to the standard GeForce 7 Series features, the 7950 series supports following advanced features:
GeForce 7950 GT.
On September 14, 2006 Nvidia released the 7950GT. Announced with a 550 MHz core clock, 700 MHz (1400 MHz effective) memory clock, 24 pixel shader units, standard configurations come equipped with both 512 MB GDDR3 memory and HDCP support. At an introductory price of US$300, the GeForce 7950 GT replaces the older GeForce 7900 GT and improves performance: the GeForce 7950 GT has a fillrate of 13,200 Megatexels/s and a memory bandwidth of 44.8 GB/s (versus 10800 Megatexels/s and 940 Megavertices/s for the 7900 GT).
GeForce 7950 GX2.
This is essentially a dual-GPU video card that takes up only a single PCIe x16 slot, allowing for 4 GPUs to run with only two PCIe x16 slots, in standard SLI motherboards. Unlike the 7900 GX2 before it, this version is available to consumers directly.
The 7950 GX2 was released to retail on June 5, 2006, and shares similar specs to the GeForce 7900 GX2, with 500 MHz GPU clock, and 1200 MHz effective RAM speed. 512 MB of memory per GPU, for a total of 1 GB, however total performance is more in line with 512 MB since each GPU can only access its own memory and not the memory of the other one. It does not offer any advantages over single-GPU cards with 512 MB, memory wise.
This card is designed for the DIY market; it addresses many problems which the previous 7900 GX2 had suffered from, such as noise, size, power consumption, and price. The 7950 GX2 requires only a single PCIe power connector, in contrast to the twin-connectors of its predecessor; technically, this is understandable, as there is no need for a ring bus configuration – frames need only be passed on to the primary GPU. It is much shorter, fitting easily in the same space as a 7900 GTX. Lesser board layout and the removal of cooling vents on the bracket have greatly reduced temperatures, allowing the fans to run at a lower speed, thereby lowering noise. As of September 2006, the board can be found for $299, half the cost of a 7900 GX2.
According to some review sites (such as Tom's Hardware - see above), a single 7950GX2 draws less power than a single ATI Radeon X1900 XT – some consider this an amazing feat considering the GX2 employs a pair of GPUs, when the Radeon uses only one. Other review sites say that a GX2 is quieter than the aforementioned Radeon, despite the GX2 boasting a pair of identical GPU coolers – however 'loudness' is highly subjective without the proper tools and testing conditions. If true, this would make a pair of GX2 cards cooler, quieter, and less power hungry than a pair of X1900 XT cards in CrossFire. However, there is no appreciable performance gain from pairing two 7950 GX2 cards in most applications, while dual X1900 XT configurations see large performance boosts in CrossFire mode.
On August 9, 2006, Nvidia released initial ForceWare 91.45 drivers for Windows 2000 and XP that support Quad SLI. The Quad SLI support was soon merged in with the normal WHQL driver package, when ForceWare 91.47 drivers was released on October 16, 2006.
GeForce Go 7 series.
Nvidia has not only targeted the desktop market but also the notebook market with the GeForce 7 series.
Features
In addition to the standard GeForce 7 Series features, the GeForce Go 7 series supports following advanced features:
The GeForce Go 7 GPU series line-up consists of following models:
Driver support discontinued.
NVIDIA has ceased driver support for GeForce 7 series, saying that "GeForce 6-series and GeForce 7-series GPUs will be moved to legacy support after GeForce R304 drivers (304.xx to 309.xx). GeForce R310 drivers will not support these products."


List of best-selling PlayStation 2 video games

This is a list of video games for the PlayStation 2 video game console that have sold or shipped at least one million copies. The best-selling game on the PlayStation 2 is '. An action-adventure game developed by Rockstar North, "San Andreas" was originally released in North America on October 26, 2004, and went on to sell 17.33million units worldwide. The second-best-selling game on the console is ' (2001), which sold just under 14.9million units. The top five is rounded out by "Gran Turismo 4" (2004) selling 11.76million units, "" (2002) with 9.8million units sold, and "Final Fantasy X" (2001) with 8.5million units sold.
There are a total of 163 PlayStation 2 games on this list which are confirmed to have sold or shipped at least one million units. Of these, 30 were published in one or more regions by Sony Computer Entertainment. Other publishers with multiple million-selling games include EA Sports with twenty games, Electronic Arts with eighteen games, Capcom with fourteen games, Activision and THQ with twelve games each, and Konami with ten games. The developers with the most million-selling games include EA Tiburon with twelve games and Capcom and EA Canada, with nine games each in the list of 113. The most popular franchises on PlayStation 2 include "Grand Theft Auto" (36.93million combined units), "Gran Turismo" (29.61million combined units), "Madden NFL" (23.48million combined units), "Final Fantasy" ( combined units), and "Pro Evolution Soccer" ( combined units). The oldest game on this list is "Tekken Tag Tournament", first released on the platform on March 30, 2000, while the most recent is "Sonic Unleashed", released November 18, 2008 when the PlayStation 3 had been out for more than two years.
As of March 31, 2007, a total of 1.24billion copies of PlayStation 2 software had been shipped worldwide. Between April 1, 2007 and March 31, 2012, an additional 297.5million copies had been sold. Note that since the former figure refers to shipments and the latter refers to sales, there may be overlap between the two figures.


Vadem VG230


Trustix

Trustix Secure Linux was a Linux distribution intended for use on servers and focused on security and stability. It was a hardened and secure OS, meaning that non-essential services and binaries are not installed, while UNIX staples like Sendmail are replaced by programs like Postfix.
Trustix was originally produced by Trustix AS. The company was established late in 1997 by entrepreneurs from USA and Norway. The company went bankrupt in 2003 and Comodo Group bought the assets in November 2003. Shortly thereafter Comodo announced the end of the free version of Trustix Secure Linux. Not long thereafter Comodo changed their minds and the free version reappeared.
By late 2005 a series of budget cuts had resulted in many of the developers being laid off, and by early 2006 all members of the original Trustix team had left the company. Trustix Secure Linux continues to be maintained by a very small team of developers in India.
By late 2007 Comodo announced that it will discontinue all distribution, updates and direct support for Trustix Secure Linux effective December 31, 2007.


Compressed instruction set

A compressed instruction set, or simply compressed instructions, are a variation on a microprocessor's instruction set architecture (ISA) that allows instructions to be represented in a more compact format. In most real-world examples, compressed instructions are 16 bits long in a processor that would otherwise use 32-bit instructions. It is distinct from the concept of variable length instructions, where any instruction can have any length; in a compressed set the instructions are alternative forms for existing 32-bit versions.
The concept was originally introduced in the 1980s by Hitachi as a way to improve the code density of their SuperH RISC processor design and thereby allow programs to run in smaller amounts of main memory. Today these smaller instructions are known as SHcompact. As memory of even the smallest systems is now orders of magnitude larger, this is no longer the main concern; today the advantage is that it reduces the number of accesses to main memory and thereby reduces energy use in mobile devices. Hitachi's patents were licensed by Arm Ltd. for their processors, where it was known as "Thumb". Similar systems are found in MIPS16e and Power ISA.
The introduction of 64-bit computing has led to the term no longer being as widely used; these processors generally use 32-bit instructions and are technically a form of compressed ISA, but as they are mostly modified versions of an older 32-bit ISA from a 32-bit version of the same processor family; there is no real compression. The original patents have expired and the concept can be found in a number of modern designs, including the RISC-V, which was designed from the outset to use it.
Concept.
Microprocessors encode their instructions as a series of bits, normally divided into a number of 8-bit bytes. For instance, in the MOS 6502, the instruction performs binary addition between an operand value and the value already stored in the accumulator. There are a variety of places the processor might find the operand; it might be located in main memory, or in the special zero page, or be an explicit constant like "10". Each of these variations used a different 8-bit instruction, or opcode; if one wanted to add the constant $04 to the accumulator the instruction would be encoded in memory as , whereas if it was adding the value stored in main memory at location $4400, it would be , with a little endian address.
Note that the second instruction requires three bytes because the memory address is 16-bits long. Depending on the instruction, it might use one, two or three bytes. This is now known as a variable length instruction set, although that term was not common at the time as most processors, including mainframes and minicomputers, used some variation of this concept. Even in the late 1970s, as microprocessors began to move from 8-bit formats to 16, this concept remained common; the Intel 8088 continued to use 8-bit opcodes which could be followed by zero to six additional bytes depending on the addressing mode.
It was during the move to 32-bit systems, and especially as the RISC concept began to take over processor design, that variable length instructions began to go away. In the MIPS architecture, for instance, all instructions are a single 32-bit value, with a 6-bit opcode in the most significant bits and the remaining 26 bits used in various ways representing its limited set of addressing modes. Most RISC designs are similar. Moving to a fixed-length instruction format was one of the key design concepts behind the performance of early RISC designs; in earlier systems the instruction might take one to six memory cycles to read, requiring wiring between various parts of the logic to ensure the processor didn't attempt to perform the instruction before the data was ready. In RISC designs, operations normally take one cycle, greatly simplifying the decoding. The savings in these interlocking circuits is instead applied to additional logic or adding processor registers, which have a direct impact on performance.
Code density.
The downside to the RISC approach is that many instructions simply do not require four bytes. For instance, the Logical Shift Left instruction shifts the bits in a register to the left, and only requires the instruction opcode and a register number. In the 6502, which has a single arithmetic register A, and thus does not even need a register number, the instruction takes up one byte. In theory, MIPS needs only a 6-bit opcode and a 5-bit register number for this same operation, and in theory, could fit the instruction in a 16-bit value. But as is the case for most RISC designs, the instruction still takes up a full 32-bits. As these sorts of instructions are relatively common, RISC programs generally take up more memory than the same program on a variable length processor.
In the 1980s, when the RISC concept was first emerging, this was a common point of complaint. As the instructions took up more room, the system would have to spend more time reading instructiaons from memory. It was suggested these extra accesses might actually slow the program down. Extensive benchmarking eventually demonstrated RISC was faster in almost all cases, and this argument faded. However, there are cases where memory use remains a concern regardless of performance, and that is in small systems and embedded applications. Even in the early 2000s, the price of DRAM was enough that cost-sensitive devices had limited memory. It was for this market that Hitachi developed the SuperH design.
In the earlier SuperH designs, SH-1 through SH-4, instructions always take up 16-bits. The resulting instruction set has real-world limitations; for instance, it can only perform two-operand math of the form , whereas most processors of the era allowed , the three-operand format. By removing one operand, four bits are removed from the instruction (there are 16 registers, needing 4 bits), although this is at the cost of making math code somewhat more complex to write. For the markets targeted by the SuperH, this was an easy tradeoff to make. A significant advantage of the 16-bit format is that the instruction cache now holds twice as many instructions for any given amount of SRAM. This allows the system to perform at higher speeds, although some of that might be mitigated by the use of additional instructions needed to perform operations that might be performed by a single 3-operand instruction.
For the SH-5, Hitachi moved to a 32-bit instruction format. In order to provide backward compatibility with their earlier designs, they included a second instruction set, SHcompact. SHcompact mapped the original 16-bit instructions one-way onto the internal 32-bit instruction; it did not perform multiple instructions as would be the case in earlier microcoded processors, it was simply a smaller format for the same instruction. This allowed the original small-format programs to be easily ported to the new SH-5, while adding little to the complexity of the instruction decoder.
ARM licensed a number of Hitachi's patents on aspects of the instruction design and used them to implement their Thumb instructions. ARM processors with a "T" in the name included this instruction set in addition to their original 32-bit versions, and could be switched from 32 to 16-bit mode on the fly using the command. When in Thumb mode, only the top eight registers of the ARM's normal sixteen registers are visible, but these are the same registers as in 32-bit mode and thus data can be passed between Thumb and normal code using those registers. Every Thumb instruction was a counterpart of a 32-bit version, so Thumb was a strict subset of the original ISA. One key difference between ARM's model and SuperH is that Thumb retains some three-operand instructions in the 16-bit format, which it accomplished by reducing the visible register file to eight, so only 3-bits are required to select a register.
The MIPS architecture also added a similar compressed set in their MIPS16e, which is very similar to Thumb. It too allows only eight registers to be used, although these are not simply the first eight; the MIPS design uses register 0 as the zero register, so registers 0 and 1 in 16-bit mode are instead mapped onto MIPS32 registers 16 and 17. Most other details of the system are similar to Thumb. Likewise, the latest version of the Power ISA, formerly PowerPC, include the "VLE" instructions which are essentially identical. These were added at the behest of Freescale Semiconductor, whose interest in Power is mostly aimed at the embedded market.
Modern use.
Starting around 2015, many processors have moved to a 64-bit format. These generally retained a 32-bit instruction format, while expanding the internal registers to a 64-bit format. By the original definition, these are compressed instructions, as they are smaller than the basic data word size. However, this term is not used in this context, references to compressed instructions invariably refer to 16-bit versions.


Karen Sandler

Karen Sandler is the executive director of the Software Freedom Conservancy, former executive director of the GNOME Foundation, an attorney, and former general counsel of the Software Freedom Law Center.
Work in Free Software.
As of March 2014, Sandler is executive director of the Software Freedom Conservancy.
From June 2011 to March 2014, Sandler served as executive director of the GNOME Foundation. Under her leadership, GNOME embarked on an ambitious project to draw more women into Free and Open Source software, the Outreach Program for Women.
Between October 31, 2005 and June 21, 2011 she worked at the Software Freedom Law Center (SFLC), first as counsel, and then as the organization's General Counsel after January 6, 2010.
While at the SFLC, Sandler advised a wide range of free and open source software organizations such as the Free Software Foundation, the Apache Software Foundation, the X.Org Foundation, Software in the Public Interest and the Software Freedom Conservancy. With SFLC, she became a public speaker about issues of Free and Open Source software at conferences such as OSCON, SCaLE, and LinuxCon. In 2010, she led an initiative advocating for free software on implantable medical devices after exploring the issues surrounding the software on her own implanted medical device (a defibrillator), which regulates hypertrophic cardiomyopathy (HCM), an inherited heart condition.
In addition to her work with the Software Freedom Conservancy, Sandler also served as general counsel (pro bono) of the non-profit Question Copyright. She is also co-host of the "Software Freedom Law Show" (2008-2010) and "Free as in Freedom" (2010-) podcasts.
Sandler received the 2017 Free Software Award for her work promoting software freedom.
Prior Legal Career.
Before working with the SFLC, Sandler worked as an associate in the corporate departments of Gibson, Dunn & Crutcher LLP in New York and Clifford Chance in New York and London.
Education.
Sandler received her law degree from Columbia Law School in 2000, where she was a James Kent Scholar and co-founder of the Columbia Science and Technology Law Review. She received her bachelor's degree in engineering from The Cooper Union.
Personal life.
As of May 21, 2011, she is married to Mike Tarantino, a Grammy nominated music engineer. Their wedding invitation, a working paper record player and playable record, was covered by a number of internet publications. The record contained a song that Sandler and Tarantino made together.


Nintendo Zone

Nintendo Zone was a download service and an extension of the DS Download Station. Users could access content, third-party data, and other services from a hotspot or download station. The service had demos of upcoming and currently available games and may have location-specific content. When the service debuted, users could also connect to the Nintendo Wi-Fi Connection and DSi Shop.
The Nintendo Zone Viewer application allowed the Nintendo DSi and 3DS to detect and use the Nintendo Zone service. This application has been discontinued worldwide, but all other Nintendo Zone functionality remains.
History.
In collaboration with the restaurant chain McDonald's, the service originated in the Kantō, Chūkyō and Kansai regions of Japan. Over 1,000 DS Download Stations in Japan were planned to be converted into Nintendo Zones to enable SpotPass communications. Nintendo Zone content was available at over 29,000 locations in the United States. The service launched in Europe on April 25, 2012 with approximately 25,000 locations. Nintendo announced in July 2013 that the service would receive StreetPass enhancements. The StreetPass Relay Points system was introduced as part of an firmware update to Nintendo 3DS consoles in August 2013. When a 3DS owner visited a Nintendo Zone location, his or her StreetPass data would have been stored there then transferred when another owner visited with the same games. The viewer would always remain on even if it is out range of a Nintendo Zone.
On December 8, 2011, a 3DS update began that allowed users to access new Nintendo Zones through a variety of new hotspots. A press release showed that Boingo Wireless teamed up with Nintendo of America to allow users automatic access to the zone within 42 Boingo-serviced airports within North America. This has offered a new range of encounters and features without any additional cost.
In December 2013, a new feature was added on in celebration of National StreetPass Weekend. This feature combined and mixed together all Nintendo Zones within North America into one and allowed users who come across a Nintendo Zone to streetpass and exchange data with other 3DS users from all around the continent, as opposed to only those 3DS users who have passed by that specific zone. Through this feature, users were able to StreetPass a maximum of 6 users at a time from other parts of North America. This feature helped raise awareness about Nintendo Zone and what it could offer to 3DS users. It encouraged 3DS users to access a nearby zone in order to meet users from other parts of the continent and to gather more StreetPass relay points. Through this feature, many users were able to exchange information and gameplay items with other users. It also encouraged interaction between 3DS users who own the same game to initiate item exchanges that each users would be able to take away with them once the events are over.
Locations.
Nintendo 3DS users were able to access the Nintendo Zone inside these following places: Best Buy, Home Depot, and CrossIron Mills in Canada; and AT&T Retail Store, and McDonald's in the USA. Users could find nearby Nintendo Zones by searching for their city or postal code on the Nintendo website.
DS Download Station.
The DS Download Station was an in-store demo service launched by Nintendo in early 2006. As the name states, these are stations that can be used to download game demos and trailers to a Nintendo DS. The download station consisted of a standard retail DS hidden inside a sealed box with a special DS Download Station cartridge inserted in it. The cartridge acts as a server for customers to download new game demos or videos. When Nintendo released a new demo cartridge to retailers, they simply load the cartridge into the DS locked in the sealed box.
A DS Download Station could distribute only one game at a time, but can send the demos to up to fifteen DS systems simultaneously. The games can be downloaded by navigating to DS Download Play on the Nintendo DS's main menu and browsing for a DS Download Station in range. Players could choose from a wide range of games that refreshed every quarter of the year. The first game demos released were Tetris DS, , Mario Kart DS and more. From there it would load a simple menu & loader application to facilitate loading the demo of the player's choice. The demos remain on the DS until the power is turned off.
The US and European version of the DS Download Station are completely different from the Japanese version. The Japanese version uses 3 PCs, each connected to an Internet connection. The difference in design was due to most retail locations in the US at the time not having an available Internet connection, and therefore, a self-contained solution was necessary.
There had been nineteen different volumes of DS Download Station, with each volume differing in content between North America, Europe, and Japan.
The DS Download Station had long since been discontinued, with all the Display DS units being resold in the normal retail market.


KaOS

KaOS is a Linux distribution that is built from scratch with a very specific focus on Qt and KDE.
Although KaOS is currently based on the Linux kernel, the developers are "constantly evaluating" the illumos kernel, and say that "a future switch is a wish".
History.
The first version of KaOS was released as "KdeOS" in 2013. To prevent confusion between the distribution's name and the desktop environment KDE, the name was changed to "KaOS" in September 2013.
Features.
KaOS is distributed via an ISO image, and exclusively supports 64-bit x86 processors.
The idea behind KaOS is to create a tightly integrated rolling and transparent distribution for the modern desktop, build from scratch with a very specific focus. Focus on one DE (KDE Plasma), one toolkit (Qt), one architecture (x86_64) plus a focus on evaluating and selecting the most suitable tools and applications.
Receptions.
Phoronix wrote in 2016, "Overall, I was quite pleased with it for being a niche distribution. KaOS was easy to install and was quickly running on a bleeding-edge KDE Plasma 5 stack. Overall, it was a fun and pleasant few hours spent with KaOS.
FossMint stated in 2017, that KaOS "is a modern, open-source, beautifully designed, QT and KDE-focused Linux distro. It is a rolling release that ships with KDE Plasma as its default Desktop Environment, uses Pacman as its package manager, and has a 3-group structure repository on GitHub." and "The fact that it is a rolling release means that you will never need to worry about future updates the moment you have a version installed like in the case of Ubuntu and the like where you would need to consider whether to perform a clean installation of another “major version” or not."
Hectic Geek reviewed KaOS in 2014, and wrote that the distribution was not very fast, but included all necessary applications.
Jesse Smith from DistroWatch Weekly wrote a review of KaOS 2014.04. Smith said the features of KaOS worked well.
Robert Rijkhoff reviewed KaOS 2017.09 for DistroWatch Weekly, and he said that "KaOS seems to be trying a little bit hard to be different".
ZDNet wrote a hands-on review about KaOS 2014.06:
Dedoimedo reviewed KaOS 2014.12:
Jack Wallen from Linux.com stated his opinion about KaOS in 2016, and said that the distribution is beautiful.


Usplash

Usplash is a software project in the Ubuntu community. Historically, scrolling text "verbose mode" has typically appeared on Linux computers during boot. Usplash replaces the scrolling-text screens with a graphical splash screen. It was designed to replace Bootsplash, which did the same thing on the kernel space level. Since usplash operates in user space, it can be updated without recompiling the kernel.
Usplash uses the Linux framebuffer interface or, alternatively, direct VESA access to display the splash screen.
In Ubuntu 9.10 "Karmic Koala", Usplash is only used in the preliminary stages of booting, after which XSplash takes over. In Ubuntu 10.04 LTS "Lucid Lynx", Usplash has been fully replaced by Plymouth, which uses Direct Rendering Manager (DRM) and KMS driver.


Univention Corporate Server

Univention Corporate Server (UCS) is a server operating system derived from Debian GNU/Linux with an integrated management system for the central and cross-platform administration of servers, services, clients, desktops and users as well as virtualized computers operated in UCS. In addition to the operation of local, virtual instances, UCS can also be operated in cloud environments. Via the integration of the open source software Samba 4, Univention also supports the functions provided in many companies by Microsoft Active Directory for the administration of computers operated with Microsoft Windows. UCS-based components and UCS-certified, third party products can be installed via the Univention App Center. UCS provides all App Center applications with a runtime environment and services for the operation including a central, consistent management of the apps. Docker containers can also be run on UCS systems and several of the apps available in the App Center are Docker-based.
Univention is a member of the Open Source Business Alliance and supports the creation of the Open Source Business Alliance open source software stacks.
History.
The impulse for the development of UCS, which began in 2002, was the lack of a standardised Linux server operating system offering companies and organisations an alternative to Microsoft’s domain concept with the proprietary directory service Active Directory. Comparable Linux solutions (e.g., from SUSE and Red Hat) did not offer an integrated, cross-system user and computer management system, with the result that corresponding solutions had to be configured and maintained individually.
Important early driving forces for the development of UCS were initially the Oldenburgische Landesbank and the department of the Bremen Senator for Education and Science, until the product was ready for market launch at the end of 2004. Since then, in addition to new versions, a number of software solutions based on the main product UCS have also been launched.
UCS is predominantly employed in the German-speaking world by companies and public organisations from a wide range of sectors and fields, among others by the regional government authority of the federal state Brandenburg. In 2005, Univention began to market UCS also in other German-speaking countries. Today, UCS is used in many European countries and also outside of Europe, for example, in Australia, Nigeria and the USA where Univention established a subsidiary in 2013.
Licenses and editions.
UCS is open-source software; the proprietary developments of Univention GmbH included in UCS were published under the GNU GPL until Version 2.3. With the launch of Version 2.4, the company switched to GNU AGPL. There are also a range of software appliances based on UCS (e.g., in the groupware, desktop and IT service management fields).
Since 21 April 2015 UCS is freely available to companies in form of the UCS Core Edition, which replaced the previous "free for personal use" license. This Core Edition is a fully featured version and differs from the fee-based edition only in terms of product liability and support.
Structure and components.
Univention Corporate Server is based on the Linux distribution Debian GNU/Linux. There are numerous open source applications integrated in UCS, for example Samba, the authentication service Kerberos, the virtualization software KVM, and Nagios for the monitoring of servers. The core and important unique selling point of UCS is the central administration tool "Univention Management Console", which allows the cross-system and cross-location management of IT infrastructures. UCS uses the directory service OpenLDAP to save data for identity and system management.
The administration tools are operated via the web-based applications and command-line interfaces. Thanks to the integrated administration service UCS Virtual Machine Manager (UVMM), the administration tools also allow the central administration of virtualized servers and clients, hard drives, CDROM and DVD images as well as the physical systems on which they are operated.
The manufacturer goes to great lengths to guarantee possibilities for the integration of UCS in existing IT environments via the use of open standards and supplied connectors. In this way, the integrated tool Active Directory Connection allows the bidirectional synchronisation of the Microsoft directory service Active Directory and the directory service used in UCS, OpenLDAP. In addition, UCS offers various interfaces for manufacturers of application software enabling them to integrate their applications in the UCS management system.
Since UCS 3.1, UCS provides with "Univention App Center" an own graphic management component for the installation and deinstallation of UCS components and UCS-certified third-party appliances. The Univention App Center includes, beside Univention solutions, for example, the Open Source groupware solutions Kopano, Open-Xchange, the document management system agorum core, the slack alternative Rocket.Chat and the dropbox alternatives ownCloud and Nextcloud, or the collaboration solutions ONLYOFFICE and Collabora.


SGI Origin 350

The SGI Origin 350 is a mid-range server computer developed and manufactured by SGI introduced in 2003. Their discontinuation in December 2006 brought to a close almost two decades of MIPS and IRIX computing.
Hardware.
The Origin 350 is based on the NUMAflex architecture, where a system is constructed from a varying number of modules connected together using the NUMAlink3 interconnect via cables. A system can consist of 2 to 32 processors, 1 to 64 GB of memory and 4 to 62 PCI-X slots. For systems with more than 8 processors, a 2U NUMAlink module is required for routing. Modules for disk storage and further PCI slots were also available. Multiple modules are coordinated at power up by an L2 controller which communicated to the modules via USB ports. The L2 controller was an external PowerPC computer running Linux with console, USB, modem and Ethernet ports.
Compute module.
The 2U compute module contained the processors, memory and four PCI-X slots on two buses. Each compute module features an IP53 node board, which contains two or four MIPS R16000 microprocessors clocked at 600 or 700 MHz with 4 MB of ECC L2 cache, eight DIMM slots for 1 to 8 GB of ECC memory, a Bedrock ASIC serving as the crossbar for enabling communication between the processors, memory and PCI-X slots.
Two variants of the compute module exist, the base compute module and the system expansion compute modules. The difference between these two models is that the inclusion of a SCSI disk drive and an IO9 input/output card is mandatory in the base compute module, but optional in the system expansion compute module. The IO9 input/output card connects to a PCI-X slot and provides SCSI interfaces for two internal disks, an external SCSI port, audio I/O and a 10/100/1000BASE-T Ethernet connection.


EMUI

EMUI, (formerly known as Emotion UI, and also known as Magic UI on Honor smartphones) is an Android-derived mobile operating system developed by Chinese technology company Huawei. It is used on the company's smartphones and tablets.
Outside of mainland China, Huawei devices released prior to 2020 run versions of EMUI certified by Google as Android distributions, which support Google Play and other Google apps. In mainland China, and internationally since 2020 due to U.S. sanctions, EMUI devices utilise Huawei-provided services such as AppGallery instead.
History.
On 30 December 2012, Huawei introduced Emotion UI 1.0, based on Android 4.0. It features a voice assistant app (only in Chinese), customizable homescreens and theme-switching. The company rolled out installation files for the Ascend P1 through their website. The company claims that it is "probably the world's most emotional system".
On 4 September 2014, the company announced EMUI 3.0, along with Ascend Mate 7 in the pre-IFA event in Berlin. The user interface was ever since called "EMUI" instead of "Emotion UI". In Mainland China, the release introduces the Huawei AppGallery application store; international markets continued to use Google Play.
In late 2015, Huawei introduced EMUI 4.0, based on Android Marshmallow. In 2016, EMUI 5.0 was introduced, based on Android Nougat. In 2017, Huawei introduced EMUI 8.0, based on Android Oreo; beginning with this release, the version number would now be aligned with that of the Android version from which it was derived.
Huawei unveiled EMUI 9.0, based on Android Pie, at IFA in 2018. Huawei stated a goal for the release to make EMUI more "simple", "enjoyable", and consistent; it included various usability tweaks, reorganized settings menus, dark mode, gesture navigation, and GPU Turbo 2.0. Beginning with EMUI 9.0.1, new Huawei devices ship with the company's EROFS file system for its system partitions, which is designed for higher performance in read-only settings on devices with limited resources. In July 2019, Huawei released EMUI 9.1
EMUI 10, based on Android 10, was announced 9 August 2019 at the Huawei Developer Conference. It features an updated interface with larger "magazine"-styled headings, new animations, colour accents inspired by painter Giorgio Morandi, and Android 10's system-wide dark mode support. Beginning 2020 due to United States sanctions against Huawei (which prohibit U.S.-based companies from doing business with the company), new EMUI smartphones sold internationally (beginning with the Mate 30) are no longer certified by Google, do not include support for Google mobile services (GMS) including Google Play, and are marketed as running EMUI with no reference to the Android trademark. These devices introduce AppGallery and Huawei Mobile Services to international markets as an alternative to Google-provided software. This does not apply to Huawei models that were released prior to the sanctions (such as the P30).
In 2020 alongside the P40, Huawei announced EMUI 10.1, which adds multi-window support, and the new first-party apps Celia and MeeTime. Huawei announced updates for some of its existing devices in June 2020. In December 2020, Huawei released the HarmonyOS 2.0 beta for the P30 and P40, which iterates from EMUI 10.
Reception.
Earlier versions of EMUI have been criticized for placing all app icons on the home screen, with some reviewers saying that it tries to imitate Apple's iOS. The app drawer has been brought back as an option in EMUI 5.0. "PC Magazine" Adam Smith criticized EMUI for being bloated with duplicate apps and the settings menus being difficult to navigate.
References.


Weitek

Weitek Corporation was an American chip-design company that originally focused on floating-point units for a number of commercial CPU designs. During the early to mid-1980s, Weitek designs could be found powering a number of high-end designs and parallel-processing supercomputers.
Weitek started in 1981, when several Intel engineers left to form their own company. Weitek developed math coprocessors for several systems, including those based on the Motorola 68000 family, the 1064 and 1164, and for Intel-based i286 systems, the 1067. Intel's own FPU design for the i386 fell far behind in development, and Weitek delivered the 1167 for them. Later upgrades to this design led to the 2167, 3167 and 4167. Weitek would later outfit FPUs to the early SPARC architecture such as the 3170 and 3172. Weitek FPUs had several differences compared to x87 offerings, lacking extended double precision but having a register-file rather than a stack-based model, or using memory-mapped IO as opposed to port-mapped IO.
As orders increased for supercomputer applications, Weitek found themselves seriously disadvantaged by their fab, which was becoming rather outdated. HP approached them with a deal to use their newer fabs. This proved advantageous for both, and soon HP's fabs were open to anyone. Weitek also worked with HP on the design of their latest PA-RISC design and sold their own version known as the RISC 8200, which was sold as an embedded design and had some use in laser printers.
In the late 1980s Weitek saw a new opportunity and started developing frame buffers for Sun Microsystems workstations. In the early 1990s they also introduced the SPARC POWER μP (as in "power-up"), a pin-compatible version of the SPARC processor. The μP could be dropped into existing SPARCstation 2 and SPARCstation IPX workstations and ran at 80 MHz, double the clock speed of the CPUs it replaced. The chip ran twice as fast internally, providing a boost of about 50–60% in overall speed, due to the bus not getting any faster. However, they did not pursue this concept with later generations of SPARC processors.
Weitek turned their frame-buffer experience to the PC market in the early 90s and introduced a series of SVGA multimedia chipsets known as the "POWER" systems. Consisting of two chips, one drawing the graphics known as the P9000 and another handling the output, the VideoPower 5x86, the POWER series was used in a number of third-party designs based on the VESA Local Bus standard. The P9001 moved to PCI and became fairly popular in 1994, known as the Viper in designs from Diamond and Orchid. The final generation, the P9100, combined the P9001 and 5286 into a single chip. Weitek adapters were fairly successful in the early days of the 486 market, but fell from use when less expensive systems were introduced by a host of new players in the mid-1990s.
During the early 1990s most CPU designs started including FPUs built into the system, basically "for free", and Weitek made a series of attempts to re-enter the low-end CPU and graphics driver market with their W464 (486) and W564 (P5) systems, which used the host machine's RAM as the frame buffer to lower costs. By 1995 the company was almost dead, and in late 1996 the remains were purchased by Rockwell's Semiconductor Systems and quickly disappeared.


DEGIMA

The DEGIMA (DEstination for Gpu Intensive MAchine) is a high performance computer cluster used for hierarchical N-body simulations at the Nagasaki Advanced Computing Center, Nagasaki University.
The system consists of a 144-node cluster of PCs connected via an InfiniBand interconnect. Each node is composed of 2.66 GHz Intel Core i7 920 processor, two GeForce GTX295 graphics cards, 12 GB DDR3-1333 memory and Mellanox MHES14-XTC SDR InfiniBand host adapter on MSI X58 pro-E mother board. Each graphics card has two GT200 GPU chips. As a whole, the system has 144 CPUs and 576 GPUs. It runs astrophysical N-body simulations with over 3,000,000,000 particles using the Multiple-Walk parallel treecode. The system is noted for being highly cost and energy-efficient, having a peak performance of 111 TFLOPS with an energy efficiency of 1376 MFLOPS/watt. The overall cost of the hardware was approximately US$500,000.
The name of the system is also derived from the name of a small artificial island called "Dejima" in Nagasaki.


Athlon 64 X2

The Athlon 64 X2 is the first native dual-core desktop Central processing unit (CPU) designed by Advanced Micro Devices (AMD). It was designed from scratch as native dual-core by using an already multi-CPU enabled Athlon 64, joining it with another functional core on one die, and connecting both via a shared dual-channel memory controller/north bridge and additional control logic. The initial versions are based on the E stepping model of the Athlon 64 and, depending on the model, have either 512 or 1024 KB of L2 cache per core. The Athlon 64 X2 can decode instructions for Streaming SIMD Extensions 3 (SSE3), except those few specific to Intel's architecture.
In June 2007, AMD released low-voltage variants of their low-end 65 nm Athlon 64 X2, named "Athlon X2". The Athlon X2 processors feature reduced thermal design power (TDP) of 45 Watt (W). The name was also used for K10 based budget CPUs with two cores deactivated.
Multithreading.
The primary benefit of dual-core processors (like the Athlon 64 X2) over single-core processors is their ability to process more software threads at the same time. The ability of processors to execute multiple threads simultaneously is called thread-level parallelism (TLP). By placing two cores on the same die, the X2 effectively doubles the TLP over a single-core Athlon 64 of the same speed. The need for TLP processing ability depends on the situation to a great degree, and some situations benefit from it far more than others. Some programs are currently written for only one thread, and thus cannot use the processing power of a second core.
Programs often written with multiple threads and able to use dual-cores include many music and video encoding applications, and especially professional rendering programs. High TLP applications currently correspond to server and workstation situations more than the typical desktop. These applications can reach almost twice the performance of a single-core Athlon 64 of the same specifications. Multitasking also runs a sizable number of threads. Intense multitasking processes have sped up by considerably more than twice. This is mostly due to the high overhead caused by constantly switching threads, and could potentially be improved by adjustments to operating system scheduling code.
In the consumer segment of the market, the X2 improves on the performance of the original Athlon 64, especially for multi-threaded software.
Manufacturing costs.
Having two cores, the Athlon 64 X2 has an increased number of transistors. The 1 MB L2 cache 90 nm Athlon 64 X2 processor is 219 mm² in size with 243 million transistors whereas its 1 MB L2 cache 90 nm Athlon 64 counterpart is 103.1 mm² and has 164 million transistors. The 65 nm Athlon 64 X2 with only 512 KB L2 per Core reduced this to 118 mm² with 221 million transistors compared to the 65 nm Athlon 64 with 77.2 mm² and 122 million transistors. As a result, a larger area of silicon must be defect free. These size requirements necessitate a more complex fabrication process, which further adds to the production of fewer functional processors per single silicon wafer. This lower yield makes the X2 more expensive to produce than the single-core processor.
In the middle of June 2006 AMD stated that they would no longer make any non-FX Athlon 64 or Athlon 64 X2 models with 1 MB L2 caches. This led to only a small production number of the Socket-AM2 Athlon 64 X2 with 1 MB L2 cache per core, known as 4000+, 4400+, 4800+, and 5200+. The Athlon 64 X2 with 512 KB per core, known as 3800+, 4200+, 4600+, and 5000+, were produced in far greater numbers. The introduction of the F3 stepping then saw several models with 1 MB L2 cache per core as production refinements resulted in an increased yield.
CPU cores.
Athlon X2.
'64' was omitted from the name of the Brisbane 'BE' series; the 64-bit marketing campaign initiated by AMD became insignificant once essentially all consumer CPUs became 64-bit processors.


Duron

Duron is a line of budget x86-compatible microprocessors manufactured by AMD. Released on June 19, 2000 as a lower-cost offering to complement AMD's then mainstream performance Athlon processor line, it also competed with rival chipmaker Intel's Pentium III and Celeron processor offerings. The Duron brand name was retired in 2004, succeeded by the Sempron line of processors as AMD's budget offering.
Performance.
The original Duron processors were derived from AMD's mainstream "Athlon" Thunderbird processors, the primary difference being a reduction in L2 cache size to 64 KB from the Athlon's 256 KB. This was a relatively severe reduction, making it even smaller than the 128 KB L2 available on Intel's competing budget Celeron line. However, the originating Thunderbird architecture already featured one of the largest L1 caches at 128 KB (which was not reduced in the Duron) and also introduced AMD's switch to an exclusive cache design which effectively unified the L1 and L2 caches. Because of this, the Duron behaved as if it had a high speed 128 KB cache combined with a somewhat slower 64 KB segment giving an effective 192 KB cache, versus the traditional inclusive cache design where the L2 cache had to store a duplicate of the data stored in the L1 cache. As a comparison the inclusive design of the Celeron effectively reduced the available size of the Level 2 cache by the size of the Level 1, which resulted in an effective size of 96 KB (128-32) in contrast to the Duron's exclusive design (128+64=192).
Consequently, the Duron inherited the Thunderbird's reduction in sensitivity to L2 cache size, allowing AMD to make their L2 cache higher latency and lower bandwidth to lessen processor complexity and allow better manufacturing yields without incurring a significant performance loss. The net result was that the budget Duron "Spitfire" CPU was roughly only 10% slower than an equivalently clocked (and significantly more expensive) Athlon "Thunderbird".
Compatibility.
The Duron line was pin-compatible and operated on the same motherboards as the Athlon line, requiring only a BIOS update in most cases. The original Duron was introduced with a 100 MHz (effectively 200 MHz) front-side bus the same as the then current Socket A Athlons. Later with the introduction of motherboard chipsets offering higher FSB speeds of 133 MHz (FSB 266) and AMD's matching introduction of Athlon "C" processors supporting this speed, the Duron initially retained the 100 MHz FSB for purposes of market segmentation. Later Durons were given official support for 133 MHz bus operation only after the Athlon XP was used to introduce 166/200 MHz FSB (FSB 333/400) speeds.
Revisions.
The original Duron, using the "Spitfire" core, was manufactured in 2000 and 2001 at speeds ranging from 600 to 950 MHz. It was based on the 180 nm "Thunderbird" Athlon core.
The second-generation Duron, the "Morgan" core, was sold in speed grades between 900 and 1300 MHz, and was based on the 180 nm "Palomino" Athlon XP core. As a result, it featured a few important enhancements, namely full Intel SSE support, enlarged TLBs, hardware data prefetch, and an integrated thermal diode. Like the "Palomino" core, "Morgan" was also expected to reduce heat dissipation; however in "Morgan"'s case this did not happen due to its increased core voltage.
The final generation Duron was called "Applebred", sometimes called "Appalbred", and was based on the "Appaloosa" Duron along with the 130 nm "Thoroughbred" Athlon XP. "Appaloosa" was never officially announced but it did see very limited circulation.
Enthusiasts.
Duron was often a favorite of computer builders looking for performance while on a tight budget. In 2003, the "Applebred" Duron was available in 1.4 GHz, 1.6 GHz and 1.8 GHz forms, all on a 133 MHz (FSB 266) bus by default. Enthusiast groups quickly discovered these Durons to be rebadged "Thoroughbred" A/B cores with some cache disabled (and perhaps defective). With a basic chip configuration modification, it was found that "Applebred" Durons could be turned into "Thoroughbred B" Athlon XPs, with full 256KB cache, with a very high success rate. However, this was only possible for a period of approximately 4 weeks, as shortly after "Applebred" was released, AMD changed the chip configuration method to one that was not changeable.
Features.
See: .


Rocket Lake

Rocket Lake is Intel's codename for its 11th generation Core microprocessors. Released on March 30, 2021, it is based on the new Cypress Cove microarchitecture, a variant of Sunny Cove (used by Intel's Ice Lake mobile processors) backported to Intel's 14 nm process node. Rocket Lake cores contain significantly more transistors than current Skylake-derived Comet Lake cores.
Rocket Lake features the same LGA 1200 socket and 400-series chipset compatibility as Comet Lake, except H410 and B460 chipsets. It is accompanied by new 500-series chipsets as well. Rocket Lake has up to eight cores, down from 10 cores for Comet Lake. It features Intel Xe graphics, and PCIe 4.0 support. Only a single M.2 drive is supported in PCI-E 4.0 mode, all the rest are wired via PCI-E 3.0.
Intel officially launched the Rocket Lake desktop family on March 16, 2021 with sales commencing on March 30. The 11th generation Core i3, as well as Rocket Lake-based Pentium Gold and Celeron CPUs were not included along with the higher-end models; instead, Intel launched refreshed models for Comet Lake Core i3 and Pentium Gold CPUs. These processors have the same characteristics as their original parts, albeit with a 100MHz higher frequency and the last digit of their model numbers changing from zero to five.


Monte Davidoff

Monte Davidoff (; born 1956) is an American computer programmer.
Davidoff is from Glendale, Wisconsin. He graduated from Nicolet High School in 1974, and went on to Harvard College, where he majored in applied mathematics, the department at Harvard that, at the time, included computer science. Davidoff also worked at WHRB, the college radio station, and graduated from Harvard in 1978.
A college dormmate of Bill Gates who had a summer job at Gates's new company Microsoft during college, Davidoff is best known for writing the Microsoft Binary Format floating-point arithmetic routines for Altair BASIC while he was at Harvard. The routines were subsequently reused in Microsoft BASIC products for other systems. He later worked at Honeywell Information Systems on the Multics project, Tandem Computers, Ready Systems, and Stratus Computer. Since 2000 he has consulted through his own company, Alluvial Software.


Montecito (processor)

Montecito is the code-name of a major release of Intel's Itanium 2 Processor Family (IPF), which implements the "Intel Itanium architecture" on a dual-core processor. It was officially launched by Intel on July 18, 2006 as the "Dual-Core Intel Itanium 2 processor". According to Intel, Montecito doubles performance versus the previous, single-core Itanium 2 processor, and reduces power consumption by about 20%. It also adds multi-threading capabilities (two threads per core), a greatly expanded cache subsystem (12 MB per core), and silicon support for virtualization.
Architectural Features and Attributes.
On October 25, 2005 Intel announced that the first dual-core Itanium processor would be delayed until "the middle of next year." Montecito was launched on July 18, 2006. Due to unspecified issues, Intel's Foxton power management technology was disabled in the first release of Montecito, and the front-side bus frequency was reduced to 267 MHz (533.333 MHz effective) instead of the 333 MHz speed originally scheduled for the design [3].
At the time of launch, the following models and pricing were available:
There are no plans for additional Montecito processors; the successor, Montvale was released in late 2007.
Successors.
See Itanium future processors


Berry Linux

Berry Linux is a Live CD Linux distribution that has English and Japanese support. Berry Linux is based on and is compatible with Fedora 20 packages. The distribution is primarily focused on use as a Live CD, but it can also be installed to a live USB drive. Berry Linux can be used to try out and showcase Linux, for educational purposes, or as a rescue system, without the need to make changes to a hard disk. The current version is 1.31 released on .
Features.
Berry includes read/write NTFS support, and AIGLX and Beryl are bundled for 3D desktop effects. Berry also uses bootsplash, giving it a graphical startup.
The full version (v1.12) includes and runs on Linux Kernel 3.0.4. It has the ALSA sound system, ACPI support, and SELinux. Berry Linux features automatic hardware detection, with support for many graphics cards, sound cards, SCSI, USB devices and many other peripherals. Network devices are automatically configured with DHCP.
The full version of Berry Linux uses KDE (Version 4.6.5) while Berry Linux Mini uses the Fluxbox window manager. The full version is 512.7MB, while the mini version is 273.4MB. To test Berry Linux it is not necessary to install the distribution to a hard disk, as the operating system runs entirely from CD-ROM. It is, however, possible to install Berry Linux to a hard disk, which requires 1.7 gigabytes of free space.
Supporting Japanese, Berry includes Whiz, a sharp Kana-Kanji conversion system. It also comes with LibreOffice version 3.4.3, a Microsoft Office compatible office suite, as well as TextMaker/PlanMaker as Berry's office software. The GIMP, version 2.6.10, is bundled for graphics software.
Berry includes the media players Audacious, MPlayer, Xine, and Kaffeine. DVD and DivX codecs are installed by default.
Version history.
Berry Linux's historical releases are as following.
Trivia.
The creator of the distribution is a well known cat lover.


IBM PC Series

The IBM PC Series personal computer was the follow-on to the IBM PS/ValuePoint and IBM Personal System/2. Announced in October 1994 and withdrawn in October 2000, it was replaced by the IBM NetVista, apart from the Pentium Pro-based PC360 and PC365, which were replaced by the IBM IntelliStation.
x86-based.
PC 100.
The PC 100 was a budget model, available only in selected markets.
PC 140.
The PC 140 was a budget model, available only in selected markets.
PC Series 300.
Industry standard ISA/PCI architecture, first IBM machines with USB. Processors ranged from the 486DX2-50, 486SX-25, 486DX4-100 to the Pentium 200 and in case of the Models 360 and 365 the Pentium Pro. 486 models had a selectable bus architecture (SelectaBus) through a replaceable riser-card, offering the choice of either VESA Local Bus/ISA or PCI/ISA.
Within the 300 series the following models appeared:
PC 330.
Its last sub model used the Pentium P54C processor clocked at 100, 133 or 166 MHz. It had, depending on the sub-model, up to 4 ISA and/or 3 PCI expansion slots and four (2 external 5.25", 1 external and 1 internal 3.5") drive bays. It had in its latest version, the 6577, one DIMM-168 and 4 SIMM-72 memory slots, and featured an IBM SurePath BIOS. This PC has 2 USB 1.0 slots in the back. The latest operating system which can be installed on this PC is Windows 2000 or Windows ME; Windows XP can also be installed, but performance drops to unusable levels.
The DIMM-168 memory slot takes 5V EDO DRAM and is incompatible with the more commonly used 3.3V SDRAM. The slot looks the same at first glance, but the keying is different. Trying to force a 3.3V SDRAM module into the slot could damage both it and the memory module.
Submodels were:
PC 340.
The PC 340, introduced in 1996, was a budget model. It used the Pentium processor clocked at 100, 133 or 166 MHz. It had 4 ISA and 3 PCI expansion slots and four (2 external 5.25 inch, 1 external and 1 internal 3.5 inch) drive bays. It had 4 SIMM-72 RAM slots, and featured an IBM SurePath BIOS.
The submodels were:
PC 350.
The PC 350, introduced over 1994 to 1995, was a middle-class model, having the same motherboard as the PC 330 in a much roomier case with additional drive bays. Processors ranged from the 486DX2-50, 486SX-25, 486DX4-100 to the Pentium 200. It had, depending on the sub-model up to 5 ISA and/or 3 PCI expansion slots and five (2 external 5.25", 1 external and 1 internal 3.5") drive bays. Like its smaller cousin, in its latest version it had 1 DIMM-168 and 4 SIMM-72 RAM slots, and featured an IBM SurePath BIOS.
Submodels were:
PC 360.
The PC 360 was an ISA/PCI-based system with six expansion slots that uses the Pentium Pro CPU clocked at 150 or 200 MHz. It is packaged in a mini-tower with six drive bays. It had 4 SIMM-72 slots for a total of up to 128 Mb of memory, and featured an IBM SurePath BIOS.
The submodels were:
PC 365.
The PC 365 is an ISA/PCI-based multiprocessor system with five expansion slots. It supports dual Pentium Pro processors clocked at 180 or 200 MHz. The case has five drive bays and either two ISA or PCI slots, plus an additional three of which are shared ISA/PCI slots. It had 4 DIMM-168 slots for a total of up to 512 MB of memory, and featured an IBM SurePath BIOS.
The submodels were:
PC Series 700.
These systems used the Intel Pentium processor with clock frequencies of 75, 90, 100, 133 and 166 MHz. Initial systems had selectable bus architecture (SelectaBus) through a replaceable riser-card. Options were either PCI/ISA or PCI/MCA. The ISA or MCA bus would be connected to the PCI bus using a PCI to ISA/MCA bridge. The advantage of this is that even operating systems without MCA support worked on the system, as long as the MCA portion was not required.
Two form-factors were available, the 3x3 (3 slot, 3 bay) PC 730 and the larger 5x5 (5 slot, 5 bay) PC 750.
PC Series 3000.
This series was introduced in April 1996 in Canada only. It has a Pentium processor clocked at speeds ranging from 100 to 166 MHz and was shipped with a Mwave modem/sound card.
PC 300PL.
The 300PL used three models of processors during its lifetime, the Pentium MMX, Pentium II and Pentium III. Models using the Pentium MMX came in speeds of 166, 200 and 233 MHz; models using the Pentium II came in speeds of 266, 300, 333, 350, 400 or 450 MHz; and models using the Pentium III came in speeds of 450, 500, 533, 550, 600, 667, 733, 800 or 866 MHz.
The 300PL usually shipped with a hard drive with a capacity ranging from 2 GB to 20 GB, a CD-ROM drive, and a floppy drive. In some models, an IBM EtherJet 10/100 Ethernet network adapter is also included. The IBM 300PL came either in a tower or a desktop form-factor.
Four different types of form-factors exist:
PC 300GL.
The PC 300GL used the Celeron, Pentium I, Pentium II and Pentium III throughout its lifetime. Celeron-based models had processors clocked at 333, 366, 433, 466, 500 or 533 MHz; Pentium I models had processors clocked at 133, or 166 MHz; Pentium II-based models had processors clocked at 350, 400, 450 MHz; and Pentium III-based models had processors clocked at 450, 500, 533, 550, 600, 667, 733, 800 or 866 MHz.
These systems were packaged in two case form-factors, desktop and micro-tower. There were two variants of the desktop case, one with two expansion slots and one with four. Both variants had four drive bays. The micro-tower case had four expansion slots and four drive bays.
PC 300XL.
The PC 300XL uses the Pentium MMX clocked at 233 or 266 MHz, or the Pentium II clocked at 233, 266 or 300 MHz. It features integrated 10/100 Ethernet.
PC Power Series.
This is the PC counterpart of the RS/6000
Two form-factors were available, the 3x3 (3 slot, 3 bay) PC830 and the larger 5x5 (5 slot, 5 bay) PC850.


RAMDISK