DisplayID

DisplayID is a VESA standard for metadata describing display device capabilities to the video source. It is designed to replace E-EDID standard and EDID structure v1.4.
The DisplayID standard was initially released in December 2007. Version 1.1 was released in March 2009 and was followed by version 1.2 released in August 2011. Version 1.3 was released in June 2013 and current version 2.0 was released in September 2017.
DisplayID uses variable-length structures of up to 256 bytes each, which encompass all existing EDID extensions as well as new extensions for 3D displays, embedded displays, Wide Color Gamut and HDR EOTF. DisplayID format includes several blocks which describe logical parts of the display such as video interfaces, display device technology, timing details and manufacturer information. Data blocks are identified with a unique tag. The length of each block can be variable or fixed to a specific number of bytes. Only the base data block is mandatory, while all extension blocks are optional. This variable structure is based on CEA EDID Extension Block Version 3 first defined in CEA-861-B.
The DisplayID standard is freely available and is royalty-free to implement.
DisplayID 2.0 structures.
Version 2.0 introduces new generalized information blocks primarily intended for UltraHD High Dynamic Range (HDR) displays, such as LCD computer monitors and LCD/OLED televisions with native support for BT.2100 color space and PQ/HLG transfer functions. It also makes optional predefined CRT/LCD timings from DMT and CEA-861 standards, switching to formula-based structures which follow VESA CVT-RB and GTF.
The base DisplayID 2.0 variable-length structure is the same for all data blocks:
Each data block starts with mandatory block tag, revision number (0-7), and payload length (0-248) bytes, and has a variable length of up to 251 bytes. The following blocks are currently defined:
0x20 Product identification.
codice_1 Product identification block contains standard vendor and product IDs, serial number, date of manufacture and product name.
Comparing to legacy block codice_2, Microsoft ISA Plug&Play identifier is replaced with IEEE OUI, first used in the network MAC address.
0x21 Display Parameters.
codice_3 Display parameters block contains basic parameters such as viewable area size and pixel count, supported color depth, and factory calibrated RGB color space, white point, luminance, and gamma transfer function.
Comparing to legacy block codice_4, color calibration values have been moved here from block codice_5 and max/min luminance values have been added. Display size can be specified in 1 mm increments in addition to default 0.1 mm.
0x22 Type VII Detailed timings.
codice_6 Detailed timing block Type VII defines CTA-861 compatible timings based on pixel rate. This block is based on Type VI block codice_7.
0x23 Type VIII Enumerated timing code.
codice_8 Type VIII enumerated timing code block is based on Type IV DMT ID block codice_9. It provides one-byte or two-byte video mode codes as defined in VESA Display Monitor Timings standard or Video Information Codes defined by CTA-861 and HDMI.
0x24 Type IX formula-based timings.
codice_10 Type IX formula-based timings block is based on Type V short timings block codice_11.
0x25 Dynamic video timing range.
codice_12 Dynamic video timing range block is based on block codice_13 Video Timing Range Limits; the new version allows more precise definition of pixel rate in 1 kHz steps and adds indication for variable refresh rates.
0x26 Display interface features.
codice_14 Display interface features block describes color depth, dynamic range and transfer function supported by the display controller. It is based on blocks codice_15 Display Interface Features and codice_5 Color Characteristics.
0x27 Stereo display interface.
codice_17 Stereo display interface block is based on block codice_18and describes stereoscopic 3D/VR modes (i.e. timings codes and stereo frame formats) supported by the display.
0x28 Tiled display topology.
codice_19 Tiled display topology block describes displays that consist of multiple physical display panels, each driven by a separate video interface. It is based on block codice_20.
0x29 Container ID.
codice_21 Container ID block defines a unique identifier used to associate additional devices that may be present in a multifunctional display.
0x7E Vendor-specific data.
codice_22 Vendor-specific data includes proprietary parameters which are not supported by DisplayID 2.0 structures.
0x81 CTA DisplayID.
codice_23 CTA DisplayID block provides information on CTA-861 EDID timings.
DisplayID 1.3 structures.
Version 1.3 information blocks 0x10-0x1F borrow heavily from EDID 1.4 standard, which was designed for previous generation CRT/LCD/DLP/PDP displays.
The following block types are defined:
Note: where indicated, only the difference from similar/superseding structures in Version 2.0 are shown in the sections below.
0x00 Product identification.
codice_2 Product identification - superseded by codice_1. The difference is:
0x01 Display parameters.
codice_4 Display parameters - superseded by codice_3. The differences are:
0x02 Color characteristics.
codice_5 Color characteristics - superseded by codice_3 Display parameters.
0x03 Type I Detailed Timings.
codice_30 Type I Detailed Timings - superseded by codice_6 Type VII Detailed Timings. The differences are:
0x04 Type II Detailed timings.
codice_32 Type II Detailed timings block provides a compressed structure with less precise pixel coordinates and reduced blank intervals comparing to Type I:
0x05 Type III Short timings.
codice_33 Type III Short timings block provides a very short compressed structure which uses formula-based CVT timings.
0x06 Type IV Short timings.
codice_9 Type IV Short Timing (DMT ID Code) block uses video mode codes defined in VESA Display Monitor Timings standard, as well as Video Information Codes defined by CTA-861 and HDMI. Superseded by codice_8 Enumerated Timing.
0x11 Type V Short timings.
codice_11 Type V Short timings block is based on Type III short timings block 0x05, but provides greater pixel precision and only supports CVT-RB. Superseded by codice_10 Type IX Formula-based timings.
0x13 Type VI Detailed Timing.
codice_7 Type VI Detailed Timing block supports higher precision pixel clock and high-resolution timings. This block is based on Type I block 0x03, but allows greater timings precision using 1 kHz steps instead of 10 kHz. Superseded by codice_6 Type VII Detailed Timings.
0x09 Video timing range limits.
codice_40 Video timing range limits block describes displays capable of variable timings. Superseded by codice_12 Dynamic video timings range.
0x0C Display device data.
codice_42 Display device data block provides information about display panel characteristics for embedded applications, such as display technology, panel type, and pixel response times.
0x0F Display interface data.
Display interface features block - superseded by codice_14 Display Interface Features.
Additional blocks.
Data blocks not described above are:
codice_44 Serial Number Data block provides product serial number as an ASCII string.
codice_45 General Purpose ASCII String block provides general purpose text strings that may be required by specific applications.
codice_46 Interface Power Sequencing block defines display interface signal timings required for entering and exiting sleep mode.
codice_47 Transfer Characteristics block defines detailed gamma curves according to VESA Display Transfer Characteristic Data Block (DTCDB) standard, as may be required by Byte 1 in codice_5 Color characteristics block.
codice_18 Stereo Display Interface block describes stereoscopic 3D/VR modes - superseded by codice_17 Stereo display interface.
codice_20 Tiled Display Topology data block defines multi-panel displays - superseded by codice_19 Tiled Display Topology.
codice_53 Vendor specific block defines proprietary vendor data.