ARM Cortex-A9

The ARM Cortex-A9 SR1 is a 32-bit multi-coreprocessor that provides up to 4 cache-coherent cores, each implementing the ARM v7 architecture instruction set.
Viva SR.
Key features of the Cortex-A9 core are:
ARM states that the TSMC 40G hard macro implementation typically operates at 2 GHz; a single core (excluding caches) occupies less than 1.5 mm2 when designed in a TSMC 65 nanometer (nm) generic process and can be clocked at speeds over 1 GHz, consuming less than 250 mW per core.
Chips.
Several system on a chip (SoC) devices implement the Cortex-A9 core, including: