/* Copyright 2015 The Chromium OS Authors. All rights reserved.
 * Use of this source code is governed by a BSD-style license that can be
 * found in the LICENSE file.
 */

/* Memory mapping */
#define CONFIG_FLASH_SIZE (64 * 1024)
#define CONFIG_FLASH_BANK_SIZE  0x1000
#define CONFIG_FLASH_ERASE_SIZE 0x0400  /* erase bank size */
#define CONFIG_FLASH_WRITE_SIZE 0x0002  /* minimum write size */

/* No page mode on STM32F, so no benefit to larger write sizes */
#define CONFIG_FLASH_WRITE_IDEAL_SIZE 0x0002

#define CONFIG_RAM_BASE         0x20000000
#define CONFIG_RAM_SIZE         0x00002000

/* Number of IRQ vectors on the NVIC */
#define CONFIG_IRQ_COUNT 32

/* Reduced history because of limited RAM */
#undef CONFIG_CONSOLE_HISTORY
#define CONFIG_CONSOLE_HISTORY 3

/* Copyright 2015 The Chromium OS Authors. All rights reserved.
 * Use of this source code is governed by a BSD-style license that can be
 * found in the LICENSE file.
 */

/* Memory mapping */
#define CONFIG_FLASH_SIZE (64 * 1024)
#define CONFIG_FLASH_BANK_SIZE  0x1000
#define CONFIG_FLASH_ERASE_SIZE 0x0800  /* erase bank size */
#define CONFIG_FLASH_WRITE_SIZE 0x0002  /* minimum write size */

/* No page mode on STM32F, so no benefit to larger write sizes */
#define CONFIG_FLASH_WRITE_IDEAL_SIZE 0x0002

#define CONFIG_RAM_BASE         0x20000000
#define CONFIG_RAM_SIZE         0x00002000

/* Number of IRQ vectors on the NVIC */
#define CONFIG_IRQ_COUNT 32

/* Reduced history because of limited RAM */
#undef CONFIG_CONSOLE_HISTORY
#define CONFIG_CONSOLE_HISTORY 3

--- 
+++ 
@@ -6,7 +6,7 @@
 /* Memory mapping */
 #define CONFIG_FLASH_SIZE (64 * 1024)
 #define CONFIG_FLASH_BANK_SIZE  0x1000
-#define CONFIG_FLASH_ERASE_SIZE 0x0800  /* erase bank size */
+#define CONFIG_FLASH_ERASE_SIZE 0x0400  /* erase bank size */
 #define CONFIG_FLASH_WRITE_SIZE 0x0002  /* minimum write size */
 
 /* No page mode on STM32F, so no benefit to larger write sizes */
stm32f05x: Use correct erase block size of 1kB

Change erase block size to the correct 1kB.

BUG=chrome-os-partner:41959
BRANCH=none
TEST=with following CL, test software sync to PD MCU on
glados.

Change-Id: I6252e6344e50f00249ab105a90febd15599c936f
Signed-off-by: Alec Berg <1a4429eeda29095a12e19a73405f80f5b7f37a63@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/307042
Reviewed-by: Vincent Palatin <70a9964ec8fd10b0b08fcc8623c2add25ddf99ac@chromium.org>
