Create a schematic for A logic gate circuit 

libSymbols:
- AND_2_1
- AND_2_2
- Connector:TestPoint
- DMG_CPU_Cells:AND_2
- DMG_CPU_Cells:AND_3
- DMG_CPU_Cells:AND_4
- DMG_CPU_Cells:AO_1
- DMG_CPU_Cells:AO_2
- DMG_CPU_Cells:AO_3
- DMG_CPU_Cells:AO_4
- DMG_CPU_Cells:AO_6
- DMG_CPU_Cells:DFFR_A
- DMG_CPU_Cells:DFFR_B
- DMG_CPU_Cells:DFFR_B2
- DMG_CPU_Cells:DFFSR
- DMG_CPU_Cells:DR_LATCH
- DMG_CPU_Cells:D_LATCH_A
- DMG_CPU_Cells:D_LATCH_A2
- DMG_CPU_Cells:D_LATCH_B
- DMG_CPU_Cells:HALF_ADD
- DMG_CPU_Cells:IBUF_A
- DMG_CPU_Cells:IBUF_B
- DMG_CPU_Cells:INVERTER_A
- DMG_CPU_Cells:INVERTER_B
- DMG_CPU_Cells:INVERTER_C
- DMG_CPU_Cells:INVERTER_D
- DMG_CPU_Cells:INVERTER_E
- DMG_CPU_Cells:IOBUF_A
- DMG_CPU_Cells:IOBUF_B
- DMG_CPU_Cells:IOBUF_C
- DMG_CPU_Cells:MUX
- DMG_CPU_Cells:MUXI
- DMG_CPU_Cells:NAND_2
- DMG_CPU_Cells:NAND_3
- DMG_CPU_Cells:NAND_4
- DMG_CPU_Cells:NAND_5
- DMG_CPU_Cells:NAND_6
- DMG_CPU_Cells:NAND_7
- DMG_CPU_Cells:NMOS
- DMG_CPU_Cells:NOR_2
- DMG_CPU_Cells:NOR_3
- DMG_CPU_Cells:NOR_4
- DMG_CPU_Cells:NOR_5
- DMG_CPU_Cells:NOR_6
- DMG_CPU_Cells:NOR_8
- DMG_CPU_Cells:OA
- DMG_CPU_Cells:OAI
- DMG_CPU_Cells:OBUF_A
- DMG_CPU_Cells:OBUF_B
- DMG_CPU_Cells:OR_2
- DMG_CPU_Cells:OR_3
- DMG_CPU_Cells:OR_4
- DMG_CPU_Cells:OSC
- DMG_CPU_Cells:PMOS
- DMG_CPU_Cells:TFFD
- DMG_CPU_Cells:TRI_BUF_IF0
- DMG_CPU_Cells:TRI_INV_IF0
- DMG_CPU_Cells:TRI_INV_IF1
- DMG_CPU_Cells:XNOR
- DMG_CPU_Cells:XOR
- Device:C
- Device:D
- Device:R
- NAND_2_1
- NAND_2_2
- NAND_2_3
- NMOS_1
- NMOS_10
- NMOS_11
- NMOS_12
- NMOS_13
- NMOS_14
- NMOS_15
- NMOS_16
- NMOS_17
- NMOS_18
- NMOS_19
- NMOS_2
- NMOS_20
- NMOS_21
- NMOS_22
- NMOS_23
- NMOS_24
- NMOS_25
- NMOS_26
- NMOS_27
- NMOS_28
- NMOS_29
- NMOS_3
- NMOS_30
- NMOS_31
- NMOS_32
- NMOS_33
- NMOS_34
- NMOS_35
- NMOS_4
- NMOS_5
- NMOS_6
- NMOS_7
- NMOS_8
- NMOS_9
- NOR_2_1
- NOR_2_2
- NOR_2_3
- PMOS_1
- R_1
- R_2
- power:GND
- power:VDD
schematicSymbols:
- libraryNickname: DMG_CPU_Cells
  entryName: NMOS
  position:
    x: 770.89
    y: 474.98
    angle: 0
  properties:
  - key: Reference
    value: N1
    position:
      x: 775.335
      y: 473.71
      angle: 0
  - key: Value
    value: NMOS
    position:
      x: 775.335
      y: 476.25
      angle: 0
- libraryNickname: power
  entryName: VDD
  position:
    x: 125.73
    y: 434.34
    angle: 0
  properties:
  - key: Reference
    value: '#PWR?'
    position:
      x: 125.73
      y: 438.15
      angle: 0
  - key: Value
    value: VDD
    position:
      x: 125.73
      y: 430.53
      angle: 0
- libraryNickname: Connector
  entryName: TestPoint
  position:
    x: 924.56
    y: 415.29
    angle: 0
  properties:
  - key: Reference
    value: TP?
    position:
      x: 924.56
      y: 408.432
      angle: 0
  - key: Value
    value: XI
    position:
      x: 924.56
      y: 410.21
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: NMOS
  position:
    x: 74.93
    y: 651.51
    angle: 0
  properties:
  - key: Reference
    value: N15
    position:
      x: 79.375
      y: 652.78
      angle: 0
  - key: Value
    value: NMOS
    position:
      x: 79.375
      y: 650.24
      angle: 0
- libraryNickname: power
  entryName: VDD
  position:
    x: 836.93
    y: 267.97
    angle: 0
  properties:
  - key: Reference
    value: '#PWR?'
    position:
      x: 836.93
      y: 271.78
      angle: 0
  - key: Value
    value: VDD
    position:
      x: 836.93
      y: 264.16
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: PMOS
  position:
    x: 88.9
    y: 720.09
    angle: 0
  properties:
  - key: Reference
    value: P5
    position:
      x: 93.345
      y: 721.36
      angle: 0
  - key: Value
    value: PMOS
    position:
      x: 93.345
      y: 718.82
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: PMOS
  position:
    x: 704.85
    y: 717.55
    angle: 0
  properties:
  - key: Reference
    value: P19
    position:
      x: 709.295
      y: 718.82
      angle: 0
  - key: Value
    value: PMOS
    position:
      x: 709.295
      y: 716.28
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: NMOS
  position:
    x: 551.18
    y: 727.71
    angle: 0
  properties:
  - key: Reference
    value: N24
    position:
      x: 555.625
      y: 726.44
      angle: 0
  - key: Value
    value: NMOS
    position:
      x: 555.625
      y: 728.98
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: PMOS
  position:
    x: 816.61
    y: 287.02
    angle: 0
  properties:
  - key: Reference
    value: P2
    position:
      x: 821.055
      y: 288.29
      angle: 0
  - key: Value
    value: PMOS
    position:
      x: 821.055
      y: 285.75
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: PMOS
  position:
    x: 704.85
    y: 699.135
    angle: 0
  properties:
  - key: Reference
    value: P18
    position:
      x: 709.295
      y: 700.405
      angle: 0
  - key: Value
    value: PMOS
    position:
      x: 709.295
      y: 697.865
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: PMOS
  position:
    x: 703.58
    y: 646.43
    angle: 0
  properties:
  - key: Reference
    value: P4
    position:
      x: 708.025
      y: 647.7
      angle: 0
  - key: Value
    value: PMOS
    position:
      x: 708.025
      y: 645.16
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: PMOS
  position:
    x: 521.97
    y: 31.75
    angle: 0
  properties:
  - key: Reference
    value: P2
    position:
      x: 526.415
      y: 33.02
      angle: 0
  - key: Value
    value: PMOS
    position:
      x: 526.415
      y: 30.48
      angle: 0
- libraryNickname: power
  entryName: GND
  position:
    x: 867.41
    y: 775.335
    angle: 0
  properties:
  - key: Reference
    value: '#PWR053'
    position:
      x: 867.41
      y: 781.685
      angle: 0
  - key: Value
    value: GND
    position:
      x: 867.41
      y: 779.145
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: PMOS
  position:
    x: 143.51
    y: 31.75
    angle: 0
  properties:
  - key: Reference
    value: P1
    position:
      x: 147.955
      y: 33.02
      angle: 0
  - key: Value
    value: PMOS
    position:
      x: 147.955
      y: 30.48
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: PMOS
  position:
    x: 538.48
    y: 147.32
    angle: 0
  properties:
  - key: Reference
    value: P3
    position:
      x: 542.925
      y: 148.59
      angle: 0
  - key: Value
    value: PMOS
    position:
      x: 542.925
      y: 146.05
      angle: 0
- libraryNickname: power
  entryName: GND
  position:
    x: 553.72
    y: 922.655
    angle: 0
  properties:
  - key: Reference
    value: '#PWR0129'
    position:
      x: 553.72
      y: 929.005
      angle: 0
  - key: Value
    value: GND
    position:
      x: 553.72
      y: 926.465
      angle: 0
- libraryNickname: Device
  entryName: R
  position:
    x: 1028.7
    y: 488.315
    angle: 90
  properties:
  - key: Reference
    value: R1
    position:
      x: 1028.7
      y: 486.283
      angle: 90
  - key: Value
    value: '~'
    position:
      x: 1028.7
      y: 488.315
      angle: 90
- libraryNickname: DMG_CPU_Cells
  entryName: PMOS
  position:
    x: 864.87
    y: 410.21
    angle: 0
  properties:
  - key: Reference
    value: P1
    position:
      x: 869.315
      y: 411.48
      angle: 0
  - key: Value
    value: PMOS
    position:
      x: 869.315
      y: 408.94
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: NMOS
  position:
    x: 699.77
    y: 364.49
    angle: 0
  properties:
  - key: Reference
    value: N1
    position:
      x: 704.215
      y: 363.22
      angle: 0
  - key: Value
    value: NMOS
    position:
      x: 704.215
      y: 365.76
      angle: 0
- libraryNickname: Connector
  entryName: TestPoint
  position:
    x: 797.56
    y: 467.36
    angle: 0
  properties:
  - key: Reference
    value: TP?
    position:
      x: 797.56
      y: 460.502
      angle: 0
  - key: Value
    value: Bonding Pad
    position:
      x: 797.56
      y: 462.28
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: NMOS
  position:
    x: 614.68
    y: 421.64
    angle: 0
  properties:
  - key: Reference
    value: N3
    position:
      x: 619.125
      y: 420.37
      angle: 0
  - key: Value
    value: NMOS
    position:
      x: 619.125
      y: 422.91
      angle: 0
- libraryNickname: power
  entryName: GND
  position:
    x: 378.46
    y: 687.07
    angle: 0
  properties:
  - key: Reference
    value: '#PWR?'
    position:
      x: 378.46
      y: 693.42
      angle: 0
  - key: Value
    value: GND
    position:
      x: 378.46
      y: 690.88
      angle: 0
- libraryNickname: power
  entryName: GND
  position:
    x: 416.56
    y: 687.07
    angle: 0
  properties:
  - key: Reference
    value: '#PWR?'
    position:
      x: 416.56
      y: 693.42
      angle: 0
  - key: Value
    value: GND
    position:
      x: 416.56
      y: 690.88
      angle: 0
- libraryNickname: power
  entryName: VDD
  position:
    x: 996.95
    y: 554.99
    angle: 0
  properties:
  - key: Reference
    value: '#PWR071'
    position:
      x: 996.95
      y: 558.8
      angle: 0
  - key: Value
    value: VDD
    position:
      x: 996.95
      y: 551.18
      angle: 0
- libraryNickname: power
  entryName: GND
  position:
    x: 990.6
    y: 381
    angle: 0
  properties:
  - key: Reference
    value: '#PWR?'
    position:
      x: 990.6
      y: 387.35
      angle: 0
  - key: Value
    value: GND
    position:
      x: 990.6
      y: 384.81
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: PMOS
  position:
    x: 354.33
    y: 31.75
    angle: 0
  properties:
  - key: Reference
    value: P1
    position:
      x: 358.775
      y: 33.02
      angle: 0
  - key: Value
    value: PMOS
    position:
      x: 358.775
      y: 30.48
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: PMOS
  position:
    x: 868.68
    y: 558.8
    angle: 270
  properties:
  - key: Reference
    value: P5
    position:
      x: 871.22
      y: 555.625
      angle: 90
  - key: Value
    value: PMOS
    position:
      x: 867.41
      y: 563.245
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: NMOS
  position:
    x: 1153.16
    y: 374.65
    angle: 0
  properties:
  - key: Reference
    value: N2
    position:
      x: 1157.605
      y: 373.38
      angle: 0
  - key: Value
    value: NMOS
    position:
      x: 1157.605
      y: 375.92
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: PMOS
  position:
    x: 651.51
    y: 646.43
    angle: 0
  properties:
  - key: Reference
    value: P3
    position:
      x: 655.955
      y: 647.7
      angle: 0
  - key: Value
    value: PMOS
    position:
      x: 655.955
      y: 645.16
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: PMOS
  position:
    x: 397.51
    y: 723.9
    angle: 0
  properties:
  - key: Reference
    value: P17
    position:
      x: 401.955
      y: 725.17
      angle: 0
  - key: Value
    value: PMOS
    position:
      x: 401.955
      y: 722.63
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: NMOS
  position:
    x: 175.26
    y: 93.98
    angle: 0
  properties:
  - key: Reference
    value: N2
    position:
      x: 179.705
      y: 92.71
      angle: 0
  - key: Value
    value: NMOS
    position:
      x: 179.705
      y: 95.25
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: PMOS
  position:
    x: 1121.41
    y: 87.63
    angle: 0
  properties:
  - key: Reference
    value: P9
    position:
      x: 1125.855
      y: 88.9
      angle: 0
  - key: Value
    value: PMOS
    position:
      x: 1125.855
      y: 86.36
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: MUX
  position:
    x: 1115.06
    y: 797.56
    angle: 0
  properties:
  - key: Reference
    value: U?
    position:
      x: 1115.06
      y: 804.545
      angle: 0
  - key: Value
    value: MUX
    position:
      x: 1115.06
      y: 807.085
      angle: 0
- libraryNickname: Device
  entryName: R
  position:
    x: 341.63
    y: 721.36
    angle: 0
  properties:
  - key: Reference
    value: R1
    position:
      x: 343.662
      y: 721.36
      angle: 90
  - key: Value
    value: R
    position:
      x: 341.63
      y: 721.36
      angle: 90
- libraryNickname: power
  entryName: VDD
  position:
    x: 499.11
    y: 419.1
    angle: 0
  properties:
  - key: Reference
    value: '#PWR?'
    position:
      x: 499.11
      y: 422.91
      angle: 0
  - key: Value
    value: VDD
    position:
      x: 499.11
      y: 415.29
      angle: 0
- libraryNickname: power
  entryName: VDD
  position:
    x: 580.39
    y: 580.39
    angle: 0
  properties:
  - key: Reference
    value: '#PWR?'
    position:
      x: 580.39
      y: 584.2
      angle: 0
  - key: Value
    value: VDD
    position:
      x: 580.39
      y: 576.58
      angle: 0
- libraryNickname: power
  entryName: VDD
  position:
    x: 459.74
    y: 419.1
    angle: 0
  properties:
  - key: Reference
    value: '#PWR?'
    position:
      x: 459.74
      y: 422.91
      angle: 0
  - key: Value
    value: VDD
    position:
      x: 459.74
      y: 415.29
      angle: 0
- libraryNickname: Device
  entryName: D
  position:
    x: 1043.305
    y: 483.235
    angle: 270
  properties:
  - key: Reference
    value: D5
    position:
      x: 1045.845
      y: 483.235
      angle: 0
  - key: Value
    value: D
    position:
      x: 1040.765
      y: 483.235
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: NMOS
  position:
    x: 74.93
    y: 577.215
    angle: 0
  properties:
  - key: Reference
    value: N3
    position:
      x: 79.375
      y: 578.485
      angle: 0
  - key: Value
    value: NMOS
    position:
      x: 79.375
      y: 575.945
      angle: 0
- libraryNickname: power
  entryName: VDD
  position:
    x: 267.97
    y: 107.95
    angle: 0
  properties:
  - key: Reference
    value: '#PWR?'
    position:
      x: 267.97
      y: 111.76
      angle: 0
  - key: Value
    value: VDD
    position:
      x: 267.97
      y: 104.14
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: D_LATCH_A
  position:
    x: 219.71
    y: 436.88
    angle: 0
  properties:
  - key: Reference
    value: U?
    position:
      x: 219.71
      y: 431.165
      angle: 0
  - key: Value
    value: D_LATCH_A
    position:
      x: 219.71
      y: 442.595
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: NMOS
  position:
    x: 107.315
    y: 857.885
    angle: 0
  properties:
  - key: Reference
    value: N3
    position:
      x: 111.76
      y: 856.615
      angle: 0
  - key: Value
    value: NMOS
    position:
      x: 111.76
      y: 859.155
      angle: 0
- libraryNickname: power
  entryName: VDD
  position:
    x: 694.69
    y: 212.09
    angle: 0
  properties:
  - key: Reference
    value: '#PWR?'
    position:
      x: 694.69
      y: 215.9
      angle: 0
  - key: Value
    value: VDD
    position:
      x: 694.69
      y: 208.28
      angle: 0
- libraryNickname: power
  entryName: VDD
  position:
    x: 1074.42
    y: 407.035
    angle: 0
  properties:
  - key: Reference
    value: '#PWR07'
    position:
      x: 1074.42
      y: 410.845
      angle: 0
  - key: Value
    value: VDD
    position:
      x: 1074.42
      y: 403.225
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: NMOS
  position:
    x: 815.975
    y: 581.66
    angle: 0
  properties:
  - key: Reference
    value: N2
    position:
      x: 820.42
      y: 580.39
      angle: 0
  - key: Value
    value: NMOS
    position:
      x: 820.42
      y: 582.93
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: PMOS
  position:
    x: 283.21
    y: 31.75
    angle: 0
  properties:
  - key: Reference
    value: P2
    position:
      x: 287.655
      y: 33.02
      angle: 0
  - key: Value
    value: PMOS
    position:
      x: 287.655
      y: 30.48
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: NMOS
  position:
    x: 256.54
    y: 450.85
    angle: 270
  properties:
  - key: Reference
    value: N1
    position:
      x: 259.08
      y: 453.39
      angle: 90
  - key: Value
    value: NMOS
    position:
      x: 255.27
      y: 446.405
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: PMOS
  position:
    x: 948.69
    y: 361.95
    angle: 0
  properties:
  - key: Reference
    value: P1
    position:
      x: 953.135
      y: 363.22
      angle: 0
  - key: Value
    value: PMOS
    position:
      x: 953.135
      y: 360.68
      angle: 0
- libraryNickname: power
  entryName: VDD
  position:
    x: 570.23
    y: 621.03
    angle: 0
  properties:
  - key: Reference
    value: '#PWR?'
    position:
      x: 570.23
      y: 624.84
      angle: 0
  - key: Value
    value: VDD
    position:
      x: 570.23
      y: 617.22
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: PMOS
  position:
    x: 590.55
    y: 627.38
    angle: 180
  properties:
  - key: Reference
    value: P3
    position:
      x: 586.105
      y: 628.65
      angle: 0
  - key: Value
    value: PMOS
    position:
      x: 586.105
      y: 626.11
      angle: 0
- libraryNickname: DMG_CPU_Cells
  entryName: NOR_8
  position:
    x: 289.56
    y: 213.36
    angle: 0
  properties:
  - key: Reference
    value: U?
    position:
      x: 289.56
      y: 203.2
      angle: 0
  - key: Value
    value: NOR_8
    position:
      x: 289.56
      y: 223.52
      angle: 0
- libraryNickname: power
  entryName: GND
  position:
    x: 162.56
    y: 52.07
    angle: 0
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