Create a schematic for Logic level translator circuit. 

libSymbols:
- Logic_LevelTranslator:SN74AUP1T34DCK
schematicSymbols:
- libraryNickname: Logic_LevelTranslator
  entryName: SN74AUP1T34DCK
  position:
    x: 136.525
    y: 71.755
    angle: 180
  properties:
  - key: Reference
    value: U14
    position:
      x: 132.715
      y: 69.215
      angle: 0
  - key: Value
    value: SN74LVC1G126DBVR
    position:
      x: 136.525
      y: 61.595
      angle: 0
- libraryNickname: Logic_LevelTranslator
  entryName: SN74AUP1T34DCK
  position:
    x: 136.525
    y: 135.255
    angle: 180
  properties:
  - key: Reference
    value: U15
    position:
      x: 132.715
      y: 132.715
      angle: 0
  - key: Value
    value: SN74LVC1G126DBVR
    position:
      x: 136.525
      y: 125.095
      angle: 0
junctions: []
noConnects: []
busEntries: []
graphicalItems:
- type: wire
  points:
  - x: 136.525
    y: 50.165
  - x: 136.525
    y: 64.135
- type: wire
  points:
  - x: 139.065
    y: 79.375
  - x: 139.065
    y: 87.63
- type: wire
  points:
  - x: 139.065
    y: 142.875
  - x: 139.065
    y: 151.13
- type: wire
  points:
  - x: 118.745
    y: 71.755
  - x: 126.365
    y: 71.755
- type: wire
  points:
  - x: 133.985
    y: 142.875
  - x: 133.985
    y: 151.13
- type: wire
  points:
  - x: 133.985
    y: 79.375
  - x: 133.985
    y: 87.63
- type: wire
  points:
  - x: 136.525
    y: 113.665
  - x: 136.525
    y: 127.635
- type: wire
  points:
  - x: 118.745
    y: 135.255
  - x: 126.365
    y: 135.255
- type: wire
  points:
  - x: 146.685
    y: 71.755
  - x: 156.845
    y: 71.755
- type: wire
  points:
  - x: 146.685
    y: 135.255
  - x: 156.845
    y: 135.255
globalLabels: []
sheetInstances: []
