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Carpe Diem Traveling: July 2012
In September 2008, my husband and I went to a popular tourist spot, Galena, Illinois. Galena is located in the northwestern corner of Illinois. It can take anywhere from 3 to 3 1/2 hours to get from Chicago to Galena depending on traffic conditions. Galena is comprised of a main street with many shops and restaurants but also boasts Galena Cellars Vineyard & Winery and Ulysses S. Grant's home. Even though many people might only think of visiting Galena during the warm months, it does have year-round activities that include the "Wine Lovers Weekend" in March and the "Nouveau Wine Festival" in November.
All different types of accommodations can be found in Galena. Hotels go from $75 a night at the Ramada Hotel to $200+ a night at the Eagle Ridge Resort & Spa. Galena also offers interesting bed and breakfasts and even some vacation rentals. We stayed at the Ramada and it fit our needs just fine.
Just recently a friend of mine did an overnight trip to Galena and Dubuque, Iowa. Dubuque is about 16 miles from Galena and is situated along the Mississippi River. My friend said that she did some great hiking there and got some great views of the Mississippi River. Dubuque also has 2 ski resorts that I'm interested in checking out one winter weekend in the future.
This is probably my favorite photo of Galena. We were up by Grant's home when I took this picture. It overlooks the main street area.
The photo above is of the vineyards of Galena Cellars Winery. They offer tours and wine tastings. At the time when we went, tastings were only $3 for 6 different wine samples. They had a large enough variety of wines that even the pickiest wine drinker would be satisfied.
I will end this post with a nice "Mid-West" photo. This is America's Heartland.
Earlier this year I was lucky enough to be able to visit the Galapagos Islands, Ecuador. The Galapagos Islands are a group of volcanic islands located about 600 miles off the coast of Ecuador. Instead of taking a boat cruise like most people who visit the Galapagos Islands, I stayed in a hotel on the island of Santa Cruz. The main inhabited area of Santa Cruz is called Puerto Ayora and it is also home to the Darwin Research Center. At this Center, the giant tortoises of the Galapagos are studied including a tortoise named Lonesome George. Lonesome George was the last known giant tortoise of his sub-species. He came from Pinta Island and he was believed to be over 100 years old. Since Lonesome George was the last of his kind, there was a hope that he would mate with other female giant tortoises from other sub-species so that his DNA would still be passed on. Mating Lonesome George proved to be unsuccessful and unfortunately on Sunday June 24, 2012, he died. Above is a photo of Lonesome George in the forefront with a female companion behind him. It saddens me that a creature as both wonderful and gentle as Lonesome George would be forced into extinction because of mankind. Giant tortoises were largely exploited by humans for food at the end of the nineteenth century and in the end humans were the ones that attempted to save what they had so long ago damaged. Lonesome George will be a symbol that will live on and teach people to respect all living creatures and not take lives for granted.
I started this blog because I want to share with my readers different places that I have visited over the years. After reading my blog, I would like people to have a better understanding of different places in the world and maybe to even have inspiration to visit new and interesting places. I enjoy trying to find the best travel deals possible and I trying to prove that no matter how much money a person has, he or she can still experience a wonderful trip. Some of my posts are about my personal experiences or the experiences of others. I also love including travel tips and deals. All of the photos are my own except for "guest posts". My Profile Photo was taken by Mark Hampton. If you have any questions about a particular place, please feel free to ask in the comments section.
Carpe Diem; Seize the Day and Travel as Much as Possible!
Santa Cruz Island, Galapagos Islands, 2012


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The Make-Do Queen: Paper floors
So, I saw on Pinterest that I could take paper sack and paper my floors and it would be much cheaper than tile or even more carpet....and I have two dogs and two teens so my floors were BAD. I had taken to buying small area rugs and putting them over the stains and bad spots in the floor, and no amount of cleaning was getting it up.
I did my research!! I read all the blogs I could find oof others who had tried it, and watched the how-to video these smart people posted.
I decided to just do my living room....which is no small feat! It's roughly 19x24, which is a LOT of space. I set what I thought was a realistic budget of $100. I took a week off of work and started pricing and buying the supplies.
Found this roll of paper at uline.com for about $13.
Now here's where I add the disclaimer that math isn't my strong point. So while I checked and double-checked to make sure that there was enough paper on the roll to cover my 450sq. ft., I didn't double check the dimensions of the roll. OOPS! 6x1200 WILL cover 450 sq ft, but only 6 inches at a time. When I picked it up, I knew all the other blogs weren't going to work for me. Yet again, I was going to have to Make-Do with what I had.
Some blogs called for Modge Podge, some called for just using a mixture of Elmer's glue and water. After pricing Modge Podge, I opted for the glue and water mixture. A gallon of glue is about $17 at my local Office Depot, and while I knew I would have a bunch leftover, it was the cheapest way to buy the glue.
I had seen one person add some paint to her glue mixture to add color around the edges of the paper strips, and since I had realized I was going to wind up with something akin to a wood floor look, I wanted a tinge of red to offset all the brown in my already dark living room. Bought a larger bottle of burgundy paint at Michael's for $5.
Also remember, when pulling up carpet and carpet tack, you're going to need to fill all those little divots with concrete patch.
Home Depot for $8.
While there, get the Polyurethene you will need to seal the paper and prevent scratches and tears. In my head, I figured two coats would be fine, and since some folks had given me birthday money (did I mention I did this for my 40th birthday?), I splurged for the more expensive brand that claimed it was used by the basketball floor people. So....2 cans of Poly @ $46 each...yeah... there goes my $100 budget.
I got my paint brushes and a roller for the poly from Dollar Tree.
I do have this great little tool from another project I did YEARS ago (Never throw away tools!!), and it was perfect to smooth all the air and glue bubbles out.
The carpet and tack came up really quickly and I was so excited to be ahead of schedule, that I figured I would be done in 4 days instead of 5. Ha!!
So, I started at the far corner and started cutting and gluing down the paper strips. Paint on the glue mixture, flip the paper over, line it up with the previous row/wall, and lay down, smoothing with my hands, first, and then using the squeegee to smooth it straight. BE CAREFUL!! Once the paper is wet, it becomes fragile, and there were several places where I had a corner tear. I just would put the next piece over that tear and move on. Row after row after row. Paint, place, smooth. Cut more strips. Paint, place smooth.
If I had done it with the wider paper, like the other blogs, and let it be crumpled, like the other blogs, and not stressed over the strips all lining up in nice neat little rows....like the other blogs...it would have taken SO much less time.
As it was, I figure it took me 30 hours to get the paper strips all down...and the whole time, I'm trying to keep the dogs off of it and still leave a path for us to get to the kitchen and back door. I started off painting light red stripes down the top of the paper as I was laying it with a semi-dry brush trying to give it a wood-grain look. After the 2nd day of paint, place, smooth, repeat, I gave up and decided to do it all at the end.
On Friday, when I was STILL not done, I talked my kid into helping me after school, and we cut, painted, placed, smoothed for about 7 more hours. We were SO excited to put down that last piece about 1 am Saturday morning!!
And then it was time to put on the first coat of poly.
And here's where it got tricky, again. About half-way through applying the poly, my paint roller fell apart. So, it's 2am, and I'm standing there staring at the floor wondering what in the world I'm going to do. Remembering that one video off a blog, I taped a paint brush to the end of a long handle, and kept going. It wasn't nearly the same smooth application, but I was hopeful that it would all smooth out as it dried and besides I was TIRED!
The next morning, I was so sad! It was noticeable where the smooth ended and the streaks started. :(( Someone else had told me to use a big squeegee to apply the poly, so for my second coat, I taped it to the end of the long handle and did that, hoping it would fill in the gaps and give me a nice even coat.
Instead, because I did the application at night in the semi-darkness, I had MORE uneven areas and now it looked like the dog had peed in spots. It was BAD. I was so depressed!! All this work, and my floors looked WORSE!
Thankfully, I had days off the next week for Thanksgiving, and was able to think about it for several days while I did other things.
Went back to HD, and got the cheap brand of poly, but this time, instead of the gloss, got the clear satin finish, and PLENTY of rollers. $35. BINGO!!!!
After sanding down the high spots, and cleaning the floor thoroughly, I rolled on the new stuff. WHAT A DIFFERENCE!!!!!
Then I had to figure out the transition pieces from the carpet to the new (lower) cement floor. Wound up using molding that I painted red. $36 for molding
Now I LOVE my floor! And even better, when the kids and dogs are gone, I have a really great water barrier down for the real wood floor. :D
Sometimes, however, it doesn't pay to be the Make-Do Queen.
Final amount spent - about $250 Time - 10 days (non continuous)
Posted by The Make-Do Queen at 7:42 AM
Labels: DIY, paper floor, Pinterest
To see my flower obsession.
So, I saw on Pinterest that I could take paper sack and paper my floors and it would be much cheaper than tile or even more carpet....and I ...
Pallet walkway
I really thought I had already talked about this. It was a very interesting project that I did last summer. But it turns out, I've not p...
Another post!? And it hasn't been a month yet?! I know! I must be really rocking and rolling or something, eh? I do stuff almost all the...
More ways I've Re-Purposed a Torani glass bottle
Glass Bottles everywhere!
I'm just another single-mom with a hobby.

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text:
Common Agricultural Policy: Budget pressure on CAP
One external study has concluded that the CAP could just as well be paid from national budgets as the EU budget in terms of its European added-value. (For the study go here: Budget This study seems to have influenced the viewpoint of EU Budget Commissioner Dalia Grybauskaité. She told Agra Focus that there will be massive poltical pressure for the EU to concentrate its policy spending after 2013 on areas where there is a genuine added-value at EU level, e.g., a common policy on energy or climate change.
The Commissioner described 1st pillar CAP funding as 'generally the largest and most costly EU policy which, under each reform has got more and more expensive and less and less efficient'. She also questioned whether agriculture policy is still a 'common policy'. When the EU was created there were questions of hunger. But that has changed and 'we are now fighting with over production and with price crises for food and agricultural products'.
Another argument for co-funding - which already happens in the new member states - is the casual attitude she has witnessed from some member states to various EU-funded projects - as demonstrated by poor controls and the likely increase in sums received under the 'clearance of accounts' procedure. As soon as national/regional funds are involved, the relevant authorities are more focussed and responsible for an efficient use of public money, she argued.
Posted by Wyn Grant at 2:42 AM


text: MEDINAH, IL - SEPTEMBER 28: Tiger Woods of the USA makes birdie on the 16th hole during the Afternoon Four-Ball Matches for The 39th Ryder Cup at Medinah Country Club on September 28, 2012 in Medinah, Illinois. (Photo by Andrew Redington/Getty Images)

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BooksAdvanced SearchBrowse SubjectsNew ReleasesBest SellersGlobe and Mail Best SellersBest Books of the MonthChildren's BooksTextbooksToday's DealsLivres en français 1-16 of 349 results for Books : Crafts, Hobbies & Home : "Financial Markets"
Binding:Paperback|Hardcover|Kindle EditionHow to Profit from the Art Print Market - 2nd EditionJan 14 2011by Davey Barney and Barney DaveyPaperbackCDN$ 45.58Only 1 left in stock - order soon.More buying choicesCDN$ 39.08used & new(17 offers)Eligible for FREE Super Saver Shipping.Building Your Own Home For DummiesFeb 25 2005by Kevin Daum and Janice BrewsterPaperbackCDN$ 12.00CDN$ 23.99Usually ships in 1 to 2 monthsMore buying choicesCDN$ 10.88used & new(22 offers)
3Eligible for FREE Super Saver Shipping.Excerpt... lender and the financial markets, but usually a half point ...Read moreFinancial Markets Theory: Equilibrium, Efficiency and InformationOct 21 2012by Emilio BarucciPaperbackCDN$ 107.26CDN$ 132.85Usually ships in 3 to 5 weeksMore buying choicesCDN$ 107.26used & new(5 offers)Eligible for FREE Super Saver Shipping.The Ultimate Situational Survival Guide: Self-Reliance Strategies for a Dangerous WorldNov 18 2014by Robert RichardsonPaperbackCDN$ 14.43CDN$ 19.99Get it by Friday, Dec 19More buying choicesCDN$ 8.74used & new(24 offers)
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Patent US7719333 - Power control circuit, method of controlling power control circuit, and DLL ... - Google Patents
A power control circuit includes a check unit that receives a reference clock and generates a check signal for cyclically activating a feedback loop of a DLL circuit, a phase detecting unit that detects a phase difference between the reference clock and a feedback clock, and generates a phase difference...http://www.google.com/patents/US7719333?utm_source=gb-gplus-sharePatent US7719333 - Power control circuit, method of controlling power control circuit, and DLL circuit including power control circuit
Publication number US7719333 B2
Application number US 11/964,802
Also published as US8154326, US8742806, US20090002039, US20100213920, US20120194231
Publication number 11964802, 964802, US 7719333 B2, US 7719333B2, US-B2-7719333, US7719333 B2, US7719333B2
Inventors Won Joo YUN, Hyun Woo Lee, Dong Suk Shin
Patent Citations (14), Non-Patent Citations (1), Referenced by (2), Classifications (6), Legal Events (3)
Power control circuit, method of controlling power control circuit, and DLL circuit including power control circuit
US 7719333 B2
1. A power control circuit, comprising:
a check unit that receives a reference clock and generates a check signal using a control pulse signal which is toggled at every operation cycle of a DLL (Delay Locked Loop) circuit;
a phase detecting unit that detects a phase difference between the reference clock and a feedback clock, and generates a phase difference detection signal; and
a signal combining unit that generates a power cutoff signal for cutting a power supply to the DLL circuit in response to a locking completion signal, the check signal, and the phase difference detection signal.
2. The power control circuit of claim 1,
wherein the check unit repeatedly enables the check signal by a time corresponding to an operation cycle of the DLL circuit.
3. The power control circuit of claim 1,
wherein the check unit includes:
a control pulse generator that divides the reference clock by a predetermined ratio and generates the control pulse signal in a pulsed manner; and
a shift register that shifts a logic high level in response to the control pulse signal, a reset signal, and a first pulse signal, and generates the check signal.
4. The power control circuit of claim 3,
wherein the first pulse signal has a toggle timing more advanced than the toggle timing of the control pulse signal.
5. The power control circuit of claim 3,
an initializer that receives a shift signal, the first pulse signal, and the reset signal, and generates an initialization signal; and
a shifter that is initialized in response to the initialization signal, and shifts the external power under the control of the control pulse signal to generate the shift signal and the check signal.
6. The power control circuit of claim 5,
wherein the initializer enables the initialization signal when the first pulse signal is toggled in a state where the check signal is enabled.
7. The power control circuit of claim 1,
wherein the phase detecting unit determines whether or not the phase difference between the reference clock and the feedback clock exceeds a predetermined range,
if the phase difference exceeds the predetermined range, enables the phase difference detection signal, and
if the phase difference is within the predetermined range, disables the phase difference detection signal.
8. The power control circuit of claim 7,
a phase difference detector that detects the phase difference between the reference clock and the feedback clock, and generates a detection signal; and
a latch that latches and inverts the detection signal in response to a first pulse signal and generates the phase difference detection signal.
9. The power control circuit of claim 8,
wherein the phase difference detector includes:
a first detector that determines whether or not the feedback clock has a more advanced phase than the reference clock for a first time or more, and generates a first detection signal;
a second detector that determines whether or not the reference clock has a more advanced phase than the feedback clock for a second time or more, and generates a second detection signal; and
a combiner that combines the first detection signal and the second detection signal, and generates the detection signal.
10. A power control circuit, comprising:
a check unit that receives a reference clock and generates a check signal for cyclically activating a feedback loop of a DLL (Delay Locked Loop) circuit;
a signal combining unit that generates a power cutoff signal in response to a locking completion signal, the check signal, and the phase difference detection signal,
wherein the signal combining unit disables the power cutoff signal if the locking completion signal is disabled or if the phase difference detection signal or the check signal is enabled, and enables the power cutoff signal when the locking completion signal is enabled, and the phase difference detection signal and the check signal are disabled.
11. The power control circuit of claim 10,
wherein the signal combining unit includes:
a first combiner that combines the locking completion signal, the phase difference detection signal, and the check signal, and generates a combined signal;
a latch that latches the combined signal in response to a first pulse signal and outputs a latch signal; and
a second combiner that combines the combined signal and the latch signal, and outputs the power cutoff signal.
The present application claims priority under 35 U.S.C. 119(a) to Korean application number 10-2007-063069, filed on 26 Jun. 2007, in the Korean Patent Office, which is incorporated by reference in its entirety as if set forth in full.
The embodiments described herein relate to a semiconductor integrated circuit, and in particular, to a power control circuit that improves power efficiency, a method of controlling a power control circuit and a DLL circuit including power a control circuit.
In general, a DLL circuit generates an internal clock that has a more advanced phase than a reference clock (obtained by converting an external clock). The internal clock that is used in a semiconductor integrated circuit is delayed by a clock buffer and a transmission line to generate a phase difference between the internal clock and the external clock. Due to the phase difference, the output data access time is made longer. The DLL circuit is used to prevent the output data access time from being extended. As such, the DLL circuit controls the internal clock to have a more advanced phase than the external clock for a predetermined time, to thereby increase an effective data output period.
The DLL circuit includes a feedback loop that compares a feedback clock (generated by modeling the delay amount of the internal clock until it is transmitted to the data output buffer) with the reference clock. A delay block that delays the reference clock to generate the internal clock is configured to perform a coarse delay operation or a fine delay operation according to the phase difference between the feedback clock and the reference clock. The delay block selects one of the coarse delay mode and the fine delay mode depending on whether or not a locking completion signal transmitted from an operation mode setting apparatus is enabled. With this operation, the DLL circuit gives a fixed coarse delay time to the reference clock when the locking completion signal is enabled, and performs an operation to change the fine delay time, to thereby change the delay value that is given to the reference clock.
The operation cycle of the DLL circuit is determined by a toggle timing of one of a plurality of pulse signals, which are generated by a clock generating block. One of the plurality of pulse signals has a cycle larger than the reference clock (for example, two times), and is enabled at every predetermined number of cycles of the reference clock (for example, 20 cycles). The phase comparing block and the operation mode setting block of the DLL circuit operate in response to the one pulse signal. Therefore, the enable cycle of the pulse signal becomes the operation cycle of the DLL circuit.
As such, the DLL circuit detects the phase difference between the reference clock and the feedback clock at every operation cycle to determine whether or not locking is completed. Then, if it is determined that locking is completed, the DLL circuit does not significantly change the delay amount, which is applied to the reference clock. Therefore, the feedback loop that constitutes the DLL circuit is not necessarily activated after locking is completed.
However, the feedback loop of the DLL circuit is activated after locking is completed, and then power is continuously consumed. As semiconductor integrated circuits with low power consumption profiles may be advantageous for certain applications, it is desirable to improve the power efficiency of integrated circuits by eliminating power consumption factors.
A power control circuit that improves power efficiency after a clock delay locking operation are disclosed.
According to one aspect, a power control circuit includes a check unit that receives a reference clock and generates a check signal for cyclically activating a feedback loop of a DLL (Delay Locked Loop) circuit, a phase detecting unit that detects a phase difference between the reference clock and a feedback clock, and generates a phase difference detection signal, and a signal combining unit that generates a power cutoff signal in response to a locking completion signal, the check signal, and the phase difference detection signal.
According to another aspect, a method of controlling a power control circuit includes enabling a power cutoff signal when a delay locking operation of a DLL circuit is completed, disabling the power cutoff signal for a predetermined time, and detecting a phase difference between a reference clock and a feedback clock to re-determine, on the basis of the detection result, whether or not to enable the power cutoff signal.
According to still another aspect, a DLL circuit includes a power control circuit that generates a power cutoff signal in response to a locking completion signal, a pulse signal, a reference clock, and a feedback clock, a clock generating apparatus that generates the pulse signal in response to the power cutoff signal, and a delay compensating apparatus that generates the feedback clock from a delayed clock in response to the power cutoff signal.
According to yet still another aspect, a method for controlling a DLL circuit includes cutting the power supply to a delay compensating block and a clock generating block when a delay locking operation is completed, allowing the power supply to the delay compensating block and the clock generating block for a predetermined time, and detecting a phase difference between a reference clock and a feedback clock to re-determine whether or not to allow the power supply to the delay compensating block and the clock generating block.
Whether or not the delay locking operation is completed can be determined according to whether or not a locking completion signal to be output from an operation mode setting block is enabled.
The predetermined time may be a time corresponding to an integer multiple of an operation cycle of a feedback loop, which includes the delay compensating block, the clock generating block, and the operation mode setting block.
The allowing of the power supply to the delay compensating block and the clock generating block may include dividing the reference clock by a predetermined ratio and generating a control pulse signal in a pulsed manner, shifting external power in response to the control pulse signal to generate a check signal, allowing the power supply to the delay compensating block and the clock generating block when the check signal is enabled, and disabling the check signal when a first pulse signal is enabled.
The re-determining of whether or not to allow the power supply may include determining whether or not the phase difference between the reference clock and the feedback clock exceeds a predetermined range. When the phase difference exceeds the predetermined range and the first pulse signal is enabled, enabling a phase difference detection signal. If the phase difference detection signal is enabled, maintaining the power supply to the delay compensating block and the clock generating block.
FIG. 1 is a block diagram showing the configuration of a DLL circuit according to an embodiment;
FIG. 2 is a diagram showing the detailed configuration of a power control block that can be included in the circuit shown in FIG. 1, in accordance with one embodiment;
FIG. 3 is a diagram showing the detailed configuration of a shift register that can be included in the power control block shown in FIG. 2, in accordance with one embodiment;
FIG. 4 is a diagram showing the detailed configuration of a phase difference detector that can be included in the power control block shown in FIG. 2, in accordance with one embodiment; and
FIG. 5 is a timing diagram illustrating the operation of the DLL circuit.
FIG. 1 is a diagram illustrating an example DLL circuit 11 configured in accordance with one embodiment. As shown in FIG. 1, the DLL circuit 11 can include a clock input buffer 10, a delay block 20, a clock driver 30, a delay compensating block 40, a clock generating block 50, a phase comparing block 60, an operation mode setting block 70, a delay control block 80, and a power control block 90.
The clock input buffer 10 can be configured to buffer an external clock “clk_ext” and to generate a reference clock “clk_ref.” The delay block 20 can be configured to delay the reference clock “clk_ref” in response to delay control signal “dlcnt” to generate a delayed clock “clk_dly.” The clock driver 30 can be configured to generate an output clock “clk_out” using the delayed clock “clk_dly.” The delay compensating block 40 can be configured to give a delay time, which can be obtained by modeling a delay amount of an output path of the delayed clock “clk_dly,” to the delayed clock “clk_dly” in response to a power cutoff signal “vscut” and generate a feedback clock “clk_fb.” The clock generating block 50 can be configured to receive the reference clock “clk_ref” in response to the power cutoff signal “vscut” and generate n pulse signals “pls<1:n>.” The phase comparing block 60 can be configured to compare the phase of the reference clock “clk_ref” with the phase of the feedback clock “clk_fb,” and to generate a phase comparison signal “phcmp.” The operation mode setting block 70 can be configured to generate a locking completion signal lock in response to the phase comparison signal “phcmp.” The delay control block 80 can be configured to generate the delay control signal “dlcnt” in response to the phase comparison signal “phcmp” and the locking completion signal lock. The power control block 90 can be configured to generate the power cutoff signal “vscut” in response to the locking completion signal lock, the reference clock “clk_ref,” and the feedback clock “clk_fb” under the control of first and second pulse signals “pls<1:2>” among the n pulse signals “pls<1:n>.”
Some of the n pulse signals “pls<1:n>” that are generated by the clock generating block 50 can be transmitted to the operation mode setting block 70 and the delay control block 80 to define the operation timing thereof. In this example, pulse signals that are input to the power control block 90 are the first pulse signal “pls1” and the second pulse signal “pls2.” The first pulse signal “pls1” can be a signal that has an enable timing after the operation mode setting block 70 determines whether or not locking is completed. Among the n pulse signals “pls<1:n>” and the second pulse signal “pls2” is a signal that has an enable timing later than the first pulse signal “pls1.”
The power control block 90 can be configured to disable the power cutoff signal “vscut” into a state where the locking completion signal lock is disabled. Accordingly, power can be supplied to the delay compensating block 40 and the clock generating block 50. That is, when a delay locking operation of the DLL circuit is not completed, a feedback loop in the DLL circuit can be activated.
Meanwhile, when the locking completion signal lock is enabled, the power control block 90 can be configured to enable the power cutoff signal “vscut” to cut power supply to the delay compensating block 40 and the clock generating block 50. It will be understood that the delay compensating block 40 and the clock generating block 50, in which power supply is cut by the power cutoff signal “vscut,” can be implemented via a change in design to the DLL circuit.
Subsequently, the power control block 90 can be configured to disable the power cutoff signal “vscut” for a cycle of every predetermined operation cycle of the DLL circuit, for example, 8 operation cycles. At that time, the cyclically activating of the feedback loop can be performed in order to check whether or not DLL circuit is operating normally.
At this time, the power control block 90 can be configured to detect a phase difference between the reference clock “clk_ref” and the feedback clock “clk_fb” to re-determine whether or not to enable the power cutoff signal “vscut.” If the phase difference between the reference clock “clk_ref” and the feedback clock “clk_fb” exceeds a predetermined range, the DLL circuit can be configured to activate the feedback loop and re-adjust the delay time that is given to the reference clock “clk_ref” by the delay block 20. In this case, therefore, the power control block 90 can be configured to maintain the power cutoff signal “vscut” disabled to supply the power to the delay compensating block 40 and the clock generating block 50.
The reason why the power control block 90 controls the power supply to the delay compensating block 40 is that, if the delay compensating block 40 is inactivated the feedback clock “clk_fb” is not generated, which may effectively inactivate the feedback loop in the DLL circuit. In addition, the reason why the power control block 90 controls the power supply to the clock generating block 50 is that, if the feedback loop in the DLL circuit is inactive, the generation of the n pulse signals “pls<1:n>” is insignificant.
Referring to FIG. 2, the power control block 90 can include a check unit 910, a phase detecting unit 920, and a signal combining unit 930.
The check unit 910 can be configured to receive the reference “clock clk_ref” and to generate a check signal “chk” for cyclically disabling the power cutoff signal “vscut.” The phase detecting unit 920 can be configured to detect the phase difference between the reference clock “clk_ref” and the feedback clock “clk_fb” in response to the first pulse signal “pls1,” and to generate a phase difference detection signal “phddtg.” The signal combining unit 930 can be configured to generate the power cutoff signal “vscut” in response to the locking completion signal “lock,” the phase difference detection signal “phddtg,” and the check signal “chk” under the control of the second pulse signal “pls2.”
The check unit 910 can be configured to divide the reference clock “clk_ref” by a predetermined ratio and generate a control pulse signal “cntpls” in a pulsed manner. The control pulse signal “cntpls” can be toggled at every operation cycle of the DLL circuit. The control pulse signal “cntpls” can preferably be enabled immediately after the second pulse signal “pls2.” The check unit 910 can be further configured to repeatedly enable the check signal “chk” by a time corresponding to the operation cycle of the DLL circuit. During this time, the check signal “chk” is preferably a low enable signal.
To this end, the check unit 910 can include a control pulse generator 912 and a shift register 914. The control pulse generator 912 can be configured to generate the control pulse signal “cntpls” from the reference clock “clk_ref.” The shift register 914 can be configured to shift external power VDD in response to the control pulse signal “cntpls,” a reset signal “rst,” and the second pulse signal “pls2” to generate check signal “chk.”
The control pulse generator 912 can be implemented so as to have the same configuration as the clock generating block 50 (as depicted in FIG. 1). However, whereas clock generating block 50 is deactivated by the power cutoff signal “vscut,” the control pulse generator 912 can be configured to operate regardless of whether or not the power cutoff signal “vscut” is enabled.
As described above, the phase detecting unit 920 is configured to determine whether or not the phase difference between the reference clock “clk_ref” and the feedback clock “clk_fb” exceeds a predetermined range. If the phase difference exceeds the predetermined range, the phase detecting unit 920 can be configured to enable the phase difference detection signal “phddtg.” If the phase difference is within the predetermined range, the phase detection unit 920 can be configured to disable the phase difference detection signal “phddtg.” At this time, the phase detecting unit 920 operates when the power cutoff signal “vscut” is disabled, the clock generating block 50 is activated, and the first pulse signal “pls1” is enabled. Here, the phase difference detection signal “phddtg” can be a low enable signal.
The phase detecting unit 920 can include a phase difference detector 922 that can be configured to detect the phase difference between the reference clock “clk_ref” and the feedback clock “clk_fb,” and generate a detection signal “dtg,” and a first latch 924 that is configured to latch and invert the detection signal “dtg” in response to the first pulse signal “pls1” and generate the phase difference detection signal “phddtg.”
The first latch 924 can be implemented with a first flip-flop (i.e., FF1) that operates in response to the first pulse signal “pls1,” and a first inverter (i.e., IV1) that inverts an output signal of the first flip-flop FF1.
The signal combining unit 930 can include a first combiner 932, a second latch 934 and a second combiner 936. The first combiner 932 can be configured to combine the locking completion signal lock, the phase difference detection signal “phddtg,” and the check signal “chk,” and generate a combined signal “cmb.” The second latch 934 can be configured to latch the combined signal “cmb” in response to the second pulse signal “pls2” and output a latch signal “lat.” The second combiner 936 can be configured to combine the combined signal “cmb” and the latch signal “lat,” and outputs power cutoff signal “vscut.”
Here, the first combiner 932 and the second combiner 936 can be implemented with logical AND structures, which include NAND gates (i.e., ND1 and ND2) and inverters (i.e., IV2 and IV3), respectively. In addition, the second latch 934 can preferably include a second flip-flop (i.e., FF2) that operates in response to the second pulse signal “pls2.”
With this structure, if the locking completion signal lock is disabled or if the phase difference detection signal “phddtg” or the check signal “chk” is enabled, the power cutoff signal “vscut” can be disabled. Meanwhile, if the locking completion signal lock is enabled, and the phase difference detection signal “phddtg” and the check signal “chk” are disabled, the power cutoff signal “vscut” can be enabled. However, whether or not to enable the phase difference detection signal “phddtg” is determined in a state where the check signal “chk” is enabled. The second latch 934 can be configured to perform an operation to determine a timing at which the power cutoff signal “vscut” is enabled.
As shown in FIG. 3, the shift register 914 can include an initializer 9142 and a shifter 9144. The initializer 9142 can be configured to receive a shift signal “shft,” the second pulse signal “pls2,” and the reset signal “rst,” and generate an initialization signal “init.” The shifter 9144 can be configured to be initialized in response to the initialization signal “init” and shift the external power VDD under the control of the control pulse signal “cntpls” to generate the shift signal “shft” and the check signal “chk.”
Here, the initializer 9142 includes a third NAND gate (i.e., ND3) that receives the shift signal “shft” and the second pulse signal “pls2,” a fourth inverter (i.e., IV4) that receives the reset signal “rst,” and a fourth NAND gate (i.e., ND4) that receives an output signal of the third NAND gate (i.e., ND3) and an output signal of the fourth inverter (i.e., IV4), and output the initialization signal “init.”
The shifter 9144 can include a plurality of third flip-flops (i.e., FF3) and a sixth inverter (i.e., IV6). The third flip-flops FF3 are connected with each other in series. Each of the third flip-flops FF3 can have a reset terminal, to which the initialization signal “init” can be input, and a clock terminal, to which the control pulse signal “cntpls” can be input. The first-stage third flip-flop FF3 can be supplied with the external power VDD through its input terminal, and each of the subsequent third flip-flops FF3 can receive the output signal of the previous-stage flip-flop FF3. The last-stage third flip-flop FF3 can be configured to output the shift signal “shft.” The sixth inverter IV6 can be configured to receive the shift signal “shft” and output the check signal “chk.”
Here, the reset signal “rst” can be a pulse signal that is enabled during the initial operation of the DLL circuit. After the third flip-flops FF3 are initialized in response to the reset signal “rst,” the shifter 9144 can sequentially shift a high-level signal corresponding to the external power VDD using the third flip-flops FF3 each time the control pulse signal “cntpls” is toggled. With this operation, if the high-level signal to be shifted passes through the last-stage third flip-flop FF3, the shift signal “shft” and the check signal “chk” are enabled. The enable timing of the check signal “chk” can be maintained until the initialization signal “init” is enabled. As such, if the second pulse signal “pls2” (which is enabled when the power cutoff signal “vscut” is disabled in a state where the shift signal “shft” is enabled) is input, the initialization signal “init” is enabled, and then the shift signal “shft” and the check signal “chk” are disabled.
That is, the control pulse signal “cntpls” represents the operation cycle of the DLL circuit, and it is determined according to the number of third flip-flops FF3 in the shifter 9144 and how many cycles of the DLL circuit lapse each time the check signal “chk” is enabled. As such, the check signal “chk” can be enabled at one operation cycle among a plurality of operation cycles of the DLL circuit, and the check signal “chk” can be disabled at the remaining operation cycles. Therefore, power that is consumed by the DLL circuit can be markedly reduced.
FIG. 4 is a diagram showing the detailed configuration of the phase difference detector 922 shown in FIG. 2, in accordance with one embodiment. As shown in FIG. 4, the phase difference detector 922 includes a first detector 9222, a second detector 9224, and a third combiner 9226.
The first detector 9222 can be configured to determine whether or not the feedback clock “clk_fb” has a more advanced phase than the reference clock “clk_ref” for a first time or more and generates a first detection signal det1. The second detector 9224 can be configured to determine whether or not the reference clock “clk_ref” has a more advanced phase than the feedback clock “clk_fb” for a second time or more and generates a second detection signal det2. The third combiner 9226 can be configured to combine the first detection signal “det1” and the second detection signal “det2”, and to generate the detection signal “dtg.”
Here, the first detector 9222 can include a first delay element DLY1 that can be configured to delay the feedback clock “clk_fb” for the first time, and a first phase comparator (i.e., PHDET1) that can be configured to compare the phase of an output signal of the first delay element (i.e., DLY1) with the phase of the reference clock “clk_ref,” and generate the first detection signal “det1.”
The second detector 9224 can include a second delay element (i.e., DLY2) that can be configured to delay the reference clock “clk_ref” for the second time, and a second phase comparator (i.e., PHDET2) that can be configured to compare the phase of an output signal of the second delay element DLY2 with the phase of the feedback clock “clk_fb” to generate the second detection signal “det2.”
The third combiner 9226 can include a sixth inverter (i.e., IV6) that can be configured to invert the second detection signal “det2,” and a fifth NAND gate (i.e., ND5) that can be configured to receive the first detection signal “det1” and an output signal of the sixth inverter IV6, and outputs the detection signal “dtg.”
Here, the first time and the second time can be the same, and the sum of the first time and the second time can become a detection range in which the phase difference between the reference clock “clk_ref” and the feedback clock “clk_fb” is detected by the phase difference detector 922. The first detection signal “det1” can preferably be a low enable signal, and the second detection signal “det2” can preferably be a high enable signal.
The first detector 9222 can be configured to enable the first detection signal “det1” when the feedback clock “clk_fb” has a more advanced phase than the reference clock “clk_ref” for the first time or more. The second detector 9224 can be configured to enable the second detection signal “det2” when the reference clock “clk_ref” has a more advanced phase than the feedback clock “clk_fb” for the second time or more. Subsequently, the third combiner 9226 can be configured to enable the detection signal “dtg” when the first detection signal “det1” or the second detection signal “det2” is enabled.
FIG. 5 is a timing diagram illustrating the operation of the DLL circuit 11. FIG. 5 shows the waveforms of the locking completion signal “lock,” the first pulse signal “pls1,” the second pulse signal “pls2,” the check signal “chk,” the phase difference detection signal “phddtg,” and the power cutoff signal “vscut.”
Referring to FIG. 5, it can be seen that, when the locking completion signal “lock” is disabled, the power cutoff signal “vscut” is also disabled. If the locking completion signal lock is enabled, the power cutoff signal “vscut” is also enabled. However, as the check signal “chk” is cyclically enabled, the power cutoff signal “vscut” is also cyclically disabled. It can be seen that the check signal “chk” is disabled according to the second pulse signal “pls2.”
FIG. 5 shows a case where the phase difference between the reference clock “clk_ref” and the feedback clock “clk_fb” exceeds the predetermined range at a second enable timing of the check signal “chk.” At this time, the phase difference detection signal “phddtg” can be enabled or disabled in response to the first pulse signal “pls1.” The power cutoff signal “vscut” can be disabled in response to the phase difference detection signal “phddtg” and the check signal “chk.” The power cutoff signal may be enabled at the toggle timing of the second pulse signal “pls2.”
As described in the above embodiments of the power control block (circuit) and the DLL circuit (including the same), power supply to a delay compensating block and clock generating block is cut when a locking completion signal is enabled, thereby reducing unnecessary power consumption. Meanwhile, power can be supplied again to the delay compensating block and the clock generating block at every predetermined number of operation cycles of the DLL circuit, to thereby check the operation of a feedback loop. At this time, when it is detected that a phase difference between a reference clock and a feedback clock exceeds a predetermined range, the power supply to the delay compensating block and the clock generating block is maintained. Subsequently, when it is determined that the DLL circuit is normally operating, the power supply to the delay compensating block and the clock generating block is cut, thereby reducing power consumption in the feedback loop. As a result, power efficiency can be improved, and a low-power semiconductor integrated circuit can be implemented.
US6329854 * Aug 31, 1999 Dec 11, 2001 Samsung Electronics Co., Ltd. Phase locked loop integrated circuits having dynamic phase locking characteristics and methods of operating same
US7098712 Jun 1, 2004 Aug 29, 2006 Hynix Semiconductor, Inc. Register controlled delay locked loop with reduced delay locking time
US20030098721 * Jun 3, 2002 May 29, 2003 Mitsubishi Denki Kabushiki Kaisha Phase comparator accurately comparing phases of two clock signals and clock generation circuit employing the same
JP2000195265A Title not available
KR20010104496A Title not available
KR20020040443A Title not available
KR20020075572A Title not available
1 US 7,161,399, 01/2007, Lin (withdrawn)
US8344771 * Nov 2, 2010 Jan 1, 2013 Hynix Semiconductor Inc. Delay locked loop of semiconductor integrated circuit and method for driving the same
WO2017112320A1 * Nov 23, 2016 Jun 29, 2017 Intel Corporation Flexible dll (delay locked loop) calibration
U.S. Classification 327/158, 327/142, 327/198
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:YUN, WON JOO;LEE, HYUN WOO;SHIN, DONG SUK;REEL/FRAME:020328/0022

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text:
Pic of the Day: Thursdays are for Basket Weaving Class
Most Thursdays I'm at the Warrior and Family Support Center (WFSC) teaching a basket weaving class. WFSC is a facility wholly built and supported by privately donated funds. This is so unique that it got a visit from Michelle Obama and Jill Biden last year. I guess they wanted to see how this was all accomplished since they are working on the whole family support issue for the military. Wounded warriors quite often are here for a year or two during rehabilitation. WFSC is sort of a community center for them and for their families. It gives them a place to hang out and feel normal for a while after being in a hospital setting so much of the time.
I haven't had students for a few weeks but today this lady showed up. She's taken one class before. Her husband watched for a while and I offered to get him started on a basket but he declined. After a while though he was the one weaving and she was helping him. There are some people who just have to get their hands in there and try it. Naturally, I can understand this since I'm definitely in that category. No surprise there!
Here's a detail of my latest finished basket. It was done back in November but a nasty cold, Thanksgiving and then Christmas derailed getting pictures taken and posted. I think I showed this one in progress (A reason for starting the blog. I could look back and see what I had posted!!) so I wanted to show how it ended up.
Flamingo basket detail
You can see that the basket started with a ceramic flamingo base that I purchased on Etsy, a great source for handmade items. And I have been trying and trying to get my photos arranged next to each other. Now I've done it and I have NO IDEA how it happened. I'm really hoping I will stumble around and repeat the action and then remember _how_ it happened. If you know feel free to leave instructions in the comments!
Several people have emailed and asked about leaving comments. Be assured that you do NOT have to sign up for gmail or start a web site or any of those things. There's an Anonymous choice when you leave a comment. No one has to know who you are but it would be really nice if you left initials or a first name so I might know who said something. I'm trying! gk
Finished Flamingos
AnonymousJanuary 12, 2012 at 7:48 PMWhat a great basket - and to share your talent by teaching folks who visit the WFSC is wonderful! -Barbara SReplyDeleteAnonymousJanuary 13, 2012 at 4:42 PMAnd i thought you said no more flamingos? Very beautiful, TRCReplyDeleteFranJanuary 13, 2012 at 8:09 PMBeautiful basket!ReplyDeleteRepliesPamela ZimmermanJanuary 18, 2012 at 4:46 PMyou have a wonderful flair for making your baskets unique, Geraldine! I love the little curls on the top of this one! thanks so much for posting it for us! I love to see what people do with my basket bottoms. Come see me again at http://MakeABasket.etsy.com !pamelaDeleteReplyAdd commentLoad more...
I love making things....knitting, spinning, basket weaving, quilting, stamping and more. I'm sure there will be more to add as soon as I find a new craft!Taking photos is a fun hobby largely enabled by my DH who keeps buying me new camera stuff to play with.


text:
Momentum builds to strip Sir Philip Green of knighthood over BHS pensions blackhole | Daily Mail Online
Momentum builds to strip Sir Shifty of his knighthood as almost FIFTY MPs back plans to cancel Philip Green's honour over BHS pensions blackhole Sir Philip Green has apologised for the 'hardship' caused by BHS collapseBut he continues to face question over how and why he sold the retailerBHS collapsed into administration and closed down earlier this year By
07:32 EST, 19 October 2016
08:20 EST, 19 October 2016
Sir Philip Green faces a Commons vote as soon as Thursday which could strip him of his knighthood Momentum gathered today to strip Sir Philip Green of his knighthood over the BHS scandal as almost 50 MPs endorsed a Commons motion backing the move.The Commons is due to debate the humiliating plan amid demands for the retail billionaire to 'fulfil his promise' to cover a vast blackhole in the collapsed retailer's pension scheme.A vote on stripping Sir Philip of his knighthood - awarded in 2006 for services to retailing - could held as soon as Thursday.Senior Labour MP Frank Field, who has led a campaign to hold Sir Philip to account, today warned there was little the tycoon could do to save his honour. In other developments, former pensions minister Baroness Ros Altmann today told MPs she did not understand why BHS was sold without getting clearance from the pensions regulator if Sir Philip truly cared about his staff. RELATED ARTICLES
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The Commons motion on Sir Philip, from Tory Richard Fuller and independent Michelle Thomson, asks for the Honours Forfeiture Committee to recommend his knighthood is 'cancelled and annulled'.The proposal has no legal effect but would be politically devastating to Sir Philip's hopes of holding on to his honour. They have now received support from 47 fellow MPs, including Conservative and Labour former ministers.SNP MPs are supporting the amendment in number, with former first minister Alex Salmond signed up. BHS went into administration shortly after being sold for £1 by Sir Philip, with a £571 million pension scheme deficit. Sir Philip Green has apologised for the 'hardship and sadness' caused to BHS employees. He has spent part of the summer since the crisis aboard his yacht Lionheart, pictured The amendment from Mr Fuller and Ms Thomson adds: '(This House) noting that Philip Green received his knighthood for his services for the retail industry, believes his actions raise the question of whether he should be allowed to continue to be a holder of the honour and calls on the Honours Forfeiture Committee to recommend his knighthood be cancelled and annulled.'Sir Philip used a recent ITV News interview to apologise to workers for the 'hardship and sadness' caused by the collapse of BHS.He added he 'did everything possible' to keep the business from going under, although he admitted it was a mistake to sell it to serial bankrupt Dominic Chappell.Sir Philip also denied claims from Mr Field about his conduct, with a review by the tycoon's lawyers - Lord Pannick QC and Michael Todd QC - labelling the parliamentary inquiry into the retailer's collapse as 'bizarre' and 'unsupportable'. Former pensions minister Baroness Ros Altmann today told MPs she did not understand why BHS was sold without getting clearance from the pensions regulatorSpeaking to the work and pensions committee today, Baroness Altmann said: 'The thing that puzzles me is why the owner (of BHS) did not clearance (from the regulator) before selling the business.'If you want to sell a business with a pension scheme attached and you really do care about the promises you made to your pensioners, if you owned that business for 15 years and those people have been loyally been working for you for 15 years, and every month you have promised them they will get amount of pay now and an extra amount when they reach pension age.'Why would you not use the established processes that exist for very good reasons to find out from the pensions regulator what it is you should put into the pension scheme before you sell it someone who will take over the responsibility?'That's where I am really puzzled.' Share or comment on this article

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text:
Since Strings are very popular as HashMap key, it's important for them to be immutable so that they can retrieve the value object which was stored in HashMap. Since HashMap works in the principle of hashing, which requires same has value to function properly. Mutable String would produce two different hashcodes at the time of insertion and retrieval if contents of String was modified after insertion, potentially losing the value object in the map.
If you are an Indian cricket fan, you may be able to correlate with my next sentence. The string is VVS Laxman of Java, i.e. very very special class. I have not seen a single Java program which is written without using String. That's why a solid understanding of String is very important for a Java developer.
Important and popularity of String as data type, transfer object and mediator has also made it popular in Java interviews. Why String is immutable in Java is one of the most frequently asked String Interview questions in Java, which starts with discussion of, what is String, how String in Java is different than String in C and C++, and then shifted towards what is immutable object in Java , what are the benefits of immutable object, why do you use them and which scenarios should you use them. This question sometimes also asked, "Why String is final in Java".
On a similar note, if you are preparing for Java interviews, I would suggest you take a loot at the Java Programming interview exposed book, an excellent resource for senior and mid-level Java programmer. It contains questions from all important Java topic including multi-threading, collection, GC, JVM internals and framework like Spring and Hibernate, as shown below:
As I said, there could be many possible answers to this question, and the only designer of String class can answer it with confidence. I was expecting some clue in Joshua Bloch's Effective Java book, but he also didn't mention it. I think following two reasons make a lot of sense on why String class is made Immutable or final in Java: 1) Imagine String pool facility without making string immutable , its not possible at all because in case of string pool one string object/literal e.g. "Test" has referenced by many reference variables, so if any one of them change the value others will be automatically gets affected i.e. lets say
String B = "Test"
Now String B called, "Test".toUpperCase() which change the same object into "TEST", so A will also be "TEST" which is not desirable. Here is a nice diagram which shows how String literals are created in heap memory and String literal pool.
2) String has been widely used as parameter for many Java classes e.g. for opening network connection, you can pass hostname and port number as string, you can pass database URL as a string for opening database connection, you can open any file in Java by passing the name of the file as argument to File I/O classes.
In case, if String is not immutable, this would lead serious security threat, I mean someone can access to any file for which he has authorization, and then can change the file name either deliberately or accidentally and gain access to that file. Because of immutability, you don't need to worry about that kind of threats. This reason also gels with, Why String is final in Java, by making java.lang.String final, Java designer ensured that no one overrides any behavior of String class.
3)Since String is immutable it can safely share between many threads which is very important for multithreaded programming and to avoid any synchronization issues in Java, Immutability also makes String instance thread-safe in Java, means you don't need to synchronize String operation externally. Another important point to note about String is the memory leak caused by SubString, which is not a thread related issues but something to be aware of.
4) Another reason of Why String is immutable in Java is to allow String to cache its hashcode, being immutable String in Java caches its hashcode, and do not calculate every time we call hashcode method of String, which makes it very fast as hashmap key to be used in hashmap in Java. This one is also suggested by Jaroslav Sedlacek in comments below. In short because String is immutable, no one can change its contents once created which guarantees hashCode of String to be same on multiple invocations.
Security and String pool being primary reason of making String immutable, I believe there could be some more very convincing reasons as well, Please post those reasons as comments and I will include those on this post. By the way, above reason holds good to answer, another Java interview questions "Why String is final in Java". Also to be immutable you have to be final so that your subclass doesn't break immutability. what do you guys think?
As per my knowledge ,String pool gets created in PERM area of Java Heap , so if there are too many String there is good chance of OutOfMemoryError because garbage collection doesn't happen in PERM area of java heap.
The absolutely most important reason that String is immutable is that it is used by the class loading mechanism, and thus have profound and fundamental security aspects.
Had String been mutable, a request to load "java.io.Writer" could have been changed to load "mil.vogoon.DiskErasingWriter".
@Dan Bergh Johonsson.
You are absolutely right. Since string is used in many place to identify names (whether its class, file , network or anything else) and if you left String immutable you will end of with big security hole.
Thanks John for highlighting some important thing and adding value to this blogpost.
String class is not a common class. It has a specific requirements and it is handled as special by both JVM Specification and Java Language Specification. Many language features depend on ability of String to represent constant text - some of them mentioned above.
One of the "side effect" of String immutability is an ability to cache its hash value which greatly improves String performance in hash based collections.
AhmedOsama said...
Thanks for this amazing info .
That explains why no one uses StringBuffer to hold a connection info of DB.
Thanks you liked the post , yes I gonna compile the ideas/information mentioned in comments in the main article whenever time allows me.
Javin, Good article. Apart from the reason listed above and the pros and cons, the main reason I think why we have immutable claases like Integer String etc is because of space. As a designer you are always fighting for memory and performance, and this is a nice little feature provided by Java to make things efficient and consume less space.
http://anshuiitk.blogspot.com/
javaisfinal said...
In one of the interview , i was asked, how will you make a class emp immutable , it has some member variable, and another member variable say Salary, on which you don't have any control. In the sense the interviewer said the methods in salary class, can actually change the state of class salary.
jfolson said...
I would agree to usage of String as hashkey makes it immutable.Security aspect can be broken in multiple ways.I doubt how String helps here.
http://javaved.blogspot.com
Vivekanand said...
Just a quick note: final and immutable is not the same! Consider a class Foo with a final member bar and no setters for bar. I can still do stuff like this:
b=new Bar(5);
f=new Foo(b);
b.value=4;
The same problem arises when Foo passes bar to another Method outside it's class scope.
yes string is immutable.but my question is as follows:
{String s1=”hello”;
string s2=”friend”;
sir, the output for the program is hellofriend
then how can we say that string is immutable bcoz as here the string is being retrived by another would you plz explain it as early as possible..
Fabrizio Benigni said...
@chikky,
you are confusing the concept of object immutability with the concept of variable immutability. When you reassign s1 you don't modify the object referenced by s1; instead, you're creating a new string object and assigning it to the variable s1.
Andrew Glassman said...
Javin @ split string in Java said...
not to worry Andrew, I understand :) By the way glad to welcome here and hope to see some interesting comments :)
Verhás Péter said...
Forget ALL SECURITY REASONS. As regarding security reasoning String IS mutable:
package com.verhas.elrettentopelda;
public class Wtf {
String alma = "alma";
String korte = "alma";
value.set(alma, new char[] { 'k', 'o', 'r', 't', 'e' });
System.out.println(korte);
Deep Shah said...
Hello Dir,
"String A = "Test"
Now String B called "Test".toUpperCase() which change the same object into "TEST" , so A will also be "TEST" which is not desirable."
I tried this example but the output of String A does not changed it's till 'Test' instead of 'TEST'
So , can u please give me the example?
What @deep tried is true which is i also tried then how come it changes the same object when it is creating a new one. Please Explain
Main Reason of String being immutable is performance. Before you guys tear my opinion to shreds please read ahead :-).
Strings are backbone of Java or for that matter any other programming language. As we have seen thousand examples in this great blog itself, for example classloaders uses classname to load a class which is a string, usernames, passwords, database connection names etc. all are stored as string.
Now lets assume for a second that String were not immutable what would happen? String references pointing to litrals in constant pool would keep on changing the contents there hence a havoc would occur.
To fix this java designers would have to remove the constant pool all together. Thus we would have to create a new instance of string all the time which would go into the heaps. Tons of string would result in out of memory errors hence impact the performance of all the java applications.
If this was the answer given in an interview that I was giving, you would not get the job.
It misses the fundamental reason for using an immutable classes, and that is to allow this object to be shared efficiently without fear of having the underlying value change. All of the listed reasons are secondary to this fundamental point, so not to mention it means that you are not seeing cause and effect in the right direction.
If you take the discussion in point (5) for example, it does not make any sense. These classes were built on the assumption that String was safe to share. If they weren't safe, they would never be used in a context that required safety. It's like saying that glue is sticky because if it weren't, my furniture would fall apart.
Honestly, I take the security argument with caution. Nothing prevents a mutable object holding the immuatable String to change the reference and so refer to another String.
More, without proper security policy, nothing prevents introspection to change an existing String value and mess up the String pool. Take a look at this code:
String titi = "titi";
String titi2 = "titi";
String titi3 = new String(titi);
char value[] = {'t', 'o', 't', 'o'};
field.set(titi, value);
System.out.println(titi2); // toto
System.out.println(titi3); // titi
You would expect this to fail, because the field is private and final; But this just works. More interesting, explicitly creating a new instance allow you to avoid some of the problems.
I am really unable to understand immutable(object is not modifiable) meaning..
Pls... Give me an example of mutable class and its immutability..
Thank you for noticing me.
i don't get the concept of security issue.
@Had String been mutable, a request to load "java.io.Writer" could have been changed to load "mil.vogoon.DiskErasingWriter".
if we change it, [creates a new string] won't it pass the new modified string ?
what is a value in string class that they use to access?
best students said...
yes it is a good article of final, could you please explain something about "How final method bonded during compile time and why it is called static binding "
Nitin Taur said...
I do not very much agree with point (4) related to hashcode. Can we use an object as key in hashmap whose hashcode can change once stored in hashmap? Basically this will have same issue as with following class used as key in hashmap:
private volatile int i = 1;
I think hashcode should never depend on changing state of object.
ilavarasan rangasamy said...
The two main reasons why strings are immutable in many modern languages, including Java, are security and performance (or, more precisely, chance for optimizations).
The fact that strings are final is to ensure their immutability (by forbidding anyone from extending them and making them mutable again).
@Annonymous: We use String Pool because it stores only one reference to String literal eg.
So in String Pool there is only one instance of "Test" and variable A & B are just reference to that string. Now if you create two "Test" String using new operator eg. new String("Test") it will create a new object everytime but in case of string pool there is only one reference.So i hope you understand string pool is saving time on string related memory operations.
can you give some highlight on String Buffer and String Builder classes as both are providing mutable objects but in what aspect these are different from String class and where should we use them as compare to String class.
I executed below lines of code and unable to understand the output can u plz explain.
"test".toUpperCase();
According to first point str and str1 should contains "TEST".
The output is right and the reason behind this is while writing "test".toUpperCase(); the value of String str become changed in to TEST but JVM didn't found any reference that refers to new value(TEST).So the reference become lost.And while printing it prints the previous value of string.If you want TEST in output then you should write
str="test".toUpperCase();
Now the reference become updated and new value of String str will be print.
Hi Javin, one more reason for String being immutable could be that String is more like the primitive type but represented as object. Since java uses pass by value it makes sense for passing an immutable object to the methods as parameter so that pass by value behavior is maintained.
Keyur Shah said...
sorry can you please add more to following, I couldn't understand it :(
@Keyur, in classloading name of class is passed as String, if String wasn't immutable its possible to change the name of that String from somewhere else, which can compromise security by loading different class.
ansu aggarwal said...
need to ask one thing, Is string pool stores the hashcode of the string or only value.
if value stores in string pool then how string hashcode is stored in memory.
This line dose not make sense
Now String B called "Test".toUpperCase() which change the same object into "TEST" , so A will also be "TEST" which is not desirable.
If you do toUpperCase() to String B, why string A wll get affected?
In this example Strign A and String B will have different memory location.
@Anonymous, that's the hypothetical scenario I was explaining that why its MUST for String to be final if you want to have something like String pool. I hope it make sense to you now.
Chirag Kapoor said...
I believe Strings are immutable to make life easy for JVM and java team did not do it for developer/development process. I do no think any of the points are of relevance as you can always use reflection to play around with values.
Sapna Uniyal said...
I have a basic question, Why the String Pool is actually provided in java?
@Sapna, Java designer knows that String will be used heavily in Java application and there would be so many String object all around which will take lot of memory. To avoid that they thought about sharing String object between clients and that's why they made it Immutable and created String pool
August 30, 2015 at 6:24 AM
Recently interviewer asked me What is the significance of creating String using new operator if we have string literal functionality for the same ?
Do you have any thoughts on it ?
Rick Ryker said...
All of those posters who say String isn't immutable because they can use introspection to change its private internal state need to read up on what a SecurityManager does during the reflection call to change its value. Then load one and try to change a String's underlying value.
Just because we developers frequently ignore security doesn't mean that your code can count on reflection to allow it to do naughty things.
Rahul Kale said...
As I understand String, I don't see any use of new operator while creating String object. Can any one explain where do we need new operator to create String?
When jvm is loaded into memory as instance of java.lang.Class,how much memory taken by jvm into the ram so that it can load the classes and perform their operations
Kailun Cen said...
Elly George said...
Hi here you are adding two string var so here apeend operation will take place that’s the reason you se getting this output .initially s1 and s2 are two string object when you append it will create another block of mem in heap mem to store s1+s2
gokul alltymhigh said...
But in Java 8 there is no perm space then string is still immutable
Actually new creates a new object each time. Literal, if the value exists in the string pool already then you will get that itself, instead of creating new object. So using Sting literal is always better and new should not be used until required.
Raja Nagendra Kumar said...
Immutability certainly leads to more memory and CPU usage if more and more new strings are created due to overcome immutability. In memory constrained and battery powered devices immutability would slow the system..
But looks like the way JVM makes use of immutability of Strings, makes programs secure, safer and faster.
Dhananjay Shinde said...
e.g. "Test" has referenced by many reference variables, so if any one of them change the value others will be automatically gets affected i.e. lets say
Now String B called, "Test".toUpperCase() which change the same object into "TEST", so A will also be "TEST" which is not desirable.
I am confused about this point,
If I change value of B toUppercase("TEST") then it will be a new object ,then how could it affect the value of A which remains same as "Test"
Mohit Kumar Verma said...
"The string is Immutable in Java because String objects are cached in String pool" As per my knowledge this is wrong sentence the String is immutable so String object are cached in String pool.
I wanna ask a question then why Wrapper Class Object are immutable...


text: Zirkow 2017: Top 20 Holiday Lettings Zirkow, Holiday Rentals & Holiday Apartments - Airbnb Zirkow, Mecklenburg-Vorpommern, Germany

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December 2012 – The Ankle Breaker.
Month: December 2012	BIG colour.	Christmas time in the NBA produces some great moments in-game and off the court. It also produces some really cool looking shoes. I mean it’s mostly in the colourways but it’s cool to see the NBA in Christmas colours. Not only the shoes but the jerseys and some of the other stuff. My pick of… Read More
Winter Hoops.	T-shirt. T-shirt. Jersey. Hoodie. Shorts. Fat man pants. Shoes. After a long day of shooting around in the cold and wet taking off the layers and layers of clothes to have a shower really makes you wonder how you managed to dribble the ball with that much clothes on. It’s times and weather like this… Read More
#KnicksTape.	Tonight’s game Nets @ Knicks is another game in the NYK-BKN rivalry. It seems like a rivalry that has lasted as long as JaJuwan Howard’s career, yet there’s only been two games between the Nets and Knicks rivalry. Tonights game features plenty of matchups at all the spots and a lot banking on it in… Read More
50 things we’ve learned: Christmas edition.	It’s the most wonderful time of the year. 1. The Bobcats aren’t going to win the championship. 2. Ricky Rubio’s back. 3. Damian Lillard’s a boss. 4. Andrea Bargnani’s a moaner and a whiner. 5. The Lakers are the weirdest team in the NBA. 6. Kobe is still the Lakers’ best player. 7. Nothing can… Read More
Throwback Thursday: The year in hoops.	A lot has happened over the course of 2012 in the NBA and in basketball, a lot of which we’ve forgotten about. So here’s a look back on some of the big stories and happenings from the year. BG on Perkins. Need I say more? Linsanity. When Jeremy Lin, an undrafted bench-warmer on the verge… Read More
Those folks in Minneapolis.	Playing ball in the cold really makes me pity those poor folks in Minneapolis. Because what I think is cold here isn’t that bad over there. Their T-Wolves (Who are best repped in Ireland by Titans legend David Naughton.), are one of the most complicated teams in the NBA. I am writing this part on… Read More
The IT factor.	Isaiah Thomas (5’9″) back when he was ripping it up in the University of Washington. This is from the PAC 10 between the Huskies and Arizona where Thomas shows that the true measure of an athlete is how big your heart is. PEACE!!!

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text:
Rus Bradburd will be reading from his work on February 15, at 7:30 pm in Hardman Hall 106. Posted by
Richard Yañez was born and
raised on the U.S.-Mexico border. He is the author of Cross Over
Water: A Novel and El Paso
del Norte: Stories on the Border, both published by the University
of Nevada Press. Named a
2012 Top Ten “New Latino Author” by Latino Stories, both books
were cited as “Notable
Books” by Southwest Books of the Year. El Paso del Norte was a finalist
for the Steven Turner Book
Award from the Texas Institute of Letters, and Cross Over Water
is a finalist for a ForeWord
Book of the Year Award (multicultural fiction) and an International
Latino Book Award (Best
Novel-adventure/drama in English).
His stories and
essays are anthologized in Mirrors Beneath The Earth: Short Fiction by Chicano
Writers, Our Working Lives: Stories of People and Work, Hecho en Tejas: An
Texas Mexican Literature,
Literary El Paso, U.S. Latino Literature Today, and New Border.
Gary Soto selected his
story, “Sacred Heart,” for the Chicano Chapbook Series.
editor for Puerto del Sol, Colorado Review, Hayden’s Ferry Review,
BorderSenses, Momotombo
Press, and the Writer’s Chronicle. His service work includes
contributions to the Border
Book Festival, Con Tinta: A Chicano/Latino Writers’ Collective, El
Paso Literary Fiesta, and
RIPPLES Literary/Cultural Series.
New Mexico State University and Arizona State University, he earned a Riley
Scholar Fellowship from
Colorado College and a Center for InterCultural Leadership Fellowship
from Saint Mary’s College
(IN). Currently, he is an associate professor of English at El Paso
received the Minnie Stevens Piper Professor Award and a state
National Institute for Staff and Organizational Development.
He lives in El
Paso with his wife, Chicana writer Carolina Monsiváis, and their son.
Donnelley is a native New Mexican and the author of The Charge (Ausable
Press, 2003, since 2009 part of Copper Canyon Press) and Nocturnes of the
Brothel of Ruin (Four Way Books, 2012). Donnelly is director of the
Advanced Seminar, one of three summer programs at The Frost Place, a
poetry conference center at Robert Frost’s old homestead in Franconia, NH. He
is an associate editor of Poetry International, a contributing editor of
Trans-Portal (www.transtudies.org), has taught writing
at Colby College, the Lesley University MFA Program, and the Bread
Loaf Writers' Conference. In the 2012-2013 academic year he will teach a
semester each at Smith College and George Washington University. He was
Thornton writer-in-residence at Lynchburg College in 2006, is a 2008 recipient
of an Artist Fellowship from the Massachusetts Cultural Council, is a member of
the Massachusetts Poetry Outreach Project Advisory Board. His poetry has
appeared in many journals, including American Poetry Review, Ploughshares,
The Yale Review, The Virginia Quarterly Review, and Hayden’s Ferry
Review, and has been anthologized in the Four Way Reader #2, The
Book of Irish American Poetry from the 18th Century to the Present, and
elsewhere. From the Bread Loaf Writers’ Conference, he received a scholarship
in 2003 and a fellowship in 2004, and grants from the PEN Fund for Writers in
2000 and 2001. With Stephen D. Miller, Donnelly is co-translator of the
Japanese poems in The Wind from Vulture Peak: The Buddhification of Japanese
Waka in the Heian Period, a scholarly history and analysis
forthcoming from Cornell East Asia Series in fall 2012. Donnelly and
Miller’s translations have appeared or are forthcoming in Bateau, Cha: An
Asian Literary Journal, Circumference, thedrunkenboat.com,
eXchanges, Inquiring Mind, Kyoto Journal, Mead, Metamorphoses, New
Plains Review, Noon: The Journal of the Short Poem, Poetry
International and Like Clouds or Mists: Studies and Translations of Nō
Plays of the Genpei War. Donnelly, in previous years, has performed as an
actor and opera singer, worked as a professional chef and food writer, helped
to coordinate a meal program for people with AIDS, cancer and heart disease,
and taught health-supportive cooking and eating to senior citizens and people
recovering from drug and alcohol addiction. His spiritual curiosity has led
him, at different times, to study for the Roman Catholic priesthood and to live
as a Buddhist and a Muslim. Website: http://web.me.com/patricksdonnelly
Krystal Languell is the author of the poetry collection Call
the Catastrophists (BlazeVox, 2011), the poems of which began as her MFA
thesis at New Mexico State University. Her poems have appeared in Barn Owl
Review, DIAGRAM, esque and elsewhere, and her reviews and interviews have
been published online at NewPages and Coldfront. Founder of the
feminist literary journal Bone Bouquet, she is part of the Belladonna
Collaborative in Brooklyn and teaches writing at the Borough of Manhattan
Community College and Pratt Institute. Andrew Scott November 30th
Andrew Scott is the author of Naked Summer, a story
collection, and the editor of a forthcoming anthology, 24 Bar Blues:
Two Dozen Tales of Bars, Booze, and the Blues. He holds writing degrees
from Purdue University and New Mexico State University, where he was twice
awarded a Frank Waters Fiction Fellowship. His fiction and nonfiction have
appeared in Esquire, Ninth Letter, The
Cincinnati Review, Mid-American Review, Glimmer Train
Stories, The Writer’s Chronicle, and other
publications, and have been awarded grants from the state of Indiana and Ball
State University, where he teaches. With his wife, writer Victoria Barrett, he
edits Freight Stories, an online fiction journal. He lives in
Murphy is the author of a full-length collection of poetry, PRETTY TILT
(Keyhole Press, 2012) and a chapbook, MEET THE LAVENDERS (Birds of Lace, 2011).
She received her MFA from New Mexico State University and her BA from the
University of Maryland. Her work has appeared in Columbia Poetry Review,
JMWW, PANK, and other journals and has also been nominated for a Pushcart
Prize. An essay was chosen as an Editor's Choice for Best of the Net 2011. Murphy
also leads workshops at Washington D.C. area conferences on post-confessional
poetry. She is also an active food writer on the web.
The stories in Valerie Fioravanti’s Garbage Night at the Opera
are grouped around an extended Italian-American family sharing one apartment
building in Brooklyn as their neighborhood experiences a swift and financially
devastating deindustrialization. The collection examines the consequences the
loss of factory jobs has on individual, family, and community life. The stories
move forward in time and across generations as the neighborhood rapidly
deteriorates, languishes for a generation, then gentrifies.
Garbage Night at the Opera won the 2011 G.S. Sharat Chandra Prize for Short Fiction and is
forthcoming from BkMk Press (University of Missouri-Kansas City) in October
2012. Garbage Night at the Opera was also a two-time finalist for the
Flannery O’Connor Award. Stories from the collection have received four Pushcart
Prize and one Million Writers Award nominations. These stories have appeared in
North American Review, Cimarron Review, Hunger Mountain, Night
Train, and other literary journals. The title story, “Garbage
Night at the Opera,” was awarded Special Mention in Pushcart Prize
XXVIII, and has been anthologized twice more. A first-generation college
student, Valerie received a Fulbright Fellowship to Italy to work on her
novel-in-progress, Bel Casino, and won both the Fiction & Poetry
Prizes as an MFA candidate at New Mexico State University.
Valerie also writes poems and essays. Her first published poem,
“Letter Ghost,” received a Pushcart Prize nomination. Her essays and poems have
appeared in Eclectica, Silk Road, Jelly Bucket, and other
literary journals. Valerie teaches for the UCLA Writers Program online and
lives in Sacramento, where she promotes the work of other writers via the
Stories on Stage reading series.
Chávez grew up in Colorado Springs, Colorado, and spent a significant amount of
time in southern Colorado and Northern New Mexico, the inspiration for his
early poetry. He received his bachelors degree in Creative Writing from
Colorado State University, and later received his Master of Arts at Central
Michigan University and Master of Fine Arts at New Mexico State. He completed
his Doctorate degree in Poetry under the supervision of Hilda Raz. At the
University of Nebraska Lincoln, Chávez served as an editorial assistant for Ted
Kooser's "American Life in Poetry," a syndicated newspaper column
publishing contemporary poetry nationwide, and as one of two Senior Poetry
Readers for Prairie Schooner. Awarded a month-long residency at the
Anderson Center in Red Wing, Minnesota, Chávez was the Letras Latinas
Residency Fellow, cosponsored by the Anderson Center for Interdisciplinary
Studies and the Institute for Latino Studies at the University of Notre Dame.
His poems have appeared or are forthcoming in Conduit, Portland
Review, Puerto del Sol, Grist: The Journal for Writers, The
Laurel Review, Palabra, Great River Review, Diode and Copper Nickel among
others. He is the author of the chapbook Heterotopia, published by Noemi
Press in 2004, and co-author of the chapbook I,NE: Iterations of the Junco,
published by Small Fires Press in 2009. His first full-length poetry collection,
City of Slow Dissolve, will be
released fall 2012 by University of New Mexico Press.
Joey Nicoletti is the author
of three poetry collections: Borrowed
Dust, Earthquake Weather (NightBallet Press, 2012), and Cannoli Gangster, which was selected as
a finalist for the Steel Toe Books Poetry Prize by Denise Duhamel (Word Tech,
September 2012). His poems, reviews, and nonfiction essays have appeared in
many magazines and anthologies, including Italian
Americana, Valparaiso Poetry Review, Waccamaw, Aethlon, Gradiva: International
Journal of Italian Poetry, Tulane Review, PIF, Green Hills Literary Lantern,
The Bitter Oleander, Stymie Magazine, and The City of Big Shoulders: An Anthology of Chicago Poetry. A short
film, "Blue Train,” based on his poem of the same name, will be screened
with five other short films inspired by poems from the new anthology Token Entry: Poems of the New York City
Subway later this year as part of Jack Feldstein’s Subway Series. A
graduate of the Sarah Lawrence College MFA program, the University of Iowa, and
New Mexico State University, he is a former poetry editor of Puerto del Sol and currently teaches
creative writing and English literature at Niagara University.
David Shields is the author of thirteen
books, the most recent being How
Literature Saved My Life, forthcoming in February
2013 by Knopf. His other books include Jeff, One Lonely Guy, which was
co-written by Jeff Ragsdale and Michael Logan (forthcoming from Amazon
Publishing NYC on March 20, 2012); Reality
Hunger: A Manifesto (Knopf, 2010), named one of the best books of
the year by more than thirty publications; The Thing About Life Is That One Day You'll Be Dead (Knopf,
2008), a New York Times
bestseller; Black Planet: Facing
Race during an NBA Season, a finalist for the National Book Critics
Circle Award; Remote: Reflections on
Life in the Shadow of Celebrity, winner of the PEN/Revson Award; and
Dead Languages: A Novel,
winner of the PEN Syndicated Fiction Award. His essays and stories
have appeared in the New York Times
Magazine, Harper’s,
Esquire,Yale Review, Village Voice, Salon, Slate, McSweeney’s,
and Utne Reader; he’s
written reviews for the New York
Times Book Review, Los
Angeles Times Book Review, Boston Globe, and Philadelphia
Inquirer. His work has been translated into fifteen languages.
WINNERS 2012The Frank Waters Award in Fiction was judged by writer Darlin’ Neal, who read here earlier this semester.
First Prize: Emily Haymans, "Tagalongs" Judge’s Citation: This story is so felt. There is so much longing. I
feel with the narrator and her beautiful observations. This writer
made such lovely intuitive movements from scene to scene. I will
remember this character and the place she lives. I will remember her
missing Gimby because I shared that longing as I read along.
Second Prize: Barry Pearce, "Accidents" Judge’s Citation: What a marvel this writer has created: a character
who is willing the action of the story even as he feigns
unconsciousness on a hospital bed. I thought the story's movement
came full circle. I was so very touched by Izzy's plight. I felt
bonded with him somehow. I wanted, with him, for his father to reach
out. I like this story. I also think the writer should write this
novel. I'd read it.
Third Prize: Paul French, "Nod" Judge’s Citation: Such fine dialogue and sense of place in this piece. This
writer has a fine gut for action indeed. Travis isn't someone I'd
think I'd care about but the keen attention to his visceral
experience, the keen attention and immersion in his sadness and the
way he himself is trapped by his own wayward path, well, all of those
things made me care.
Oh, and then the hard, hard decisions of what not to choose for final
three! But here is a list of honorable mentions and I'm happy to give
feedback if the students would like it.
Honorable Mention
"Dinesh In Switzerland" – Gautam Emani
"Black Mirror" – Sessily Watt
"A Homecoming" – Philip Johnson
"Parallel Parking" – Christopher Rosenbluth
The Keith Wilson/Joe Somoza Poetry Prize was judged by poet John Chavez, who will read at NMSU in the spring semester of 2013.
For Poetry: Empire Mind by Adam Crittenden
For Fiction: People We Will Let in the Fortress by Melanie Sweeney Bowen
Kevin McIlvoy was the judge. Below are his comments on these
outstanding manuscripts:
We Will Let in the Fortress by Melanie Sweeney Bowen
In these extraordinary pages from a linked book of stories,
the author utterly transports the reader into the protagonist’s
conscience. Fiction only
goes this distance in portraying how far inward a person must travel
feel the very ground of her heart, how far outward to recognize the
another’s ways of being. These
short stories but they have novelistic scale, and it is particularly
to know that they are part of a large project reaching deeply into
mysteries of forgiveness and self-forgiveness, of losing trust and
it, of deliberately holding back the secret self and of offering it
impulsive loving compassion. The reader cannot hold back from
rereading the wise
and evocative passages of the two stories, “Earth to Nashville” and
“People We
Will Let in the Fortress.” Here
one example (from “People We Will Let in the Fortress”) of how this
invites the reader to intimately experience the clear and
psychological crises of the characters: If there was anything she knew with certainty in this world,
it was that the bad things never came on when you expected them, but
when you couldn’t possibly have prepared. They felt deeply personal,
same time reminded you of your irrelevance, how utterly random your
with loss and pain. Unlike her, she knew Oliver believed everything
him. Nothing felt irrelevant. In some ways, this perspective could
easier; you could always wind your way back to some choice, some
slip that set
everything else in motion, and bypass the why-me questioning that
plagued others.
But it also made the world quite lonely, even cruel. If everything
in some personal action or desire, then there was no escaping
yourself. There is no doubt: People We Will Let in the Fortress will
be a great book.
Mind by Adam Crittenden
The poems in Empire Mind are tolling poems: from a steely
distance they toll warning; from a dreamlike condition, they toll
from a creepy sense of the comic, they toll pain. They call to mind Stephen Dunn’s “Loves” in which
‘loving’ speaker of the poem invokes “church bells ringing stasis,
stasis.”
There is an out-of-body voice in these disturbing contemplations of
“garbage island,” of this ‘machine kingdom’ that is our violated
planet. The testament of
the poems is of
individuals and groups who have been shocked past responsiveness and
have been buried alive and must speak to themselves from within the
heap, from within the crusher (“Recycle, Reuse, Reduce, and Close
the Lid”). Reading
“Temporal,” one feels the despair
of the speaker who has been made mute by the torpor of the earth’s
population and has also become addicted to it: “If we study the
past, then / we
can better destroy each other / in the present.” In the terrifying poem “The Machine Machine” the
given the facts by a speaker calculating the absurd “position” one
acquire in this doomed kingdom: “The Machine Machine is a machine /
maggots like me for lunch, / not breakfast. Breakfast maggots are
different. //
Those maggots are maggots / that wish they could trade in their
for a few good circuits.” The writer of Empire Mind has not flinched; in each poem,
the result is a powerful fullness of horror. Thanks to all
of you who submitted this year--it was a very competitive pool.
And our thanks to Kevin McIlvoy for his efforts in supporting the endowment and carefully reading and considering the submissions.
The winners will receive $500 each for the award. Posted by
We thank everyone-- our readers, our graduating MFA students, our audiences, and the La Soc staff, for a fantastic year of readings. Below are images from the last three reading events. Poet Jon Davis read on April 13, 2012. He is the author of three chapbooks and three full-length collections of poetry. The Bloomsbury Reviewsaid of his collection Preliminary Report: "This is one of the best books of poetry to appear this year." He has received numerous awards for his poetry, including a Lannan Literary Award, two National Endowment for the Arts Fellowships, and the I.B. Lavan Younger Poets Award from the Academy of America Poets. For the past twenty years, he has been a professor of Creative Writing at the Institute of American Indian Arts in Santa Fe, New Mexico.
Blake Butler is the author of the novel There Is No Year, the novella Ever, and the novel-in-stories Scorch Atlas. He edits “the internet literature magazine blog of the future” HTMLGiant, as well as two journals of innovative text, Lamination Colony and No Colony. He lives in Atlanta. He read on April 27, 2012. Anna Pattison, MFA (Fiction) '12, reads on April 27, 2012.