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Patent US6139147 - Actively controllable multifocal lens - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsThe invention provides an active multifocal optical lens. The optical lens has a first optical element that provides a first optical power and a second optical element that provides a second optical power. The second optical element is a volume holographic optical element, which has been programmed to...http://www.google.com/patents/US6139147?utm_source=gb-gplus-sharePatent US6139147 - Actively controllable multifocal lensAdvanced Patent SearchPublication numberUS6139147 APublication typeGrantApplication numberUS 09/196,990Publication dateOct 31, 2000Filing dateNov 20, 1998Priority dateNov 20, 1998Fee statusPaidPublication number09196990, 196990, US 6139147 A, US 6139147A, US-A-6139147, US6139147 A, US6139147AInventorsXiaoxiao ZhangOriginal AssigneeNovartis AgExport CitationBiBTeX, EndNote, RefManPatent Citations (53), Non-Patent Citations (28), Referenced by (43), Classifications (23), Legal Events (6) External Links: USPTO, USPTO Assignment, EspacenetActively controllable multifocal lens
1. A multifocal optical lens comprising a first optical element and a transmission volume holographic optical element, wherein said first optical element provides a first optical power at a first focal point, and said holographic optical element or said holographic optical element in combination with said first optical element provides a second optical power at a second focal point, wherein the axis of said first focal point is misaligned from the axis of said second focal point by an angle of greater than about 8�.
About 0.06 ml of the Nelfilcon A lens monomer composition is deposited in the center portion of a female mold half, and a matching male mold half is placed over the female mold half, forming a lens mold assembly. The male mold half does not touch the female mold half, and they are separated by about 0.1 mm. The lens mold halves are made from quartz and are masked with chrome, except for the center circular lens portion of about 15 mm in diameter. Briefly, Nelfilcon A is a product of a crosslinkable modified polyvinyl alcohol which contains about 0.48 mmol/g of an acryamide crosslinker. The polyvinyl alcohol has about 7.5 mol % acetate content. Nelfilcon A has a solid content of about 31% and contains about 0.1% of a photoinitiator, Durocure� 1173. The closed lens mold assembly is placed under a laser set up. The laser set up provides two coherent collimated U.V. laser beams having 351 nm wavelength, in which one beam is passed through a optical convex lens so that the focal point is formed at 500 mm away from the lens mold assembly. The focused light serves as a point-source object light. The angle fbrmed between the paths of the object light and the reference light is about 7�. The set up provides an HOE having an added corrective power of 2 diopters. The lens monomer composition is exposed to the laser beams having about 0.2 watts for about 2 minutes to completely polymerize the composition and to form interference fringe patterns. Since the lens mold is masked except for the center portion, the lens monomer exposed in the circular center portion of the mold is subjected to the object light and the reference light and polymerized.
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Du Pont De Nemours And CompanyDry film process for altering the wavelength of response of hologramsUS5235441 *Jun 11, 1992Aug 10, 1993Spyros GeorgarasHolographic lensesUS5257132 *Apr 9, 1991Oct 26, 1993The United States Of America As Represented By The United States Department Of EnergyBroadband diffractive lens or imaging elementUS5291316 *Sep 27, 1991Mar 1, 1994Astronautics Corporation Of AmericaInformation display system having transparent holographic optical elementUS5296881 *Apr 12, 1991Mar 22, 1994Pilkington Diffractive Lenses LimitedMethod and contact lenses for treating presbyopiaUS5331132 *Oct 2, 1992Jul 19, 1994Pilkington Diffractive Lenses LimitedManufacture of visual lensesUS5331445 *Aug 18, 1992Jul 19, 1994International Business Machines CorporationIncreased Bragg angle sensitivity hologram system and methodUS5351321 *Oct 20, 1992Sep 27, 1994Elias SnitzerBragg grating made in optical waveguideUS5351324 *Sep 10, 1993Sep 27, 1994The Regents Of The University Of California, Office Of Technology TransferFiber optic security seal including plural Bragg gratingsUS5422745 *Oct 30, 1992Jun 6, 1995The United States Of America As Represented By The Secretary Of The NavyPreparation of permanent photowritten optical diffraction gratings in irradiated glassesUS5424828 *Jul 19, 1993Jun 13, 1995Fuji Photo Optical Co., Ltd.Method for measuring and analyzing interference fringes using a halographic optical element having two patterns for diffracting a laser beamUS5432623 *Sep 27, 1993Jul 11, 1995Egan; Michael S.Optical lens incorporating an integral hologramUS5443507 *Apr 5, 1993Aug 22, 1995Adatomed Pharmazeutische Und Medizintechnische Gesellschaft MbhIntraocular lens setUS5450378 *Nov 8, 1993Sep 12, 1995Hekker; Roeland M. T.Holographic elements for an optical recording systemUS5508317 *Aug 4, 1994Apr 16, 1996Ciba-Geigy CorporationPhotocrosslinked polymersUS5523993 *May 17, 1995Jun 4, 1996Opto-Electronics & Systems LaboratoriesHolographic optical element for optical disk pickup headUS5553091 *Dec 5, 1994Sep 3, 1996France Telecom Etablissement Autonome De Droit PublicOptical component having a plurality of bragg gratings and process for the production of said componentsUS5568496 *Nov 30, 1994Oct 22, 1996The United States Of America As Represented By The Secretary Of The NavyLaser optics protective deviceUS5582474 *Oct 5, 1994Dec 10, 1996Prince CorporationVehicle light assemblyUS5587847 *Aug 14, 1990Dec 24, 1996Kaiser Optical SystemsLaser protection window using holographic optical element and channel platesUS5602657 *Oct 20, 1995Feb 11, 1997International Business Machines CorporationHologram system having hologram layers with rotationally offset Bragg planesUS5612986 *Sep 22, 1995Mar 18, 1997Lawrence Berkeley Laboratory, University Of CaX-ray lithography using holographic imagesEP0037476A1 *Mar 13, 1981Oct 14, 1981Cabloptic S.A.Method and device for coupling at least two optical fibres by a holographic lensEP0404099A2 *Jun 20, 1990Dec 27, 1990E.I. Du Pont De Nemours And CompanyImproved holographic optical combiners for head-up displaysEP0407772A2 *Jun 20, 1990Jan 16, 1991E.I. Du Pont De Nemours And CompanyDry film process for altering wavelength response of hologramsEP0407773A2 *Jun 20, 1990Jan 16, 1991E.I. Du Pont De Nemours And CompanyImproved holographic notch filtersEP0435525A2 *Dec 14, 1990Jul 3, 1991Nestle S.A.Multifocal diffractive ophthalmic lens and method of manufactureEP0470811A2 *Aug 6, 1991Feb 12, 1992Minnesota Mining And Manufacturing CompanyMultifocal diffractive ophthalmic lensesEP0570120A2 *Apr 22, 1993Nov 18, 1993Flexcon Company Inc.Optical authentication deviceGB2139375A * Title not availableWO1994012909A1 *Nov 23, 1993Jun 9, 1994Innotech, Inc.A method of manufacturing toric single vision, spherical or aspheric bifocal, multifocal or progressive contact lensesWO1994023334A1 *Apr 7, 1994Oct 13, 1994The Technology Partnership PlcSwitchable lensWO1996010971A1 *Oct 10, 1995Apr 18, 1996Allergan, Inc.Liquid contact lensWO1996024075A1 *Jan 22, 1996Aug 8, 1996Novartis AgCrosslinked polymers containing ester or amide groupsWO1997010527A1 *Sep 10, 1996Mar 20, 1997The Regents Of The University Of CaliforniaStructured index optics and ophthalmic lenses for vision correctionWO1997013183A1 *Sep 30, 1996Apr 10, 1997Polaroid CorporationHolographic medium and process* Cited by examinerNon-Patent CitationsReference1 *Analysis of Multiple Hologram Optical Elements with Low dispersion and Low Aberrationis, John N. Lattta, Appled Optics, vol. 11(8), pp. 1686 1696 (Aug. 1972).2Analysis of Multiple Hologram Optical Elements with Low dispersion and Low Aberrationis, John N. Lattta, Appled Optics, vol. 11(8), pp. 1686-1696 (Aug. 1972).3 *Bandwith of Holographic Optical Elements, Thomas Stone and Nicholas George, Optics Letters, pp. 445 447, vol. 7, No. 9 (Sep. 1982).4Bandwith of Holographic Optical Elements, Thomas Stone and Nicholas George, Optics Letters, pp. 445-447, vol. 7, No. 9 (Sep. 1982).5 *Compensating Optical Systems. Part 1: Broadband Holographic Reconstruction, Robert H. Katyl, Applied Optics, May 1972, vol. 11, No. 5, pp. 1241 1247.6Compensating Optical Systems. Part 1: Broadband Holographic Reconstruction, Robert H. Katyl, Applied Optics, May 1972, vol. 11, No. 5, pp. 1241-1247.7 *Coupled Wave Theory for Thick Hologram Gratings, Herwig Kogeinik, The Bell System Technical Journal, vol. 48, No. 9, pp. 2909 2944, Nov. 1969.8Coupled Wave Theory for Thick Hologram Gratings, Herwig Kogeinik, The Bell System Technical Journal, vol. 48, No. 9, pp. 2909-2944, Nov. 1969.9 *Eye Contact GRIN Lenses, Yasuhiro Koike, Grandient Index Optical Systems, 1994 Technical Digest, Series vol. 12, pp. 87 93 (Jul. 1994).10Eye Contact GRIN Lenses, Yasuhiro Koike, Grandient Index Optical Systems, 1994 Technical Digest, Series vol. 12, pp. 87-93 (Jul. 1994).11 *Higher Diffraction Orders in On axis Holographic Lenses, R.R.A. Syms and L. Solymar, Applied Optics, vol. 21 (18), pp. 3264 3268 (Sep. 1982).12Higher Diffraction Orders in On-axis Holographic Lenses, R.R.A. Syms and L. Solymar, Applied Optics, vol. 21 (18), pp. 3264-3268 (Sep. 1982).13 *History of Holography, Paul Kirkpatrick, SPIE Seminary Proceedings, vol. 15, pp. 9 19, 1968.14History of Holography, Paul Kirkpatrick, SPIE Seminary Proceedings, vol. 15, pp. 9-19, 1968.15 *Holography Takes On A Practical Look, Tung H. Jeong, Laser Focus World, pp. 89 99, Jul. 1989.16Holography Takes On A Practical Look, Tung H. Jeong, Laser Focus World, pp. 89-99, Jul. 1989.17 *Holography: A Day in the Life, Holography Market Place, 5th Ed., B. Kluepfel, A. Rhody, F. Ross, pp. 147 154 (Oct. 1995).18Holography: A Day in the Life, Holography Market Place, 5th Ed., B. Kluepfel, A. Rhody, F. Ross, pp. 147-154 (Oct. 1995).19 *Hybrid Diffractive Refractive lenses and Achromats, Thomas Stone and Nicholas George, Applied optics, vol. 27 (14), pp. 2960 2971, Jul. 1988.20Hybrid Diffractive-Refractive lenses and Achromats, Thomas Stone and Nicholas George, Applied optics, vol. 27 (14), pp. 2960-2971, Jul. 1988.21 *Image Evaluation of Ophthalmi Devices, David S. Loshin, Optometry and Vision Science, vol. 6y7, No. 8, pp. 617 621, 1990.22Image Evaluation of Ophthalmi Devices, David S. Loshin, Optometry and Vision Science, vol. 6y7, No. 8, pp. 617-621, 1990.23 *Lens Aberration by Holography (correction), Teruji Ose, et al., pp. 57 69.24Lens Aberration by Holography (correction), Teruji Ose, et al., pp. 57-69.25 *The Holographic Bifocal Contact Lens, Suzanne St. Cyr, Holospher, 15, 5, 14 pp. 14 24, 1988.26The Holographic Bifocal Contact Lens, Suzanne St. Cyr, Holospher, 15, 5, 14 pp. 14-24, 1988.27 *Wavelength Performance of Holographic Optical Elements, Thomas Stone and Nicholas George, Applied Optics, Nov. 1985, vol. 24, No. 22, pp. 3797 3810.28Wavelength Performance of Holographic Optical Elements, Thomas Stone and Nicholas George, Applied Optics, Nov. 1985, vol. 24, No. 22, pp. 3797-3810.* Cited by examinerReferenced byCiting PatentFiling datePublication dateApplicantTitleUS6533416 *Jul 20, 2001Mar 18, 2003Ocular Sciences, Inc.Contact or intraocular lens and method for its preparationUS6851803 *Oct 24, 2002Feb 8, 2005C. Benjamin WooleyOphthalmic lenses with reduced chromatic blurUS6905641Sep 26, 2001Jun 14, 2005Calhoun Vision, Inc.Delivery system for post-operative power adjustment of adjustable lensUS7018041 *Jun 2, 2004Mar 28, 2006Luckoff Display CorporationCosmetic holographic optical diffractive contact lensesUS7048378 *Sep 27, 2004May 23, 2006Innova Vision Inc.Method of fabricating holographic contact lensUS7059719 *Aug 30, 2004Jun 13, 2006University Of Pittsburagh - Of The Commonwealth System Of Higher EducationContact lenses colored with crystalline colloidal array technologyUS7063422Apr 12, 2004Jun 20, 2006Novartis AgMultifocal ophthalmic lensUS7093938 *Aug 2, 2005Aug 22, 2006Apollo Optical Systems LlcBifocal multiorder diffractive lenses for vision correctionUS7105110Apr 25, 2005Sep 12, 2006Calhoun Vision, Inc.Delivery system for post-operative power adjustment of adjustable lensUS7160010Nov 15, 2005Jan 9, 2007Visteon Global Technologies, Inc.Light manifold for automotive light moduleUS7232218Oct 25, 2004Jun 19, 2007Apollo Optical Systems, Inc.Bifocal multiorder diffractive lenses for vision correctionUS7293871 *Aug 12, 2002Nov 13, 2007Ophthonix, Inc.Apparatus and method of correcting higher-order aberrations of the human eyeUS7401948Oct 17, 2005Jul 22, 2008Visteon Global Technologies, Inc.Near field lens having reduced sizeUS7438454Nov 29, 2005Oct 21, 2008Visteon Global Technologies, Inc.Light assembly for automotive lighting applicationsUS7465075Mar 21, 2005Dec 16, 2008Visteon Global Technologies, Inc.Lens assembly for an automobile light assembly having LED light sourceUS7489453Nov 15, 2005Feb 10, 2009Visteon Global Technologies, Inc.Side emitting near field lensUS7554742Jun 30, 2009Visteon Global Technologies, Inc.Lens assemblyUS7564070Jul 21, 2009Visteon Global Technologies, Inc.Light emitting diode device having a shield and/or filterUS7695134Apr 13, 2010Ophthonix, Inc.Apparatus and method of correcting higher-order aberrations of the human eyeUS8790104May 7, 2009Jul 29, 2014Essilor International (Compagnie Generale D'optiqueApparatus and method of fabricating a compensating element for wavefront correction using spatially localized curing of resin mixturesUS9075186 *Mar 30, 2012Jul 7, 2015Johnson & Johnson Vision Care, Inc.Free form lens with refractive index variationsUS20020093701 *Dec 19, 2001Jul 18, 2002Xiaoxiao ZhangHolographic multifocal lensUS20020100990 *Sep 26, 2001Aug 1, 2002Platt Ben C.Delivery system for post-operative power adjustment of adjustable lensUS20030003295 *Aug 12, 2002Jan 2, 2003Dreher Andreas W.Apparatus and method of correcting higher-order aberrations of the human eyeUS20040080710 *Oct 24, 2002Apr 29, 2004Wooley C. BenjaminOphthalmic lenses with reduced chromatic blurUS20040207807 *Apr 12, 2004Oct 21, 2004Lindacher Joseph MichaelMultifocal ophthalmic lensUS20050057720 *Oct 25, 2004Mar 17, 2005Morris G. MichaelBifocal multiorder diffractive lenses for vision correctionUS20050094094 *Aug 30, 2004May 5, 2005Sanford AsherContact lenses colored with crystalline colloidal array technologyUS20050192563 *Apr 25, 2005Sep 1, 2005Calhoun Vision, Inc.Delivery system for post-operative power adjustment of adjustable lensUS20050264757 *Aug 2, 2005Dec 1, 2005Morris G MBifocal multiorder diffractive lenses for vision correctionUS20050270474 *Jun 2, 2004Dec 8, 2005Odhner Jefferson ECosmetic holographic optical diffractive contact lensesUS20060012752 *Sep 27, 2004Jan 19, 2006Cheng-Hsiu ChenMethod of fabricating holographic contact lensUS20060050234 *Aug 20, 2004Mar 9, 2006Morris G MDiffractive lenses for vision correctionUS20060261502 *Jul 28, 2006Nov 23, 2006Platt Ben CDelivery system for post-operative power adjustment of adjustable lensUS20080088938 *May 15, 2007Apr 17, 2008Lai Shui TApparatus and method of fabricating a compensating element for wavefront correction using spatially localized curing of resin mixturesUS20080252845 *Oct 9, 2007Oct 16, 2008Dreher Andreas WApparatus and method of correcting higher-order aberrations of the human eyeUS20090212465 *May 7, 2009Aug 27, 2009Lai Shui TApparatus and method of fabricating a compensating element for wavefront correction using spatially localized curing of resin mixturesUS20120187589 *Jul 26, 2012Widman Michael FFree form lens with refractive index variationsUS20150301356 *Apr 16, 2015Oct 22, 2015Beam Engineering For Advanced Measurements Co.Methods and Apparatus for Human Vision Correction Using Diffractive Waveplate LensesWO2002026121A1 *Sep 26, 2001Apr 4, 2002Calhoun Vision, Inc.Power adjustment of adjustable lensWO2002054137A2 *Dec 28, 2001Jul 11, 2002Novartis AgHolographic multifocal lensWO2002054137A3 *Dec 28, 2001Sep 19, 2002Novartis AgHolographic multifocal lensWO2003009053A1 *Jul 18, 2002Jan 30, 2003Ocular Sciences, Inc.Contact or intraocular lens and method for its preparation* Cited by examinerClassifications U.S. Classification351/159.41, 264/1.31, 359/19, 264/1.36International ClassificationG02C7/00, G02B5/32, G02C7/04, G02C7/06Cooperative ClassificationG02C7/049, G02C7/043, G02C2202/16, G02C7/041, G02C7/00, G02C7/048, G02C2202/20, G02B5/32, G02C7/06European ClassificationG02C7/04H, G02C7/04M, G02C7/04B, G02B5/32, G02C7/06, G02C7/00Legal EventsDateCodeEventDescriptionSep 5, 2000ASAssignmentOwner name: NOVARTIS AG, SWITZERLANDFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:ZHANG, XIAOXIAO;REEL/FRAME:011131/0494Effective date: 20000706May 19, 2004REMIMaintenance fee reminder mailedJun 1, 2004SULPSurcharge for late paymentJun 1, 2004FPAYFee paymentYear of fee payment: 4Apr 18, 2008FPAYFee paymentYear of fee payment: 8Apr 11, 2012FPAYFee paymentYear of fee payment: 12RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services

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Ranga - GHAC - Great Hyderabad Adventure Club - Govt. of India regd (Hyderabad) | Meetup
Ranga https://secure.meetupstatic.com/photos/member/d/3/c/e/member_46674222.jpeg https://www.meetup.com/great-hyderabad-adventure-club/members/2259421/
Meetup.com suggestions for a near by group.
I will help me complete my wish list of adventure activities and locations.
Trekking, Rock climbing, Para gliding etc
I started rock climbing with GHAC in 2010 as a novice. Since then, I pretty much stuck to climbing sport with few treks here and there.
You dont need to be a pro to do any adventure. All you need is right spirit, a group that shares and a sense of safety! This is definitely the one!
Outdoor Adventures · Camping · Travel · Fitness · Weekend Adventures · Trekking · Adventure · Outdoors · Bouldering · Sport Climbing · Outdoor Fitness · Photography Classes · Hyderabad Photography · Digital Photography · Landscape Photography · Photography · Outdoor Photography · Rock Climbing · Internet Communication Technology · New Technology · Seven Habits... · Investor's Business Daily · Swimming
Adventurers 29,854
3,857 Travel Freaks
19,602 Hyderabad Travellers
20,007 Adventurers
4,550 Analytics Evangelists
23,230 Trekker's

type: global

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The Conference Board Leading Economic Index® (LEI) for Korea Increases -- NEW YORK, Dec. 13, 2012 /PRNewswire/ --
NEW YORK, Dec. 13, 2012 /PRNewswire/ -- The Conference Board Leading Economic Index® (LEI) for Korea increased 0.8 percent in October to 120.9 (2004 = 100), following a 1.1 percent increase in September, and a 0.6 percent decline in August. At the same time, The Conference Board Coincident Economic Index® (CEI) for Korea, a measure of current economic activity, decreased 0.3 percent in October to 117.7 (2004 = 100), following a 0.4 percent increase in September, and a 0.3 percent decrease in August. The LEI for Korea has increased in the last two months, after declining for five consecutive months, but its six-month change remains in negative territory. Meanwhile, The CEI for Korea declined in October, and its six-month growth rate has slowed compared to earlier this year. Taken together, the composite indexes and their components continue to suggest that the rate of economic growth is likely to remain slow in the near term.
About The Conference Board Leading Economic Index® (LEI) for Korea The composite economic indexes are the key elements in an analytic system designed to signal peaks and troughs in the business cycle. The leading and coincident economic indexes are essentially composite averages of several individual leading or coincident indicators. They are constructed to summarize and reveal common turning point patterns in economic data in a clearer and more convincing manner than any individual component – primarily because they smooth out some of the volatility of individual components. The seven components of The Conference Board Leading Economic Index® for Korea include: Stock Prices Value of Machinery Orders Letter of Credit Arrivals Index of Shipments to Inventories Export FOB Yield of Government Public Bonds Private Construction Orders For more information including full press release and technical notes: http://www.conference-board.org/data/bcicountry.cfm?cid=6 For more information about The Conference Board global business cycle indicators: http://www.conference-board.org/data/bci.cfm About The Conference Board The Conference Board is an independent business membership and research association working in the public interest. Our mission is unique: To provide the world's leading organizations with the practical knowledge they need to improve their performance and better serve society. The Conference Board is a non-advocacy, not-for-profit entity holding 501 (c) (3) tax-exempt status in the United States. www.conference-board.org. Summary Table of Composite Economic Indexes
More by this Source CEO Confidence Declined in the Third Quarter

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- Picture of Hotel Niagara, Catanzaro Lido - TripAdvisor
Catanzaro Lido RECENTLY VIEWED No results found JOINinSearch About Catanzaro...HotelsVacation RentalsRestaurantsThings to doFlightsTravel ForumAirlinesTravel GuidesBest of 2017Road TripsHelp CenterLog in Join My Trips Bookings Rental Inbox Browse
- Picture of Hotel Niagara, Catanzaro Lido
Europe Italy Calabria Province of Catanzaro Catanzaro Catanzaro Lido Catanzaro Lido Hotels Hotel Niagara Pictures
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#4 of 4 Hotels in Catanzaro Lido Viale Crotone 170, 88100 Catanzaro Lido, Catanzaro, Italy Hotel amenities
“Simple & clean”	09/05/2016
“complimenti alla direzione”	07/22/2017
22 helpful votes Reviewed February 1, 2013
Thank ChiccoTravel Report AntFer, Proprietario at Hotel Niagara, responded to this review
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Add Photo See all 171 reviews of Hotel Niagara Explore similar hotels Grand Hotel Paradiso 195 ReviewsShow Prices 1.2 miles Best Western Plus Hotel Perla del Porto 427 ReviewsShow Prices 0.3 miles Hotel Palace 395 ReviewsShow Prices 0.4 miles See all Catanzaro Lido hotels Know better. Book better. Go better. © 2017 TripAdvisor LLC All rights reserved. Terms of Use | Privacy Policy | Site Map* TripAdvisor LLC is not a booking agent and does not charge any service fees to users of our site... (more) TripAdvisor LLC is not responsible for content on external web sites. Taxes, fees not included for deals content. EXPLOREAbout UsHelp CenterCURRENCY/COUNTRY$USDUnited States

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P. 1e Myth Revisitede Myth RevisitedRatings: (0)|Views: 15
|Likes: 0Published by Wil CarloBy Michael E. GerberBy Michael E. GerberMore info:Categories:Types, Books - Non-fictionPublished by: Wil Carlo on May 24, 2013Copyright:Attribution Non-commercialAvailability:Read on Scribd mobile: iPhone, iPad and Android.download as PDF, TXT or read online from ScribdFlag for inappropriate content|Add to collectionSee moreSee lesshttps://www.scribd.com/doc/143447080/e-Myth-Revisited05/03/2014pdftextoriginal You're Reading a Free Preview

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Amazon.co.uk: Mr. Andrew Johnson "bigjohnny7"'s review of Grand Theft Auto: Vice City Stories Offici...
Not What It Says On The Tin..., 31 Mar 2007
By Mr. Andrew Johnson "bigjohnny7"
This review is from: Grand Theft Auto: Vice City Stories Official Strategy Guide for PS2 (Official Strategy Guides (Bradygames)) (Paperback)
If you're like me, you buy these guides to complete the game 100%. I've hardly had a problem with the Bradygames guides before (maybe 1 or 2 secret packages not being in exactly the right place), but this one takes the biscuit.The guide has not been amended from the PSP guide - DESPITE the fact that there are 5 extra rampages and 6 extra unique jumps on the PS2 version. Also, 1 rampage and 2 red baloons weren't correctly mapped.To make matters slightly worse, there is no map for the police bribes (as there usually is).I've bought this from Amazon and I'm seriously considering returning it.
Grand Theft Auto: Vice City Stories Official Strategy Guide for PS2 (Official Strategy Guides (Bradygames)) 0744009162
Mr. Andrew Johnson "bigjohnny7"
Top Reviewer Ranking: 4,888,686

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Lenscoat body cover: Nikon FX SLR (DF, D1-D5, D600-D850) Talk Forum: Digital Photography Review
Lenscoat has a soft neoprene cover for the camera body that reduces the shutter noise. The price is right.
http://www.lenscoat.com/bodyguard-clear-backsuptmsup-p-1036.html?osCsid=0ef77ce7d89e0dfcef4b014794068c69

value: This website is a website about digital cameras and digital photography, established in November 1998. The website provides comprehensive reviews of digital cameras, lenses and accessories, buying guides, user reviews, and forums for individual cameras, as well as general photography forums.


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Patent US6978322 - Embedded controller for real-time backup of operation states of peripheral ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign in<nobr>Advanced Patent Search</nobr>PatentsAn embedded controller includes a central processing unit, a memory interface for interface with an external memory, and a function block or peripheral device with a register for storing operation state information. The peripheral device includes a detection circuit, a storage unit, for example in the...http://www.google.com/patents/US6978322?utm_source=gb-gplus-sharePatent US6978322 - Embedded controller for real-time backup of operation states of peripheral devicesAdvanced Patent SearchPublication numberUS6978322 B2Publication typeGrantApplication numberUS 10/446,307Publication dateDec 20, 2005Filing dateMay 28, 2003Priority dateAug 26, 2002Fee statusLapsedAlso published asUS20040039967Publication number10446307, 446307, US 6978322 B2, US 6978322B2, US-B2-6978322, US6978322 B2, US6978322B2InventorsJin-Kwon ParkOriginal AssigneeSamsung Electronics, Co., Ltd.Export CitationBiBTeX, EndNote, RefManPatent Citations (9), Referenced by (3), Classifications (13), Legal Events (6) External Links: USPTO, USPTO Assignment, EspacenetEmbedded controller for real-time backup of operation states of peripheral devicesUS 6978322 B2Abstract An embedded controller includes a central processing unit, a memory interface for interface with an external memory, and a function block or peripheral device with a register for storing operation state information. The peripheral device includes a detection circuit, a storage unit, for example in the form of a FIFO, a multiplexer, and a direct memory access (DMA) controller. The state detection circuit activates a flag signal whenever the operation state information of the register is varied, and the FIFO stores the operation state information from the register in response to the flag signal. The multiplexer is controlled by the DMA controller and transmits the operation state information of the FIFO to an internal bus. As a result, the operation state information of the FIFO is stored in the external memory through the memory interface.
1. A single-chip control device having a central processing unit and a memory interface for interfacing with an external memory, the single-chip control device comprising:
at least one function block;
a first register for storing operation state information of the function block;
a state detection circuit for activating a flag signal when the operation state information of the first register is varied;
a storage unit for storing the operation state information of the first register in response to the flag signal; and
a control circuit for transmitting the operation state information of the storage unit to an internal bus in response to the flag signal in order to store the operation state information of the storage unit in the external memory through the memory interface.
2. The single-chip control device of claim 1, wherein the control device comprises:
a switch for transmitting the operation state information of the storage unit to the internal bus in response to a switch control signal; and
a direct memory access controller for generating the switch control signal in response to the flag signal.
3. The single-chip control device of claim 2, wherein the direct memory access controller issues a bus request to the central processing unit when the flag signal is activated, and activates the switch control signal upon approval by the central processing unit of the use of the bus.
4. The single-chip control device of claim 1, wherein the state detection circuit comprises:
a second register for storing operation state information output by the first register in synchronization with a clock signal; and
a comparator for activating the flag signal depending upon whether an output of the first register is identical with an output of the second register.
5. The single-chip control device of claim 4, wherein the first and second registers constitute a shift register operating in synchronization with the clock signal.
6. The single-chip control device of claim 1, wherein the storage unit comprises a FIFO.
7. A single-chip control device comprising:
at least one peripheral device connected to an internal bus; and
a memory interface for interfacing with an external memory, the memory interface being connected to the internal bus,
wherein the peripheral device comprises:
a state register for storing operation state information of an internal functional block;
a state detection circuit for activating a flag signal when the operation state information of the state register is varied;
a storage unit for storing the operation state information of the state register in response to the flag signal;
8. The single-chip control device of claim 7, wherein the direct memory access controller issues a bus request to the central processing unit when the flag signal is activated, and activates the switch control signal upon approval by the central processing unit of the use of the bus.
9. The single-chip control device of claim 7, wherein the state detection circuit comprises:
a comparison register for storing the operation state information output by the state register in synchronization with a clock signal; and
a comparator for activating the flag signal depending upon whether an output of the state register is identical with an output of the comparison register.
10. The single-chip control device of claim 9, wherein the state register and the comparison register constitute a shift register operating in synchronization with the clock signal.
11. The single-chip control device of claim 7, wherein the storage unit comprises a FIFO.
12. A single-chip control device comprising:
a memory interface for interfacing with an external memory, the memory interface being connected to an internal bus;
at least one peripheral device for storing operation state information of an internal function block in a state register, the peripheral device being connected to the internal bus; and
a backup control block for communicating with the central processing unit and contemporaneously storing the operation state information of the state register,
wherein when the operation state information of the state register is varied, the backup control block stores the operation state information of the state register in the external memory by communicating with the central processing unit.
13. The single-chip control device of claim 12, wherein the backup control block comprises:
a state detection circuit for activating a flag signal whenever the operation state information of the state register is varied;
a FIFO for storing the operation state information of the state register in response to the flag signal;
a switch for transmitting the operation state information of the FIFO to the internal bus in response to a switch control signal; and
14. The single-chip control device of claim 13, wherein the direct memory access controller issues a bus request to the central processing unit when the flag signal is activated, and activates the switch control signal upon approval by the central processing unit of the use of the bus.
15. The single-chip control device of claim 13, wherein the state detection circuit comprises:
16. The single-chip control device of claim 15, wherein the state register and the comparison register constitute a shift register operating in synchronization with the clock signal.
17. A single-chip control device comprising:
a plurality of peripheral devices each having a state register for storing operation state information of an internal function block, the peripheral devices being connected to the internal bus; and
a backup control block for communicating with the central processing unit and contemporaneously storing the operation state information transmitted from selected one of the state registers in the peripheral devices,
18. The single-chip control device of claim 17, wherein the backup control block comprises:
a first selection circuit for selecting one operation state information among all operation state information output by the state registers of the peripheral devices;
a state detection circuit for activating a flag signal when the operation state information from the selected state register is varied;
a FIFO for storing the operation state information of the selected state register in response to the flag signal;
19. The single-chip control device of claim 18, wherein the direct memory access controller issues a bus request to the central processing unit when the flag signal is activated, and activates the switch control signal upon approval by the central processing unit of the use of the bus.
20. The single-chip control device of claim 17, wherein the state detection circuit comprises:
21. A data backup method of a single-chip control device having a central processing unit, a peripheral device with a state register for storing operation state information, and a memory interface for interfacing with an external memory, the data backup method comprising:
detecting whether operation state information of the state register is varied;
storing the operation state information in a storage unit when the operation state information of the state register is varied, and simultaneously issuing a request to the central processing unit for use of a bus; and
storing the operation state information stored in the storage unit in the external memory when the use of the bus is approved.
22. The method of claim 21, wherein the storage unit comprises a FIFO.
FIELD OF THE INVENTION The present invention relates to integrated circuit devices and, more particularly, to an embedded controller or a microcontroller.
BACKGROUND OF THE INVENTION Despite its apparent similarity to microprocessors used in personal computers (PC), a microcontroller or an embedded controller offers a number of additional functions that are implemented on the same semiconductor substrate (i.e., chip). In a typical PC, a microprocessor performs basic operation functions while other integrated circuits perform other functions such as network communication, input/output transmission, peripheral device control, and the like. In a typical microcontroller, these additional functions are commonly established in a single integrated circuit. A typical microcontroller includes a central processing unit (CPU), a memory interface or a memory controller for interface with an external memory, and various function blocks or peripheral devices.
As the embedded controller or the microcontroller is deployed in a variety of applications, function blocks or peripheral devices for performing newly required functions may be added to the embedded controller or the microcontroller or may be substituted for other function blocks or peripheral devices. In a case where a function block is newly embedded in a microcontroller as a peripheral device, there is a need for verifying whether the function block operates correctly. The verification may optionally be done using a value stored in an internal state register for storing operation state information. The data read-out from the internal state register is to be used to debug the function block.
Conventionally, a debugging program is used to debug a function block. A central processing unit periodically or randomly reads out data stored in a state register of a function block or a peripheral device according to a debugging program. The read-out data is then stored in an external memory, and in turn used to debug the function block. Since many cycles are needed when the debugging program is used to access the state register of the function block, it is impossible to obtain varied operation state information of the state register in real time. For direct access to the data stored in the state register of the function block in real time, a specific test pin directly connected to the state register may be provided to a microcontroller. However, this approach requires that the test pin is unavailable for use during runtime operation of the microcontroller or an embedded controller.
A method for obtaining operation state information stored in a state register of a function block (or peripheral device states) by means of a scan structure is disclosed in U.S. Pat. No. 6,363,501 entitled �METHOD AND APPARATUS FOR SAVING AND LOADING PERIPHERAL DEVICE STATES OF A MICROCONTROLLER VIA A SCAN PATH�, issued to Tobis et al., Mar. 26, 2002. This patent discloses the technique that registers in peripheral devices (or function blocks) are scan-connected in series to sequentially store values of the registers in an external memory. In this case, the values of the registers are obtained while the embedded controller or microcontroller is in a paused state. Thus, this approach does not provide for the debugging of function blocks or peripheral devices during real-time operation of the microcontroller.
A technique for providing a special test port into a microcontroller so as to check operation states of peripheral devices in real time is disclosed in U.S. Pat. No. 5,248,770 entitled �SINGLE-CHIP MICROCONTROLLER WITH EFFICIENT PERIPHERAL TESTABILITY�, issued to Garner, Jun. 27, 1995. In this patent, a test port is directly connected to an external test apparatus and is used in direct communication with peripheral devices. In this manner, it is possible to directly access the peripheral devices via the test port. However, this technique demands additional test pins as well as an external test apparatus.
SUMMARY OF THE INVENTION In view of the foregoing, the present invention provides a technique by which operation state information of function blocks or peripheral devices which are varied during each clock cycle can be obtained without the need for a high-priced test apparatus or through the use of test pins.
The present invention thus provides an apparatus for real-time backup of information stored in a state register of a peripheral device in an embedded controller.
Further, the present invention provides an apparatus for real-time backup of information stored in a state register of a peripheral device in an embedded controller without influencing the operation of the central processing unit (CPU), even though no test pin is used.
According to an aspect of the invention, a single-chip control device having a central processing unit (CPU) and a memory interface for interface with an external memory includes at least one function block, a first register for storing operation state information of the function block, a state detection circuit for activating a flag signal whenever the operation state information of the first register is varied, a storage unit, for example a FIFO, for storing the operation state information of the first register in response to the flag signal, and a control circuit for transferring the operation state information of the FIFO to an internal bus in response to the flag signal so that the operation state information of the FIFO may be stored in the external memory through the memory interface.
The control circuit may include a switch for transferring the operation state information of the FIFO to the internal bus and a direct memory access controller for generating the switch control signal in response to the flag signal.
The direct memory access controller may issue a bus request to the central processing unit upon activation of the flag signal. When use of the bus is approved, the direct memory access controller activates the switch control signal.
The state detection circuit may include a second register for storing operation state information output by the first register in synchronization with a clock signal and a comparator for activating the flag signal depending on whether an output of the first register is identical with that of the second register.
The first and second registers may constitute a shift register operating in synchronization with the clock signal.
FIG. 1 is a block diagram of an embedded controller or microcontroller according to a first embodiment of the present invention.
FIG. 2 is a block diagram of one of the peripheral devices among the peripheral devices shown in FIG. 1.
FIG. 3 illustrates a preferred embodiment of the state detection circuit shown in FIG. 2.
FIG. 4 is a flow diagram of a method for storing operation state information of a state register of a peripheral device in an external memory according to the present invention.
FIG. 5 is a block diagram of a peripheral device according to a modified embodiment of the present invention.
FIG. 6 is a block diagram of an embedded controller or microcontroller according to a second embodiment of the present invention.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS According to the present invention, a state register for storing operation state information is provided in a function block (or function blocks) or a peripheral device (or peripheral devices) of an embedded controller or a microcontroller. Whenever operation state information stored in the state register is varied, a state detection circuit stores the varied information in a temporary storage device, for example a FIFO. A direct memory access. (DMA) controller transfers the information stored in the FIFO to an external memory by means of communication with a central processing unit (CPU). Such a backup structure makes it possible to store all operation state information of function blocks in an external memory in real time without affecting operation of the central processing unit even though additional test pins are not used. The information stored in the external memory may be used, for example, to debug the function blocks or peripheral devices.
An embedded controller or a microcontroller according to a first embodiment of the present invention is now described below with reference to FIG. 1.
Referring to FIG. 1, an embedded controller or microcontroller 100 includes an internal bus denoted as �BUS� and is coupled to an external memory 160. A central processing unit (CPU) 110 operating as an execution unit, a memory interface 120 operating as a memory controller, and a plurality of peripheral devices 130, 140, and 150 operating as a function blocks are coupled to the internal bus BUS. All components of the embedded controller or microcontroller 100 are provided on the same semiconductor substrate (or chip).
The peripheral devices 130, 140, and 150 may be substituted for other peripheral devices according to the application of the embedded controller or microcontroller 100. Alternatively, new peripheral devices may be embedded in a microcontroller according to the application of the embedded controller or microcontroller 100. That is, in the event that operation of peripheral devices newly embedded in a microcontroller is not verified, the new peripheral devices must be debugged using their operation state information so that they may normally operate. In case of the present invention, operation state information stored in a state register of a peripheral device is stored in an external memory 160 in real time by means of a direct memory access function, which is now explained in detail. The operation state information stored in the external memory 160 is used, for example, to debug peripheral devices.
Of the peripheral devices shown in FIG. 1, one peripheral device is now described in detail with reference to FIG. 2.
Referring to FIG. 2, a peripheral device 130 is coupled to the internal bus BUS and includes a function block 210, a state register 220, a state detection circuit 230, a FIFO 240, a direct memory access controller (hereinafter referred to as �DMA controller�) 250, and a multiplexer 260. The function block 210 operates depending upon a predetermined treatment procedure and stores operation state information of each step and/or the last step of the treatment procedure in the state register 220. In the case where the information stored in the state register 220 is traced in real time, the peripheral device 130 may be debugged quickly and easily.
The state detection circuit 230 detects whether the value of the data stored in the state register 220 is varied, and activates a DMA request signal DMA�REQ depending upon the detection result. For example, when the data value is varied, the DMA request signal DMA�REQ is activated to have a pulse shape. On the other hand, when the data value is not varied, the DMA request signal DMA�REQ is maintained in a deactivated state. The state detection circuit 230 has a register 232 for storing an output of the state register 220 and a comparator 234 for comparing the output of the state register 220 with an output of a register 232 in the state detection circuit 230, as shown in FIG. 3. For example, when positive input values are different from each other, the comparator 234 activates the DMA request signal DMA�REQ to be high during one clock cycle. The size of the register 232 is equal to that of the state register 220. The registers 220 and 232 operate as a shift register operating in synchronization with a clock signal CLK.
Returning to FIG. 2, the FIFO 240 operates as a temporary storage device to receive the operation state information stored in the state register 220 when the DMA request signal DMA�REQ is activated. That is, whenever the data value of the state register 220 is varied, the varied data value is stored in the FIFO 240. The FIFO 240 is, for example, of a size large enough to store all varied values, even if the data value of the state register 220 are varied many times. Here the FIFO 240 is referred to as a �FIFO buffer� or �FIFO register� and may be constructed using flip-flops, a memory or other components which are well known in the art. The DMA controller 250 communicates with the central processing unit 110 through the internal bus BUS. Namely, the DMA controller 250 requests use of the bus from the central processing unit 110 when the DMA request signal DMA�REQ from the state detection circuit 230 is activated. When use of the bus is approved, the DMA controller 250 generates a selection signal SEL. Likewise, when there is a DMA request from the function block 210, the DMA controller 250 communicates with the central processing unit 230 to generate the selection signal SEL. For example, when the use of the bus is approved according to the DMA request from the state detection circuit 230, the DMA controller 250 controls a multiplexer 260 so that an output of the FIFO 240 may be connected to the internal bus BUS. As a result, data from the FIFO 240 is to be stored in the external memory 160 through the memory interface 120. To the contrary, when the use of the bus is approved according to the DMA request of the function block 210, the DMA controller 250 controls the multiplexer 260 so that an output of the function block 210 may be connected to the internal bus BUS.
In this embodiment, from the standpoint of the DMA controller 250 shown in FIG. 2, it is substantially identical with a conventional DMA controller except that DMA-requesting peripheral devices increase in number. Although not shown in the drawing, the DMA controller 250 includes control logic, a data bus buffer, an address bus buffer, an address register, a word counter register, and a control register. The peripheral device 130, and the state detection circuit 230, the FIFO 240, and the multiplexer 260 are added to the DMA controller 250 that is originally provided into the peripheral device 130. In this manner, it is possible to realize an apparatus capable of backing up the operation state information of a state register in a peripheral device into external memory. In the case where a DMA controller 250 is not embedded in the respective peripheral devices 130, 140, and 150, a new DMA controller is added for realizing the apparatus for backing up the operation state information of a state register in a corresponding peripheral device into an external memory. Alternatively, a DMA controller of a microcontroller or an embedded controller may be used.
A flowchart showing the steps of storing operation state information of a state register in a peripheral device in an external memory is illustrated in FIG. 4. An operation state information backup procedure according to the invention is now described below with reference to the FIGS. 1�4 First, a state detection circuit 230 determines whether the operation state information stored in a state register 220 of a peripheral device 130 is varied (S100). Next, when the operation state information of the state register 220 is varied, it is stored in a FIFO 240 and a bus request is issued to the central processing unit (CPU) 110 at the same time (S120). More specifically, when the operation state information of the state register 220 is varied, the state detection circuit 230 activates a DMA request signal DMA�REQ. The FIFO 240 stores the varied operation state information of the state register 220 depending upon the activation of the DMA request signal DMA�REQ. At the same time, the DMA controller 250 issues a bus request to the CPU 110. Finally, when the use of the bus is approved, the DMA controller 250 controls the multiplexer 260 such that data stored in the FIFO 240 is transmitted to the internal bus BUS. The data transmitted to the internal bus BUS, i.e., the operation state information of the state register 220, is stored in an external memory 160 according to conventional means (S140).
As understood by the foregoing, when the operation state information of the state register 220 in the peripheral device 130 is varied, all varied operation state information is stored in the external memory 160 depending upon the control of the DMA controller 250. That is, all operation state information of the state register 220 is stored in the external memory 160 in real time depending on the control of the DMA controller 250. The peripheral device 130 may thus be readily debugged using the data stored in the external memory 160.
A peripheral device according to a modified embodiment of the present invention is now described below with reference to FIG. 5.
Referring to FIG. 5, a peripheral device 130 is connected to an internal bus BUS and includes a plurality of state registers 220A, 220B, and 220C, a state detection circuit 230, a FIFO 240, a direct memory access controller 250, first and second multiplexers 260 and 280, and a user register 270. Corresponding function blocks (not shown) are connected to the state registers 220A, 220B, and 220C, respectively. Information for selecting one of the state registers 220A, 220B, and 220C is stored in the user register 270. That is, the multiplexer 280 selects one of the state registers 220A, 220B, and 220C in response to the selection information stored in the user register 270. The variation of operation state information of the selected state register is detected in the state detection circuit 230 in the same manner as described above, and then stored in an external memory 160. This operation is the same as previously described in FIG. 2.
An embedded controller or a microcontroller according to a second embodiment of the present invention is now described below with reference to FIG. 6.
Referring to FIG. 6, an embedded controller or microcontroller 500 includes an internal bus denoted as �BUS� and is connected to an external memory 570. A central processing unit (CPU) 510 operating as an execution unit, a memory interface 520 operating as a memory controller, a plurality of peripheral devices 530, 540, and 550 operating as a function block, and a backup control device 560 are connected to the internal bus BUS. All components of the embedded controller or microcontroller 500 are mounted on the same semiconductor substrate (or chip).
The peripheral devices 530, 540, and 550 each include state registers 531, 541, and 551, respectively. The state registers 531, 541, and 551 are connected to the backup control device 560. The backup control device 560 includes a user register 561, a first switch 562, a state detection circuit 563, a FIFO 564, a DMA controller 565, and a second switch 566. Selection information for selecting one of the state registers 531, 541, and 551 is stored in the user register 561. The first switch 562 selects one of the sate registers 531, 541, and 551 in response to the selection information stored in the user register 561.
The state detection circuit 563 detects whether a value of data stored in the selected state register is varied. According to the detection result, the state detection circuit 563 selectively activates a DMA request signal DMA�REQ. The state detection circuit 230 is composed in the same manner as that shown above in FIG. 3 and will not be described in further detail. The FIFO 564 receives the operation state information stored in the selected state register when the DMA request signal DMA�REQ is activated. The DMA controller 565 communicates with the CPU 510 through the internal bus BUS in response to the activation of the DMA request signal DMA�REQ. That is, the DMA controller 565 requests the CPU 510 to use a bus when the DMA request signal DMA�REQ from the state detection circuit 563 is activated. When the use of the bus is approved, the DMA controller 565 activates the switch 566. Data from the FIFO 564 is transmitted to the internal bus BUS through the switch 566. Accordingly, the data (or operation state information) transmitted to the internal bus BUS is stored in an external bus 160 through the memory interface 120.
During circuit operation, firstly, selection information for selecting a peripheral device under test is stored in the user register 561. For example, assuming that information for selecting the state register 531 of the peripheral device 530 is stored in the user register 561, the first switch 562 selects the state register 531 of the peripheral device 530. The state detection circuit 563 detects whether the operation state information stored in the selected state register 531 is varied. When it is varied, the state detection circuit 563 activates the DMA request signal DMA�REQ. The FIFO 564 stores the varied operation state information of the selected state register 531 depending upon the activation of the DMA request signal DMA�REQ. At the same time, the DMA controller 565 requests use of the bus from the CPU 510. Next, when the use of the bus is approved, the DMA controller 565 controls the second switch 566 to transmit the data stored in the FIFO to the internal bus BUS. The data stored in the internal bus BUS, i.e., the operation state information of the selected state register 531, is stored in the external memory 570 through the memory interface 520 according to conventional means.
As explained above, all state information related to operation of the function blocks can be stored in an external memory in real time without having an effect on the operation of a central processing unit (CPU), even though additional test pins are not used. The information stored in the external memory may be used to debug, for example, the function blocks or peripheral devices. In this case, the operation of the function blocks or peripheral devices can be precisely determined, in real-time, through standard debugging techniques.
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS5255238 *Nov 18, 1991Oct 19, 1993Hitachi, Ltd.First-in first-out semiconductor memory deviceUS5325360 *Dec 9, 1992Jun 28, 1994National Semiconductor CorporationControllable PCM state machine user interfaceUS5428770Aug 31, 1993Jun 27, 1995Motorola, Inc.Single-chip microcontroller with efficient peripheral testabilityUS5513374 *Sep 27, 1993Apr 30, 1996Hitachi America, Inc.On-chip interface and DMA controller with interrupt functions for digital signal processorUS5970069 *Apr 21, 1997Oct 19, 1999Lsi Logic CorporationSingle chip remote access processorUS6000035 *Jul 1, 1996Dec 7, 1999International Business Machines CorporationMethod and system for improved power management in information processing systemUS6212625 *May 25, 1999Apr 3, 2001Advanced Micro Devices, Inc.General purpose dynamically programmable state engine for executing finite state machinesUS6363501Dec 10, 1998Mar 26, 2002Advanced Micro Devices, Inc.Method and apparatus for saving and loading peripheral device states of a microcontroller via a scan pathUS6457074 *Aug 3, 1999Sep 24, 2002Texas Instruments IncorporatedDirect memory access data transfers* Cited by examinerReferenced byCiting PatentFiling datePublication dateApplicantTitleUS7600068 *Sep 1, 2005Oct 6, 2009Stmicroelectronics S.AProgrammable control interface deviceUS20090271861 *Sep 29, 2008Oct 29, 2009Nec Electronics CorporationData processing apparatus and access control method thereforCN101727422BOct 29, 2008Aug 3, 2011大唐移动通信设备有限公司Method and system for controlling unibus equipment* Cited by examinerClassifications U.S. Classification710/16, 714/E11.113, 710/17, 710/19, 710/18, 710/23, 710/27, 710/28International ClassificationH02H3/05, G06F3/00, G06F13/28Cooperative ClassificationG06F11/1402European ClassificationG06F11/14ALegal EventsDateCodeEventDescriptionFeb 11, 2014FPExpired due to failure to pay maintenance feeEffective date: 20131220Dec 20, 2013LAPSLapse for failure to pay maintenance feesAug 2, 2013REMIMaintenance fee reminder mailedMay 27, 2009FPAYFee paymentYear of fee payment: 4Apr 26, 2004ASAssignmentOwner name: ATOFINA RESEARCH, BELGIUMFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:MARECHAL, PHILIPPE;REEL/FRAME:015254/0807Effective date: 20031219May 28, 2003ASAssignmentOwner name: SAMSUNG ELECTRONICS, CO., LTD., KOREA, REPUBLIC OFFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:PARK, JIN-KWON;REEL/FRAME:014123/0507Effective date: 20030513RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services©2012 Google


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Frontier Encounters: Knowledge and Practice at the Russian, Chinese and Mongolian Border by Franck Bill, Paperback | Barnes & Noble
Franck BillFranck Bill
China and Russia are rising economic and political powers that share thousands of miles of border. Despite their proximity, their interactions with each other - and with their third neighbour Mongolia - are rarely discussed. Although the three countries share a boundary, their traditions, languages and worldviews are remarkably different.Frontier Encounters
Frontier Encounters: Knowledge and Practice at the Russian, Chinese and Mongolian Border available in
China and Russia are rising economic and political powers that share thousands of miles of border. Despite their proximity, their interactions with each other - and with their third neighbour Mongolia - are rarely discussed. Although the three countries share a boundary, their traditions, languages and worldviews are remarkably different.Frontier Encounters presents a wide range of views on how the borders between these unique countries are enacted, produced, and crossed. It sheds light on global uncertainties: China's search for energy resources and the employment of its huge population, Russia's fear of Chinese migration, and the precarious independence of Mongolia as its neighbours negotiate to extract its plentiful resources.Bringing together anthropologists, sociologists and economists, this timely collection of essays offers new perspectives on an area that is currently of enormous economic, strategic and geo-political relevance.

value: This website is an American bookseller. It is a Fortune 1000 company and the bookseller with the largest number of retail outlets in the United States.


text:
This is real. : funnyjump to contentmy subredditsannouncementsArtAskRedditaskscienceawwblogbookscreepydataisbeautifulDIYDocumentariesEarthPornexplainlikeimfiveFitnessfoodfunnyFuturologygadgetsgamingGetMotivatedgifshistoryIAmAInternetIsBeautifulJokesLifeProTipslistentothismildlyinterestingmoviesMusicnewsnosleepnottheonionOldSchoolCoolpersonalfinancephilosophyphotoshopbattlespicsscienceShowerthoughtsspacesportstelevisiontifutodayilearnedTwoXChromosomesUpliftingNewsvideosworldnewsWritingPromptsedit subscriptionsfront-all-random | gadgets-sports-gaming-pics-worldnews-videos-AskReddit-aww-Music-funny-news-movies-books-history-food-philosophy-television-Jokes-Art-DIY-space-Documentaries-Fitness-askscience-nottheonion-todayilearned-personalfinance-gifs-listentothis-IAmA-TwoXChromosomes-creepy-nosleep-GetMotivated-WritingPrompts-LifeProTips-EarthPorn-explainlikeimfive-Showerthoughts-Futurology-photoshopbattles-mildlyinteresting-dataisbeautiful-tifu-OldSchoolCool-UpliftingNews-InternetIsBeautiful-sciencemore » funnycommentsrelatedwant to join? sign in or create an account in seconds|Englishlimit my search to /r/funnyuse the following search parameters to narrow your results:subreddit:subredditfind submissions in "subreddit"author:usernamefind submissions by "username"site:example.comfind submissions from "example.com"url:textsearch for "text" in urlselftext:textsearch for "text" in self post contentsself:yes (or self:no)include (or exclude) self postsnsfw:yes (or nsfw:no)include (or exclude) results marked as NSFWe.g. subreddit:aww site:imgur.com dogsee the search faq for details.advanced search: by author, subreddit...this post was submitted on 03 Apr 20134 points (65% upvoted)shortlink: remember mereset passwordloginSubmit a humorous linkSubmit a comical text postfunnyunsubscribesubscribe8,929,387 readers7,377 users here nowWelcome to r/Funny:
a community for 7 yearsmessage the moderatorsMODERATORSilluminatedwaxWe're no strangerskrispykrackersKyldeThe JanitorGuitarFreak027brownboy13There is no alien, citizen.complex_reductionLivykaLord_Nukeoh god how did this get here I am not good with computerKnowltey...and 18 more »discussions in /r/funny<>X894 points · 364 comments Hooray.1487 points · 51 comments everyone right now1715 points · 284 comments It feels like I've seen a lot of this1249 points · 43 comments You Read That Wrong652 points · 152 comments People don't realize how big America really is.610 points · 17 comments Happy 4th, or as your dogs may know it...2645 points · 127 comments The BBC's attempt to avoid product placement2550 points · 157 comments Close enough1924 points · 490 comments The current situation at Reddit4701 points · 317 comments In honor of the blackout...345This is real. (i.imgur.com)submitted 2 years ago by akal962 commentssharesorry, this has been archived and can no longer be voted onloading...all 2 commentssorted by: besttopnewhotcontroversialoldrandomq&a[–]ayderpie 1 point2 points3 points 2 years ago (1 child)sorry, this has been archived and can no longer be voted onmmmm I would put Reese's pieces on the icing
permalinksavegive gold[–]kchoeppner 0 points1 point2 points 2 years ago (0 children)sorry, this has been archived and can no longer be voted onand maybe even some Nuttella for good measure
permalinksaveparentgive goldaboutblogaboutvaluesteamsource codeadvertisejobshelpsite rulesFAQwikireddiquettetransparencycontact usapps & toolsAlien Blue iOS appreddit AMA appmobile betabuttons<3reddit goldreddit storeredditgiftsreddit.tvradio redditUse of this site constitutes acceptance of our User Agreement and Privacy Policy {Genitive}. © 2015 reddit inc. All rights reserved.REDDIT and the ALIEN Logo are registered trademarks of reddit inc.create a new accountusername:password:verify password:email: (optional)remember meget the best of reddit emailed to you once a week. learn morecreate accountsign inusername:password:remember mereset passwordsign inWe care about your privacy, and we never spam. By creating an account, you agree to reddit's User Agreement and Privacy Policy. We're proud of them, and you should read them.English [en]العربية [ar]Беларуская мова [be]български език [bg]Bosanski [bs]català [ca]česky [cs]dansk [da]Deutsch [de]Ελληνικά [el]English (Australia) [en-au]English (Canadian) [en-ca]English (Great Britain) [en-gb]English [en-us]Esperanto [eo]español [es]español [es-ar]eesti keel [et]Euskara [eu]فارسی [fa]suomi [fi]français [fr]Gàidhlig [gd]עברית [he]मानक हिन्दी [hi]hrvatski [hr]Magyar [hu]Հայերեն լեզու [hy]Bahasa Indonesia [id]íslenska [is]italiano (Italy) [it]日本語 [ja]ಕನ್ನಡ [kn_IN]한국어 [ko]Latin [la]1337 [leet]LOL [lol]lietuvių kalba [lt]latviešu valoda [lv]Nederlands [nl]Nynorsk [nn]Norsk [no]Arrrrrrrr! [pir]polski [pl]português [pt] (*)português [pt-pt]português brasileiro [pt_BR]română [ro]русский [ru]slovenčina [sk]slovenščina [sl]српски језик [sr]Srpski [sr-la]Svenska [sv]தமிழ் [ta]ภาษาไทย [th]Türkçe [tr]українська мова [uk]Tiếng Việt [vi]中文 [zh] (*) incomplete volunteer to translateπ Rendered by PID 16052 on app-229 at 2015-07-04 11:57:07.400851+00:00 running b5ab24b country code: US.

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Coastal Maintenance & Construction - Orange Beach, AL, US 36561 | Houzz
https://www.houzz.com/pro/coastalmaintenance39 copied to clipboard
Fortified Certified
2 Projects for Coastal Maintenance & Construction
Custom tile showers,bathroom remodels@a
Metal roof coating, screw replacement, roof pressure washing and painting
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Internet Archive Search: mediatype:movies AND subject:"Malden Access TV"
1 RESULTS Media Type 1 movies Topics & Subjects 1 2008 1 Community Access Television 1 Malden Access TV 1 SCATV 1 Somerville MA Collection 1 The Community Media Archive 1 RialtoDenison Favorites 1 Somerville Community Access Television SHOW DETAILS
We Have A Dream: Martin Luther King Jun 7, 2013
favorite 1 comment 0 Video Tribute to the Life and Words of Dr. Martin Luther King. Produced in Malden. Topics: SCATV, Community Access Television, Somerville MA, Malden Access TV, 2008 MORE RESULTS

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Tiffany Garmon (tiffanygarmon) on Pinterest
plus.google.com/104992666584633738110
Fixing cuts and sticking butts
Blake's 8th bday
Logan' s 10th birthday
Ava ' s 8th birthday
Gage and Tuck are 2 and 4
Tucker and Gage
Mosquito weather fashion
those shelves would be nice above toilet in bathroom? #Frenchcountrydecorating #FarmhouseLamp
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Surprisingly, today's article came from 2 readers' questions about stands. Where to find 'em? Can they be DIYed? How to style 'em? 3 - tiered trays are popular and seen everywhere nowadays and I completely understand why!
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Get lots of cottage Christmas decorating ideas with this home tours that includes hits of punchy red plaid and lots of crisp black and white buffalo check.
Christmas HolidaysBlack Christmas TreesChristmas Tree ToppersChristmas 2017Scandinavian Christmas TreesBurlap Christmas TreeMerry Christmas ImagesBeautiful ChristmasChristmas ArtIdeasModern DecorationModernPink OutCrafts To MakeDifferent StylesEnd Of YearTable CentersComicChristmas VacationMerry Christmas PicturesChristmas Tree OrnamentsForward
Glam up your Christmas tree with attention-arresting Christmas tree toppers. Glance through our awesome collection for more ideas for the same.
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a very merry christmas home tour, christmas decorations, home decor, seasonal holiday decor
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Holiday entryway on a budget
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Bottom Line Plumbing LLC
Phone: (206) 790-9835
13426 10th Ave S,
http://www.bottomline-plumbing-kent-auburn.com
Bottom Line Plumbing LLC has had their Business Review viewed 4 time(s) over the last 40 days. Click to view where these inquiries originated.
Factors that affect the rating for Bottom Line Plumbing LLC include:
File a Complaint against Bottom Line Plumbing LLC
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BBB knows of no government actions involving the marketplace conduct of Bottom Line Plumbing LLC.
BBB has nothing to report concerning Bottom Line Plumbing LLC's advertising at this time.
Sesal Cecilio, Manager
Principal: Sesal Cecilio, Manager
See trends in Customer Reviews for Bottom Line Plumbing LLC Associated Searches

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INTERNATIONAL BRIEFS; Volkswagen's Audi Unit To Acquire Lamborghini - The New York Times
Archives|INTERNATIONAL BRIEFS; Volkswagen's Audi Unit To Acquire Lamborghini
INTERNATIONAL BRIEFS; Volkswagen's Audi Unit To Acquire Lamborghini
By REUTERS JUNE 13, 1998
Volkswagen A.G. said yesterday that its Audi A.G. unit had agreed to buy Lamborghini S.p.A., the Italian sports car maker, for undisclosed terms. An Audi spokesman said the companies were still settling details but hoped to close the deal in a few weeks. Analysts estimated Lamborghini's worth at 200 million marks, or $111 million.
Lamborghini makes only about 200 cars a year. The Lamborghini Diablo, its most popular model, costs $194,000 and has an engine with more than 500 horsepower. Lamborghini, based in Bologna, Italy, is owned by Hutomo Mandala Putra, the son of the former Indonesian President, Suharto, who owns 60 percent, and Mycom, a Malaysian company, which owns the rest.
A version of this article appears in print on June 13, 1998, on Page D00002 of the National edition with the headline: INTERNATIONAL BRIEFS; Volkswagen's Audi Unit To Acquire Lamborghini. Order Reprints| Today's Paper|Subscribe

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Fit In Clouds Women's Gold Sequin Foldable Flats - Overstock Shopping - Great Deals on Flats
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value: This website is an American internet retailer selling primarily furniture headquartered in Midvale, Utah, near Salt Lake City.


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10,757,179 members (82,047 online) Sign in
To Add Favicon To Your WebPage ACommonMan, 1 Jun 2012
Good article and a note majidkamali13706-Jun-12 8:36 Hello, nice article.
C# ASP.NET Javascript .NET HTML Design Related Articles

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Hit and Run is a bluegrass band originally from Boulder, Colorado, now based in Tennessee.
Hit & Run Bluegrass formed in Colorado in late 2001 with the mutual desire to play authentic-yet-modern bluegrass. They have released two compact discs to date. The band has toured extensively throughout the United States, playing such prestigious festivals as Telluride Bluegrass Festival, High Sierra Music Festival, Grand Targhee Bluegrass Festival, Grey Fox Bluegrass Festival, Rockygrass Bluegrass Festival, and Bean Blossom.
They have shared billing with artists such as Jerry Douglas, Hot Rize, Alison Krauss, and David Grisman. In 2005 they took first place in the SPBGMA International Band Championship in Nashville. Guitarist Rebecca Frazier became the first woman to appear on the cover of Flatpicking Guitar Magazine when the September 2006 issue of that magazine was released.
The group now tours as Rebecca Frazier and Hit & Run Bluegrass.The lineup consists of Rebecca Frazier (née Hoggan) on guitar, John Frazier on mandolin and occasionally fiddle, Kyle Tuttle on banjo, Royal Masat on bass, and Shad Cobb on fiddle.
This page contains text from Wikipedia, the Free Encyclopedia - https://wn.com/Hit_and_Run_(band)
The Simpsons: Hit & Run is an action-adventure video game based on the American animated sitcom The Simpsons, developed by Radical Entertainment and published by Vivendi Universal Games. It was released for the PlayStation 2, Xbox, GameCube and Microsoft Windows on September 16, 2003. The story and dialogue were crafted by writers from The Simpsons, with all character voices supplied by the actual cast.
This page contains text from Wikipedia, the Free Encyclopedia - https://wn.com/The_Simpsons_Hit_&_Run

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