text:
Patent US20050268157 - Method for writing data to a non-volatile memory embedded in an integrated ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign in<nobr>Advanced Patent Search</nobr>PatentsThe invention is a method and a circuit for writing data (DATA) from a processor (603) to a non-volatile memory (602) embedded in an integrated circuit. The main objective is to optimize the use of this embedded non-volatile memory. The method comprises a number of steps: The data to be written to the...http://www.google.com/patents/US20050268157?utm_source=gb-gplus-sharePatent US20050268157 - Method for writing data to a non-volatile memory embedded in an integrated circuit and corresponding circuitAdvanced Patent SearchPublication numberUS20050268157 A1Publication typeApplicationApplication numberUS 10/516,643PCT numberPCT/IB2003/002093Publication dateDec 1, 2005Filing dateJun 4, 2003Priority dateJun 6, 2002Also published asCN1659513A, CN100430888C, DE60316804D1, DE60316804T2, EP1514176A2, EP1514176B1, WO2003104976A2, WO2003104976A3Publication number10516643, 516643, PCT/2003/2093, PCT/IB/2003/002093, PCT/IB/2003/02093, PCT/IB/3/002093, PCT/IB/3/02093, PCT/IB2003/002093, PCT/IB2003/02093, PCT/IB2003002093, PCT/IB200302093, PCT/IB3/002093, PCT/IB3/02093, PCT/IB3002093, PCT/IB302093, US 2005/0268157 A1, US 2005/268157 A1, US 20050268157 A1, US 20050268157A1, US 2005268157 A1, US 2005268157A1, US-A1-20050268157, US-A1-2005268157, US2005/0268157A1, US2005/268157A1, US20050268157 A1, US20050268157A1, US2005268157 A1, US2005268157A1InventorsFabrizio CampanaleOriginal AssigneeKoninklijke Philips Electronics N.V.Export CitationBiBTeX, EndNote, RefManReferenced by (2), Classifications (17), Legal Events (3) External Links: USPTO, USPTO Assignment, EspacenetMethod for writing data to a non-volatile memory embedded in an integrated circuit and corresponding circuitUS 20050268157 A1Abstract The invention is a method and a circuit for writing data (DATA) from a processor (603) to a non-volatile memory (602) embedded in an integrated circuit. The main objective is to optimize the use of this embedded non-volatile memory. The method comprises a number of steps: The data to be written to the non-volatile memory (602) is first transferred to a volatile memory (601). Thereafter, a wait signal (wait) will be send to the processor (603). Then, the data (DATA) will be transferred from the volatile memory (601) to the non-volatile memory (602). At last, the wait signal (wait) will be removed. Thus the non-volatile memory (602) can be used both as instruction memory and as RAM, which achieves the main goal of this invention. The corresponding circuitry is a complex integrated circuit equipped to execute the above functions. Images(10) Claims(12)
1. A method for writing data (DATA) from a processor (603) to a non-volatile memory (602) embedded in an integrated circuit, comprising the following steps (a) at least part of said data (DATA) to be written to said non-volatile memory (602) is transferred to a volatile memory (601), (b) when said data (DATA) has been transferred to said volatile memory (601), a wait signal (wait) is sent to said processor (603), (c) said data (DATA) is transferred from said volatile memory (601) to said non-volatile memory (602), (d) said wait signal (wait) is removed. 2. The method for writing data according to claim 1, wherein the data transfer is controlled by an interface (605). 3. The method for writing data according to claim 1 or 2, wherein at the beginning of the data transfer from the volatile memory (601) to the non-volatile memory (602), said non-volatile memory (602) is set in write mode. 4. The method for writing data according to any of the preceding claims, wherein during the data transfer from the volatile memory (601) to the non-volatile memory (602), said non-volatile memory (602) is set in program mode. 5. The method for writing data according to any preceding claim, wherein at the end of the data transfer from the volatile memory (601) to the non-volatile memory (602), said non-volatile memory (602) is set in read mode. 6. The method for writing data according to any preceding claim, wherein all of the data (DATA) is transferred first to the volatile memory (601). 7. The method for writing data according to any preceding claim, wherein the addresses (ADDR) corresponding to the data (DATA) to be written to the non-volatile memory (602) are stored intermediately. 8. The method for writing data according to any preceding claim, wherein before the data (DATA) is written to the volatile memory (601), the wait signal (wait) is sent to the processor (603) and is removed after said data (DATA) is completely written to said volatile memory (601). 9. An integrated circuit with a processor (603), a volatile memory (601), a non-volatile memory (602), and an interface (605) connecting said processor (603) to said volatile memory (601), and said non-volatile memory (602) to said volatile memory (601), wherein said interface (605) is equipped: to transfer data (DATA) to be written to said non-volatile memory (602) first to said volatile memory (601), to send a wait signal (wait) to said processor (603) when said data (DATA) is transferred to said volatile memory (601), to transfer said data (DATA) from said volatile memory (601) to said non-volatile memory (602), and to remove said wait signal (wait). 10. The integrated circuit according to claim 9, wherein the non-volatile memory (602) is a flash memory. 11. The integrated circuit according to claim 9 or 10, wherein the volatile memory (601) is a random access memory or a static random access memory. 12. The integrated circuit according to claim 9, 10 or 11, wherein the volatile memory (601) is an embedded volatile memory. Description
The invention relates to a method for writing data from a processor to a non-volatile memory embedded in an integrated circuit and to a corresponding integrated circuit particularly adapted to execute this method. Such integrated circuits are extensively used in portable devices, e.g. wireless modules, mobile phones, digital cordless devices or personal digital assistants (PDAs). In this market, size and power consumption are decisive factors, thus the small area factor is a primary request. Thus, the integration of a non-volatile memory with a memory control unit (MCU) of the baseband system seems to be an adequate choice to reduce the number of components and pinouts and to improve routability and thus reduced overall system cost. On the other hand, there are several other aspects contributing to improve the performance/cost ratio of a baseband system on chip (SOC). One of the most effective characteristics is an appropriately chosen memory hierarchy. Distributing the memory resources through a hierarchy with different access capabilities and different costs and sizes results in an overall improvement of the system performance. FIG. 1 shows a typical, so-called Harvard Architecture. A bridge 101 is connected over a 32-bit bus 104 to advanced system bus (ASB) modules 105, a memory management unit (MMU) 106, a RAM 107 and a flash memory 102. An advanced RISC machine (ARM) 103 is connected to the MMU 106. Over a 16-bit bus 108, the bridge 101 is connected to advanced peripheral bus (APB) modules 109. These can be universal serial bus (USB) modules, for example. It is evident that the main costs in terms of area are in the memory hierarchy. So a smart choice of the sizes and types of memory, strictly depending on the performance required, is the base of design success. Since many applications require a certain layer of software for the microcontroller within a Harvard Architecture, a read only memory (ROM) is typically used for the instruction memory (IMEM), while for the data memory a volatile memory, e.g. a DRAM or SRAM, is mostly chosen. This provides the chance to use the bootcode memory space on the die also as instruction memory, thus saving space and increasing the robustness and the security of the system. The advantage is that an embedded ROM, being integrated with the baseline process, does not require special technology options. However, such a solution requires a stable software and is thus suitable only for final, high volume production. Since most applications need several software refinements, the ROM solution is not suitable for the IMEM. Thus an embedded flash memory used as IMEM could represent the best solution in terms of size and performance. Moreover, the microprocessor has to deal with a more complicated writing procedure, consisting in loading the data into the memory and then programming the cells. If the system has been designed to use the flash memory 102 as instruction memory, the microprocessor 103 will perform most of the time read accesses to this flash memory 102 whereas it will write into the RAM 107. Unfortunately, if the software requires to store some data permanently, a write operation to the flash memory 102 is required. In this case, the execution code for programming the data must not run from within the flash memory 102, because the flash memory 102 is not available for simultaneous read access�the fetching of the instruction from the microprocessor�and program access. Differently from a read/write/read sequence to a RAM, where the write operation is self reset, the same sequence of operations is not allowed for a flash memory because this sequence will cause a conflict. Flash memories need to be set in read or program mode. This is done by executing the proper commands through the software code. So a general sequence of commands which wants to perform the mentioned sequence will be: (1) Set the flash memory in program mode; (2) Write DATA-1 to be programmed to flash ADDRESS-1; (3) Write DATA-2 to be programmed to flash ADDRESS-2. As soon as the instruction (1) is executed, the flash memory 102 is not available for reading anymore. So no other instruction could be fetched and executed. Moreover and more fatal, the flash memory 102 shown in FIG. 2 will stay in this mode until a new instruction will set it again in read mode. But because the processor 103 is not able to fetch instructions from the flash memory 102 anymore, this will never happen. This obviously creates a deadlock for the system. In C�ceres et al. U.S. Pat. No. 5,802,554, a method and a system for reducing memory access latency by providing fine grain direct access to flash memory concurrent with a block transfer there from is described. The memory management unit controls the content of the cache with data either from a first level of memory hierarchy or a second level of memory hierarchy. However this solution cannot use the flash memory as IMEM. A first and main object of the invention is to provide a method for writing data from a processor to a non-volatile memory embedded in an integrated circuit and a corresponding integrated circuit, which method lets the processor �see� the non-volatile memory as instruction memory and as volatile memory. In other words, the invention consists in a method and a hardware implementation which hides the writing access to an embedded flash memory, deviating the data to the RAM through a direct memory access (DMA) approach, until all the data have been sent from the microprocessor. In this way, the microprocessor is able to continuously fetch instructions from the flash memory which works as instruction memory. Nevertheless, the flash memory is still available in read mode until it receives the final program command. With the invention, the microprocessor can use the embedded flash memory as instruction memory and can write into those parts/space of the same memory which has to be programmed. The architecture according to the invention can drastically reduce the software development time by embedding a mechanism which lets the microcontroller see the memory space simply as a normal volatile memory space. The problem is solved by a method for writing data from a processor to a non-volatile memory embedded in an integrated circuit, with the features according to an independent method claim and by an integrated circuit with the features according to an independent apparatus claim. The method for writing data from a processor to a non-volatile memory embedded in an integrated circuit according to the invention comprises the following steps: The data, which shall be written to the non-volatile memory, will be transferred at first to a volatile memory. As soon as the data have been transferred to the volatile memory, a wait signal will be send to the processor. Afterwards the data will be transferred from the volatile memory to the non-volatile memory. At last, the wait signal will be removed. The integrated circuit according to the invention comprises a processor, a volatile memory, a non-volatile memory and an interface connecting the processor to the volatile memory and the non-volatile memory to the volatile memory. The interface is equipped to transfer data, which are to be written to the non-volatile memory, at first to the volatile memory, to send as soon as the data have been transferred to the volatile memory, a wait signal to the processor, to transfer the data from the volatile memory to the non-volatile memory, and at last to remove the wait signal. Advantageous further developments of the invention arise from the characteristics indicated in the dependent claims. In one embodiment of the invention, the data transfer is controlled by an interface. In an another embodiment of the invention, the non-volatile memory will be set into the write mode at the beginning of the data transfer from the volatile memory to the non-volatile memory. In a further embodiment of the invention, during the data transfer from the volatile memory to the non-volatile memory, the non-volatile memory will be set into the program mode. In a still further embodiment of the invention, at the end of the data transfer from the volatile memory to the non-volatile memory, the non-volatile memory will be set in read mode. Advantageously all of the data are transferred at first to the volatile memory. With this kind of block-wise data transfer, the whole system can be accelerated. In an another embodiment of the invention, the addresses corresponding to the data, which shall be written to the non-volatile memory, are stored intermediately. To avoid the risk of a deadlock, a wait signal will be send to the processor before the data are written to the volatile memory and will be removed after the data are written to the volatile memory. In a further embodiment of the invention, the non-volatile memory of the integrated circuit is a flash memory and/or the volatile memory is a embedded RAM.
Subsequently, the invention is further explained with the drawings showing in FIG. 1 an advanced RISC machine based subsystem with an embedded flash memory according to the state of the art; FIG. 2 a block diagram of the communication between a flash memory and a processor; FIG. 3 a diagram with a sequence of instructions to avoid a deadlock of a first embodiment; FIG. 4 a diagram with a sequence of instructions to avoid a deadlock of a second embodiment; FIG. 5 a the first part of a flow diagram of the operations together with corresponding block diagrams of an integrated circuit according to the invention; FIG. 5 b the second part of the flow diagram shown in FIG. 5 a; FIG. 6 a the first part of a block diagram of an implementation of the integrated circuit according to the invention; FIG. 6 b the second part of the block diagram shown in FIG. 6 a; FIG. 7 a diagram of a main state machine according to the invention; FIG. 8 a behaviour description of an embedded direct memory access (DMA) engine according to the invention.
A solution for the deadlock problem occurred in the architecture according to FIG. 1 is to download the portion of code which performs the program operation into the RAM 107, then branch to the first instruction of this program routine in the RAM 107, execute the program operation from within the RAM 107 and finally, after the programming of the flash memory 102, jump again to the code in the flash memory 102. This is shown in FIG. 3. The main limitation of this software approach lies in the difficulty to properly manage the code and the addresses. If the code is written in a high-level language, e.g. in C-language, the software engineer has to deal with massive use of pointers and function calls through pointers in order to execute the program routine not from within the flash memory 102, but within the RAM 107. Moreover, the program routine shown in FIG. 4 is using some variables stored in the flash memory address space, which is a common situation, whereby the compiler is not aware from where the routine will be executed. As soon as during the execution of the program routine such variables are called, an exception error will occur, because the flash memory 102 is not accessible in read mode. Finally, to write the copy routine, which should copy the program routine from the flash memory 102 to the RAM 107, the software engineer has to know information about the program routine, like the start address, the end address and the size of the portion of code to transfer. But these are not available at the moment of the software writing. So the only possibility is to compile a first draft version of the complete code, then, from the assembly version of the compiled code, extract the required information, rewrite the code and recompile it. Any further modification on the code will change the relative addressing of the instructions and will need such an approach again for an iterative approximation. The following is an example of how to manage the dumping of the routine which must be executed from the RAM 107 instead from the flash memory 102 through a high level language approach. A memcopy command will copy the routine in the RAM 107 and, through a proper pointer assignment, it will be possible to call the routine to be executed from this RAM address. Unfortunately this does not avoid the occurrence of errors if a variable calling will try to access to the flash memory address space. The memcopy command needs the start address and the size of the routine to be copied. So a first draft compilation has to be done to get the start address and the size of the routine, because these become available only after a compilation. Now the correct information can be inserted in the code and compiled again. Each modification in the code will change the addresses of the instructions in the compiled code, so the procedure described so far must be performed again. A less user-friendly but more accurate approach is to write part of the code directly in assembly language. The sequence: (1) copying the flash program routine in the RAM; (2) call the flash program routine to be executed from the RAM; (3) jump back to the flash memory; is split into two routines instead of being managed through library commands, like memcopy, and function calls through pointers. To achieve the above mentioned sequence, in the main C-code, the following assembly routine is called: (a) assembly routine: (a.1) copy the code from the flash memory to the RAM; (a.2) force the program counter of the processor to the first instruction address of the RAM where the routine has been copied. The flash program routine is now executed from the RAM. (b) flash program routine running from RAM: (b.1) program the flash memory; (b.2) call an other assembly routine to force the program counter of the processor to the first instruction address of the rest of the code in the flash memory address space. The execution from now on will continue from the flash memory. In this way, the routine executing from the RAM 107 will first program the flash memory 102, then call an assemble routine which forces the program counter in the flash memory address space, and then continue to execute the code, but from the flash memory 102. The advantage of this approach compared to the above-mentioned solution is the direct control of the addresses of the instruction, the compiler not being involved in the copying and in the jumps to and from the RAM 107 and so fewer possibilities of wrong attempts to access the flash memory 102 during the program operation. Also in this case, a first draft compilation is required at every modification of the code in order to know where to jump in the RAM 107 and where to jump back into the flash memory 102. Finally, for preventing wrong attempts to access the flash memory 102 during executing the code from the RAM 107, the safest way is to copy not only the program routine into the RAM 107, but also the rest of the code. The disadvantage of this approach is a high RAM area consumption. An example of how to manage the dumping of the routine which must be executed from the RAM 107 instead from of the flash memory 102 through low level language approach is given below. (a) The C-main program will call the first assembly routine. (b) This will copy the interesting blocks of flash memory contents into the RAM 107 and then will force the program counter to the first instruction of the program now copied into the RAM 107. (c) From now on, the code will be executed from the RAM 107 and it is possible to program the flash memory 102. (d) When the program operation is finished, a second assembly routine will be called just for forcing the program counter to the next valid instruction of the C-code, but this time in the flash memory 102, which is now available again. As before, all information regarding where to jump into the RAM 107 and into the flash memory 102 becomes available only after a first draft compilation, and must be checked at every code modification. The target of the architecture described below is to provide a means to the software development which allows to program the non-volatile instruction memory without doing it from an other memory, but simply interfacing it as a RAM and just waiting the required program time. The following definitions will be used. An interface allows to write through a proper load_command the data to be programmed in an embedded register of data latches. This will be called load operation. With a proper program_command, the programming itself will be started. Both operations require to set the flash memory into write mode. After setting the flash memory into write mode, these two commands could not be executed from within the flash memory. The invention is not restricted to any special kind of embedded flash memory, but may be employed with any non-volatile memory. The architecture consists in an interface which, during the load operation, will transfer the data to be programmed, rather than in the embedded register of the flash memory, in the RAM through a kind of direct memory access (DMA), keeping track of the addresses where this data must be written in the flash memory, but without setting the flash memory in write mode and so still keeping the flash memory available for reading the instructions. As soon as all data to be programmed have been sent from the microprocessor, the next command will be for the real programming of the flash memory. In this case, the interface will send a wait signal back to the microprocessor, so that the latter will not try to fetch instructions from the flash memory. After setting the flash memory in write mode, the interface will start the transfer from the RAM to the embedded register into the flash memory for the actual load operation. At the end of the load operation, the interface will send the program command to the flash memory and, at the end of the program operation, the interface will remove the wait signal from the microprocessor bus. From the processor's viewpoint, a simple write operation has been performed. The write operation lasts longer then the write operation for a RAM, due to the program time of the flash memory, but there are no special time-consuming tricks anymore required for the operations of copying/jumping/programming/jumping . The following describes the operations shown in the flow diagram of FIGS. 5 a and 5 b together with the block diagram of FIGS. 6 a and 6 b performed by the interface 605. In the flow diagram of FIGS. 5 a and 5 b, six different sections are separated by doted lines. Section 1: The microprocessor 603 is executing the instruction of a load request load/prog instruction and is writing the proper value in the flash controller register shadow fctr reg 608. From now on, the interface 605 is waiting for the data DATA to be loaded into the flash memory 602. Section 2: The microprocessor 603 selects the flash memory 602 in write mode and sends the data DATA and addresses ADDR on the bus 604. The interface 605 will mask the write mode to the flash memory 602 and will catch the data DATA and the addresses ADDR. The interface 605 will also generate a wait signal wait for the microprocessor 603 and will store the data DATA in the RAM 601. And the interface 605 will remove the wait signal wait for the microprocessor 603. The flash memory 602 is still not in write mode and the microprocessor 603 could still fetch instructions for example for loading the data DATA. Section 3: Now the microprocessor 603 is executing the instruction of a program request load/prog instruction. It is writing the proper value in the flash controller register shadow fctr reg 608. After that the interface 605 will again generate a wait signal wait for the microprocessor 603. The interface 605 will set the flash memory 602 in write mode while the microprocessor 603 is in wait state. The interface 605 will read the data DATA from the RAM 601. Section 4: The interface 605 will load the data DATA in the flash memory data latches. Section 5: After the last data DATA has been loaded from the RAM 601 into the flash memory 602, the interface 605 will generate a program command for the flash memory 602 and will poll the ready signal from the flash memory 602 which signal indicates that the programming of the flash memory 602 is finished. Section 6: When the flash memory 602 generates the ready signal, the interface 605 will set the flash memory 602 again in read mode and will remove the wait signal wait for the microprocessor 603. Below, the management of the addresses, both for the RAM 601 and for the flash memory 602 will be described. The main issues to be solved are: 1. Where to temporary store the data DATA in the RAM 601. 2. Keep the RAM address to enable retrieval of the data DATA from the RAM 601 afterwards. 3. Keep information about where to program the DATA in the flash memory 602. The first problem is managed by a direct memory access (DMA) approach embedded in the interface 605, whereas the second and third problems are solved by the embedded algorithm in the interface 605. For managing the direct memory access (DMA), the interface 605 embeds a DMA engine 610. In general, if a DMA controller and a microprocessor share the signal wires to the memories, there must be a mechanism to arbitrate which device shall have access to the memories. In the here described embodiment of the invention, the interface 605 will access the memories 601 and 602 only after putting the microprocessor 603 in wait state through the general wait signal wait. The signal wait is always available on the system bus, so no other arbitration features are required. On the other hand, the microprocessor 603 must transmit the beginning address in RAM 601 to the DMA engine 610. With this information, the interface 605 is able to re-direct the data DATA sent by the microprocessor 603 to the RAM 601, store the RAM start address, and keep track of the number of words still to be sent. Moreover there is no risk of corrupting data in the RAM 601 writing in a wrong place. The purpose of the DMA engine 610 is to select the proper device, RAM 601 or flash memory 602, send or read data to or from this device, wait for a ready information from the device, and transmit the ready information as acknowledgement to the main state machine 617 in the interface 605. In FIGS. 6 a, 6 b, 7, and 8, the implementation of the interface 605 architecture is presented. In the block diagram shown in FIGS. 6 a and 6 b, the interface 605, the microprocessor 603, and the RAM 601 are connected to the system bus 604 together with the control signals wait, nREAD/WRITE, the data signal DATA, and the address signal ADDR. Moreover the interface 605 needs to access the chip select of the flash memory 602 called SEL_FLASH and the RAM 601 called SEL_RAM. The interface 605 is mainly based on the main state machine (MSM) 617, the DMA engine 610 and the counter 606. The main state machine 606 checks the requests from the microprocessor 603 and controls the inputs for the addresses and data registers. The counter 606 keeps track of the number of words written in the RAM 601 in order to retrieve them for the flash memory loading. The registers are: The flash memory start address register 611 stores the starting address flash start addr which indicates where to program the flash memory 602. The RAM start address register 612 stores the starting address RAM start addr, which indicates where to temporary save the data DATA in the RAM 601. This starting address must be send to the interface 605 from the microprocessor 603 before sending the data DATA. The data buffer 613 stores the data DATA at every load cycle before sending the data DATA to the RAM 601 or flash memory 602. The last count register 607 stores the maximum number of RAM writing steps performed. This register is used to check the end of the successive flash memory loading through a comparator 616. The flash current address register 614 stores the address currently used by the DMA engine 610 for accessing the flash memory 602. This is: The flash memory start address flash start addr for the first loading; and (The flash memory start address flash start addr)+(current counter value) during the successive loading cycles; The RAM current address register 615 stores the RAM address RAM current addr currently used by the DMA engine 610 for accessing the RAM 601. This is: The RAM start address RAM start addr for the first write or read operation; and (The RAM start address RAM start addr)+(current counter value) during the successive writing or read operation; The shadow flash control register shadow_fctr_reg 608 stores the load command and the program command sent by the microprocessor 603 and cached by the interface 605. The real flash control register real_fctr_reg 609 stores the load command and the program command to be sent by the interface 605 to the flash memory 602. FIG. 7 shows a representation of the behaviour of the main state machine (MSM) 617, i.e. the operations performed by the MSM and its co-functioning with the Direct Memory Access state machine (DMA SM) 610. State 0: The MSM is in idle. State 1: The MSM has detected a load request from the microprocessor (μP in the following). The μP 603 has written the specified Load instruction into the shadow flash control register shadow fctr reg of the Interface 605. a) The MSM will set the enable signal en_data_in and the signals update_addr and data_in_sel to allow the transfer from the data bus 604 to the RAM_start_addr register and RAM_current_addr. Now the μP has to send to the MSM the starting address of the RAM space which will be used as buffer. The MSM will catch this value from the DATA bus and store it in the registers RAM_start_addr and RAM_current_addr. Moreover, the MSM will reset the counter 606 used for the incremental address calculation. State 2: Now the μP has to send to the MSM the starting address of the RAM space which will be used as buffer. The MSM will catch this value from the data bus and store it in the RAM_start_addr register. State 3: The MSM detects that the μP has selected the flash memory 602 in write mode (the detection is made through the check of the signals SEL_FLASH and nREAD/WRITE available at bus system level, see FIG. 6 b). Moreover, the μP has sent DATA and ADDR onto the bus. a) the MSM will generate a wait signal WAIT for the μP. b) the MSM will set the enable signals en_addr_in and en_data_in and will catch from the DATA and the ADDR system bus. These are the values to be stored in the DATA_buffer and FLASH_start_addr registers. State 4: Now the MSM has to re-write to the RAM 601 the data catch. a) the address for the RAM is calculated as: value of the register RAM_current_addr+value of the counter. For the first loop the RAM_current addr=RAM_start_addr and the value of the counter=0(see state 1.a) b) Now the MSM will send to the DMA SM the ram_write request with the address RAM_current_addr and the data DATA buffer. State 5: The MSM waits for the acknowledgment from the DMA SM that the RAM write operation has been performed. State 6: When the MSM has detected the acknowledgement from the DMA SM, the signal WAIT for the μP may be removed. Note that the flash memory is not in write mode and the μP could still fetch instructions for loading DATA. Now the μP will continue to send DATA and ADDR onto the system bus as if it were really loading into the flash memory the DATA to be programmed. The MSM will loop between states 4 to 6, deviating the DATA to the RAM and masking the load operation to the flash memory, which will stay in read mode. After the μP has sent all the data to be loaded and performed or whatever other operation is desired, it will send the final program instruction Prog Instruction to the shadow_fctr_reg of the interface. State 7: The MSM has detected the Prog Instruction from the μP: a) The MSM will put the μP in wait because from now on the flash memory will not be available in read mode and so will not deliver instructions to the μP. b) The MSM will store the Flash_current_addr in the Last Count register. c) The MSM will transfer the Flash_start_addr and the RAM_start_addr (stored in state 3.b) to the Flash_current_addr and RAM_current_addr respectively. Moreover it will reset the counter. d) The MSM will send to the DMA the RAM_read request with the RAM_current_addr as address and will wait for the DMA acknowledgment DMA Ack. State 8: The MSM will now loop until the DMA Ack from the DMA SM will be set (the RAM_read operation has been performed). The Interface will load the DATA into the flash memory data latches. State 9: The MSM will now perform a real load to the flash memory data latches with the DATA retrieved by the RAM and the address in the Flash_current_addr. This will be performed by the DMA SM through a flash_load request by the MSM. Moreover the MSM will compare the Flash_current_addr with the Last_count value (stored in state 7.b) to check if it is the last DATA to be loaded. If Flash_current_addr is equal to Last_count, the MSM will go to state 11. b) If Flash_current_addr is different from Last_count, the MSM will go to state 10. State 10: The MSM will now increment the counter and will update the registers: a) Flash_current_addr=Flash_current_addr+Counter; b) RAM_current_addr=RAM_current_addr+Counter; c) The MSM will send to the DMA SM the ram_read request with RAM_current_addr as address and will go again to state 8 to wait for the DMA acknowledgment. State 11: If Flash_current_addr=Last_count all the data have been loaded into the flash memory and it is now time to program it, sending to the flash memory the real program command. State 12: Now, depending on the flash memory architecture (this is independent from the flash memory module), the MSM will loop either a fixed number of clock cycles depending on the program time specified for the flash memory, or will loop until an potential ready signal coming from the flash memory at the end of the program time (if this signal exists, it could go through to the DMA SM and the MSM would wait for the DMA Ack from the DMA SM as usual). State 13: Having received the DMA Ack from the DMA SM or reached the program time, the MSM can now bring the flash memory back in read mode (as for the load and program, this is done writing the proper bits into the Real_fctr_reg). The MSM will now remove the signal wait for the μP and will go into an idle (state 0). FIG. 8 now shows the behaviour of the embedded Direct Memory Access (DMA) state machine 610 according to the invention. A more detailed description of the DMA SM function follows. State 0: The DMA SM is in Idle. State 1: The DMA SM has detected a RAM_write request from the MSM. a) the DMA SM resets the signal dma_ack used by the MSM as acknowledgment. b) the DMA SM sets the signal addr_out_sel to send to the address system bus the value of the RAM_current_addr. the DMA SM may now set the signals enable_addr_out and enable_data_out in order to send to the address and data system bus the value of the RAM_current_addr and the value of the DATA_BUFFER registers. d) Depending on the RAM architecture, the write operation could take a fixed number of clock cycles or be governed by a ready signal back from the RAM. In any case at the end of the write cycle the DMA SM will go to state 4. State 2: The DMA SM has detected a RAM_read request from the MSM. a) the DMA SM resets the signal dma_ack used by the MSM as acknowledgment. b) the DMA SM sets the signal addr_out_sel in order to send to the address system bus the value of the RAM_current_addr. c) the DMA SM can set now the signals enable_addr_out in order to send to the address system bus the value of the RAM_current_addr. d) Depending on the RAM architecture, the read operation could take a fixed number of clock cycles or be governed by a ready signal back from the RAM. In any case, the DMA SM will go to state 4 at the end of the read cycle. State 3: The DMA SM has detected a FLASH_load request from the MSM. a) the DMA SM resets the signal dma_ack used by the MSM as acknowledgment. b) the DMA SM sets the signal addr_out_sel in order to send to the address system bus the value of the FLASH_current_addr. c) the DMA SM can now set the signals enable_addr_out and enable_data_out in order to send to the address and data system bus the value of the FLASH current_addr and the value of the DATA_BUFFER registers. d) Depending on the flash memory architecture, the load operation could take a fixed number of clock cycles or be governed by a ready signal back from the flash memory. In any case, at the end of the load cycle, the DMA SM will go to state 4. State 4: When the memory operation is concluded, the DMA SM sets the signal dma_ack to 1 for the MSM and returns to the idle, state 0. This concludes the description of the operation of both the main state machine (SM) and the Direct Memory Access state machine (DMA SM). The architecture described has several advantages. The software development time is reduced and a robust system developed with a reusable application code, which focuses on the application and not on the limits of the hardware. The method according to the invention with its architectural implementation is well suited for all applications in which a microprocessor uses an embedded flash memory as instruction memory. Referenced byCiting PatentFiling datePublication dateApplicantTitleUS7315951 *Mar 30, 2004Jan 1, 2008Nortel Networks CorporationHigh speed non-volatile electronic memory configurationUS8284323Jul 8, 2008Oct 9, 2012Panasonic CorporationVideo audio processing device and standby and return method thereof* Cited by examinerClassifications U.S. Classification714/5.11, 712/E09.007, 712/E09.046, 712/E09.055International ClassificationG06F9/445, G06F12/00, G06F9/38, G06F11/00, G06F9/24Cooperative ClassificationG06F9/3824, G06F9/24, G06F8/65, G06F9/3802European ClassificationG06F9/38B, G06F8/65, G06F9/24, G06F9/38DLegal EventsDateCodeEventDescriptionNov 19, 2007ASAssignmentOwner name: DSP GROUP SWITZERLAND AG, SWITZERLANDFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:NXP B.V.;REEL/FRAME:020135/0359Effective date: 20070904Aug 17, 2007ASAssignmentOwner name: NXP B.V., NETHERLANDSFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;REEL/FRAME:019719/0843Effective date: 20070704Owner name: NXP B.V.,NETHERLANDSFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100204;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100203;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100209;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100211;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100216;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100218;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100223;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100225;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100302;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100304;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100309;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100311;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100316;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100323;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100329;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100330;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100406;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100408;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100413;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100420;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100504;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100511;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100518;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;US-ASSIGNMENT DATABASE UPDATED:20100525;REEL/FRAME:19719/843Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KONINKLIJKE PHILIPS ELECTRONICS N.V.;REEL/FRAME:19719/843Dec 1, 2004ASAssignmentOwner name: KONINKLIJKE PHILIPS ELECTRONICS N.V., NETHERLANDSFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:CAMPANALE, FABRIZIO;REEL/FRAME:016469/0436Effective date: 20030611RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services©2012 Google

value: This website is a search engine provided by Google. Handling over 3.5 billion searches per day, it has a 92% share of the global search engine market.


text:
Christy Pavano, Leed Ga presentations | SlideShare
× × × × × × Christy Pavano, LEED GA
Website http://www.christypavano.com
About Business Development Consultant cultivating powerful connections that will help grow your business and increase revenue. 20+ years of experience growing market share, opening territories for small local firms and start-ups to large national firms.
My strengths are evident in my ability to make valuable connections, identifying, prospecting, opening doors, developing and securing business opportunities.
Specialties: Prospecting, Client Management, Relationship Building, Territory Development, Market Research, SWOT Analysis, Strategic Planning, Social Media, pushing the envelope

type: global

value: This website is an American hosting service, now owned by Scribd, for professional content including presentations, infographics, documents, and videos. Users can upload files privately or publicly in PowerPoint, Word, PDF, or OpenDocument format.


text:
Patent US6424744 - Video retrieval method and apparatus - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsA method of characterizing a video includes the steps of extracting frame images from an input video, calculating a feature of each of the frame images, assigning index information determined by the calculated feature to each of the frame images, stringing together the index information assigned to the...http://www.google.com/patents/US6424744?utm_source=gb-gplus-sharePatent US6424744 - Video retrieval method and apparatusAdvanced Patent SearchPublication numberUS6424744 B2Publication typeGrantApplication numberUS 09/771,562Publication dateJul 23, 2002Filing dateJan 30, 2001Priority dateOct 20, 1993Fee statusLapsedAlso published asUS5805746, US6021231, US6192151, US6567550, US6766057, US7203366, US20010005428, US20020150310, US20030192058, US20040218814Publication number09771562, 771562, US 6424744 B2, US 6424744B2, US-B2-6424744, US6424744 B2, US6424744B2InventorsTakafumi Miyatake, Shigeo Sumino, Katsumi Taniguchi, Akio Nagasaka, Mitsuru Ikezawa, Hirotada UedaOriginal AssigneeHitachi, Ltd.Export CitationBiBTeX, EndNote, RefManPatent Citations (12), Referenced by (5), Classifications (37), Legal Events (6) External Links: USPTO, USPTO Assignment, EspacenetVideo retrieval method and apparatus
US 6424744 B2Abstract
A method of characterizing a video includes the steps of extracting frame images from an input video, calculating a feature of each of the frame images, assigning index information determined by the calculated feature to each of the frame images, stringing together the index information assigned to the frame images, and characterizing the input video by the strung-together index information.
This application is a continuation of application Ser. No. 09/453,585 filed on Dec. 7, 1999, now U.S. Pat. No. 6,192,151, which is a continuation of application Ser. No. 08/908,072 filed on Aug. 11, 1997, now U.S. Pat. No. 6,021,231, which is a continuation of application Ser. No. 08/323,866 filed on Oct. 17, 1994, now U.S. Pat. No. 5,805,746. The contents of application Ser. Nos. 09/453,585, 08/908,072, and 08/323,866 are incorporated by reference herein in their entirety.
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS4000510Jun 2, 1975Dec 28, 1976Ampex CorporationSystem for storage and retrieval of video information on a cyclical storage deviceUS4305131Mar 31, 1980Dec 8, 1981Best Robert MDialog between TV movies and human viewersUS4517598 *Oct 22, 1982May 14, 1985George Van ValkenburgMethod and apparatus for electronic publishingUS4924303Sep 6, 1988May 8, 1990Kenneth DunlopMethod and apparatus for providing interactive retrieval of TV still frame images and audio segmentsUS5014125May 5, 1989May 7, 1991Cableshare, Inc.Television system for the interactive distribution of selectable video presentationsUS5083860Mar 11, 1991Jan 28, 1992Institut For Personalized Information EnvironmentMethod for detecting change points in motion picture imagesUS5412773Nov 19, 1991May 2, 1995Sony Electronics Inc.Computerized interactive menu-driven video signal processing apparatus and methodUS5537528 *Feb 16, 1993Jul 16, 1996International Business Machines CorporationComputer systemUS5600364Dec 2, 1993Feb 4, 1997Discovery Communications, Inc.Network controller for cable television delivery systemsUS5805746 *Oct 17, 1994Sep 8, 1998Hitachi, Ltd.Video retrieval method and apparatusUS6021231 *Aug 11, 1997Feb 1, 2000Hitachi, Ltd.Video retrieval method and apparatusUS6912151 *Jun 28, 2002Jun 28, 2005Synopsys, Inc.Negative differential resistance (NDR) based memory device with reduced body effects* Cited by examinerReferenced byCiting PatentFiling datePublication dateApplicantTitleUS6567550 *Jun 7, 2002May 20, 2003Hitachi, Ltd.Video retrieval method and apparatusUS6766057Apr 11, 2003Jul 20, 2004Hitachi, Ltd.Video retrieval method and apparatusUS7170935 *Feb 14, 2000Jan 30, 2007Canon Kabushiki KaishaImage processing apparatus and method, and computer-readable memoryUS7203366May 27, 2004Apr 10, 2007Hitachi, Ltd.Video retrieval method and apparatusUS8600106 *Aug 31, 2010Dec 3, 2013Adobe Systems IncorporatedMethod and apparatus for tracking objects within a video frame sequence* Cited by examinerClassifications U.S. Classification382/190, 715/255, 715/202, 382/236, 348/E05.067, 707/E17.028International ClassificationG06K9/54, G06F7/00, G06K9/46, H04H60/37, H04H60/48, H04H1/00, H04H60/59, H04N5/14, G06F17/30, G11B27/28, G11B31/00, G11B27/10Cooperative ClassificationG11B27/105, H04N5/147, H04H60/59, G06F17/30802, G06F17/30858, H04H60/37, G11B31/00, G06F17/30817, H04H60/48, G11B27/28, G06F17/30787, G06F17/30825European ClassificationG06F17/30V9, H04H60/37, H04H60/59, G06F17/30V2, G06F17/30V1A, G06F17/30V3E, G06F17/30V1V1Legal EventsDateCodeEventDescriptionSep 9, 2014FPExpired due to failure to pay maintenance feeEffective date: 20140723Jul 23, 2014LAPSLapse for failure to pay maintenance feesFeb 28, 2014REMIMaintenance fee reminder mailedJun 12, 2013ASAssignmentFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:HITACHI, LTD.;REEL/FRAME:030802/0610Effective date: 20130607Owner name: HITACHI CONSUMER ELECTRONICS CO., LTD., JAPANDec 21, 2009FPAYFee paymentYear of fee payment: 8Jan 20, 2006FPAYFee paymentYear of fee payment: 4RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services


text:
Retrieved from "https://www.familysearch.org/wiki/en/index.php?title=Washington_County,_Arkansas_Genealogy&oldid=3650074"
This page has been viewed 3,002 times (159 via redirect)

value: This website is a nonprofit organization and website offering genealogical records, education, and software. It is operated by The Church of Jesus Christ of Latter-day Saints , and is closely connected with the church's Family History Department.


text:
Saga of the Skolian Empire - Wikipedia, the free encyclopedia
2 Jagernauts
2.1 Jagernaut ranks
2.2 Mental problems
3 Main characters of the Ruby Dynasty
3.1 Roca Skolia
3.2 Eldrinson Althor Valdoria
3.3 Sauscony Lahaylia Valdoria Skolia
3.4 Kurj Skolia
3.5 Kelricson Garlin Valdoria Skolia
3.6 Jaibriol III
3.7 Tarquine Iquar
3.8 Dyhianna Selei
3.9 Taquinil Selei
4 Lyshriol
4.1 Bards
4.3 Blue Dale Archers
5 Works published in series
The Ruby Dynasty, the ancient rulers of the Skolian Empire, while possessing empathic and telepathic abilities enhanced by "pico" and "nano" technology, comprise a monarchy plagued by internal struggle and conflict with the elected Assembly.
The Eubian Traders, on the other hand, while larger in number and more successful economically, comprise a society built entirely of a slave hierarchy run by Aristos, who have been genetically engineered and have no capability for compassion, but rather experience pleasure in the form of "transcendence" through the projected suffering of powerful psions that have been kidnapped from the Skolian Imperialate.
Jagernauts[edit]
Jagernauts are fictional soldiers in the Saga of the Skolian Empire by Catherine Asaro. they are members of the J-Force, which is an ISC elite fighting division[1][2] composed of independent fighter pilots who engage in small squadron combat with the Eubians.
Jagernauts are psions with high Kyle Ratings, generally full empaths or even telepaths, with even a few Rhon serving as well. Their telepathic or empathic abilities mean that they function best when there is no crew (and their corresponding thoughts) to interfere with a Jagernaut's concentration. As such, they generally engage in battle in small squadrons, bound to their singe-pilot craft called "Jags"[3] in a near symbiosis of human and machine. A Jagernaut has "psiphon" sockets which allow them to interface their body directly with spacecraft. Their mind links directly to the ship's EI, and together they control all aspects of the ship.
A Jagernaut is enhanced with biomechanics.[2][4] Bioplastics and other materials enhance their muscles and bones significantly. Although still requiring food, a Jagernaut has internal systems powered by a microfusion reactor. Complete with the latest in small-scale technology, Jagernauts have numerous nanomeds and nano/pico devices in their bodies that are responsible for a number of functions, including promoting injury recovery, preventing the ingestion of poison, augmenting skills, delaying aging, and more. Jagernauts are renowned for their large size and efficiency in battle.
Jagernaut ranks[edit]
Primary (equivalent to Admiral)[5]
Mental problems[edit]
A Jagernaut exists on the razor's edge of sanity needing to balance loving empathy with efficient battle reflexes. The cause of the dichotomy involves the fact that having the necessary Kyle Rating presupposes the existence of empathy sufficient to allowing the Jagernaut to vividly feel the violent deaths of squadmates, enemy pilots, or even the ship's EI.[6] To maintain self-control every Jagernaut is trained to adhere to a strict moral code of honor and personal decency.
Help is usually available to emotionally damaged Jagernauts in the form of military psychiatric therapists, known as "heartbenders".[7]
Main characters of the Ruby Dynasty[edit]
Roca Skolia[edit]
Roca Skolia, also known as Roca, is a fictional character in the Saga of the Skolian Empire, a series of books by Catherine Asaro. She is the Foreign Affairs Councillor of the Skolian Imperialate. Daughter of the late Lahaylia Selei, founder of the Imperialate and her husband, former Imperator Jarac Skolia, she is also a Rhon psion. She is also younger sister of the recent Skolian Pharaoh Dyhianna Selei and as such next in line for position of Ruby Pharaoh and of Assembly Key in the Triad between the disappearance of Taquinil Selei and the birth of Althor Izam-na Selei. Since her personality is most like that of her late father and her late son Kurj, she is also considered an emergency backup choice for the position of Military Key in case something should ever happen to her youngest son, Kelric Valdoria, the current Imperator.

value: This website is the English-language edition of the free online encyclopedia Wikipedia. It was founded on 15 January 2001 as Wikipedia's first edition and, as of October 2021, has the most articles of any edition, at 6,412,521.


text:
Submersible LED Lights: Home & Garden | eBay
Also It can also be used to decorate aquariums. 10pcs RGB Waterproof LED Lights. LED light color: white, warm white, red, yellow, blue, green, light orange, light pink, purple, blue-green, RGB full co...
White, Blue, Red, Pink, Green, Purple, RGB. Can turn a boring bowl into a beautiful and exciting centerpiece, and are often used for events. 12 x Waterproof LEDs. Battery Life: 30-70 hours. Buy One Ge...
3 Function: Jump,Fade,Smooth. Reusable waterproof and wireless. Abrasion Resistance with transparent ABS material cover. SMD 53528 super bright LEDs. LED: SMD3528.
Flash and Jump Modes available for the RGB Light. Turn around the box of the light by following the arrow of the back of the base to turn on the led light. After that,you can turn on and turn off the ...
Welcome to Wholesale!!! These waterproof Submersible LED Lights feature an On/Off Switch and are ready to use out of the box and are thus perfect for lighting up vases, bowls, or any water filled cont...
Can turn a boring bowl into a beautiful and exciting centerpiece, and are often used for events. 1 x Waterproof LED. 16 d i ff erent c ol or o ptio ns ! Buy One Get One 15% OFF!
Tip: Add table scatter, diamond confetti, deco gel beads, water pearls as vase filler to mason jar or vase with water- place light base underneath for a dazzling centerpiece. 16 D i ff erent C ol or O...
(Can turn a boring bowl into a beautiful and exciting centerpiece, are often used for event design. 5) Recognize the real Qoolife Products, beaware of imitation, poor or fake products. (Batteries not ...
12 x Waterproof LED. Waterproof Standard: IP67. Can turn a boring bowl into a beautiful and exciting centerpiece, and are often used for events. A perfect alternative for candles. Bulb Life: 10,000 Ho...
Can turn a boring bowl into a beautiful and exciting centerpiece, are often used for event design. LED light color: white, warm white, red, yellow, blue, green, light orange, light pink, purple, blue-...
7' Total Length with 12" Lead and 4" Distance Between LED Bulbs.
✔13 Colors✔Super Bright✔30-Day Money Back Guarantee
Also It can also be used to decorate aquariums. LED light color: white, warm white, red, yellow, blue, green, light orange, light pink, purple, blue-green, RGB full color color. Color: Multi-Color Cha...
These tea light candles alternate in different colors. NEW - 12 Multi-Color Light Up Tea Light Candles (Color changing). Remove insulating strip off the tea light.
12Pcs RGBLED Submersible LED Tea Light Candle Flameless Wedding party Decoration
Can turn a boring bowl into a beautiful and exciting centerpiece, are often used for event design. Recognize the real Qoolife Products, beaware of imitation, poor or fake products. Flower design, tran...
10PCS SMD5050 RGB Submersible LED Light CR2032 Battery + Remote Control aquarium
LED: 1PC SMD5050 RGB. 【Long Lasting】 Super bright RGB LED lamp, long life span. Super bright LEDs with 2PCS CR2032 batteries each light（batteries are included）. White and warm light can run more than ...
Also It can also be used to decorate aquariums. LED light color: white, warm white, red, yellow, blue, green, light orange, light pink, purple, blue-green, RGB full color color. Press the button ON to...
Submersible 10 LED Waterproof Light RGB for Vase Wedding Party Decors (2 PACK)
2 x Waterproof LED. Buy Three Get The Fourth 25% OFF! Buy Two Get The Third 20% OFF! Buy One Get One 15% OFF! 16 D i ff erent C ol or O ptio ns !

value: This website is an American multinational e-commerce corporation based in San Jose, California, that facilitates consumer-to-consumer and business-to-consumer sales through its website.


text:
9780316817714: The War Years, 1939-1945: A Nonconformist History of our Times - AbeBooks - I. F. Stone: 0316817716
I. F. Stone The War Years, 1939-1945: A Nonconformist History of our Times
ISBN 13: 9780316817714
ISBN 10: 0316817716 ISBN 13: 9780316817714
Publisher: Little, Brown & Company, 1988
A "revisionist" history of World War II during World War II, from week to week in the pages of "The Nation".
"Izzy" Stone was one of the very few prominent Americans who outspokenly pressured the Roosevelt administration to aid Jewish refugees fleeing Hitler. In the war's early years, when many Americans preached isolationism, this maverick journalist lashed out at monopolistic interests in the U.S. whose profiteering jeopardized our national defense. Aside from their courage, these columns and essays reprinted from the Nation show admirable prescience. For example, Stone criticized U.S. State Department interference that weakened the Allies' efforts to jointly punish Nazi war criminals. Visiting Palestine in late 1945, he sharply warned that the creation of a Jewish state would sow seeds of divisiveness unless Arabs' needs for self-development were met. He excoriates widespread poverty in the U.S., bad housing, outbreaks of racial violence, corruptionissues that plague us today. Much of Stone's muscular prose has a contemporary zing: "Chicago is magnificent, a brutal force, an imperial city." These pieces meld into a vivid newsreel that throws light on the 1940sand the '80s.
Stone's no-holds-barred journalism sparkles in this collection of columns, the first of a series of six books compiling his articles published previously. This first compilation covers those works that appeared in The Nation during World War II; the last of the series, to be published next year, will feature columns published up to 1970. While it is fortunate that the editors decided to publish the essays without abridgement, today's readers will find some of them perplexing as they frequently deal with lesser known figures or events. There are no introductions to the selections, and the few footnotes provide only marginal help. Criticism aside, the book is a delight to read. Political commentary at its best. Charles K. Piehl, Mankato State Univ., Minn.
List Price: US$ 25.67
ISBN 10: 0316817775 ISBN 13: 9780316817776
1. The War Years, 1939-1945: A Nonconformist History of our Times
Book Description Little, Brown & Company. Hardcover. Condition: New. 0316817716 New Condition. Seller Inventory # NEW7.0100460
2. The War Years, 1939-1945: A Nonconformist History of our Times
Book Description Little, Brown & Company, 1988. Condition: New. book. Seller Inventory # M0316817716
3. The War Years, 1939-1945: A Nonconformist History of our Times
Book Description Little, Brown & Company, 1988. Hardcover. Condition: New. Ships with Tracking Number! INTERNATIONAL WORLDWIDE Shipping available. Buy with confidence, excellent customer service!. Seller Inventory # 0316817716n

value: This website is an e-commerce global online marketplace with seven websites that offer books, fine art, and collectables from sellers in over 50 countries. Launched in 1996, it specialises in used, rare and out-of-print books.


text:
Saturday at Magdeburg, Germany Robert Stieglitz TKO4 Arthur Abraham
Regains a super middleweight title
Records: Stieglitz (44-3, 25 KOs); Abraham (36-4, 28 KOs)
Rafael's remarks: Last August, former middleweight titlist Abraham won a highly competitive unanimous decision against Stieglitz to claim a super middleweight world title in an exciting fight. It was a victory that helped Abraham erase the disaster of his participation in the Super Six World Boxing Classic, where he lost one-sided fights to Andre Dirrell, Carl Froch and Andre Ward -- the later two in world title bouts -- and was left for dead by many. With at least some luster restored, Abraham, 33, a native of Armenia who has lived in Germany for many years, went on to make a defense in December before giving Stieglitz, 31, a native of Russia who has also lived for many years in Germany, the contract rematch he owed him.
Fighting in Stieglitz's adopted hometown in front of a sold-out crowd of about 7,000 at GTEC Arena, the expectations were for another competitive and exciting bout. Instead, it turned into a one-sided rout as Stieglitz took it to Abraham from the outset and ultimately scored his biggest victory by regaining the title that he had defended six times from 2009 to 2012. In the first fight with Abraham, Stieglitz suffered damage around both of his eyes that hampered him. This time, he busted up Abraham's face, which led to the stoppage. But before that there was very intense action in the second round, during which Stieglitz badly staggered Abraham and nearly knocked him out with a right hand. Stieglitz dished out a severe beating to Abraham in the second and third rounds. Abraham, who looked stiff and old, was on shaky legs and his left eye was completely swelled closed by the end of the third round, during which Abraham was docked a point by referee Michael Ortega for hitting Stieglitz behind the head.
The fourth round began, but no punches were exchanged before Ortega almost immediately called a timeout to have the ringside doctor look at Abraham's eye. He could not see out of it and the fight was rightfully stopped. It was a huge victory for Stieglitz, who was dominant, and a bad loss for Abraham, who was stopped for the first time. Stieglitz was so superior to Abraham it was a shock. He was busier, landed harder shots and a lot more of them. He thoroughly dominated in the CompuBox statistics, but one stat in particular really stood out: Stieglitz landed more power shots (63) than Abraham threw (62).
Although the victory put Stieglitz into the conversation for potential big-money unification fights against Ward or the winner of the May 25 rematch between Froch and Mikkel Kessler, it won't be a surprise if we see Stieglitz-Abraham III. Abraham is a very popular figure in Germany and Stieglitz's popularity is growing after his two fights with Abraham. The two fighters were talking about a rubber match after the fight.
"I am always ready and happy to give Arthur another chance," Stieglitz said. Abraham liked that idea, saying, "Now the score between us is even. We need a third, all-deciding fight." Promoter Wilfried Sauerland, the most powerful promoter in Germany and one of the most powerful in Europe, endorsed having a third fight. "Arthur lost because of an unfortunate injury," he said. "Therefore, common decency would be to have another fight."
Robert Helenius W10 Michael Sprott
Scores: 98-93 (twice), 97-93
Records: Helenius (19-0, 11 KOs); Sprott (37-20, 17 KOs)
Rafael's remarks: What happened to the Helenius who had so many excited, believing he could someday pose a legitimate threat to heavyweight champion Wladimir Klitschko? Klitschko himself had been so impressed with Helenius, 29, of Finland, that he often mentioned him as a future potential challenger. That seems like a lifetime ago now as Helenius has turned more suspect than legitimate contender. Although he maintained his undefeated record, he once again looked terrible in another passionless and uninspired effort against a journeyman opponent who should not have lasted more than a few rounds. Instead, Sprott, 38, of England, went the distance, had his moments and generally fought with far more spirit than Helenius.
After Helenius knocked out former titlist Sergei Liakhovich in the ninth round in August 2011, he was as hot as could be and caught Klitschko's attention. Liakhovich was the third former titleholder he had knocked out in less than two years. He had also stopped Samuel Peter (in spectacular fashion) and long-faded Lamon Brewster. But then came a gift hometown decision against England's Dereck Chisora, right shoulder surgery that kept Helenius out for almost a year and then a woeful performance in a lopsided decision win against journeyman Sherman Williams in November. The whole point of facing Sprott was to not just win, but to look good doing it. The 6-foot-6, 240-pound Helenius said himself that was the goal. Although Helenius was the clear winner, he failed miserably in a terribly boring fight in which the only guy who seemed to be making any sort of serious effort was Sprott, who dropped to 1-5 in his last six fights. Helenius claimed he had a sore right hand. George Groves TKO2 Baker Barakat
Records: Groves (18-0, 14 KOs); Barakat (37-14-4, 25 KOs)
Rafael's remarks: England's Groves, 24, is one of the top up-and-coming super middleweights in the world. He was supposed to challenge Mouhamed Ali Ndiaye for the vacant European title on March 16 but gave up the shot when he dumped promoter Frank Warren earlier this month and signed with rival promoter Eddie Hearn of Matchroom Sport. Hearn put Groves to work immediately in what was intended to be the first of four fights in six months as Groves fought March 9 and knocked out Dario German Balmaceda in the third round. Hearn then worked out a deal to put Groves on this Sauerland Event card just two weeks later and Groves easily dominated Barakat, 32, of Germany, who lost for the third time in his last four fights. Having Groves fight on the Robert Stieglitz-Arthur Abraham II undercard made sense for both promoters because Groves loomed as the mandatory challenger for the winner of the fight, which turned out to be Stieglitz.
Groves dominated against Barakat, looking sharp and crisp with his punches. He worked Barakat to the body and had him covering up for long stretches in the opening round before wobbling him with a left uppercut just before it ended. In the second round, it was simply a matter of time until Groves took him out. He dropped Barakat with a pair of clubbing rights to the head and moments later, after landing a clean right-left combination, referee Norbert Duernberger jumped in to stop the fight at 2 minutes, 20 seconds.
Groves will continue his aggressive schedule with a fight scheduled for May 25 in London on the undercard of the super middleweight title unification fight (and a rematch) between Carl Froch and Mikkel Kessler, and then is supposed to be back for what Hearn said would be a "big fight" in London in September.
Saturday at Trujillo Alto, Puerto Rico Jonathan "Bomba" Gonzalez TKO3 Joseph Rios
Records: Gonzalez (12-0, 11 KOs); Rios (13-8-2, 4 KOs)
Rafael's remarks: Gonzalez, 21, a fine prospect from Puerto Rico, was coming off a disappointing first-round no-decision against Omar Salado on Feb. 2 after an unintentional head clash left Salado unable to continue. Getting back into action quickly, Gonzalez, a speedy southpaw, took on Rios, 31, of San Antonio, who had never previously been stopped. Although Gonzalez and Rios produced some fan-friendly action, Gonzalez was clearly winning the fight. He wobbled Rios with an overhand right a few seconds before the end of the second round. In the third round, Gonzalez opened a deep cut over Rios' left eye with one of many right hooks he landed. With blood streaming down Rios' face, referee Luis Pabon called a timeout to have the ringside doctor take a look at the badly cut eye. After the consultation, Pabon called off the bout at 1 minute, 1 second.
Records: Verdejo (4-0, 3 KOs); Quezada (2-4, 2 KOs)
Rafael's remarks: The 19-year-old Verdejo was a member of the 2012 Puerto Rican Olympian team and a sought-after amateur. He turned pro in December and Top Rank is bringing him along like it does all of its A-level prospects -- having him fight each month to get acquainted with the pro game. So Verdejo was fighting for the fourth consecutive month, and in his second fight in a row in Puerto Rico after having his first two bouts in Las Vegas and New York, respectively. He did not disappoint the hometown fans who turned out as he blitzed Quezada, 19, of Denver. Verdejo dropped Quezada just before the first round ended, nailing him with a left uppercut that sent him into the ropes in exaggerated fashion and down to the mat. Verdejo ended the fight in the second round, landing a right-left combination that dropped Quezada to a knee. He beat the count but was shaky and referee Ramon Navedo called it off at 51 seconds. Quezada has been stopped inside three rounds in all four of his losses. Verdejo will keep the busy schedule going as he is next scheduled to fight on the undercard of the Nonito Donaire-Guillermo Rigondeaux junior featherweight title unification fight on April 13 at Radio City Music Hall in New York. If all goes well for Verdejo next month, he is also scheduled to fight on May 18 back in Puerto Rico.
Friday at Chicago Donovan George D10 David Lopez
Scores: 95-95, 96-94 George, 97-94 Lopez
Records: George (24-3-2, 21 KOs); Lopez (41-13-1, 25 KOs)
Rafael's remarks: Bad decision alert! Bad decision alert! Don't tell George, 28, about any so-called home turf advantage. He was fighting in his hometown and clearly beat Lopez, 35, of Mexico, but was saddled with a draw in a woeful decision that was equally as bad as the Adrian Granados-Kermit Cintron welterweight co-feature. George, a crowd-pleaser, was in need of a notable win after his recent run. In 2012, George lost two of his three fights against the two quality opponents he faced. He was outclassed by Edwin Rodriguez and later was stopped in the 12th round of a super middleweight title eliminator by heavy hitter Adonis Stevenson. George returned for an easy first-round knockout of designated pushover James Cook in February before facing Lopez, a longtime contender who got a junior middleweight title shot against Austin Trout in 2011 but lost a lopsided decision. George was fighting Lopez, a southpaw, at 163 pounds as he makes his way down to the middleweight division, where he believes his power will be a bigger advantage against smaller opponents. He was very obviously the heavier hitter against Lopez as he spent most of the fight firing right hands and landed several solid ones while also backing up Lopez throughout the fight. Although Lopez raised some swelling around George's left eye, his punches did not seem to have nearly as much steam on them as George's did. According to the CompuBox statistics, George was far more active but not very accurate. He landed 121 of 703 punches (17 percent), while Lopez connected on 133 of 541 blows (25 percent) and could never fire combinations on a regular basis, but George's shots seemed to do more damage. This draw is a tough one for George to swallow.
Kermit Cintron D10 Adrian Granados
Scores: 95-95, 96-94 Granados, 97-93 Cintron
Records: Cintron (33-5-2, 28 KOs); Granados (9-1-2, 5 KOs)
Rafael's remarks: Bad decision alert II! Bad decision alert II! In a decision as poor as the Donovan George-David Lopez main event, it made no difference that Granados, the 23-year-old from Chicago, was fighting at home. He deserved the victory and wound up with a draw against Cintron, 33, of Reading, Pa., the former welterweight titleholder. As much as the decision must stink for Granados, fighting in his first scheduled 10-round bout, he can at least say he has no worse than a draw with a former titleholder. But for Cintron, who is now 1-3-1 in his last five bouts, the result is a disaster and definitely not the way he wanted to return to boxing. He was looking to give his career another go after getting destroyed by junior middleweight titlist Saul "Canelo" Alvarez in five rounds in November 2011. Cintron took off 16 months after that defeat and moved back down to welterweight to fight Granados, but it did not do a lot of good and it is hard to see where Cintron goes from here after such a weak showing against a relative novice. It was a decent fight in which Cintron got off to his typically slow start, while Granados was far more energetic and tried to take the fight to his opponent. Cintron's best round came in the fourth when he connected with several clean shots and bloodied Granados' face. But Granados shook it off and stunned Cintron several times throughout the fight, while Cintron fought more passively. Granados controlled the pace, landed clean shots and got robbed. Poor Teddy Atlas. The ESPN broadcaster working the telecast had a near-meltdown after the decision was read and it was hard to blame him.
Friday at Montreal Adonis Stevenson KO6 Darnell Boone
Records: Stevenson (20-1, 17 KOs); Boone (19-21-3, 8 KOs)
Rafael's remarks: In April 2010, Stevenson, 35, of Quebec, was a rising prospect when he faced Boone, an experienced journeyman who had faced all kinds of quality opponents but always lost. On that night, however, Boone, who once badly hurt and knocked down Andre Ward in a 2005 loss, stopped Stevenson in the second round to pull the upset. Stevenson rebounded and has emerged as a quality super middleweight contender with a reputation as one of boxing's biggest punchers. With a title shot looming but the desire to remain active, this was the right time for the rematch with Boone. Stevenson is the mandatory challenger for super middleweight titlist Carl Froch, but he agreed to step aside in order to allow Froch to face Mikkel Kessler in a rematch to unify titles. However, the deal calls for the winner to immediately vacate one of the belts so Stevenson could fight for the title in June. However, Stevenson got an even better offer -- a shot on HBO against light heavyweight champion Chad Dawson on June 8 in Montreal. So Stevenson knew he had to avenge the loss to Boone, 33, of Youngstown, Ohio, to keep that opportunity alive, and he did just that in punishing fashion.
Stevenson, a southpaw, had Boone in trouble at the end of the first round when he cornered him and connected with several hard shots. He bloodied Boone's mouth in the second round and sent him reeling. Although Boone showed heart and kept winging as he looked for another knockout, Stevenson took him apart in a crowd-pleasing fight. In the sixth round, Stevenson, who had worked Boone to the body throughout the bout, dropped him to all fours with a digging right to the body. Moments later, he had Boone cornered and was connecting repeatedly. Boone, whose right eye was nearly swollen shut, threw back a couple of shots to keep referee Michael Griffin from stopping the fight. But then Stevenson landed two clean shots, a left uppercut and a straight left to the face, which dropped Boone. Griffin did not bother to complete the count and waved off the fight at 2 minutes, 43 seconds, as Stevenson exacted revenge and set up himself up for a world title shot. Boone, who was down for a couple of minutes, lost his fourth fight in a row.
Friday at Berlin Odlanier Solis W12 Leif Larsen
Scores: 117-111, 116-112, 115-114
Records: Solis (19-1, 12 KOs); Larsen (17-1, 14 KOs)
Rafael's remarks: Solis, 32, was a gifted amateur on the powerhouse Cuban national team. He won a 2004 Olympic gold medal and was a three-time world amateur champion before defecting to Germany and turning pro in 2007. But as a pro, Solis, who now lives in Miami, has a been a big disappointment. Rarely in shape and without much of a résumé, he got a world title shot as an undeserving mandatory challenger in March 2011 against Vitali Klitschko. Solis injured his knee in the closing seconds of the first round and could not continue, so it went down as a first-round knockout loss. After knee surgery, Solis returned 14 months later for a lopsided decision win against Konstantin Airich. For his second fight following surgery, Solis returned to Germany, where he turned pro and fought many of his early fights. He took on the untested but unbeaten Larsen, 27, of Norway, who turned pro in 2003 but had a three-year layoff before returning to the ring in 2010. Solis, who was 255 pounds to Larsen's 275 pounds, was in better shape than he has been (he was 267 against Airich) and turned in a workmanlike performance against Larsen. There was not much action to talk about, but Solis was steady and landed occasional power shots to keep Larsen in check. Larsen got off some decent shots and Solis said afterward that he was as powerful as anyone he has faced. The key now for Solis is to fight more frequently and work his way back into another title opportunity.
Selcuk Aydin W10 Giuseppe Lauri
Records: Aydin (24-2, 17 KOs); Lauris (53-12, 31 KOs)
Rafael's remarks: Aydin, 29, of Turkey, was a longtime welterweight contender but was coming off back-to-back losses -- a 12-round unanimous verdict against Robert Guerrero in an interim world title bout last July and a 10-round majority ruling against Jesus Soto Karass in January. Moving down to junior welterweight, Aydin got back on track with a shutout of Giuseppe Lauri, 36, of Italy. Lauri lost his third fight in a row and for the fifth time in five bouts. Aydin ended his two-fight skid.
Also on the card, former heavyweight titleholder Ruslan Chagaev (31-2-1, 20 KOs), 34, of Uzbekistan, won his fourth bout in a row since losing a decision to Alexander Povetkin for a vacant belt in August 2011. Chagaev knocked out West Virginia's overmatched Mike Sheppard (20-15-1, 9 KOs), 37, in the first round.
ESPNFNF Nigel CollinsGetting closer to ESPN2's Oct. 1 show, featuring: Curtis Stevens, 27-4 (20 KOs) vs. Hassan N'Dam, 30-1 (18 KOs), middleweights 12-rounder.about an hour ago danrafaelespn Dan RafaelFloyd ordered to appear at next Nevada commission meeting. He has some splainin to do. My story: http://t.co/QQp0Mje8Ct #boxingabout 2 hours ago danrafaelespn Dan RafaelThe Friday #FightFreak chat starts at noon ET/9 am PT. Bring the heat!! http://t.co/N2nshEHEUl #boxingabout 3 hours ago Nigel Collins retweetedWilliamDettloff William DettloffApparently my book on Ezzard Charles is available for pre-order (so you can order before you order)!http://t.co/WJLkkfdAUxabout 4 hours ago danrafaelespn Dan Rafael15 years ago tonight @OscarDeLaHoya got ROBBED vs. Trinidad: https://t.co/oJI22ir0Ec #boxingabout 14 hours ago danrafaelespn Dan RafaelFloyd ordered to appear at the Nevada commission meeting next week. My story: http://t.co/P7Gt6Q3WPP #boxingabout 15 hours ago osunaespn Bernardo OsunaUn placer compartir con el Gran Combo en @Nacion_ESPN con @Adriana_ESPN y @Faitelson_ESPN http://t.co/Alq2JpBpUBabout 17 hours ago Bernardo Osuna retweetedAdriana_ESPN Adriana MonsalveAl aire en @Nacion_ESPN junto a @Faitelson_ESPN y @osunaespn por @ESPNDeportes Al ritmo del Gran Combo de Puerto Rico #miami #losangelesabout 17 hours ago danrafaelespn Dan Rafael#Mayhem grossed almost $15M in tix sales, per NSAC. My blog: http://t.co/9TvqJJ1vzn #boxing @kellyswanson1 @LEllerbeabout 17 hours ago Dan Rafael retweetedjasonsalazar jason salazar@danrafaelespn if @ESPNBoxing doesn't pan out you can have a second career reviewing shower heads http://t.co/2IV1QeF9Qbabout 19 hours ago danrafaelespn Dan RafaelMayweather-Maidana 2 grossed nearly $15 million, 5th-best gate in Nevada history. Blog coming shortly. #mayhem #boxing @kellyswanson1about 19 hours ago BCampbellESPN Brian CampbellPizza Face. #NeverForget https://t.co/55nlpgjn7Uabout 20 hours ago BCampbellESPN Brian CampbellDon't call me Chris https://t.co/gy8BIYwTO8about 20 hours ago Brian Campbell retweetedIH8cornandcolts Sebastian Alvarez@BCampbellESPN @Max_Kellerman Somewhere in L.A. http://t.co/bGZsQIyDOrabout 20 hours ago danrafaelespn Dan RafaelIs Floyd about to clean house on his team, including Leonard Ellerbe? My blog: http://t.co/D7O5e3BCK6 #boxing @kellyswanson1about 22 hours ago danrafaelespn Dan RafaelA fractured thumb has KO'd @AntonioTarver from 9/29 fight with @Johnathon_Banks. My story: http://t.co/InVycGZxcd #boxing @GoldenBoyBoxingabout 22 hours ago ESPNBoxing ESPN BoxingRafael: Big changes coming to Team Mayweather? http://t.co/xVmPGf7w8P @danrafaelespnabout 23 hours ago ESPNBoxing ESPN BoxingRafael: @Klitschko close to resuming training for Nov. 15 fight against Kubrat Pulev http://t.co/FKwz2PQYLK @danrafaelespnabout 23 hours ago ESPNBoxing ESPN BoxingRafael: @ricksterko gets opponent for junior welterweight debut http://t.co/Tsh4u81ipQ @danrafaelespnabout 23 hours ago ESPNBoxing ESPN BoxingRafael: @maravillabox visits doctor for knee exam http://t.co/zAHw5EiTVw @danrafaelespnabout 23 hours ago Follow ESPN's Boxing coverage on Twitter »

value: This website is the official website of ESPN. It is owned by ESPN Internet Ventures, a division of ESPN Inc.


text: We found 0 results for "" Check your spelling or use different keywords and try again. If you are searching for help information, please select "Help" from the list of departments and try the search again. Some products available in stores may not be listed online — contact your local store to see if they carry what you are looking for. Walmart Sterling 45415 Dulles Crossing Plz Sterling, VA 20166 Ph. (571) 434-9434 Find another store Showing 0 of 0 results Compute- app-5482454-4-54866612, DC- prod-dal2, ENV- prod-a, Ver- 32.0.1, SHA- 218663fd569ac9bf392b2c78e3a7f424c761bb61, Log- 28cd352c-8ee9-152d88ce9c3000 Site Information Be the first to save! Email Address Sign up Privacy policy

value: This website is an American multinational retail corporation that operates a chain of hypermarkets , discount department stores, and grocery stores from the United States, headquartered in Bentonville, Arkansas.


text:
Lloyds Electronics - Jane Lew, WV | Groupon
All Deals 4697 Automotive 65 Beauty & Spas 267 Food & Drink 275 Health & Fitness 238 Home Services 47
Meal Prep & Wine Delivery 113 Online Learning 70 Personal Services 906 Personalized Items 1566 Retail 1961 Things To Do 305
ArtCanvas, Framed Art, Mixed Media, Photogr...59919 BathBath Accessories & Sets, Bath Rugs, Bath...1824 BeddingBed Pillows, Bedding Collections & Sets...3200 Floor Care & CleaningBrooms, Mops & Dusters, Vacuums607 FurnitureAccent Furniture, Baby & Kid's Furniture...6444 Heating & CoolingAir Conditioners, Air Purifiers, Dehumid...838 Home AppliancesIrons & Garment Care, Sewing Machines, S...2686 Home DecorCandles & Holders, Home Accents, Lamps &...11801
Aromatherapy & RelaxationAcupuncture & Acupressure, Aromatherapy...2059 Bath & BodyAccessories, Aromatherapy, Bath Soaks &...2697 CosmeticsBags & Cases, Brushes & Applicators, Eye...6555 FragranceFragrance Gift Sets & Coffrets, Kids Fra...17681 Hair CareHair & Scalp Treatment, Hair Accessories...7175 Health CareCompression, Daily Living Aids, First Ai...4017 Men's Health & BeautyMen's Bath & Body, Men's Hair Care, Men'...4655 Mobility & SafetyBathroom Safety, Bedroom Safety, Canes &...1036
Lloyds Electronics
351 Industrial Park Road, Jane Lew, WV 26378 351 Industrial Park Road, Jane Lew Directions
+13048847810
351 Industrial Park Road,
You won't need to plan ahead for parking when you travel to Lloyds Electronics.
Groupon has verified that the customer actually visited Lloyds Electronics.

value: This website is an American global e-commerce marketplace connecting subscribers with local merchants by offering activities, travel, goods and services in 15 countries. Based in Chicago, Groupon was launched there in November 2008, launching soon after in Boston, New York City and Toronto.


text:
The April Spin - Ruarri Joseph Song - BBC Music The BBC has updated its cookie policy. We use cookies to ensure that we give you the best experience on our website. This includes cookies from third party social media websites if you visit a page which contains embedded content from social media. Such third party cookies may track your use of the BBC website. We and our partners also use cookies to ensure we show you advertising that is relevant to you. If you continue without changing your settings, we'll assume that you are happy to receive all cookies on the BBC website. However, you can change your cookie settings at any time. Continue Change settings Find out more ]]> Accessibility links Skip to content Accessibility Help BBC iD Notifications
]]> Music Tracks Performances Playlists Artists More My Music Menu My Music Home Tracks Popular Find a Track Recommended Performances Popular All Recommended Playlists Featured All Recommended Artists Popular All Recommended More BBC Music News LIVE BBC Music My Generation BBC Introducing BBC Music in iPlayer BBC Proms Glastonbury BBC Performing Groups Sound Of 2017 My Music My Tracks My Performances My Interviews My Playlists My Artists The April Spin Share this track Share this with Digg Facebook Google LinkedIn Reddit StumbleUpon Twitter Copy this link http://www.bbc.co.uk/music/records/nzvznj Read more about sharing. Add Artist Ruarri Joseph Languages:

value: This website is the BBC's online service. It is a large network of websites including such high-profile sites as BBC News and Sport, the on-demand video and radio services co-branded BBC iPlayer, the children's sites CBBC and CBeebies, and learning services such as Bitesize.


text:
Amazon.co.uk: L. Pearce's review of Gustav Klimt - Complete Paintings
Gustav Klimt - The complete Paintings, 27 Dec. 2012
A huge impressive book. Fantastic large scale reproductions including foldout details of paintings. Marvellous quality reproductions and extensive analysis of Klimt's life and development as an artist. This may look an expensive book but when you see it, it really isn't - great value for money and Taschen quality prints - superb. This will be the defining work on Klimt for years to come. Buy it! You won't be disappointed.
Gustav Klimt - Complete Paintings 3836527952
Top Reviewer Ranking: 1,398,113

value: This website is an American multinational technology company which focuses on e-commerce, cloud computing, digital streaming, and artificial intelligence.


text:
Bell Lexus North Scottsdale - Scottsdale, AZ | Groupon
18555 North Scottsdale Road, Scottsdale, AZ 85255 18555 North Scottsdale Road, Scottsdale Directions
+14805025000
18555 North Scottsdale Road,
What do you do when your car starts to click and tick? Don't just cross your fingers and hope for the best. Take it to the mechanics at Bell Boutique North Scottsdale in Scottsdale, AZ, and enjoy the peace of mind that comes with a sure solution.
When your car starts acting up, Bell Boutique North Scottsdale in Scottsdale can cover all the buggy bases.
Patrons of Bell Boutique North Scottsdale will love the convenience of the nearby parking spaces. For keeping up with auto maintenance, you'll want to call Bell Boutique North Scottsdale soon to book an appointment in Scottsdale.
Grayhawk (3 mi)
Indian Bend (13 mi)
Groupon has verified that the customer actually visited Bell Lexus North Scottsdale.


text:
arrays - Trouble with function calling a pointer in C - Stack Overflow
Trouble with function calling a pointer in C [duplicate]
Return char[]/string from a function
char *userinput(void){
char input[22];
fgets(input,22,stdin);
char *inputpoint;
inputpoint=input;
return inputpoint;
This function is supposed to simply recieve a user input string and return it.
I call the function in main as follows
float arrests;
//print menu
menuprint();
//Take first User input
inputpoint=userinput();
input=inputpoint;
printf("\nYou entered: %s\n",input);
I am relatively new to coding especially pointers. I don't know why this code isn't printing out the string inputted. Please help
c arrays string function pointers share|improve this question asked Jan 29 '14 at 23:08
marked as duplicate by n.m., WhozCraig, Joseph Quinsey, abligh, Kerrek SB Mar 13 '14 at 17:04
input is allocated on userinputs stack, so when it is returned (and the stack frame is unwound) you will just get a pointer to garbage.
– dg123
Jan 29 '14 at 23:15
Once userinput exits all automatic variables within are no longer addressable. Now consider what that function returns, then reread my first sentence. The address returned is indeterminate once the function exists, and as such any usage of it is undefined behavior.
Jan 29 '14 at 23:18
The pointer returned to your main is probably still within bounds and pointing to something on the stack, but who knows what it's actually pointing to (probably something in printf's stack). We won't even discuss the folly of input=inputpoint... you're trying to overwrite what should be a read-only pointer, and not transferring the string to inputl.
Jan 29 '14 at 23:22
relevant: c-faq.com/malloc/retaggr2.html
– rmartinjak
Jan 29 '14 at 23:28
You haven't stated what actual trouble you're having, but in this case it's quite clear. If you had enabled warnings on your compiler, it should have told you that you are returning the address of a local variable. This is undefined behaviour, and you're not allowed to do it.
There are two common approaches here. One is to provide a location by passing it as a function parameter:
void userinput( char input[22] )
fgets(input, 22, stdin);
The other is to dynamically allocate. In this case, you could declare your function as it currently is, but do a malloc, or just use strdup:
char *userinput(void)
return strdup(input);
Note that if you use dynamic memory, you need to clean it up when you're finished with it:
char *inputpoint = userinput();
printf("\nYou entered: %s\n", inputpoint);
free(inputpoint);
Now I notice the other problem:
input = inputpoint;
The above is assigning a pointer to an array. That's not legal, and your compiler should issue an error. Obviously you are wanting to copy the string. You can use strncpy for this:
strncpy( input, inputpoint, 22 );
share|improve this answer answered Jan 29 '14 at 23:21
26.5k21540
The basic problem is that you're returning a pointer to a local variable. When userinput returns, its stack frame is released to be reused by the next function called (printf), but the pointer still points at it, so you print garbage or crash.
share|improve this answer answered Jan 29 '14 at 23:22
I see many errors here.
It appears you have not declared input point. Or is it declared somewhere else?
Also why are you doing your read input like that. Seems way too complex for such a simple task. See this solution below and the discussion beneath it.
void read(char *out){
scanf("%22s",&out[0]);
printf("%s\n", out);
char  chars2[22];
read(chars2);
printf("%s\n", chars2);
A core problem with your solution is that in C functions cant return arrays, unlike many other languages like Java that permit this. So we have to get more creative. What we can do is pass our read method a memory reference to the value we want to update via a parameter. The & (address of) operator allows the scanf to access the memory location of the first array element so it can fill the array with what ever is input. The maximum length of the input is 22 characters to match the char array. So if more are input is ignores anything after 22.
share|improve this answer edited Jan 30 '14 at 1:02
answered Jan 29 '14 at 23:19
The & is actually wrong there. scanf("%22s") expects a char * and you're passing a char (*)[22].
Jan 29 '14 at 23:24
Good point I meant to put &name[0]
– Andrew S
Jan 30 '14 at 0:56
Also, &out[0] is just a more verbose way of just writing out.
Jan 30 '14 at 1:04
Yes it is another good point, but I want to show what's actually going on.
Jan 30 '14 at 1:07
add a comment | Not the answer you're looking for?	Browse other questions tagged c arrays string function pointers or ask your own question.	asked
Getting an error in my function that returns values in an array using pointers in C
Calling function in main which separates a string using strtok (trouble with pointers)
Returning Array of pointers to string
Modifying arrays of strings in C in another function
Passing strings as pointer to a function
Trouble of pointers as function arguments

value: This website is a question and answer website for professional and enthusiast programmers. It is the flagship site of the Stack Exchange Network, created in 2008 by Jeff Atwood and Joel Spolsky.