text:
Patent US6781094 - Analysis of MEMS mirror device using a laser for mirror removal - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsA method of analyzing a MEMS device having micromirrors. A laser is targeted on one or more mirror elements and used to remove only the mirror. Once the mirror is removed, the underlying structure can be observed in operation, measured, elementally analyzed, or undergo other types of analysis....http://www.google.com/patents/US6781094?utm_source=gb-gplus-sharePatent US6781094 - Analysis of MEMS mirror device using a laser for mirror removalAdvanced Patent SearchPublication numberUS6781094 B2Publication typeGrantApplication numberUS 10/331,853Publication dateAug 24, 2004Filing dateDec 30, 2002Priority dateDec 30, 2002Fee statusPaidAlso published asUS20040124186Publication number10331853, 331853, US 6781094 B2, US 6781094B2, US-B2-6781094, US6781094 B2, US6781094B2InventorsCurtis R. HarperOriginal AssigneeTexas Instruments IncorporatedExport CitationBiBTeX, EndNote, RefManPatent Citations (5), Referenced by (9), Classifications (8), Legal Events (3) External Links: USPTO, USPTO Assignment, EspacenetAnalysis of MEMS mirror device using a laser for mirror removalUS 6781094 B2Abstract A method of analyzing a MEMS device having micromirrors. A laser is targeted on one or more mirror elements and used to remove only the mirror. Once the mirror is removed, the underlying structure can be observed in operation, measured, elementally analyzed, or undergo other types of analysis.
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS6545758 *Oct 5, 2000Apr 8, 2003Perry SandstromMicroarray detector and synthesizerUS20020126387 *Jan 8, 2002Sep 12, 2002Hiroichi IshikawaOptical multilayer structure material and process for producing the same, light switching device, and image display apparatusUS20020127760 *Aug 2, 2001Sep 12, 2002Jer-Liang YehMethod and apparatus for micro electro-mechanical systems and their manufactureUS20020135033 *Mar 7, 2002Sep 26, 2002Masaki HaraMicro-mirror and a method for fabricating the sameUS20020186359 *May 10, 2001Dec 12, 2002Dan MeisburgerLithography system and method for device manufacture* Cited by examinerReferenced byCiting PatentFiling datePublication dateApplicantTitleUS6856446 *Dec 12, 2002Feb 15, 2005Texas Instruments IncorporatedDigital micromirror device having mirror-attached spring tipsUS7744793Sep 6, 2005Jun 29, 2010Lemaire Alexander BApparatus and method for growing fullerene nanotube forests, and forming nanotube films, threads and composite structures therefromUS7777878Dec 18, 2007Aug 17, 2010J.A. Woollam Co., Inc.Application of digital light processor in scanning spectrometer and imaging ellipsometer and the like systemsUS7850778Sep 6, 2005Dec 14, 2010Lemaire Charles AApparatus and method for growing fullerene nanotube forests, and forming nanotube films, threads and composite structures therefromUS8162643Jun 4, 2010Apr 24, 2012Lemaire Alexander BMethod and apparatus for growing nanotube forests, and generating nanotube structures therefromUS8345241Aug 11, 2010Jan 1, 2013J. A. Woollam Co., Inc.Application of digital light processor in imaging ellipsometer and the like systemsUS8551376Apr 24, 2012Oct 8, 2013Grandnano, LlcMethod for growing carbon nanotube forests, and generating nanotube structures therefrom, and apparatusUS8576324Feb 3, 2010Nov 5, 2013Honeywell International Inc.Image acquisition system using orthogonal transfer CCD sensing elementUS20120224088 *Mar 3, 2011Sep 6, 2012Honeywell International Inc.Flashless motion invariant image acquisition system* Cited by examinerClassifications U.S. Classification219/121.72, 219/121.85, 219/121.69International ClassificationG02B26/08Cooperative ClassificationG02B26/0841, G02B26/0833European ClassificationG02B26/08M4E, G02B26/08M4Legal EventsDateCodeEventDescriptionJan 27, 2012FPAYFee paymentYear of fee payment: 8Jan 17, 2008FPAYFee paymentYear of fee payment: 4Dec 30, 2002ASAssignmentOwner name: TEXAS INSTRUMENTS INCORPORATED, TEXASFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:HARPER, CURTIS;REEL/FRAME:013628/0286Effective date: 20021212Owner name: TEXAS INSTRUMENTS INCORPORATED LEGAL DEPARTMENT P.Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:HARPER, CURTIS /AR;REEL/FRAME:013628/0286RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services©2012 Google


text:
Life is Meals Journal: an Album for Epicures book by James Salter | 0 available edition | Alibris Books
Books Life is Meals Journal: an Album for Epicures
For people who want to record their eating adventures and to store keepsakes from their memorable meals, this journal is peppered with eclectic passages from the literary gourmets James and Kay Salter. A perfect gift for anyone who loves to eat, this journal is beautifully designed for creating a keepsake around life's greatest pleasure: food. Inspired by the bestselling book "Life Is Meals," this journal provides plenty of space to record memories of delicious meals (whether they are enjoyed at restaurants, at dinner ...
2012, Random House USA Inc
13789686045
Fine. 030795269X Crisp pages and tight binding. Appears unread. Light shelf wear on cover.
14058864595
14104838591
13388134004
Dry Rep
14079105682
05/20/2012,
14073337381
13780863430
Very good. Life Is Meals Journal: An Album for Epicures by James Salter, 2012-05-04.
14104840534
14028311854
13936790095

type: global

value: This website is is an online store that sells new books, used books, out-of-print books, rare books, and other media through an online network of independent booksellers.


text:
We have become slaves to our economic system and its need for growth, even though it destroys us and our planet. : philosophyjump to contentmy subredditsannouncementsArtAskRedditaskscienceawwblogbookscreepydataisbeautifulDIYDocumentariesEarthPornexplainlikeimfiveFitnessfoodfunnyFuturologygadgetsgamingGetMotivatedgifshistoryIAmAInternetIsBeautifulJokesLifeProTipslistentothismildlyinterestingmoviesMusicnewsnosleepnottheonionOldSchoolCoolpersonalfinancephilosophyphotoshopbattlespicsscienceShowerthoughtsspacesportstelevisiontifutodayilearnedTwoXChromosomesUpliftingNewsvideosworldnewsWritingPromptsedit subscriptionsfront-all-random | OldSchoolCool-worldnews-sports-Music-gifs-gadgets-AskReddit-Art-creepy-funny-photoshopbattles-listentothis-aww-food-history-personalfinance-mildlyinteresting-todayilearned-philosophy-askscience-dataisbeautiful-LifeProTips-IAmA-books-Futurology-UpliftingNews-EarthPorn-videos-explainlikeimfive-InternetIsBeautiful-pics-DIY-Showerthoughts-TwoXChromosomes-Documentaries-gaming-tifu-news-science-nottheonion-WritingPrompts-space-GetMotivated-television-movies-Jokes-nosleep-Fitnessmore » philosophycommentsrelatedother discussions (5)want to join? login or register in seconds|Englishlimit my search to /r/philosophyuse the following search parameters to narrow your results:subreddit:subredditfind submissions in "subreddit"author:usernamefind submissions by "username"site:example.comfind submissions from "example.com"url:textsearch for "text" in urlselftext:textsearch for "text" in self post contentsself:yes (or self:no)include (or exclude) self postsnsfw:yes (or nsfw:no)include (or exclude) results marked as NSFWe.g. subreddit:aww site:imgur.com dogsee the search faq for details.advanced search: by author, subreddit...this post was submitted on 06 Jan 2013547 points (84% upvoted)shortlink: remember mereset passwordloginSubmit a new linkSubmit a new text postphilosophyunsubscribesubscribe1,127,852 readers~100 users here nowOur Rules Have Changed. Please read the sidebar for details.
a community for 6 yearsmessage the moderatorsMODERATORSilluminatedwaxBreSputBurnagedrunkentuneΦslickwombatReallyNicoleΦADefiniteDescriptionΦDylanhelloglueΦMaceWumpusΦSon_of_SophroniscusΦ...and 3 more »546547548We have become slaves to our economic system and its need for growth, even though it destroys us and our planet. (soundinthedark.com)submitted 1 year ago by Capitolium459 commentssharecancelsorry, this has been archived and can no longer be voted onloading...other discussions789We have become slaves to our economic system and its need for growth, even though it destroys us and our planet. (soundinthedark.com)submitted 1 year ago by Capitolium to /r/economy47 commentssharecancelsorry, this has been archived and can no longer be voted onloading...171819Slaves to Our Own System [xpost from r/ philosophy] (soundinthedark.com)submitted 1 year ago by Gonlin to /r/collapse5 commentssharecancelsorry, this has been archived and can no longer be voted onloading...000We have become slaves to our economic system and its need for growth, even though it destroys us and our planet.Economics|Capitolium (soundinthedark.com)submitted 1 year ago by PoliticBot to /r/POLITICcommentsharecancelsorry, this has been archived and can no longer be voted onloading...91011Slaves to Our Own System: Growth (soundinthedark.com)submitted 1 year ago by see0red to /r/overpopulationcommentsharecancelsorry, this has been archived and can no longer be voted onloading...001Slaves To Our Own System: Growth (I) -- The conventional wisdom is that we need economic growth. This continuing growth has serious repercussions, especially on the environment. (soundinthedark.com)submitted 1 year ago by evolvesustain to /r/EvolveSustaincommentsharecancelsorry, this has been archived and can no longer be voted onloading...aboutblogaboutteamsource codeadvertisejobshelpwikiFAQreddiquetterulescontact ustoolsmobilefirefox extensionchrome extensionbuttonswidget<3reddit goldstoreredditgiftsreddit.tvradio redditUse of this site constitutes acceptance of our User Agreement {Genitive} and Privacy Policy {Genitive}. © 2014 reddit inc. All rights reserved.REDDIT and the ALIEN Logo are registered trademarks of reddit inc.close this windowyou'll need to login or register to do thatcreate a new accountall it takes is a username and passwordprivacy philosophy
username:try anotheravailable!account recovery email: (optional)we only send email at your requestpassword:verify password:remember mecreate accountis it really that easy? only one way to find out...loginalready have an account and just want to login?username:password:remember merecover passwordloginclose this windowinterface languageEnglish [en]العربية [ar]Беларуская мова [be]български език [bg]Bosanski [bs]català [ca]česky [cs]dansk [da]Deutsch [de]Ελληνικά [el]English (Australia) [en-au]English (Canadian) [en-ca]English (Great Britain) [en-gb]English [en-us]Esperanto [eo]español [es]español [es-ar]eesti keel [et]Euskara [eu]فارسی [fa]suomi [fi]français [fr]Gàidhlig [gd]עברית [he]मानक हिन्दी [hi]hrvatski [hr]Magyar [hu]Հայերեն լեզու [hy]Bahasa Indonesia [id]íslenska [is] (*)italiano (Italy) [it]日本語 [ja]ಕನ್ನಡ [kn_IN]한국어 [ko]Latin [la]1337 [leet]LOL [lol]lietuvių kalba [lt]latviešu valoda [lv]Nederlands [nl]Nynorsk [nn]Norsk [no]Arrrrrrrr! [pir]polski [pl]português [pt] (*)português [pt-pt]português brasileiro [pt_BR]română [ro]русский [ru]slovenčina [sk]slovenščina [sl]српски језик [sr]Srpski [sr-la]Svenska [sv]தமிழ் [ta]ภาษาไทย [th]Türkçe [tr]українська мова [uk]Tiếng Việt [vi]中文 [zh] (*) incomplete volunteer to translateπ Rendered by PID 10890 on app-29 at 2014-09-19 07:09:19.000867+00:00 running 8e90960 country code: US.

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text:
Next Starseed Meet-up, Again! - Wanderers, Lightworkers & The Law of One (Costa Mesa, CA) | Meetup
Next Starseed Meet-up, Again!
Nov 5, 2010 · 4:00 PM
Each person last month filled out Dr. Boylan's Questionaire to see where we scored on the Starseed Scale. We also talked about the 1st, 2nd, and 3rd earth experiments in our galaxy. We also talked about 2012. We also talked about Zetas and other types of Stellar beings in our Galaxy. On the October 20, 2010 meetup we will discuss: 1. More from the Niburian Galactic Council at www.niburiancouncil.com 2. More from Star Children at www.thestarchildren.com 3. More from Dr. Boylan's website 4. More on Personal Experiences and Support! 5. More on Support in continuing and persevering on your mission! This is free no charge! Freely it is given to me, freely I give to you! See you there. The meeting will be held at the Orange Public Library, as usual! Directions are below!
That was great meet up folks! See you next time!
Colin R. +1
1,934 50+ People Meditating in OC!

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text: Yeremiah BellStrong SafetyBornMar 3, 1978 in Winchester, KYDrafted 2003: 6th Rnd, 213th by MIAExperience10th seasonCollegeEastern Kentucky2013 SeasonCOMBFFINT7702Career72898Complete Stats »StatsSplitsGame LogVideosPhotosShop Yeremiah Bell PicturesSAN FRANCISCO, CA - OCTOBER 13: Vernon Davis #85 of the San Francisco 49ers gets past a diving Yeremiah Bell #37 of the Arizona Cardinals to score a touchdown at Candlestick Park on October 13, 2013 in San Francisco, California. (Photo by Ezra Shaw/Getty Images)Yeremiah Bell Photos »11 of 16

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text:
multithreading - How to Reduce Thread.sleep() Latency in Android - Stack Overflow
I am generating timing events in a loop in a (non-UI) thread in an Android application, and I need those events to occur at precise intervals in time, (precise here means not varying any more than +/- 5 millisecs). Any errors of +/-10 millisecs (and certainly +/- 20 millisecs) can be perceived by the user. At the top of this loop I do some other calculations that take a variable amount of time, but at the bottom of the loop, I need the event to occur at a pre-calculated time.
A higly simplified version (without exception handling) of one attempt at my non-UI thread is below:
long loopTime = 2500L;
long eventTime = (System.nanoTime() / 100000L) + loopTime;
calcutionsTakingVaryingAmountOfTime(); // takes 200 millisecs or less
long eventWait = eventTime - (System.nanoTime() / 100000L);
Thread.sleep(eventWait / 10L);
eventTime = eventTime + loopTime;
It is the call to listener.onEvent() that needs to be precisely timed.
In the example above, the timing variables loopTime, eventTime, and eventWait measure time in tenths of a millisec. The expressions (System.nanoTime() / 100000L) measuring current time are likewise in tenths of a millisec.
I am absolutely certain that calcutionsTakingVaryingAmountOfTime() always takes less than 200 millisecs, and the call to listener.onEvent() is just a few millisecs. So as it stands, with loopTime set to 2500L, my events ought to occur every 250 millisecs.
I have intstrumented my code (not shown) to print to Log.d() the latency in the Thread.sleep() wake up time. That is, I calculate long latency = (System.nanoTime() / 100000L) - eventTime
immediately after the return from Thread.sleep(), and print it to Log.d(). When I run this in the emulator, what I find is that latency (after dividing by 10 to get the result into millisecs) is normally jumping between 1 and 50 millisecs in successive passes through the loop, with occasional values as high as a half a second. When run on an actual device, things are quite a bit better, but still a little wobbly (and even still, the emulator behavior makes me wonder if this is going to happen on users' devices).
To try to steady my event and control the latency, I tried several other approaches: In replaced the Thread.sleep(eventWait / 10L) call, with a call to this.wait(eventWait / 10L) (a completely inappropriate use of wait(), I know)
I manipulated the thread priorities prior to entering the loop, calling Process.setThreadPriority(Process.THREAD_PRIORITY_URGENT_AUDIO) like is done all over the android libraries
But there was no improvement at all in the latency with these.
The one approach that steadys the event, and reduces the latency to less than 2 or 3 millisecs, and rarely hiccups is to replace the Thread.sleep() call by a polling loop:
while ((System.nanoTime() / 100000L) < eventTime)
On the one hand, I feel embarrassed spending machine cycles like a drunken sailor on liberty. On the other hand, I am beginning to think there is no better way, and I should burn the machine cycles in the polling loop to reduce my latency, and meet my specification. Of course, when my app goes to the background, I pause my thread, so this polling loop works. But what a waste.
android multithreading concurrency latency share|improve this question asked Sep 7 '11 at 20:43
I'm using delayed messages with Handler for similar purpose. It can be little overkill. In you case I would take a look to Timer class.
Log.v("TEST", " tick");
This gives me latency +-2 millisecs at emulator.
Thanks for your suggestion. I tried a couple of things. First, I tried to use a call to 'java.util.Timer.schedule(TimerTask task, long delay)' as a (more or less) drop in replacement for my call to 'Thread.sleep()'. It went something like
– singerofwords
Thanks for your suggestion. I tried a couple of things. First, I tried to use a call to 'java.util.Timer.schedule(TimerTask task, long delay)' as a (more or less) drop in replacement for my call to 'Thread.sleep()'. Then I tried using 'scheduleAtFixedRate()' like yours. In both cases, I have from 1 to 70 millisecs latency on the emulator, though latency is nearly in spec on a device. Is there anything else you are doing to get your +/-2 millisecs latency on the emulator?
I were running only tiny test app, so there was almost none stress. My CPU is Intel(R) Core(TM)2 Duo CPU T9300 @ 2.50GHz.
Thanks for the reply. It is useful to me.
@singerofwords: I have the very same problem as you. Thread.sleep() ruins my app, because I also have latencies precisely as big as you describe. But how did you simulate the Thread.sleep with the Timer? Did you already find a better solution?
Not the answer you're looking for?	Browse other questions tagged android multithreading concurrency latency or ask your own question.	asked

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text: Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS4974169 *Jan 18, 1989Nov 27, 1990Grumman Aerospace CorporationNeural network with memory cyclingUS5170071 *Jun 17, 1991Dec 8, 1992Trw Inc.Stochastic artifical neuron with multilayer training capabilityUS5200898 *Nov 15, 1990Apr 6, 1993Honda Giken Kogyo Kabushiki KaishaMethod of controlling motor vehicleUS5285522 *Oct 8, 1991Feb 8, 1994The Trustees Of The University Of PennsylvaniaNeural networks for acoustical pattern recognitionEP0528399A2 *Aug 18, 1992Feb 24, 1993Toyoda Koki Kabushiki KaishaMethod and apparatus for learning of neural networkEP0540168A2 *Sep 25, 1992May 5, 1993Kabushiki Kaisha ToshibaSimulator using a neural network* Cited by examinerNon-Patent CitationsReference1Doya, K, "Learning Temporal PAtterns in Recurrent Neurla Networks," IEEE, SMC Conf. 1990, pp. 170-172.2 *Doya, K, Learning Temporal PAtterns in Recurrent Neurla Networks, IEEE, SMC Conf. 1990, pp. 170-172.* Cited by examinerReferenced byCiting PatentFiling datePublication dateApplicantTitleUS5946482 *May 16, 1997Aug 31, 1999Hewlett-Packard CompanyMethod and apparatus for using parameters to simulate an electronic circuitUS6363369Jun 11, 1998Mar 26, 2002University Of Southern CaliforniaDynamic synapse for signal processing in neural networksUS6405148 *Sep 2, 1999Jun 11, 2002Kabushiki Kaisha ToshibaAutomatic semiconductor device classification system, method for classifying semiconductor device and recording medium having program for the systemUS6640151Dec 22, 1999Oct 28, 2003Applied Materials, Inc.Multi-tool control system, method and mediumUS6643627Mar 26, 2002Nov 4, 2003University Of Southern CaliforniaDynamic synapse for signal processing in neural networksUS6708074Aug 11, 2000Mar 16, 2004Applied Materials, Inc.Generic interface builderUS6910947Nov 30, 2001Jun 28, 2005Applied Materials, Inc.Control of chemical mechanical polishing pad conditioner directional velocity to improve pad lifeUS6913938Jun 18, 2002Jul 5, 2005Applied Materials, Inc.Feedback control of plasma-enhanced chemical vapor deposition processesUS6961626May 28, 2004Nov 1, 2005Applied Materials, IncDynamic offset and feedback thresholdUS6984198Aug 14, 2001Jan 10, 2006Applied Materials, Inc.Experiment management system, method and mediumUS6999836Aug 1, 2003Feb 14, 2006Applied Materials, Inc.Method, system, and medium for handling misrepresentative metrology data within an advanced process control systemUS7047099Jun 18, 2002May 16, 2006Applied Materials Inc.Integrating tool, module, and fab level controlUS7069101Jul 29, 1999Jun 27, 2006Applied Materials, Inc.Computer integrated manufacturing techniquesUS7096085May 28, 2004Aug 22, 2006Applied MaterialsProcess control by distinguishing a white noise component of a process varianceUS7101799Nov 30, 2001Sep 5, 2006Applied Materials, Inc.Feedforward and feedback control for conditioning of chemical mechanical polishing padUS7160739Aug 31, 2001Jan 9, 2007Applied Materials, Inc.Feedback control of a chemical mechanical polishing device providing manipulation of removal rate profilesUS7174230Feb 28, 2002Feb 6, 2007Applied Materials, Inc.Computer integrated manufacturing techniquesUS7188142Nov 30, 2000Mar 6, 2007Applied Materials, Inc.Dynamic subject information generation in message services of distributed object systems in a semiconductor assembly line facilityUS7201936Jun 18, 2002Apr 10, 2007Applied Materials, Inc.Method of feedback control of sub-atmospheric chemical vapor deposition processesUS7205228Mar 30, 2004Apr 17, 2007Applied Materials, Inc.Selective metal encapsulation schemesUS7221990Apr 6, 2006May 22, 2007Applied Materials, Inc.Process control by distinguishing a white noise component of a process varianceUS7225047Mar 19, 2002May 29, 2007Applied Materials, Inc.Method, system and medium for controlling semiconductor wafer processes using critical dimension measurementsUS7272459Nov 14, 2003Sep 18, 2007Applied Materials, Inc.Method, system and medium for controlling manufacture process having multivariate input parametersUS7333871Jan 20, 2004Feb 19, 2008Applied Materials, Inc.Automated design and execution of experiments with integrated model creation for semiconductor manufacturing toolsUS7337019May 1, 2002Feb 26, 2008Applied Materials, Inc.Integration of fault detection with run-to-run controlUS7349753Apr 8, 2005Mar 25, 2008Applied Materials, Inc.Adjusting manufacturing process control parameter using updated process threshold derived from uncontrollable errorUS7354332Mar 26, 2004Apr 8, 2008Applied Materials, Inc.Technique for process-qualifying a semiconductor manufacturing tool using metrology dataUS7356377Jan 29, 2004Apr 8, 2008Applied Materials, Inc.System, method, and medium for monitoring performance of an advanced process control systemUS7672918Feb 5, 2008Mar 2, 2010Steve AdkinsArtificial neuronUS7698012Apr 13, 2010Applied Materials, Inc.Dynamic metrology schemes and sampling schemes for advanced process control in semiconductor processingUS7725208Dec 31, 2007May 25, 2010Applied Materials, Inc.Dynamic metrology schemes and sampling schemes for advanced process control in semiconductor processingUS7783375Aug 24, 2010Applied Materials, Inc.Dynamic metrology schemes and sampling schemes for advanced process control in semiconductor processingUS7966087Jun 21, 2011Applied Materials, Inc.Method, system and medium for controlling manufacture process having multivariate input parametersUS8005634Jan 25, 2007Aug 23, 2011Applied Materials, Inc.Copper wiring module controlUS8068644Mar 7, 2006Nov 29, 2011Peter Thomas TkacikSystem for seeing using auditory feedbackUS8070909Dec 6, 2011Applied Materials, Inc.Feedback control of chemical mechanical polishing device providing manipulation of removal rate profilesUS8504620Jan 11, 2007Aug 6, 2013Applied Materials, Inc.Dynamic subject information generation in message services of distributed object systemsUS8694145Nov 8, 2011Apr 8, 2014Applied Materials, Inc.Feedback control of a chemical mechanical polishing device providing manipulation of removal rate profilesUS20030202070 *Apr 29, 2002Oct 30, 2003Xerox CorporationMultiple portion solid ink stickUS20030208451 *May 5, 2003Nov 6, 2003Jim-Shih LiawArtificial neural systems with dynamic synapsesUS20070211947 *Mar 7, 2006Sep 13, 2007Peter Thomas TkacikSystem for seeing using auditory feedbackUS20080133163 *Dec 31, 2007Jun 5, 2008Shanmugasundram Arulkumar PDynamic metrology schemes and sampling schemes for advanced process control in semiconductor processingUS20090132452 *Feb 5, 2008May 21, 2009Steve AdkinsArtificial NeuronWO1998057245A1 *Jun 11, 1998Dec 17, 1998Univ Southern CaliforniaDynamic synapse for signal processing in neural networks* Cited by examinerClassifications U.S. Classification706/31, 706/25International ClassificationG06N3/04, G06F15/18, G06G7/16Cooperative ClassificationG06N3/049European ClassificationG06N3/04TLegal EventsDateCodeEventDescriptionFeb 27, 1995ASAssignmentOwner name: U.S. PHILIPS CORPORATION, NEW YORKFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:MEIJER, PETER B.L.;REEL/FRAME:007358/0735Effective date: 19950207Feb 25, 2000FPAYFee paymentYear of fee payment: 4Feb 20, 2004FPAYFee paymentYear of fee payment: 8Mar 10, 2008REMIMaintenance fee reminder mailedSep 3, 2008LAPSLapse for failure to pay maintenance feesOct 21, 2008FPExpired due to failure to pay maintenance feeEffective date: 20080903RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services

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text:
Mikro - Fort Lauderdale, FL | Groupon
All Deals 9476 Automotive 221 Beauty & Spas 2278 Food & Drink 429 Health & Fitness 1503 Home Services 320
1009 NW 52nd St, Fort Lauderdale, FL 33309 1009 NW 52nd St, Fort Lauderdale Directions
+19542020470
1009 NW 52nd St,
Whether your life in Fort Lauderdale revolves around biking or you're more of an amateur with an interest, Mikro is the spot for you.
To help ease your trip, Mikro features a close location to available parking. Ride the streets, the track, or the back roads with confidence knowing you picked up a quality bike from Mikro.
Groupon has verified that the customer actually visited Mikro.

value: This website is an American global e-commerce marketplace connecting subscribers with local merchants by offering activities, travel, goods and services in 15 countries. Based in Chicago, Groupon was launched there in November 2008, launching soon after in Boston, New York City and Toronto.


text:
1986 Halley's Comet Commerative Collector Panels Booklet.
This is a Commemorative Collector Panel Booklet put out by the Postal Commemorative Society. There are 8 Stamps from different countries of the world. The hard cover booklet has a description about Halley's Comet. In nice shape.
1978 Harris Explorer Stamp album + Soccer Album, Bag of Stamps, and More, 100's of Stamps+ 1 Unused Plate Block + 2 First Day Cover
1990-91 ZZTOP Recycle World Tour Access Pass Used Local Crew Neat Shape. Silk cloth
DRAGON FRUIT CUTTINGS - Halleys Comet - 2 Large Cuttings
Halley's Comet T-shirt shirt from 1985, NOS
Banknotes and bonds from countries of the world.
PO Commemorative

value: This website is an American e-commerce company focused on handmade or vintage items and craft supplies.


text: Southern Arizona BBB > Business Directory > Industry TipsIndustry TipsSharePrint XPrint OptionsPrint this pageBBB Business Reviews may not be reproduced for sales or promotional purposes.Choosing A Vehicle Repair FacilityBBB offers the following tips when choosing an auto repair facility:Look for a repair facility before you need one; you can make better decisions when you're not rushed. Ask friends and associates for their recommendations. Never choose a repair facility based solely on its convenient location. Look for a well-organized facility with vehicles in the parking lot equal in value to your own and modern equipment in the service bays. Ask if the shop is familiar with your vehicle make and model and the type of repair needed. Some facilities specialize in specific models or repairs. Look for signs of technician competence. The customer area should display trade school diplomas, certificates of advanced course work, and ASE certifications. ASE is a nationally recognized standard of technician competence. If diplomas or certificates are not displayed, ask to see them. Professionally run establishments will have a courteous, helpful staff. The manager, service writer, or technician should be willing to answer your questions. Labor rates, fees for testing and diagnostic work, guarantees, methods of payment, etc. should be clearly posted.Start with a minor job. Reward good service with repeat business and more complex work.Repair bills should list the charges for parts and labor separately. You have a right to inspect all replaced parts, and any auto repair facility must offer to return all replaced parts except those under warranty, trade-in or core parts. Consult your local BBB about the reputation of the shop; inquire about the number, nature, and resolution of complaints.

value: This website is a private, nonprofit organization whose self-described mission is to focus on advancing marketplace trust, consisting of 106 independently incorporated local BBB organizations in the United States and Canada, coordinated under the International Association of Better Business Bureaus  in Arlington, Virginia.The Better Business Bureau is not affiliated with any governmental agency. Businesses that affiliate with the BBB and adhere to its standards do so through industry self-regulation.


text:
Books Mathematics Reference Schaum's Outlines: Mathematical Handbook of Formulas and Tables Book Condition: New
13518720121
Starting at $0.99	Schaum's Outline of Vector Analysis
Starting at $11.88	Schaum's Outline of Differential Equations


text:
9780314926395: Modern Legal Ethics (Hornbook Series) - AbeBooks - Charles Wolfram: 0314926399
Charles Wolfram Modern Legal Ethics (Hornbook Series)
ISBN 13: 9780314926395
ISBN 10: 0314926399 ISBN 13: 9780314926395
Publisher: West Publication, 1986
ISBN 10: 0314926380 ISBN 13: 9780314926388
1. Modern Legal Ethics (Hornbook Series)
Published by West Publication (1986)
Book Description West Publication, 1986. Hardcover. Condition: New. Never used!. Seller Inventory # P110314926399
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Patent US4602189 - Light sink layer for a thin-film EL display panel - Google Patents
A thin-film electroluminescent (EL) panel operating as a matrix-addressed display is provided with a light sink layer immediately behind the phosphor layer thereof to enhance the legibility of the display under high ambient light conditions. The light sink layer is formed of a p-type semiconductor compound...http://www.google.com/patents/US4602189?utm_source=gb-gplus-sharePatent US4602189 - Light sink layer for a thin-film EL display panel
Publication number US4602189 A
Application number US 06/541,702
Publication number 06541702, 541702, US 4602189 A, US 4602189A, US-A-4602189, US4602189 A, US4602189A
Inventors Ramachandra M. P. Panicker
Patent Citations (5), Non-Patent Citations (2), Referenced by (17), Classifications (11), Legal Events (5)
Light sink layer for a thin-film EL display panel
US 4602189 A
A thin-film electroluminescent (EL) panel operating as a matrix-addressed display is provided with a light sink layer immediately behind the phosphor layer thereof to enhance the legibility of the display under high ambient light conditions. The light sink layer is formed of a p-type semiconductor compound material comprised of 20% lead telluride and 80% cadmium telluride doped with indium. The addition of the indium into the material introduces free electrons which compensate for the hole carriers therein and thereby increases the specific resistivity of the material. The addition of lead into the semiconductor compound material forms the lead telluride which in combination with the cadmium telluride reduces the energy band gap of the material to effectively absorb the ambient light in the visible range which is the source of the bad legibility. Moreover, the lead serves to reduce the mobility of the free charge carriers in the material and thereby further increases the specific resistivity of the material. Thus, the combined effects of the indium and the lead provide the semiconductor compound material with a specific resistivity in the range of 108 to 1012 ohm-centimeter. Such a high specific resistivity material for the light sink layer is especially useful in enabling the EL panel to operate with a relatively steep luminance vs. voltage characteristic curve as required for multiplexing operation of the matrix-addressed EL panel.
1. A method of fabricating a light sink layer for deposition behind the phosphor layer of an EL panel comprising the steps of:
providing a Te-rich semiconductor compound of CdTe in combination with PbTe; and
introducing indium as a dopant into said Te-rich semiconductor compound which is just sufficient to remove all evidence of p-type conduction therein;
whereby the resistivity of the compound is on the order of 108 to 1012 ohm-centimeter.
2. A method of fabricating a light sink layer for a thin-film EL panel comprising the steps of:
whereby the amount of cadmium in said CdTe can vary and still provide a semiconductor compound with a relatively high resistivity.
3. A method of fabricating a light sink layer for depositing behind the electroluminescent layer of a thin-film EL panel comprising the steps of:
forming a p-type semiconductor compound comprising 80% CdTe in combination with 20% PbTe; and
adding to said semiconductor compound a sufficient amount of indium as a donor to neutralize the hole carriers therein;
wherein the semiconductor compound has an energy band gap small enough to absorb light in the visible range and has a specific resistivity on the order of 108 to 1012 ohm-centimeter.
4. A method of fabricating a light sink layer for depositing behind the phosphor layer of a thin-film EL panel comprising the steps of:
mixing Cd, Te, Pb and a donor of indium to form a Te-rich semiconductor compound;
said Te-rich semiconductor compound having an energy band gap which is small enough to absorb light waves in the visible range; and
said Te-rich semiconductor compound having free electrons introduced therein by said donor to compensate for the hole carriers therein and having the mobility of its free carriers generated when a field is applied across said EL panel reduced by the presence of said Pb therein;
whereby the resistivity of the Te-rich semiconductor compound is maximized.
5. A composition of matter consisting of:
a Te-rich semiconductor compound of Cd, Pb, and Te having hole carriers therein; and
a dopant of indium added to said compound;
wherein said indium introduces electrons into the semiconductor compound to neutralize the hole charge carriers therein and thereby increase the specific resistivity of the compound to a level of about 106 to 107 ohm-centimeter; and
wherein said Pb effectively reduces the mobility of the free charge carriers in the semiconductor compound to thereby further increase the specific resistivity of the compound to a level of about 108 to 1012 ohm-centimeter.
6. A light sink layer for an electroluminescent thin-film display device comprising:
a non-stoichiometric semiconductor compound of CdTe in combination with PbTe;
a dopant for introducing charge carriers different than the charge carriers of said non-stoichiometric semiconductor compound for neutralizing the latter charge carriers to thereby increase the specific resistivity of said compound;
said PbTe in combination with said CdTe providing for tailoring the energy band gap of said semiconductor compound to absorb light in the visible range; and
said Pb in said PbTe providing for reducing the mobility of the free charge carriers in said semiconductor compound to further increase the specific resistivity thereof.
7. An electroluminescent thin-film display device comprising:
a light sink layer on the back of said electroluminescent layer;
a first dielectric layer on the front of said electroluminescent layer;
a second dielectric layer on the back of the said light sink layer;
a first set of transparent electrodes on the front of said first dielectric layer; and
a second set of counter metallic electrodes on the back of said second dielectric layer;
said light sink layer formed of a p-type semiconductor compound comprised of CdTe in combination with PbTe and doped with indium and having an energy band gap for absorbing light in the visible range and a specific resistivity high enough to permit multiplexed drive of said device.
8. An electroluminescent thin-film display device comprising:
a second dielectric layer on the back of said light sink layer;
said light sink layer formed of a p-type semiconductor compound comprised of PbTe in combination with CdTe and including a donor;
said donor providing electrons for compensating for the hole carriers of the p-type semiconductor compound to increase the resistivity thereof;
the Pb in said PbTe providing for reducing the mobility of the free carriers in said semiconductor compound to further increase the resistivity thereof whereby said semiconductor compound is provided with a specific resistivity on the order of 108 to 1012 ohm-centimeter; and
said semiconductor compound having an energy band gap for absorbing light in the visible range and having a specific resistivity high enough to permit multiplexed drive of said device.
This invention relates to electroluminescent (EL) display panels and more particularly to a light sink layer for use in enhancing the legibility of such a panel under high ambient light conditions.
A typical matrix-addressed EL panel includes a phosphor layer sandwiched between a pair of dielectric layers with a set of transparent indium tin oxide (ITO) electrodes provided over the front dielectric layer thereof and a set of counter aluminum electrodes provided over the rear dielectric layer thereof. When such an operating matrix-addressed EL panel is viewed under high ambient light conditions, a substantial amount of the ambient light entering the front of the EL panel is reflected off the rear aluminum electrodes back to the viewer making it difficult to distinguish between the selectively illuminated pixels and the non-illuminated pixels on the EL panel. Thus, to enhance the contrast between the illuminated and non-illuminated pixels on the EL panel, it has previoulsy been proposed to provide a light absorbing layer immediately behind the phosphor layer for absorbing the incoming ambient light.
The problem with such a light absorbing layer on an EL panel is that heretofore the only materials available for this purpose have been those that have a relatively low electrical specific resistivity. However, because of the multiplexing operation of the matrix-addressed EL panel, wherein the aluminum electrodes are sequentially electrically driven and selected ones of the ITO electrodes are simultaneously electrically driven in accordance with video data such that selected ones of the pixels along the driven aluminum electrode are energized at the same time, it is necessary for the light absorbing layer to be made of a material having a sufficiently high resistivity so that the EL panel can operate with a relatively steep luminance vs. voltage characteristic curve. It is thus seen that it is very important to provide a material for use as a light absorbing layer for a matrix-addressed EL panel which not only can effectively absorb light in the visible range but which also has a relatively high electrical specific resistivity.
In accordance with the present invention, a material for a light absorbing layer, hereinafter referred to as a light sink layer, to be deposited immediately behind the phosphor layer of a thin-film EL panel is formed of a p-type semiconductor compound material comprised of 20% lead telluride and 80% cadmium telluride doped with indium. The indium provides for introducing free electrons into the material which compensate for the hole carriers therein and thereby increases the specific resistivity of the material. The lead telluride in combination with the cadmium telluride serves to tailor the energy band gap of the semiconductor compound material to absorb light in the visible spectrum, and the presence of the lead, per se, in the material effectively serves to reduce the mobility of the free charge carriers therein and therefore further increases the specific resistivity of the material. The indium and lead thus result in the resistivity of the material being on the order of 108 to 1012 ohm-centimeter which is a resistivity more closely associated with the lower range of a dielectric material. Such a high resistivity of the light sink layer material enables the EL panel to operate with a relatively steep luminance vs. voltage characteristic curve as needed for a matrix-addressed EL panel.
Accordingly, one of the objects of the present invention is to provide a material especially adapted for use as a light sink layer immediately behind the phosphor layer in an EL panel.
Another object of the present invention is to provide a light sink layer material for an EL panel which has a resistivity high enough to permit multiplexing operation of the EL panel.
Another object of the present invention is to provide a p-type semiconductor compound material comprised of lead telluride and cadmium telluride doped with indium for use as a light sink layer in an EL panel being used as a matrix-addressed display.
Still another object of the present invention is to provide for adding lead to a p-type cadmium telluride semiconductor compound doped with indium wherein the lead forms lead telluride which serves to reduce the energy band gap of the compound so that it effectively absorbs light in the visible range and wherein both the lead and the indium serve to increase the level of resistivity of the semiconductor compound so that it is useful as a light sink layer in a matrix-addressed EL display panel.
Yet another object of the present invention is to provide a high resistivity light sink layer material for an EL display panel comprised of a p-type semiconductor compound including cadmium telluride and lead telluride doped with indium wherein the amount of cadmium in the compound can vary and still maintain the high resistivity thereby making the material easy to fabricate.
FIG. 1 is a perspective pictorial view showing a portion of a thin-film matrix-addressed EL panel having a light sink layer in accordance with the present invention positioned intermediate the phosphor layer and the back dielectric layer thereof;
FIG. 2 is an optical diagram illustrating how incident ambient light entering the front of the EL panel is absorbed in the light sink layer thereof;
FIG. 3 is a block diagram schematically illustrating the multiplex drive operation of the EL panel having incorporated therein the light sink layer of the present invention;
FIG. 4 shows graphs illustrating the drive voltage as applied to refresh a pixel on the EL panel in FIG. 3 and the luminance output thereof;
FIG. 5 is a graph showing the affect the conductivity of the light sink layer in an EL panel has on the luminance vs. voltage operation thereof;
FIG. 6 is a graph showing how the carrier concentration in a cadmium telluride semiconductor compound varies with cadmium activity therein;
FIG. 7 is the energy band gap diagram of a cadmium telluride semiconductor compound in the form of p-type material;
FIG. 8 is the energy band gap diagram of a cadmium telluride semiconductor compound in the form of n-type material;
FIG. 9 is the energy band gap diagram of the p-type cadmium telluride semiconductor compound compensated with indium;
FIG. 10 is a graph showing how the carrier concentration in the cadmium telluride semiconductor compound doped with indium varies with cadmium activity therein; and
FIG. 11 is the energy band gap diagram of the p-type 20% lead telluride and 80% cadmium telluride semiconductor compound doped with indium.
Referring to FIG. 1 of the drawings, an electroluminescent display panel 10 is shown to comprise a glass substrate 12 having deposited thereon a thin-film sandwich structure 13 which includes a plurality of thin films or layers. The thin-film sandwich structure 13 is formed by first depositing a transparent layer of indium tin oxide to a thickness of about 1700 Angstrom units over the surface of the glass substrate 12, and then photoetching the indium tin oxide to form a plurality of parallel separated transparent electrodes h1, h2 -hn. A dielectric, such as a transparent yttria layer 16, is then sputtered to a thickness of about 2000 Angstrom units over the active area 15 of the panel 10. Next, a transparent phosphor layer 18, such as zinc sulfide doped with manganese, is evaporated to a thickness of about 6000 Angstrom units over the yttria layer 16. A light sink layer 20 which is a light absorbing material fabricated in accordance with the present invention is then deposited to a thickness of about 2500 Angstrom units immediately over the phosphor layer 18. The light sink layer 20 is followed by a second yttria layer 22 which is deposited by sputtering to a thickness of about 2000 Angstrom units. A plurality of parallel separated aluminum electrodes v1, v2 -vn is then evaporated through a suitable mask to a thickness of about 1200 Angstrom units over the second yttria layer 22 so as to extend in a direction at right angles to the transparent front electrodes h1, h2 -hn. Finally, a layer 27 of alumina is deposited to a thickness of approximately 1500 Angstrom units over the back surface of the sandwich structure so far formed to encapsulate the electrodes v1, v2,-vn. A back glass protective cover 28 is then held on the glass substrate 12 slightly spaced from the back of the thin-film structure 13 by a marginal seal 29 of resin.
Reference will next be made to FIG. 2 which is a schematic cross-sectional view of the EL panel 10 showing the path of an incident ambient ligt ray 30 through the various thin-film layers thereof. Thus, the light ray 30, upon entering the glass substrate 12 on the front of the EL panel 10, passes through the successive transparent layers into the light sink layer 20. Typically the indium tin oxide (ITO) electrodes h1, H2,-hn have an index of refraction of about 2.1, the first yttria layer 16 has an index of refraction of about 2.0, the ZnS:Mn phosphor layer 18 has an index of refraction of about 2.35, the light sink layer 20 has an index of refraction of about 4.0, and the back yttria layer 22 has an index of refraction of about 2.0.
It should be noted that the ITO, yttria, and phosphor layers in front of the light sink layer 20, are each made of materials having refractive indexes that are as close as possible to each other, and the thickness of each of these layers is optimized so as to minimize the reflections at their interfaces.
The light sink layer 20 is made of a material with a very high absorption coefficient and an optimum thickness t so that reflection at its interface with the phosphor layer is minimized for a broad range of wavelengths of the visible light.
It should be especially noted that the high index of refraction equal to 4.0 for the light sink layer 20 serves to trap the ambient light rays, not yet absorbed, by multiple internal reflections, thus ensuring that these light rays will eventually be absorbed in the light sink layer.
As a result of such a construction of the thin-film sandwich structure 13 for the EL panel 10, it has been experimentally determined that the reflection of the ambient light at the internal interfaces thereof and the absorption of the ambient light in the light sink layer 20 thereof is controlled such that the diffuse relectivity as viewed from the front of the EL panel is less than 1%.
Reference will next be made to FIG. 3 which shows a block diagram of a typical matrix-addressed system for use with the EL panel 10 shown in FIG. 1. It is assumed that the EL panel 10 has 56 column electrodes v1, v2,-v56 and 56 row electrodes h1, h2,-h56.
Thus, as shown in FIG. 3, the EL panel 10 is provided with column drivers 31 for applying driving voltages to the column electrodes v1, v2,-v56 and with row drivers 32 for applying driving voltages to the row electrodes h1, h2,-h56.
A shift register 33 is provided with an output connected to each of the column drivers 31. The shift register 33 advances a pulse therein in response to each timing signal received from a timing control 34 to successively energize its outputs to gate a respective column driver 31 to apply a drive voltage on each of the 56 column electrodes v1, v2,-v56, in turn, during each cycle or frame time period that the EL panel is operating to display video information.
A one-line memory 35 having a storage element therein associated with each of the 56 row electrodes h1, h2,-h56, provides for controlling the respective row drivers 32. Thus, as a column of data is successively fed out of a video ram 36 into the one-line memory 35, in response to a timing signal received from the timing control 34, each of the storage elements of the one-line memory 35 that is storing a binary 1 digit serves to simultaneously gate a respective row driver 32 to apply a drive voltage on an associated row electrode h1, h2,-h56.
Thus, in FIG. 3, when a column driver 31 is actuated to provide a drive voltage on aluminum electrode v25, for example, and when the one-line memory 35 has video data therein which simultaneously actuates selected ones of the row drivers 32 to simultaneously provide drive voltages on the ITO electrodes h1, h2, and h25, for example, the pixels p1, p2, and p25 along the selected aluminum electrode v25 are simultaneously illuminated. It should be appreciated, of course, that any number of pixels along the selected aluminum electrode can be illuminated depending on the incoming video data.
FIG. 4 shows the drive voltages as applied across the pixel p25, for example, in order to refresh it. The drive voltage is initially in the form of a first square wave pulse 42 which includes a positive voltage E on the h25 electrode and a ground on the v25 electrode causing the pixel p25 to charge in one direction. Following this, both electrodes v25 and h25 are at ground for a short interval w. Then the drive voltage is in the form of a second square wave pulse 43 which includes a positive voltage E on the v25 electrode and a ground on the h25 electrode causing the pixel p25 to charge in the opposite direction. It should now be clearly understood that each time a pixel on the EL panel is refreshed it receives square wave pulses 42 and 43.
It should be particularly noted, as illustrated in FIG. 4b, that when the ITO electrode h25 has a positive voltage thereon, which means the aluminum electrode v25 is at ground or negative thereto, very little light 44 is emitted by the phosphor layer 18. On the other hand, when the electrode h25 is ground and the aluminum electrode v25 has a positive voltage thereon, a substantial amount of light 45 is emitted by the phosphor layer.
It is thus seen that when drive voltages are simultaneously applied on selected ones of the row electrodes h1 -h56, selected ones of the pixels along the length of a selected one of the column electrodes v1 -v56 will be multiplexed, i.e., simultaneously refreshed. By repeating the operation of reading a column of data from the video ram 36 into the one-line memory 35, as the corresponding one of the column electrodes v1 -v56 is selected to be driven, all the pixels on the EL panel are refreshed a column at a time, during each frame time period, and the operation repeats itself on successive frame time periods to maintain the picture on the EL panel. It should be appreciated, of course, that the refreshing rate of the data to be displayed on the EL panel must be faster than a certain minimum rate in order to give the eye the impression that it is viewing a continuous picture.
Now, inasmuch as the light sink layer 20 is incorporated within the front and back dielectric layers 16 and 22 of the EL panel 10, it is highly important that it be made of a material having a sufficiently high resistivity to enable the EL panel to operate with a relatively steep luminance vs. voltage characteristic curve so that the pixels will have a fast response to the step voltages provided by the square wave driving pulses 42 and 43 to provide maximum luminance at the high refresh rate that the EL panel is operating.
Referring next to the graph in FIG. 5, curve 37 is a typical luminance vs. voltage characteristic curve of an EL panel without a light sink layer behind the phosphor layer 18 thereof. Thus, in this case, the phosphor layer has on either side thereof a dielectric layer with a very high resistivity, typically in the range of 1012 to 1016 ohm-centimeter. Consequently, the EL panel has a luminance vs. voltage characteristic curve with an ideal steep slope, i.e., a substantially vertical slope, as shown. Such a slope provides maximum luminance of the EL panel at as low a voltage as possible.
Now when a light sink layer 20 which has a resistivity much lower than a dielectric, in the range of 104 to 105 ohm-centimeter, for example, is inserted behind the phosphor layer of an EL panel, it provides a luminance vs. voltage characteristic curve such as that shown by curve 38 in FIG. 5. The incorporation of such a light sink layer 20 reduces the threshold voltage of the EL panel by as much as 50 volts, showing thereby that electrons can be injected at a lower threshold voltage from the light sink layer-phosphor layer interface. Thus, the depth of the states at this interface must be shallower compared to the back yttria layer-phosphor layer interface on the EL panel without the light sink layer. However, because of the lower resistivity of such a light sink layer, the slope of its luminance vs. voltage characteristic curve is greatly reduced making it unsuitable for multiplex driving of the EL panel. Moreover, such a low specific resistivity causes considerable power dissipation in the light sink layer and results in a reduction in luminance and heating of the EL panel.
It should now be evident that what is desired for a light sink layer behind the phosphor layer of a matrix-addressed EL panel, because of the very high field and localized regions of high current existing in the phosphor layer thereof, is a material which has a resistivity many orders higher that that represented by curve 38. In particular, what is desired is a light sink layer material that has a resistivity on the order of 108 to 1012 ohm-centimeter so as to provide a luminance vs. voltage characteristic curve, such as curve 39, which has a slope much steeper than curve 38 and operates at a significantly higher luminance level. It should be especially noted that curve 39, similarly to curve 38, has a threshold voltage which is about 50 volts less than the threshold voltage of the EL panel without a light sink layer.
In view of the above, it should now be clearly understood that when choosing a material for use as the light sink layer 20 on an EL panel 10, it is important not only for this material to be able to absorb the ambient visible light which is the source of the bad contrast upon viewing the EL panel but it is also important for this material to have sufficiently high resistivity so that the EL panel can operate with a relatively steep luminance vs. voltage characteristic curve as needed to provide for a multiplexed drive of the EL panel.
In order to understand how to fabricate the light sink layer material of the present invention, first to be noted is that, in accordance with the band theory of solids which relates to the motion of electrons therein, certain materials are characterized as having an energy band gap. Such a band gap may be visualized as including a valance band spaced from a conduction band wherein the spacing corresponds to a given amount of energy expressed in electron volts (eV). Now it is well understood that light rays in the visible range can also be expressed as energy within the range of 1.60 eV to 3.30 eV. Thus, in accordance with the band theory, if the energy of the light waves impinging on a material is less than the energy of the band gap of the material, the light waves pass right through the material, i.e., the material is transparent to the light waves. On the other hand, if the energy of the light waves impinging on a material is equal to or greater than the energy of the band gap of the material, the light waves are able to excite the electrons in the material from the valance band into the conduction band, thus converting the energy of the light waves into other forms of energy. It is in this manner that the light waves are absorbed in a material. Therefore, in order for a material to be able to completely absorb light waves in the visible range it should have a band gap of less than 1.60 eV which is the lowest wave length in the visible light range.
Now, although dielectric materials have a very high resistivity, on the order of 1012 to 1016 ohm-centimeter, they cannot be used for a light sink layer because they have such large band gaps that they never absorb visible light but, rather, are transparent to such light waves.
On the other hand, although highly conductive materials have a good light absorption characteristic, because their band gaps are so narrow that electron-hole pairs can be easily generated, they cannot be used for a light sink layer in a matrix-addressed display panel because of their very low resistivity.
It is for the above reasons, therefore, that the material chosen as a compromise for use as a light sink layer is a semiconductor material. Now, as a class, semiconductor materials are compounds which have relatively small band gaps and are therefore good absorbers of visible light, and they have resistivities which are considerably higher than metals. However, the resistivities of semiconductor materials are still not high enough for matrix-addressed displays. In other words, semiconductor materials do not naturally exist with the high resistivities desired. They typically have a specific resistivity which in the high end of the range is about 104 to 105 ohm-centimeter, instead of in the range of 108 to 1012 ohm-centimeter, and consequently, in their native state, they are not useful as a light sink layer immediately behind the phosphor layer of a matrix-addressed EL panel.
In order to understand the reason the semiconductor compounds naturally have a relatively low resistivity, reference will next be made to FIG. 6 which shows a graph of the concentration of charge carriers in the semiconductor compound cadimum telluride (CdTe) as a function of the activity of cadmium, aCd, therein. It should be noted that the compound CdTe is chosen because it has a high absorption characteristic and a high index of refraction previously mentioned as being desirable for a light sink layer. Thus, in the graph of FIG. 6, the ordinate is the logarithm of the number of charge carriers, either holes or electrons, formed in the compound CdTe by combining Cd and Te, and the abscissa is the logarithm of the cadmium activity, aCd, in the compound CdTe.
Thus, as shown in FIG. 6, as the cadmium activity, aCd, increases in the CdTe compound, which is initially of the p-type, the hole carrier concentration decreases, as indicated by the p-curve, from on the order of 1017 holes per c.c. down toward zero as it approaches the stoichiometric point S, and, then, as the cadmium activity, aCd, continues to increase past this point S, the electron carrier concentration increases upward from zero to on the order of 1017 electrons per c.c., or more, as indicated by the n-curve.
Now, it is noted that if the CdTe compound is stoichiometric, i.e., if the compound were to correspond to the ideal point S on the curve in FIG. 6, it would have no free carriers and, consequently, no conductivity. In other words it would be an ideal high specific resistivity material. However, in order to combine Cd with Te stoichiometrically to form the semiconductor compound CdTe, it is necessary to have the exact proportions of 50% cadmium and 50% tellurium, and it is thermodynamically impossible for these elements to be naturally combined in such exact proportion. Actually, in spite of the caution taken to combine them in the exact proportions needed, there will be either a deficiency of Cd or a deficiency of Te in the compound as formed.
Thus, when the semiconductor compound CdTe is deficient in Cd it exhibits charge carriers as holes, i.e., is of the p-type, and when it is deficient in Te it exhibits charge carriers as electrons, i.e., is of the n-type. Moreover, if the semiconductor compound is of the p-type, it cannot have any n-type conduction present, and if the semiconductor compound is of the n-type, it cannot have any p-type conduction present. It is either one or the other.
It should now be clearly understood that if there is a small deficiency of Cd in the compound CdTe, in other words if the amount of Cd is less than stoichiometric, there exist vacancies of cadmium, VCd, and, as shown in FIG. 7, that will introduce an acceptor level in the band gap of the compound which is close to the valance band making the material p-type. So this material becomes conductive by holes and the conductivity is directly proportional to the number of Vcd. The p-type CdTe is, therefore, not practical for use as a light sink layer in an EL panel because it does not have a high specific resistivity, even at room temperature.
By the same token, if there is a small deficiency of Te in the compound CdTe, in other words if the amount of Te is less than stoichiometric, there exist vacancies of tellurium, VTe, and as shown in FIG. 8, that will introduce a donor level in the band gap of the compound which is close to the conduction band making the material n-type. So the material becomes conductive by electrons and the conductivity is directly proportional to the number of VTe. This n-type CdTe, likewise, is not practical for use as a light sink layer in an EL panel because it does not have a high specific resistivity, even at room temperature.
In either event, p-type or n-type, it is for this reason that these compounds tend to be of lower resistivity. Namely, the free carriers formed in the semiconductor compound that make the material conductive is due to the fact that the semiconductor compound is not stoichiometric.
It should be particularly noted in FIG. 6, that as the cadmium activity, aCd, in the compound CdTe, increases, as soon as hole conduction ceases the electron conduction takes over. As a result, there is only an extremely narrow range, i.e., the pin point S, where the compound could have this extremely high resistivity. In fact, attempts to form the high resistivity stoichiometric point S material fail because the range is so minute that the material inevitably ends up either on the p-curve or the n-curve with the resulting free carriers that lead to the resistivity being on the order of 102 to 105 ohm-centimeter.
It should now be clearly understood that the semi-conductor compound CdTe, as shown in FIG. 6, cannot be used as a light sink layer for a matrix-addressed display panel because due to its relatively low resistivity, it creates crosstalk and power dissipation, and hinders the multiplexing drive operation of the EL panel.
In accordance with the present invention, in order to modify the semiconductor compound CdTe shown in FIG. 6 to make it more resistive, the compound initially is made Te-rich, i.e., at low aCd, so as to be deficient in Cd, that is VCd, so as to have control over it. The compound is thus purposely made rich in Te to obtain a p-type semiconductor material which is non-stoichiometric. By making the compound Te-rich it is evident that a Cd atom is not provided for every Te atom. There are more Te atoms than required and hence the accompanying VCd.
Now the objective is to introduce a level in the band gap of the p-type material shown in FIG. 7 which donates electrons to the conduction band and which will thereby compensate for the holes in the valance band due to the VCd acceptor level so that the charge carriers are neutralized, i.e., so that the material tends to be rid of any free carriers due to the acceptor level, thereby increasing the resistivity of the compound to a maximum when the number of donors equals the number of acceptors.
To accomplish this, a dopant or donor, i.e., an impurity that increases the number of free electrons, is added to the p-type CdTe semiconductor compound when it is formed. The donor in this case is indium.
Thus, in the semiconductor compound CdTe which is deficient in cadmium, namely, containing VCd, since some of the Te atoms do not have Cd atoms to combine with, the indium atoms will join instead in their place, InCd, and, when they do, each indium atom provides an extra electron. In other words, when an indium atom is introduced in place of the cadmium atom, since an indium atom has three electrons and only two electrons are needed to replace a cadmium atom in combination with a tellurium atom, there is an extra electron which is free to wander around anywhere it wants to. Thus, indium is a donor of electrons.
Reference will next be made to FIG. 9 which shows the position of the levels of the dominant defect, the VCd, near the valance band, and shows the position of the compensating levels of the donor indium, the InCd, near the conduction band. The levels compensate for each other so that the hole carriers in the material are neutralized by the electron carriers. Moreover, in FIG. 9, the position of the Fermi level, which is one way of noting whether a material is p-type or n-type, is shown to be in the middle of the band gap, thus indicating that the material is neither p-type or n-type, but, rather, that the p-type material has been externally compensated for.
Now to determine the exact amount of indium to put into a particular composition of cadmium deficient compound CdTe to compensate for the hole carriers in the p-type material, as previously mentioned, the compound is initially purposely made of 50% Cd and 50% Te by weight and then an additional small amount of Te, on the order of, for example, 0.05 gram per 100 grams of the compound is added to provide a Te-rich compound. It is possble to determine if the material is actually p-type by making a "hot probe" measurement. A thin-film of the material is made and then two spaced probes are placed on its surface and connected to a millivoltmeter to form a circuit. Then one of the probes is heated. As a result, either type of carriers, holes or electrons, start to move towared the cold junction. There will be an emf between the two probes and by checking the polarity of the emf it is possible to determine whether the conduction is by electrons or holes, and, consequently, whether the semiconductor material is n-type or p-type.
Once, having established that the material is of the desired p-type, it does not matter how many hole carriers there are in the material. Moreover, if a measurement were to be made in a well known manner by the use of four probes to determine the resistivity of the material, the reading would typically be, for exammple, 104 to 105 ohm-centimeter.
Several batches of this p-type material are then provided, each equal to 100 grams, for example. Then a small amount of indium. increasing in increments of 0.05 gram, for example, is put in each of the several batches. A resistivity measurement is then performed on each of the batches of material having increasing amounts of indium, by the use of four probes, to determine the composition of the particular batch which gives the maximum resistivity. This resistivity will typically be on the order of 106 to 107 ohm-centimeter.
Now, it is one thing to expect that if there are, say, 1015 hole carriers per c.c. in a compound and a given amount of indium is provided that introduces 1015 free electrons, then the effective concentration of free carriers in the material is zero. Thus, if the material, for example, is at point 40 on the curve (FIG. 6) and the indium is added which supplies enough electrons to neutralize the hole carriers, then it would be expected that the material should end up close to point 41 with a zero carrier concentration. But that is not what happens. When the indium is added to the material the whole p-region of the compound shown in FIG. 6 is opened up. So now it is possble to make compositions with the varying amounts of cadmium coming within the p-range to the left of the stoichiometric point S in FIG. 6, and still end up with a material having a resistivity on the order of 106 to 107 ohm-centimeter. In fact, once an amount of indium is added to the p-type material such that the hole carriers are no longer observed to exist by measurement tests, there no longer is a region with a p-curve and the graph of the compound is now that shown in FIG. 10.
It is believed that the reason for this phenomenon is that indium forms certain complexes which prevent the p-type CdTe compound from showing up once the proper amount of indium has been added. So the only problem to be concerned about is to make sure that too much indium has not been added inasmuch as that would move the CdTe compound out of the p-region and cause it to become conductive by electrons.
It has been shown from the above that the semiconductor compound CdTe can be doped by the use of a donor indium to provide a material having a resistivity of about 106 to 107 ohm-centimeter. However, as previously described in connection with FIG. 5, a matrix-addressed EL display panel requires a light sink layer material with a much higher resistivity because of the very high fields and localized regions of high current existing in the active layer thereof. Moreover, the creation of carriers due to thermal generation or band to band injection under high field conditions must be minimized.
Accordingly, next to be described is the manner in which this Te-rich semiconductor compound CdTe doped with indium can be further modified by the addition of lead (Pb). The Pb serves two purposes. It tailors the energy band gap of the compound so that it will absorb the full range of light waves in the visible spectrum, and it also further increases the resistivity of the compound by many orders as desired for a light sink layer 20 immediately behind the phosphor layer 18 in a matrix-addressed EL display panel.
First to be noted is that the semiconductor compound CdTe by itself, as shown in FIG. 7, has an energy band gap of 1.58 eV and consequently the compound does not effectively absorb the lower red light waves in the visible spectrum having an energy of 1.60 eV, So in order to obtain a smaller energy band gap, the Te-rich CdTe material doped with indium is mixed with Pb in the form of PbTe. In particular, as shown in FIG. 11, it has been discovered that a ternary compound comprising 20% PbTe and 80% CdTe doped with indium will provide a material with an energy band gap of 1.25 eV which is more than adequate for effectively absorbing the full range of light waves in the visible range from red to blue.
Now the Pb added to the semiconductor compound to form PbTe also serves to reduce the mobility of the free carriers in the compound so as to further increase the resistivity thereof.
Thus, it is well known that the number of free carriers in a material does not alone indicate the value of the specific resistivity thereof. Actually, the specific resistivity of a material is inversely proportional to the number of charge carriers and the mobility of the charge carriers therein. Therefore, when Pb is added to the compound, because of the large size of the Pb atoms and the large concentration thereof, which results in alloy scattering, the mobility of the free carriers generated in the semiconductor compound when a field is applied across the EL panel is reduced, thus increasing the resistivity of the compound such that it is now on the order of 108 to 1012 ohm-centimeter.
It should now be understood that the reason for the 20% PbTe in the indium doped semiconductor compound is because it has been experimentally determined that such a proportion provides the right proportion of Pb in the compound to maximize the reduction of mobility of the free carriers therein, and thereby, increase its resistivity to within the desired range.
It should now be appreciated, that the ternary compound of the material for the light sink layer 20 of the EL panel, in accordance with the present invention, is actually made by combining 40% Cd, 10% Pb and 50% Te by weight and then adding an additional small amount, e.g., 0.05 gram of Te per 100 grams of the ternary compound. Then a small amount of indium, e.g., on the order of 1014 to 1017 atoms per c.c., is added to the compound. As a result, the hole carriers in the compound are compensated for by the free electrons donated by the indium to effectively increase the resistivity of the compound. Moreover, the presence of the Pb reduces the mobility of the free carriers in the compound to further increase its resistivity. Thus, the combined effects of the dopant indium and the Pb in the compound result in the resistivity thereof being increased to the order of 108 to 1012 ohm-centimeter which is the level previously indicated as being desirable for the material being used as a light sink layer immediately behind the phosphor layer 18 of a matrix-addressed EL display panel.
As discussed previously in connection with FIG. 4, when the voltage across a pixel of the EL panel 10 is such that the polarity of the selected aluminum electrode is negative, the corresponding emission 44 of the phosphor layer 18 is quite small, as shown in FIG. 4b. In other words, the amount of light emitted by the phosphor layer of an EL panel provided with a light sink layer 20 immediately behind the rear surface thereof is only 60% to 70% of the light that is emitted by the phosphor layer of an EL panel without a light sink layer. Moreover, as is evident, approximately half of the light emitted by the phosphor layer is absorbed in the light sink layer. Thus, the above two factors cut down the light actually emitted, i.e., the luminance of the EL panel, by about 65% in the presence of the light sink layer. Now even in spite of this large loss of the light output from the EL panel due to the light sink layer being present, the contrast ratio of the lit and unlit pixels on the display EL panel is enhanced to such a level thereby that it more than offsets the loss of output luminance,
Now contrast ratio, CR, is defined as follows:
CR=(luminance+reflected ambience)/reflected ambience
Thus, assuming the EL panel 10 provided with the light sink layer 20 of the present invention is to be used in an environment wherein the ambient intensity is 10,000 foot candles (approximately 3138 fL) and, further, assuming the diffuse reflectance of the EL panel is 0.25% and the luminance of the lit pixels on the EL panel is 20 fL, the lit and unlit pixels on the EL panel will have a contrast ratio of about 3.5. This contrast ratio is more than sufficient to make the display legible.
The significance of the use of the light sink layer is made clear by pointing out that in the absence of the light sink layer on the EL panel, the EL panel would have to emit a luminance of 3900 fL instead of the 20 fL to obtain the same contrast ratio between the lit and unlit pixels of about 3.5.
While, in order to comply with the statute, the invention has been shown and described in language more or less specific as to structural features, it is to be understood that the invention is not limited to these specific features but that the composition and method of fabrication herein disclosed comprise a preferred form of putting the invention into effect and the invention is therefore claimed in any of its forms or modifications within the legitimate and valid scope of the appended claims.
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GB2039146A * Title not available
1 "Phase Equilibria and Semiconducting Properties of Cadmium Telluride," paper by Dirk De Nobel, pp. 28-99, dated May 1958.
2 * Phase Equilibria and Semiconducting Properties of Cadmium Telluride, paper by Dirk De Nobel, pp. 28 99, dated May 1958.
US4814237 * Jul 24, 1987 Mar 21, 1989 Sharp Kabushiki Kaisha Thin-film electroluminescent element
US4879139 * Jun 23, 1988 Nov 7, 1989 Nippon Soken, Inc. Method of making a thin film electroluminescence element
US5517080 * Dec 14, 1992 May 14, 1996 Westinghouse Norden Systems Inc. Sunlight viewable thin film electroluminescent display having a graded layer of light absorbing dark material
US5521465 * Oct 6, 1994 May 28, 1996 Westinghouse Norden Systems Inc. Sunlight viewable thin film electroluminscent display having darkened metal electrodes
US5620348 * May 12, 1995 Apr 15, 1997 Timex Corporation Method of manufacturing electroluminescent lamps having surface designs and lamps produced thereby
US6114738 * Sep 28, 1999 Sep 5, 2000 Drs Fpa, L.P. Intrinsic p-type HgCdTe using CdTe capping layer
US6287673 Mar 3, 1998 Sep 11, 2001 Acktar Ltd. Method for producing high surface area foil electrodes
US8003880 * Jan 19, 2008 Aug 23, 2011 Omnitek Partners Llc Method and devices for generating energy from photovoltaics and temperature differentials
US20080115820 * Jan 19, 2008 May 22, 2008 Rastegar Jahangir S Method and devices for generating energy from photovoltaics and temperature differentials
U.S. Classification 313/505, 252/62.30T, 313/506, 313/509, 252/62.30V
Cooperative Classification H05B33/12, H05B33/22
European Classification H05B33/12, H05B33/22
Owner name: SIGMATRON ASSOCIATES, 1150 SOUTH OLIVE ST., STE 14
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Owner name: SIGMATRON NOVA, INC., THOUSAND OAKS, CALIFORNIA, A
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNOR:SIGMATRON ASSOCIATES, A CALIFORNIA LIMITED PARTNERSHIP;REEL/FRAME:004461/0430


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Nissan Murano 2009 13 Smoked Bug Shield Stampede 2417 2 | eBay Skip to main content eBay Shop by category Enter your search keyword All Categories Advanced or register':' style="margin-right:3px">Hi -User-!'.replace(/-User-/,escape(a)))+"")}catch(b){document.write("")}})();Hi (Sign in to bid or buy)Daily DealsSellCustomer Support My eBay Expand My eBay My eBay Summary Bids/Offers Watch list Wish list All lists Purchase history Selling My Collections Followed searches Messages Notification Back to home page
Details about Nissan Murano 2009-13 Smoked Bug Shield --Stampede 2417-2
Nissan Murano 2009-13 Smoked Bug Shield --Stampede 2417-2
eBay item number:280915120148
Aug 18, 2014 11:35:57 PDT View all revisions
Manufacturer Part Number: 2417-2
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Fits: 2009 thru 2013 Nissan Murano Image is for illustration only, you will receive the correct part# for year and model listed. Hood Protectors (also known as bug shields) have been around for a long time. In the beginning they were just tall flat pieces of plexiglas attached to the front end of a vehicle. . . Effective, but not much to look at! Now days we have a much better understanding of aerodynamics and know that taller isn't necessarily better, it's the shape that matters. The hood protectors we make are designed to compliment the look of the vehicle while still providing maximum protection. Features:• Stand Away Design for easy cleaning • Scratch Resistant • Durable and UV Stable
Nissan Frontier Bug Shield,
Chevrolet Avalanche Bug Shield,

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