# -*- makefile -*-
# Copyright 2019 The Chromium OS Authors. All rights reserved.
# Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file.
#
# RISC-V core OS files build
#

# Select RISC-V bare-metal toolchain
$(call set-option,CROSS_COMPILE,$(CROSS_COMPILE_riscv),\
	/opt/coreboot-sdk/bin/riscv64-elf-)

# Enable FPU extension if config option of FPU is enabled.
_FPU_EXTENSION=$(if $(CONFIG_FPU),f,)
# CPU specific compilation flags
CFLAGS_CPU+=-march=rv32ima$(_FPU_EXTENSION)c -mabi=ilp32$(_FPU_EXTENSION) -Os
LDFLAGS_EXTRA+=-mrelax
LDFLAGS_EXTRA+=-static-libgcc -lgcc

core-y=cpu.o init.o panic.o task.o switch.o __builtin.o math.o

# -*- makefile -*-
# Copyright 2019 The Chromium OS Authors. All rights reserved.
# Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file.
#
# RISC-V core OS files build
#

# Select RISC-V bare-metal toolchain
$(call set-option,CROSS_COMPILE,$(CROSS_COMPILE_riscv),\
	/opt/coreboot-sdk/bin/riscv64-elf-)

# Enable FPU extension if config option of FPU is enabled.
_FPU_EXTENSION=$(if $(CONFIG_FPU),f,)
# CPU specific compilation flags
CFLAGS_CPU+=-march=rv32ima$(_FPU_EXTENSION)c -mabi=ilp32$(_FPU_EXTENSION) -Os
LDFLAGS_EXTRA+=-mrelax
LDFLAGS_EXTRA+=-static-libgcc -lgcc

ifneq ($(CONFIG_LTO),)
CFLAGS_CPU+=-flto
LDFLAGS_EXTRA+=-flto
endif

core-y=cpu.o init.o panic.o task.o switch.o __builtin.o math.o

Make it possible to enable LTO
core/riscv-rv32i: Make it possible to enable LTO

This is especially useful to reduce the total code size if
we enable division by zero UBSAN.

BRANCH=none
BUG=b:173969773
TEST=Enable on asurada[_scp], boot

Change-Id: I86212a5834e5dd86e75bc3247f4365a6e102c45e
Signed-off-by: Nicolas Boichat <f3daba1cdc403799935674d3cd4b0e5bd1804232@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2605037
Reviewed-by: Tzung-Bi Shih <5e6f7578cd434ae5b4c9ffe5250f7a87a25045d7@chromium.org>
Reviewed-by: Eric Yilun Lin <2f2733c7206ea2b76bd2db1905cc5e8a75841c48@chromium.org>
