; RUN: llc < %s -march=x86 -mattr=+sse | FileCheck %s
; RUN: llc < %s -march=x86 -mattr=+avx | FileCheck %s
; RUN: llc < %s -march=x86 -mattr=+prfchw | FileCheck %s -check-prefix=PRFCHW

; rdar://10538297

define void @t(i8* %ptr) nounwind  {
entry:
; CHECK: prefetcht2
; CHECK: prefetcht1
; CHECK: prefetcht0
; CHECK: prefetchnta
; PRFCHW: prefetchw
	tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 1, i32 1 )
	tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 2, i32 1 )
	tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3, i32 1 )
	tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 0, i32 1 )
	tail call void @llvm.prefetch( i8* %ptr, i32 1, i32 3, i32 1 )
	ret void
}

declare void @llvm.prefetch(i8*, i32, i32, i32) nounwind 

; RUN: llc < %s -march=x86 -mattr=+sse | FileCheck %s
; RUN: llc < %s -march=x86 -mattr=+avx | FileCheck %s
; RUN: llc < %s -march=x86 -mattr=+sse -mattr=+prfchw | FileCheck %s -check-prefix=PRFCHW

; rdar://10538297

define void @t(i8* %ptr) nounwind  {
entry:
; CHECK: prefetcht2
; CHECK: prefetcht1
; CHECK: prefetcht0
; CHECK: prefetchnta
; PRFCHW: prefetchw
	tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 1, i32 1 )
	tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 2, i32 1 )
	tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3, i32 1 )
	tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 0, i32 1 )
	tail call void @llvm.prefetch( i8* %ptr, i32 1, i32 3, i32 1 )
	ret void
}

declare void @llvm.prefetch(i8*, i32, i32, i32) nounwind 

Fix PRFCHW test on non-x86 builds
Fix PRFCHW test on non-x86 builds

- 'prefetch' intrinsics are only lowered when SSE is available. On non-X86
  builds, 'generic' CPU is used and stops lowering any prefetch intrinsics.



git-svn-id: 0ff597fd157e6f4fc38580e8d64ab130330d2411@178046 91177308-0d34-0410-b5e6-96231b3b80d8
