`define CLOCK_PERIOD 1.0
`define PRINTF_COND TestDriver.printf_cond
`define STOP_COND !TestDriver.reset
`define RANDOMIZE_MEM_INIT
`define RANDOMIZE_REG_INIT
`define RANDOMIZE_GARBAGE_ASSIGN
`define RANDOMIZE_INVALID_ASSIGN

`define CLOCK_PERIOD 1.0
`ifdef VERILATOR
`define PRINTF_COND $c("done_reset")
`define STOP_COND $c("done_reset")
`else
`define PRINTF_COND !TestDriver.reset
`define STOP_COND !TestDriver.reset
`endif
`define RANDOMIZE_MEM_INIT
`define RANDOMIZE_REG_INIT
`define RANDOMIZE_GARBAGE_ASSIGN
`define RANDOMIZE_INVALID_ASSIGN

Support Verilator simulation again, {PRINTF,STOP}_COND changed


module string_utils_unit_test;

  import svunit_pkg::*;
  `include "svunit_defines.svh"

  string name = "string_utils_ut";
  svunit_testcase svunit_ut;

  import svunit_under_test::string_utils;

  function void build();
    svunit_ut = new(name);
  endfunction

  task setup();
    svunit_ut.setup();
  endtask

  task teardown();
    svunit_ut.teardown();
  endtask

  `SVUNIT_TESTS_BEGIN

    `SVTEST(some_passing_test)
      `FAIL_UNLESS(svunit_under_test::TRUE)
    `SVTEST_END

  `SVUNIT_TESTS_END

endmodule

module string_utils_unit_test;

  import svunit_pkg::*;
  `include "svunit_defines.svh"

  string name = "string_utils_ut";
  svunit_testcase svunit_ut;

  import svunit_under_test::string_utils;

  function void build();
    svunit_ut = new(name);
  endfunction

  task setup();
    svunit_ut.setup();
  endtask

  task teardown();
    svunit_ut.teardown();
  endtask

  `SVUNIT_TESTS_BEGIN

    `SVTEST(can_split_string_by_underscore)
      string some_string = "some_string";
      string parts[] = string_utils::split_by_char("_", some_string);
      string exp_parts[] = '{ "some", "string" };
      `FAIL_UNLESS_EQUAL(parts, exp_parts)
    `SVTEST_END

    `SVTEST(split_string_by_underscore_does_nothing_when_no_underscore)
      string some_string = "string";
      string parts[] = string_utils::split_by_char("_", some_string);
      string exp_parts[] = '{ "string" };
      `FAIL_UNLESS_EQUAL(parts, exp_parts)
    `SVTEST_END

  `SVUNIT_TESTS_END

endmodule

Add tests for `split_by_char` functions

Add tests for `split_by_char` functions

The `FAIL` macros don't handle string very well, because it's not possible to quote text containing strings. This makes the tests look pretty awkward.


package queue_test;

  `include "svunit.svh"
  `include "svunit_defines.svh"

  import queue::*;

  virtual class queue_test extends svunit::test;

    protected queue #(int) q0;
    protected queue #(int) q1;
    protected queue #(int) q2;

    protected virtual function void set_up();
      q1.enqueue(1);
      q2.enqueue(2);
      q2.enqueue(3);
    endfunction

  endclass

  `TEST_F_BEGIN(queue_test, is_empty_initially)
    `FAIL_UNLESS_EQUAL(q0.size(), 0)
  `TEST_F_END

  `TEST_F_BEGIN(queue_test, dequeue_works)
    `FAIL_UNLESS_EQUAL(q1.dequeue(), 1)
    `FAIL_UNLESS_EQUAL(q1.size(), 0)

    `FAIL_UNLESS_EQUAL(q2.dequeue(), 2)
    `FAIL_UNLESS_EQUAL(q2.size(), 1)
  `TEST_F_END

endpackage

package queue_test;

  `include "svunit.svh"
  `include "svunit_defines.svh"

  import queue::*;

  virtual class queue_test extends svunit::test;

    protected queue #(int) q0 = new();
    protected queue #(int) q1 = new();
    protected queue #(int) q2 = new();

    protected virtual function void set_up();
      q1.enqueue(1);
      q2.enqueue(2);
      q2.enqueue(3);
    endfunction

  endclass

  `TEST_F_BEGIN(queue_test, is_empty_initially)
    `FAIL_UNLESS_EQUAL(q0.size(), 0)
  `TEST_F_END

  `TEST_F_BEGIN(queue_test, dequeue_works)
    `FAIL_UNLESS_EQUAL(q1.dequeue(), 1)
    `FAIL_UNLESS_EQUAL(q1.size(), 0)

    `FAIL_UNLESS_EQUAL(q2.dequeue(), 2)
    `FAIL_UNLESS_EQUAL(q2.size(), 1)
  `TEST_F_END

endpackage

Fix null pointer exceptions in test

Fix null pointer exceptions in test

These weren't a problem before, because if a method call on a `null` object doesn't try to access any instance members, the call won't fail.


// 6.20 of svlog-2009

module A1 #(int a = 5, localparam logic b = 1, type c = int, parameter n);
	// TODO: Check that parameter port is
	// - parameter int a = 5,
	// - localparam logic b = 1,
	// - localparam type c = int,
	// - parameter n
endmodule

module A2;
	A1 #(.n(2)) a;
	// TODO: Check that
	// - a.a = non-local (int) 5
	// - a.b = local (logic) 1
	// - a.c = local type int
	// - a.n = non-local (int) 2
endmodule

class B #(size = 1);
	logic [size-1:0] v;
endclass

interface C #(AWIDTH = 64, type T = word) (input logic clk);
endinterface

module D #(int N = 5, M = N*16, type T = int, T x = 0)();
endmodule

class E #(type T, int size);
	T words[size];
endclass

typedef E#(byte, 1024) F;

// 6.20 of svlog-2009

module A1 #(int a = 5, localparam logic b = 1, type c = int, parameter n);
	// TODO: Check that parameter port is
	// - parameter int a = 5,
	// - localparam logic b = 1,
	// - localparam type c = int,
	// - parameter n
endmodule

module A2;
	A1 #(.n(2)) a;
	// TODO: Check that
	// - a.a = non-local (int) 5
	// - a.b = local (logic) 1
	// - a.c = local type int
	// - a.n = non-local (int) 2
endmodule

class B #(size = 1);
	logic [size-1:0] v;
endclass

interface C #(AWIDTH = 64, type T = int) (input logic clk);
endinterface

module D #(int N = 5, M = N*16, type T = int, T x = 0)();
endmodule

// class E #(type T, int size);
// 	T words[size];
// endclass

// typedef E#(byte, 1024) F;

Disable some weird broken tests

test: Disable some weird broken tests


// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

// This sequence triggers prog_failure alert by setting the error bit in otp_program_rsp
// Then check in scb if the alert is triggered correctly
class lc_ctrl_prog_failure_vseq extends lc_ctrl_smoke_vseq;
  `uvm_object_utils(lc_ctrl_prog_failure_vseq)

  `uvm_object_new

  constraint otp_prog_err_c {
    otp_prog_err == 1;
  }

  virtual task post_start();
    // trigger dut_init to make sure always on alert is not firing forever
    if (do_apply_reset) begin
      dut_init();
    end else wait(0); // wait until upper seq resets and kills this seq

    // delay to avoid race condition when sending item and checking no item after reset occur
    // at the same time
    #1ps;
    super.post_start();
  endtask

endclass

// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

// This sequence triggers prog_failure alert by setting the error bit in otp_program_rsp
// Then check in scb if the alert is triggered correctly
class lc_ctrl_prog_failure_vseq extends lc_ctrl_smoke_vseq;
  `uvm_object_utils(lc_ctrl_prog_failure_vseq)

  `uvm_object_new

  constraint otp_prog_err_c {
    otp_prog_err == 1;
  }

  virtual task post_start();
    expect_fatal_alerts = 1;
    super.post_start();
  endtask

endclass

[dv/lc_ctrl] Modify lc tests to use post_start alert checking.

Signed-off-by: Cindy Chen <399ad771a111eac8923348b1e2af093034e5d4f1@opentitan.org>


/* package private */ class string_utils;

  /* local */ typedef string array_of_string[];

  static function array_of_string split_by_char(string char, string s);
    string parts[$];
    int last_char_position = -1;

    if (char.len() != 1)
      $fatal(0, "Internal error: expected a single character string");

    for (int i = 0; i < s.len(); i++) begin
      if (i == s.len()-1)
        parts.push_back(s.substr(last_char_position+1, i));
      if (s[i] == char) begin
        parts.push_back(s.substr(last_char_position+1, i-1));
        last_char_position = i;
      end
    end

    return parts;
  endfunction

endclass

/* package private */ class string_utils;

  /* local */ typedef string array_of_string[];

  static function array_of_string split_by_char(string char, string s);
    string parts[$];
    int last_char_position = -1;

    if (char.len() != 1)
      $fatal(0, "Internal error: expected a single character string");

    for (int i = 0; i < s.len(); i++) begin
      if (i == s.len()-1)
        parts.push_back(s.substr(last_char_position+1, i));
      if (string'(s[i]) == char) begin
        parts.push_back(s.substr(last_char_position+1, i-1));
        last_char_position = i;
      end
    end

    return parts;
  endfunction

endclass

Fix warning related to string comparison

`s[i]` returns a `byte`, whereas `char` is a `string`. DVT and VCS complain about this comparison, while Xcelium and QuestaSim are fine with it. No idea who is in the right here, but we don't want warnings in any of the tools.


// $Id: $
// File name:   OutputControllerRAM.sv
// Created:     4/21/2016
// Author:      Diego De La Fuente
// Lab Section: 337-08
// Version:     1.0  Initial Design Entry
// Description: This is how the Output Controller reads and writes to the M9K
//

module OutputControllerRam
(
	    output reg [31:0] q,
		input [31:0] d,
		input [6:0] write_address, read_address,
		input we, clk
);
	reg [31:0] mem [2457599:0];
	always @ (posedge clk) begin
		if (we)
			mem[write_address] <= d;
		q <= mem[read_address]; // q doesn't get d in this clock cycle
	end
endmodule

// $Id: $
// File name:   OutputControllerRAM.sv
// Created:     4/21/2016
// Author:      Diego De La Fuente
// Lab Section: 337-08
// Version:     1.0  Initial Design Entry
// Description: This is how the Output Controller reads and writes to the M9K
//

module OutputControllerRam
(
	    output reg [23:0] q,
		input [23:0] data,
		input [6:0] write_address, read_address,
		input we, clk
);
	reg [23:0] mem [2457599:0];
	always @ (posedge clk) begin
		if (we)
			mem[write_address] <= data;
		q <= mem[read_address]; // q doesn't get d in this clock cycle
	end
endmodule

Revert "Revert "Changes to Output Controller Ram Access""

This reverts commit 7aa9b68244bcd22dad3a1b46e23e69e6e8535e8f.


`define SVUNIT_INTERNAL_TEST_BEGIN(TEST_NAME, BASE_CLASS) \
  class TEST_NAME extends BASE_CLASS; \
    local static const bit is_test_builder_registerd \
        = register_test_builder(concrete_builder#(TEST_NAME)::get()); \
    local static string full_name_of_class = $sformatf("%m"); \
    \
    virtual function string full_name(); \
      return full_name_of_class; \
    endfunction \
    \
    virtual function string name(); \
      return `"TEST_NAME`"; \
    endfunction \
    \
    virtual task test_body(); \

`define SVUNIT_INTERNAL_TEST_END \
    endtask \
  endclass \

`define SVUNIT_INTERNAL_TEST_BEGIN(TEST_NAME, BASE_CLASS) \
  class TEST_NAME extends BASE_CLASS; \
    local static const bit is_test_builder_registerd \
        = register_test_builder(concrete_builder#(TEST_NAME)::get()); \
    local static string full_name_of_class = $sformatf("%m"); \
    \
    virtual function string full_name(); \
      return full_name_of_class; \
    endfunction \
    \
    virtual function string name(); \
      return `"TEST_NAME`"; \
    endfunction \
    \
    protected virtual task test_body(); \

`define SVUNIT_INTERNAL_TEST_END \
    endtask \
  endclass \

Fix access qualifier warnings when using experimental test macros


//- @my_module defines/binding _
module my_module();
    //- @y defines/binding Y
    int y = 0;
    initial begin
        //- @#0x defines/binding X
        //- @#1x ref X
        //- @#2x ref X
        for (uint x = 1; x < 5; x++) begin
            //- @y ref Y
            y++;
        end
    end
endmodule

//- @uint defines/binding Uint
typedef int uint;

//- @my_module defines/binding _
module my_module();
    //- @y defines/binding Y
    int y = 0;
    initial begin
        //- @uint ref Uint
        //- @#0x defines/binding X
        //- @#1x ref X
        //- @#2x ref X
        for (uint x = 1; x < 5; x++) begin
            //- @y ref Y
            y++;
        end
    end
endmodule

Update test to cover variable declaration inside for-loop header.

issues #548

PiperOrigin-RevId: 341669535


package factorial;

  function automatic int unsigned factorial(int unsigned n);
    return 0;
  endfunction

endpackage

package factorial;

  function automatic int unsigned factorial(int unsigned n);
    return 1;
  endfunction

endpackage

Implement enough production code to make one test pass


// RUN: moore %s -e foo
// IGNORE

module foo (
    .P1(x1[3:0]),
    .P2(x1[7:0]),
    .P3(x2),
    P4,
    .P5({x3, x4}),
    {x5, x6}
);
    // This language needs to die.
    output [7:0] x1;
    ref x2;
    input P4;
    input x3, x5;
    output x4, x6;
endmodule

// RUN: moore %s -e foo
// IGNORE

module foo (
    .P1(x1[3:0]),
    .P2(x1[7:0]),
    .P3(x2),
    P4,
    .P5({x3, x4}),
    {x5, x6}
);
    // This language needs to die.
    output [7:0] x1;
    ref x2;
    input P4;
    input x3, x5;
    output x4, x6;

    logic [7:0] x1;
    int x2;
endmodule

Update complex SV ports test

test: Update complex SV ports test


// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
//
// Bound into the otbn_rf_base and used to help collect call stack information for coverage.

interface otbn_rf_base_if (
  input       clk_i,
  input       rst_ni,

  // Signal names from the otbn_rf_base module (where we are bound)
  input logic pop_stack_a,
  input logic pop_stack_b,
  input logic pop_stack,
  input logic push_stack,
  input logic stack_full,
  input logic stack_data_valid
);

  function automatic otbn_env_pkg::call_stack_flags_t get_call_stack_flags();
    return '{
              pop_a: pop_stack && pop_stack_a,
              pop_b: pop_stack && pop_stack_b,
              push: push_stack
            };
  endfunction

  function automatic otbn_env_pkg::stack_fullness_e get_call_stack_fullness();
    if (stack_full) begin
      return otbn_env_pkg::StackFull;
    end
    if (stack_data_valid) begin
      return otbn_env_pkg::StackPartial;
    end
    return otbn_env_pkg::StackEmpty;
  endfunction

endinterface

// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
//
// Bound into the otbn_rf_base and used to help collect call stack information for coverage.

interface otbn_rf_base_if (
  input       clk_i,
  input       rst_ni,

  // Signal names from the otbn_rf_base module (where we are bound)
  input logic pop_stack_a,
  input logic pop_stack_b,
  input logic push_stack_reqd,
  input logic stack_full,
  input logic stack_data_valid
);

  function automatic otbn_env_pkg::call_stack_flags_t get_call_stack_flags();
    return '{
              pop_a: pop_stack_a,
              pop_b: pop_stack_b,
              push: push_stack_reqd
            };
  endfunction

  function automatic otbn_env_pkg::stack_fullness_e get_call_stack_fullness();
    if (stack_full) begin
      return otbn_env_pkg::StackFull;
    end
    if (stack_data_valid) begin
      return otbn_env_pkg::StackPartial;
    end
    return otbn_env_pkg::StackEmpty;
  endfunction

endinterface

Fix callstack flags in coverage

[otbn,dv] Fix callstack flags in coverage

pop_stack_a (resp. pop_stack_b) is signalled if the instruction in
question tries to read from x1 with operand a (resp b). pop_stack is
only true if, furthermore, rd_commit_i holds. This guarantees that the
instruction isn't stalled, but also implies that the instruction
didn't cause a fault.

We don't need to check for stalling instructions when calculating
these flags: they'll only be read in otbn_trace_monitor.sv if the
instruction isn't stalled. But we *do* need to make sure we get the
raw values for a faulting instruction. Without this fix, it would be
impossible to see e.g. how we caused an underflow with an instruction
like "add x0, x1, x1".

Similarly, the push_stack signal requires that the instruction didn't
cause a fault: we actually want the raw signal in push_stack_reqd.

Signed-off-by: Rupert Swarbrick <290093e2ad2515ed2f14d749293c8cf8e02ca274@lowrisc.org>


// $Id: $
// File name:   OutputControllerRAM.sv
// Created:     4/21/2016
// Author:      Diego De La Fuente
// Lab Section: 337-08
// Version:     1.0  Initial Design Entry
// Description: This is how the Output Controller reads and writes to the M9K
//

module OutputControllerRam
(
	    output reg [23:0] q,
		input [23:0] data,
		input [6:0] write_address, read_address,
		input we, clk
);
	reg [23:0] mem [2457599:0];
	always @ (posedge clk) begin
		if (we)
			mem[write_address] <= data;
		q <= mem[read_address]; // q doesn't get d in this clock cycle
	end
endmodule

// $Id: $
// File name:   OutputControllerRAM.sv
// Created:     4/21/2016
// Author:      Diego De La Fuente
// Lab Section: 337-08
// Version:     1.0  Initial Design Entry
// Description: This is how the Output Controller reads and writes to the M9K
//

module OutputControllerRam
(
	    output reg [31:0] q,
		input [31:0] d,
		input [6:0] write_address, read_address,
		input we, clk
);
	reg [31:0] mem [2457599:0];
	always @ (posedge clk) begin
		if (we)
			mem[write_address] <= d;
		q <= mem[read_address]; // q doesn't get d in this clock cycle
	end
endmodule

Revert "Changes to Output Controller Ram Access"

This reverts commit d865033eed25767d82413f5213a9ee4eacf02ed8.


// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

class edn_alert_test extends edn_base_test;

  `uvm_component_utils(edn_alert_test)
  `uvm_component_new

  function void configure_env();
    super.configure_env();

    cfg.en_scb            = 0;
    cfg.enable_pct        = 100;
    cfg.boot_req_mode_pct = 0;
    cfg.cmd_fifo_rst      = 100;
    cfg.use_invalid_mubi  = 1;
    cfg.num_endpoints     = MIN_NUM_ENDPOINTS;

    `DV_CHECK_RANDOMIZE_FATAL(cfg)
    `uvm_info(`gfn, $sformatf("%s", cfg.convert2string()), UVM_LOW)
  endfunction
endclass : edn_alert_test

// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

class edn_alert_test extends edn_base_test;

  `uvm_component_utils(edn_alert_test)
  `uvm_component_new

  function void configure_env();
    super.configure_env();

    cfg.en_scb            = 0;
    cfg.enable_pct        = 100;
    cfg.boot_req_mode_pct = 0;
    cfg.cmd_fifo_rst_pct  = 100;
    cfg.use_invalid_mubi  = 1;
    cfg.num_endpoints     = MIN_NUM_ENDPOINTS;

    `DV_CHECK_RANDOMIZE_FATAL(cfg)
    `uvm_info(`gfn, $sformatf("%s", cfg.convert2string()), UVM_LOW)
  endfunction
endclass : edn_alert_test

Fix ENUMERR in DV environment

[edn/dv] Fix ENUMERR in DV environment

Signed-off-by: Michael Schaffner <a005a2d3342a687ea2d05360c953107acbe83e08@google.com>


//
// Copyright 2011-2015 Jeff Bush
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//     http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
//

`ifndef __CONFIG_V
`define __CONFIG_V

// Configurable parameters
// Number of ways must be 1, 2, 4, or 8

`define NUM_CORES 1
`define THREADS_PER_CORE 4
`define L1D_WAYS 4
`define L1D_SETS 64		// 16k
`define L1I_WAYS 4
`define L1I_SETS 64		// 16k
`define L2_WAYS 8
`define L2_SETS 256		// 128k
`define AXI_DATA_WIDTH 32

`endif

//
// Copyright 2011-2015 Jeff Bush
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//     http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
//

`ifndef __CONFIG_V
`define __CONFIG_V

// Configurable parameters
// Number of ways must be 1, 2, 4, or 8

`define NUM_CORES 1
`define THREADS_PER_CORE 4
`define L1D_WAYS 4
`define L1D_SETS 64		// 16k
`define L1I_WAYS 4
`define L1I_SETS 64		// 16k
`define L2_WAYS 8
`define L2_SETS 512		// 256k
`define AXI_DATA_WIDTH 32

`endif

Increase L2 cache size to 256k

Increase L2 cache size to 256k


// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

`include "prim_assert.sv"

module prim_generic_rom #(
  parameter  int Width     = 32,
  parameter  int Depth     = 2048, // 8kB default
  parameter  int Aw        = $clog2(Depth)
) (
  input                        clk_i,
  input                        rst_ni,
  input        [Aw-1:0]        addr_i,
  input                        cs_i,
  output logic [Width-1:0]     dout_o,
  output logic                 dvalid_o
);

  logic [Width-1:0] mem [Depth];

  always_ff @(posedge clk_i) begin
    if (cs_i) begin
      dout_o <= mem[addr_i];
    end
  end

  always_ff @(posedge clk_i or negedge rst_ni) begin
    if (!rst_ni) begin
      dvalid_o <= 1'b0;
    end else begin
      dvalid_o <= cs_i;
    end
  end

  `include "prim_util_memload.sv"

  ////////////////
  // ASSERTIONS //
  ////////////////

  // Control Signals should never be X
  `ASSERT(noXOnCsI, !$isunknown(cs_i), clk_i, '0)
endmodule

// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

`include "prim_assert.sv"

module prim_generic_rom #(
  parameter  int Width     = 32,
  parameter  int Depth     = 2048, // 8kB default
  localparam int Aw        = $clog2(Depth)
) (
  input                        clk_i,
  input                        rst_ni,
  input        [Aw-1:0]        addr_i,
  input                        cs_i,
  output logic [Width-1:0]     dout_o,
  output logic                 dvalid_o
);

  logic [Width-1:0] mem [Depth];

  always_ff @(posedge clk_i) begin
    if (cs_i) begin
      dout_o <= mem[addr_i];
    end
  end

  always_ff @(posedge clk_i or negedge rst_ni) begin
    if (!rst_ni) begin
      dvalid_o <= 1'b0;
    end else begin
      dvalid_o <= cs_i;
    end
  end

  `include "prim_util_memload.sv"

  ////////////////
  // ASSERTIONS //
  ////////////////

  // Control Signals should never be X
  `ASSERT(noXOnCsI, !$isunknown(cs_i), clk_i, '0)
endmodule

Use localparam for derived parameters

[prim_rom] Use localparam for derived parameters

Signed-off-by: Philipp Wagner <5a4b10454c30419e54a1570be358a516ff84bb63@lowrisc.org>


// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

// smoke test vseq
class sysrst_ctrl_smoke_vseq extends sysrst_ctrl_base_vseq;
  `uvm_object_utils(sysrst_ctrl_smoke_vseq)

  `uvm_object_new

  constraint num_trans_c {num_trans == 20;}

  task body();
   `uvm_info(`gfn, "Starting the body from smoke_seq", UVM_LOW)

    repeat (num_trans) begin

      // Randomize the input pins
      cfg.vif.randomize_input();

      // In normal mode sysrst_ctrl should pass the input pins data to output pins as it is
      @(posedge cfg.vif.clk_i)
      `DV_CHECK_EQ(cfg.vif.key0_in, cfg.vif.key0_out)
      `DV_CHECK_EQ(cfg.vif.key1_in, cfg.vif.key1_out)
      `DV_CHECK_EQ(cfg.vif.key2_in, cfg.vif.key2_out)
      `DV_CHECK_EQ(cfg.vif.pwrb_in, cfg.vif.pwrb_out)
    end
  endtask : body

endclass : sysrst_ctrl_smoke_vseq

// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

// smoke test vseq
class sysrst_ctrl_smoke_vseq extends sysrst_ctrl_base_vseq;
  `uvm_object_utils(sysrst_ctrl_smoke_vseq)

  `uvm_object_new

  constraint num_trans_c {num_trans == 20;}

  task body();
   `uvm_info(`gfn, "Starting the body from smoke_seq", UVM_LOW)

    repeat (num_trans) begin

      // Randomize the input pins
      cfg.vif.randomize_input();

      // In normal mode sysrst_ctrl should pass the input pins data to output pins as it is
      cfg.clk_aon_rst_vif.wait_clks(1);
      `DV_CHECK_EQ(cfg.vif.key0_in, cfg.vif.key0_out)
      `DV_CHECK_EQ(cfg.vif.key1_in, cfg.vif.key1_out)
      `DV_CHECK_EQ(cfg.vif.key2_in, cfg.vif.key2_out)
      `DV_CHECK_EQ(cfg.vif.pwrb_in, cfg.vif.pwrb_out)
      // Input pin flash_wp_l_in should not affect flash_wp_l_o output pin
      `DV_CHECK_EQ(cfg.vif.flash_wp_l, 0)
    end
  endtask : body

endclass : sysrst_ctrl_smoke_vseq

Add flash_wp_l_o check in smoke test

[sysrst_ctrl,dv] Add flash_wp_l_o check in smoke test

This pull request will update the smoke test to check
randomizing flash_wp_l_in will not affect flash_wp_l_o output pin

Signed-off-by: Madhuri Patel <11ca6de05d3d25e46f997d96738859192826ff1e@ensilica.com>


// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
//
// Bidirectional IO buffer for Xilinx FPGAs. Implements inversion and
// virtual open drain feature.

module prim_xilinx_pad_wrapper #(
  parameter int unsigned AttrDw = 2
) (
  inout wire         inout_io, // bidirectional pad
  output logic       in_o,     // input data
  input              out_i,    // output data
  input              oe_i,     // output enable
  // additional attributes
  input [AttrDw-1:0] attr_i
);

  // get pad attributes
  logic od, inv;
  assign {od, inv} = attr_i[1:0];

  // input inversion
  logic in;
  assign in_o     = inv ^ in;

  // virtual open drain emulation
  logic oe, out;
  assign out      = out_i ^ inv;
  assign oe       = oe_i & ((od & ~out) | ~od);

  // driver
  IOBUF i_iobuf (
    .T(oe),
    .I(out),
    .O(in),
    .IO(inout_io)
  );

endmodule : prim_xilinx_pad_wrapper

// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
//
// Bidirectional IO buffer for Xilinx FPGAs. Implements inversion and
// virtual open drain feature.

module prim_xilinx_pad_wrapper #(
  parameter int unsigned AttrDw = 2
) (
  inout wire         inout_io, // bidirectional pad
  output logic       in_o,     // input data
  input              out_i,    // output data
  input              oe_i,     // output enable
  // additional attributes
  input [AttrDw-1:0] attr_i
);

  // get pad attributes
  logic od, inv;
  assign {od, inv} = attr_i[1:0];

  // input inversion
  logic in;
  assign in_o     = inv ^ in;

  // virtual open drain emulation
  logic oe_n, out;
  assign out      = out_i ^ inv;
  // oe_n = 0: enable driver
  // oe_n = 1: disable driver
  assign oe_n     = ~oe_i | (out & od);

  // driver
  IOBUF i_iobuf (
    .T(oe_n),
    .I(out),
    .O(in),
    .IO(inout_io)
  );

endmodule : prim_xilinx_pad_wrapper

[prim_pad_wrapper] Correct OE signal polarity for Xilinx version

Signed-off-by: Michael Schaffner <a005a2d3342a687ea2d05360c953107acbe83e08@google.com>


module svunit_main;

  initial
    svunit::run_all_tests();

endmodule

module svunit_main;

  import factorial_test::*;

  initial
    svunit::run_all_tests();

endmodule

Make sure test code is elaborated

Make sure test code is elaborated

It's kind of annoying to have to force the user to write the extra import statement. Let's see if we can do better.


// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

class edn_genbits_test extends edn_base_test;

  `uvm_component_utils(edn_genbits_test)
  `uvm_component_new

  function void configure_env();
    super.configure_env();

    cfg.boot_req_mode_pct = 30;
    cfg.auto_req_mode_pct = 30;
    cfg.min_num_boot_reqs = 1;
    cfg.max_num_boot_reqs = 4;
    cfg.min_num_ep_reqs   = 4;
    cfg.max_num_ep_reqs   = 16;

    `DV_CHECK_RANDOMIZE_FATAL(cfg)
    `uvm_info(`gfn, $sformatf("%s", cfg.convert2string()), UVM_HIGH)
  endfunction
endclass : edn_genbits_test

// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

class edn_genbits_test extends edn_base_test;

  `uvm_component_utils(edn_genbits_test)
  `uvm_component_new

  function void configure_env();
    super.configure_env();

    cfg.boot_req_mode_pct = 30;
    cfg.auto_req_mode_pct = 30;
    cfg.min_num_boot_reqs = 1;
    cfg.max_num_boot_reqs = 4;
    cfg.min_num_ep_reqs   = 4;
    cfg.max_num_ep_reqs   = 64;

    `DV_CHECK_RANDOMIZE_FATAL(cfg)
    `uvm_info(`gfn, $sformatf("%s", cfg.convert2string()), UVM_HIGH)
  endfunction
endclass : edn_genbits_test

Increase edn genbit max size

[dv/edn] Increase edn genbit max size

This PR increases genbits max size to increase toggle and functional
coverage.

Signed-off-by: Cindy Chen <399ad771a111eac8923348b1e2af093034e5d4f1@opentitan.org>


//###########################################################################
//
//  Copyright 2011 The SVUnit Authors.
//
//  Licensed under the Apache License, Version 2.0 (the "License");
//  you may not use this file except in compliance with the License.
//  You may obtain a copy of the License at
//
//      http://www.apache.org/licenses/LICENSE-2.0
//
//  Unless required by applicable law or agreed to in writing, software
//  distributed under the License is distributed on an "AS IS" BASIS,
//  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
//  See the License for the specific language governing permissions and
//  limitations under the License.
//
//###########################################################################

`ifndef SVUNIT_TYPES
`define SVUNIT_TYPES

  /*
    Enum: results_t
    enumerated type containing PASS/FAIL
  */
  typedef enum {PASS=1, FAIL=0}  results_t;

  /*
    Enum: boolean_t
    enumerated type containing TRUE/FALSE
  */
  typedef enum {TRUE=1, FALSE=0} boolean_t;

`endif

//###########################################################################
//
//  Copyright 2011-2022 The SVUnit Authors.
//
//  Licensed under the Apache License, Version 2.0 (the "License");
//  you may not use this file except in compliance with the License.
//  You may obtain a copy of the License at
//
//      http://www.apache.org/licenses/LICENSE-2.0
//
//  Unless required by applicable law or agreed to in writing, software
//  distributed under the License is distributed on an "AS IS" BASIS,
//  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
//  See the License for the specific language governing permissions and
//  limitations under the License.
//
//###########################################################################

  /*
    Enum: results_t
    enumerated type containing PASS/FAIL
  */
  typedef enum {PASS=1, FAIL=0}  results_t;

  /*
    Enum: boolean_t
    enumerated type containing TRUE/FALSE
  */
  typedef enum {TRUE=1, FALSE=0} boolean_t;

Fix compile of code under test to work together with stable SVUnit

The file doesn't need any include guards, as it's not meant to be included by any other file than the package. They bust the compile now, because the define gets set when compiling the stable SVUnit.


typedef class global_test_registry;

virtual class test;

  typedef class builder;

  protected static function bit register_test_builder(builder b, string typename);
    full_name_extraction fn_extraction = new();
    string full_name = fn_extraction.get_full_name(typename);
    global_test_registry::get().register(b, full_name);

    return 1;
  endfunction

  pure virtual function string name();

  task run();
    set_up();
    test_body();
    tear_down();
  endtask

  protected virtual task set_up();
  endtask

  protected pure virtual task test_body();

  protected virtual task tear_down();
  endtask

  virtual class builder;
    pure virtual function test create();
  endclass

  class concrete_builder #(type T = test) extends builder;
    local static concrete_builder #(T) single_instance;

    static function concrete_builder #(T) get();
      if (single_instance == null)
        single_instance = new();
      return single_instance;
    endfunction

    virtual function T create();
      T result = new();
      return result;
    endfunction
  endclass

endclass

typedef class global_test_registry;

virtual class test;

  typedef class builder;

  protected static function bit register_test_builder(builder b, string typename);
    full_name_extraction fn_extraction = new();
    string full_name = fn_extraction.get_full_name(typename);
    global_test_registry::get().register(b, full_name);

    return 1;
  endfunction

  pure virtual function string name();

  task run();
    set_up();
    test_body();
    tear_down();
  endtask

  protected virtual task set_up();
  endtask

  pure virtual protected task test_body();

  protected virtual task tear_down();
  endtask

  virtual class builder;
    pure virtual function test create();
  endclass

  class concrete_builder #(type T = test) extends builder;
    local static concrete_builder #(T) single_instance;

    static function concrete_builder #(T) get();
      if (single_instance == null)
        single_instance = new();
      return single_instance;
    endfunction

    virtual function T create();
      T result = new();
      return result;
    endfunction
  endclass

endclass

Work around compile error due to order of qualifiers

QuestaSim doesn't like it when `pure virtual` is not the first qualifier.


// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

class aon_timer_env_cfg extends cip_base_env_cfg #(.RAL_T(aon_timer_reg_block));

  virtual clk_rst_if        aon_clk_rst_vif;
  virtual pins_if #(1)      lc_escalate_en_vif;
  virtual pins_if #(2)      aon_intr_vif;
  virtual pins_if #(1)      sleep_vif;

  // ext component cfgs

  `uvm_object_utils_begin(aon_timer_env_cfg)
  `uvm_object_utils_end

  function new (string name="");
    super.new(name);

    // The aon_timer RTL doesn't support a devmode input at the moment.
    has_devmode = 1'b0;
  endfunction : new

  virtual function void initialize(bit [31:0] csr_base_addr = '1);
    list_of_alerts = aon_timer_env_pkg::LIST_OF_ALERTS;
    super.initialize(csr_base_addr);

    // set num_interrupts & num_alerts
    begin
      uvm_reg rg = ral.get_reg_by_name("intr_state");
      if (rg != null) begin
        num_interrupts = ral.intr_state.get_n_used_bits();
      end
    end
  endfunction

endclass

// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

class aon_timer_env_cfg extends cip_base_env_cfg #(.RAL_T(aon_timer_reg_block));

  virtual clk_rst_if        aon_clk_rst_vif;
  virtual pins_if #(1)      lc_escalate_en_vif;
  virtual pins_if #(2)      aon_intr_vif;
  virtual pins_if #(1)      sleep_vif;

  // ext component cfgs

  `uvm_object_utils_begin(aon_timer_env_cfg)
  `uvm_object_utils_end

  function new (string name="");
    super.new(name);

    // The aon_timer RTL doesn't support a devmode input at the moment.
    has_devmode = 1'b0;
  endfunction : new

  virtual function void initialize(bit [31:0] csr_base_addr = '1);
    list_of_alerts = aon_timer_env_pkg::LIST_OF_ALERTS;
    super.initialize(csr_base_addr);

    m_tl_agent_cfg.max_outstanding_req = 1;

    // set num_interrupts & num_alerts
    begin
      uvm_reg rg = ral.get_reg_by_name("intr_state");
      if (rg != null) begin
        num_interrupts = ral.intr_state.get_n_used_bits();
      end
    end
  endfunction

endclass

Set TL Outstanding Request Cap as 1

[aon_timer,dv] Set TL Outstanding Request Cap as 1

Signed-off-by: Canberk Topal <e6b05429a51cc3258c31cb1f7836595b60921a29@lowrisc.org>


module string_utils_unit_test;

  import svunit_pkg::*;
  `include "svunit_defines.svh"

  string name = "string_utils_ut";
  svunit_testcase svunit_ut;

  import svunit_under_test::string_utils;

  function void build();
    svunit_ut = new(name);
  endfunction

  task setup();
    svunit_ut.setup();
  endtask

  task teardown();
    svunit_ut.teardown();
  endtask

  `SVUNIT_TESTS_BEGIN

    `SVTEST(can_split_string_by_underscore)
      string some_string = "some_string";
      string parts[] = string_utils::split_by_char("_", some_string);
      string exp_parts[] = '{ "some", "string" };
      `FAIL_UNLESS_EQUAL(parts, exp_parts)
    `SVTEST_END

    `SVTEST(split_string_by_underscore_does_nothing_when_no_underscore)
      string some_string = "string";
      string parts[] = string_utils::split_by_char("_", some_string);
      string exp_parts[] = '{ "string" };
      `FAIL_UNLESS_EQUAL(parts, exp_parts)
    `SVTEST_END

  `SVUNIT_TESTS_END

endmodule

module string_utils_unit_test;

  import svunit_stable_pkg::*;
  `include "svunit_stable_defines.svh"

  string name = "string_utils_ut";
  svunit_testcase svunit_ut;

  import svunit_under_test::string_utils;

  function void build();
    svunit_ut = new(name);
  endfunction

  task setup();
    svunit_ut.setup();
  endtask

  task teardown();
    svunit_ut.teardown();
  endtask

  `SVUNIT_TESTS_BEGIN

    `SVTEST(can_split_string_by_underscore)
      string some_string = "some_string";
      string parts[] = string_utils::split_by_char("_", some_string);
      string exp_parts[] = '{ "some", "string" };
      `FAIL_UNLESS_EQUAL(parts, exp_parts)
    `SVTEST_END

    `SVTEST(split_string_by_underscore_does_nothing_when_no_underscore)
      string some_string = "string";
      string parts[] = string_utils::split_by_char("_", some_string);
      string exp_parts[] = '{ "string" };
      `FAIL_UNLESS_EQUAL(parts, exp_parts)
    `SVTEST_END

  `SVUNIT_TESTS_END

endmodule

Update unit test to use updated names for SVUnit version for testing


// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
//
// Dummy clock gating module

module prim_clock_gating #(
    parameter Impl = "default"
) (
    input        clk_i,
    input        en_i,
    input        test_en_i,
    output logic clk_o
);

  assign clk_o = en_i ? clk_i : 0;

endmodule

// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
//
// Dummy clock gating module compatible with latch-based register file

module prim_clock_gating #(
    parameter Impl = "default"
) (
    input        clk_i,
    input        en_i,
    input        test_en_i,
    output logic clk_o
);

  logic clk_en;

  always_latch begin
    if (clk_i == 1'b0) begin
      clk_en <= en_i | test_en_i;
    end
  end

  assign clk_o = clk_i & clk_en;

endmodule

Make dummy clock gating module compatible with latch-based reg file

The latch-based register file needs a clock gating cell that is
transparent for the clock enable signal only during the low clock
phase.


class my_driver extends uvm_driver #(my_item);
    virtual my_interface vif;

    `uvm_component_utils(my_driver)
    function new(string name="my_driver", uvm_component parent=null);
        super.new(name, parent);
    endfunction

    virtual function void connect_phase(uvm_phase phase);
        super.connect_phase(phase);
        assert (uvm_config_db#(virtual my_interface)::get(this, "", "ifc", vif) && vif != null)
        else `uvm_fatal("DRIVER_VIF_NOT_FOUND", "Did not find virtual my_interface 'vif' in the uvm_config_db")
    endfunction

    virtual task run_phase(uvm_phase phase);
        super.run_phase(phase);
        fork drive_thread(); join_none
    endtask

    virtual task drive_thread();
        forever begin
            #1;
            seq_item_port.get(req); // seq_item_port and req are inherited from uvm_driver
            vif.foo = req.foo;
        end
    endtask
endclass

class my_driver extends uvm_driver #(my_item);
    virtual my_interface vif;

    `uvm_component_utils(my_driver)
    function new(string name="my_driver", uvm_component parent=null);
        super.new(name, parent);
    endfunction

    virtual function void connect_phase(uvm_phase phase);
        super.connect_phase(phase);
        assert (uvm_config_db#(virtual my_interface)::get(this, "", "ifc", vif) && vif != null)
        else `uvm_fatal("DRIVER_VIF_NOT_FOUND", "Did not find virtual my_interface 'vif' in the uvm_config_db")
    endfunction

    virtual task run_phase(uvm_phase phase);
        super.run_phase(phase);
        fork drive_thread(); join_none
    endtask

    virtual task drive_thread();
        forever begin
            #1;
            seq_item_port.get_next_item(req); // seq_item_port and req are inherited from uvm_driver
            vif.foo = req.foo;
            seq_item_port.item_done();
        end
    endtask
endclass

Use proper get_next_item()/item_done() calls in driver example.


module equals_macros_example_unit_test;

  import svunit_pkg::svunit_testcase;
  `include "svunit_defines.svh"

  string name = "equals_macros_example_ut";
  svunit_testcase svunit_ut;

  function void build();
    svunit_ut = new(name);
  endfunction

  task setup();
    svunit_ut.setup();
  endtask

  task teardown();
    svunit_ut.teardown();
  endtask

  `SVUNIT_TESTS_BEGIN

  `SVTEST(fail_unless_equal__int_variables)
    int one = 1;
    int two = 2;
    `FAIL_UNLESS_EQUAL(one, two);
  `SVTEST_END

  `SVTEST(fail_unless_equal__int_variable_and_int_constant)
    int one = 1;
    `FAIL_UNLESS_EQUAL(one, 2);
  `SVTEST_END

  `SVTEST(fail_unless_equal__int_function_and_int_constant)
    `FAIL_UNLESS_EQUAL(function_returning_one(), 2);
  `SVTEST_END

  `SVUNIT_TESTS_END

  function int function_returning_one();
    return 1;
  endfunction

endmodule

module equals_macros_example_unit_test;

  import svunit_pkg::svunit_testcase;
  `include "svunit_defines.svh"

  string name = "equals_macros_example_ut";
  svunit_testcase svunit_ut;

  function void build();
    svunit_ut = new(name);
  endfunction

  task setup();
    svunit_ut.setup();
  endtask

  task teardown();
    svunit_ut.teardown();
  endtask

  `SVUNIT_TESTS_BEGIN

  `SVTEST(fail_unless_equal__int_variables)
    int one = 1;
    int two = 2;
    `FAIL_UNLESS_EQUAL(one, two);
  `SVTEST_END

  `SVTEST(fail_unless_equal__int_variable_and_int_constant)
    int one = 1;
    `FAIL_UNLESS_EQUAL(one, 2);
  `SVTEST_END

  `SVTEST(fail_unless_equal__int_function_and_int_constant)
    `FAIL_UNLESS_EQUAL(function_returning_one(), 2);
  `SVTEST_END

  `SVTEST(fail_if_equal__int_variables)
    int one = 1;
    int also_one = 1;
    `FAIL_IF_EQUAL(one, also_one);
  `SVTEST_END

  `SVUNIT_TESTS_END

  function int function_returning_one();
    return 1;
  endfunction

endmodule

Add example with usage of `FAIL_IF_EQUAL`


// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

`ifndef __OTBN_MEMUTIL_SVH__
`define __OTBN_MEMUTIL_SVH__

// Imports for the functions defined in otbn_memutil.h. There are documentation comments explaining
// what the functions do there.

import "DPI-C" function chandle OtbnMemUtilMake(string top_scope);

import "DPI-C" function void OtbnMemUtilFree(chandle mem_util);

import "DPI-C" function bit OtbnMemUtilLoadElf(chandle mem_util, string elf_path);

import "DPI-C" function bit OtbnMemUtilStageElf(chandle mem_util, string elf_path);

import "DPI-C" function int OtbnMemUtilGetSegCount(chandle mem_util, bit is_imem);

import "DPI-C" function bit OtbnMemUtilGetSegInfo(chandle mem_util, bit is_imem, int seg_idx,
                                                  output bit [31:0] seg_off,
                                                  output bit [31:0] seg_size);

import "DPI-C" function bit OtbnMemUtilGetSegData(chandle mem_util, bit is_imem, int word_off,
                                                  output bit[31:0] data_value);

`endif // __OTBN_MEMUTIL_SVH__

// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

`ifndef __OTBN_MEMUTIL_SVH__
`define __OTBN_MEMUTIL_SVH__

// Imports for the functions defined in otbn_memutil.h. There are documentation comments explaining
// what the functions do there.

import "DPI-C" function chandle OtbnMemUtilMake(string top_scope);

import "DPI-C" function void OtbnMemUtilFree(chandle mem_util);

import "DPI-C" context function bit OtbnMemUtilLoadElf(chandle mem_util, string elf_path);

import "DPI-C" function bit OtbnMemUtilStageElf(chandle mem_util, string elf_path);

import "DPI-C" function int OtbnMemUtilGetSegCount(chandle mem_util, bit is_imem);

import "DPI-C" function bit OtbnMemUtilGetSegInfo(chandle mem_util, bit is_imem, int seg_idx,
                                                  output bit [31:0] seg_off,
                                                  output bit [31:0] seg_size);

import "DPI-C" function bit OtbnMemUtilGetSegData(chandle mem_util, bit is_imem, int word_off,
                                                  output bit[31:0] data_value);

`endif // __OTBN_MEMUTIL_SVH__

[otbn] Add missing context keyword to DPI declaration

OtbnMemUtilLoadElf uses svSetScope to do back-door DPI accesses, which
isn't allowed unless the DPI declaration is marked "context" (and VCS
complains!)

Signed-off-by: Rupert Swarbrick <290093e2ad2515ed2f14d749293c8cf8e02ca274@lowrisc.org>


// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

class kmac_common_vseq extends kmac_base_vseq;
  `uvm_object_utils(kmac_common_vseq)

  constraint num_trans_c {
    num_trans inside {[1:2]};
  }
  `uvm_object_new

  virtual task pre_start();
    do_kmac_init = 1'b0;
    entropy_mode_c.constraint_mode(0);
    super.pre_start();
  endtask

  virtual task body();
    run_common_vseq_wrapper(num_trans);
  endtask : body

endclass

// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

class kmac_common_vseq extends kmac_base_vseq;
  `uvm_object_utils(kmac_common_vseq)

  constraint num_trans_c {
    num_trans inside {[1:2]};
  }
  `uvm_object_new

  virtual task pre_start();
    do_kmac_init = 1'b0;
    entropy_mode_c.constraint_mode(0);
    super.pre_start();
  endtask

  virtual task body();
    run_common_vseq_wrapper(num_trans);
  endtask : body

  virtual function void predict_shadow_reg_status(bit predict_update_err  = 0,
                                                  bit predict_storage_err = 0);
    super.predict_shadow_reg_status(predict_update_err, predict_storage_err);

    if (predict_storage_err) begin
      // For storage error, the kmac `cfg_regwen` register will be set to 0 internally to lock all
      // cfg related CSRs. Because it is a `RO` register, the logic below manually locks the write
      // access for its lockable register fields. (If the regwen is `W0C` access policy, the
      // lockable fields will be updated automatically in `do_predict` function)
      ral.cfg_regwen.en.set_lockable_flds_access(.lock(1));

      // TODO(Issue #8460) - shadow storage error will clear update error status bit.
      foreach (cfg.shadow_update_err_status_fields[status_field]) begin
        void'(status_field.predict(~cfg.shadow_update_err_status_fields[status_field]));
      end
    end
  endfunction
endclass

[dv/kmac] Fix shadow reg error due to locked regwen

1). This PR fixes shadow reg error because when there is fatal alert, design
locks `cfg_regwen` to 0.
Because this is not a common behavior, in `kmac_common_vseq.sv` I
override `predict_shadow_reg_status` to capture this additional change.
2). This PR follows the discussion in issue #8640 to temp align until
  kmac behavior is cleared.

Signed-off-by: Cindy Chen <399ad771a111eac8923348b1e2af093034e5d4f1@opentitan.org>


// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

module otbn_bind;

  bind otbn tlul_assert #(
    .EndpointType("Device")
  ) tlul_checker (
    .clk_i  (clk_i),
    .rst_ni (rst_ni),
    .h2d    (tl_i),
    .d2h    (tl_o)
  );

  import otbn_reg_pkg::*;
  bind otbn otbn_csr_assert_fpv csr_checker (
    .clk_i  (clk_i),
    .rst_ni (rst_ni),
    .h2d    (tl_i),
    .d2h    (tl_o),
    .reg2hw (reg2hw),
    .hw2reg (reg2hw)
  );

endmodule

// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

module otbn_bind;

  bind otbn tlul_assert #(
    .EndpointType("Device")
  ) tlul_checker (
    .clk_i  (clk_i),
    .rst_ni (rst_ni),
    .h2d    (tl_i),
    .d2h    (tl_o)
  );

  import otbn_reg_pkg::*;
  bind otbn otbn_csr_assert_fpv csr_checker (
    .clk_i  (clk_i),
    .rst_ni (rst_ni),
    .h2d    (tl_i),
    .d2h    (tl_o),
    .reg2hw (reg2hw),
    .hw2reg (hw2reg)
  );

endmodule

Fix typo in SVA bindings

[otbn] Fix typo in SVA bindings

Signed-off-by: Rupert Swarbrick <290093e2ad2515ed2f14d749293c8cf8e02ca274@lowrisc.org>


// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

class ibex_icache_ecc_driver
  extends dv_base_driver #(.ITEM_T (ibex_icache_ecc_item),
                           .CFG_T  (ibex_icache_ecc_agent_cfg));

  `uvm_component_utils(ibex_icache_ecc_driver)
  `uvm_component_new

  virtual task reset_signals();
    cfg.vif.reset();
  endtask

  virtual task get_and_drive();
    forever begin
      seq_item_port.get_next_item(req);
      `uvm_info(`gfn, $sformatf("rcvd item:\n%0s", req.sprint()), UVM_LOW)

      cfg.vif.wait_reads(req.delay);
      if (req.two_bits) begin
        cfg.vif.corrupt_read_1(req.bit_pos0);
      end else begin
        cfg.vif.corrupt_read_2(req.bit_pos0, req.bit_pos1);
      end

      seq_item_port.item_done();
    end
  endtask

endclass

// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

class ibex_icache_ecc_driver
  extends dv_base_driver #(.ITEM_T (ibex_icache_ecc_item),
                           .CFG_T  (ibex_icache_ecc_agent_cfg));

  `uvm_component_utils(ibex_icache_ecc_driver)
  `uvm_component_new

  virtual task reset_signals();
    cfg.vif.reset();
  endtask

  virtual task get_and_drive();
    forever begin
      seq_item_port.get_next_item(req);
      `uvm_info(`gfn, $sformatf("rcvd item:\n%0s", req.sprint()), UVM_HIGH)

      cfg.vif.wait_reads(req.delay);
      if (req.two_bits) begin
        cfg.vif.corrupt_read_1(req.bit_pos0);
      end else begin
        cfg.vif.corrupt_read_2(req.bit_pos0, req.bit_pos1);
      end

      seq_item_port.item_done();
    end
  endtask

endclass

Fix verbosity in ECC UVM driver

Fix verbosity in ECC UVM driver

This should have been UVM_HIGH (which disables the messages most of
the time).


module equals_macros_example_unit_test;

  import svunit_pkg::svunit_testcase;
  `include "svunit_defines.svh"

  string name = "equals_macros_example_ut";
  svunit_testcase svunit_ut;

  function void build();
    svunit_ut = new(name);
  endfunction

  task setup();
    svunit_ut.setup();
  endtask

  task teardown();
    svunit_ut.teardown();
  endtask

  `SVUNIT_TESTS_BEGIN

  `SVTEST(fail_unless_equal__int_variables)
    int one = 1;
    int two = 2;
    `FAIL_UNLESS_EQUAL(one, two);
  `SVTEST_END

  `SVTEST(fail_unless_equal__int_variable_and_int_constant)
    int one = 1;
    `FAIL_UNLESS_EQUAL(one, 2);
  `SVTEST_END

  `SVTEST(fail_unless_equal__int_function_and_int_constant)
    `FAIL_UNLESS_EQUAL(function_returning_one(), 2);
  `SVTEST_END

  `SVUNIT_TESTS_END

  function int function_returning_one();
    return 1;
  endfunction

endmodule

Add examples with usage of `FAIL_UNLESS_EQUAL`


// Copyright 2016 Tudor Timisescu (verificationgentleman.com)
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//     http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.

module sequencer_stub_unit_test;
  import svunit_pkg::svunit_testcase;
  `include "svunit_defines.svh"

  import vgm_svunit_utils::*;

  string name = "sequencer_stub_ut";
  svunit_testcase svunit_ut;

  class dummy_item;
  endclass

  sequencer_stub #(dummy_item) seqr;

  function void build();
    svunit_ut = new(name);

    seqr = new("sequencer_stub_unit_test_seqr", null);
  endfunction

  task setup();
    svunit_ut.setup();
  endtask

  task teardown();
    svunit_ut.teardown();
  endtask

  `SVUNIT_TESTS_BEGIN

    `SVTEST(check_code_compiles)
      // Try compiling with desired UVM version.
    `SVTEST_END

  `SVUNIT_TESTS_END

endmodule

Add dummy unit test for sequencer_stub

Add dummy unit test for sequencer_stub

sequencer_stub cannot be compiled with UVM 1.2 in its current form. The
only purpose of these "unit tests" currently is to make sure it can be
compiled with all required UVM versions.


// RUN: moore %s -e foo
// IGNORE

module foo (
    .P1(x1[3:0]),
    .P2(x1[7:0]),
    .P3(x2),
    P4,
    .P5({x3, x4}),
    {x5, x6}
);
    // This language needs to die.
    output [7:0] x1;
    ref x2;
    input P4;
    input x3, x5;
    output x4, x6;
endmodule

Add worst-case svlog port test case

test: Add worst-case svlog port test case


module string_utils_unit_test;

  import svunit_pkg::*;
  `include "svunit_defines.svh"

  string name = "string_utils_ut";
  svunit_testcase svunit_ut;

  import svunit_under_test::string_utils;

  function void build();
    svunit_ut = new(name);
  endfunction

  task setup();
    svunit_ut.setup();
  endtask

  task teardown();
    svunit_ut.teardown();
  endtask

  `SVUNIT_TESTS_BEGIN

    `SVTEST(some_passing_test)
      `FAIL_UNLESS(svunit_under_test::TRUE)
    `SVTEST_END

  `SVUNIT_TESTS_END

endmodule

Add test module which will contain tests for `string_utils`