minor change to allow larger ROM (up to 12 MB)

OUTPUT_ARCH(m68k)
SEARCH_DIR(.)
/*GROUP(-lbcc -lc -lgcc)*/
__DYNAMIC  =  0;

/*
 * Setup the memory map of the SEGA Genesis.
 * stack grows down from high memory.
 *
 * The memory map look like this:
 * +--------------------+ <- low memory
 * | .text              |
 * |        _etext      |
 * |        ctor list   | the ctor and dtor lists are for
 * |        dtor list   | C++ support
 * +--------------------+
 * .                    .
 * .                    .
 * .                    .
 * +--------------------+ <- 0x00FF0000
 * | .data              | initialized data goes here
 * |        _data       |
 * |        _edata      |
 * +--------------------+
 * | .bss               |
 * |        _bstart     | start of bss, cleared by crt0
 * |        _bend       | start of heap, used by sbrk()
 * +--------------------+
 * .                    .
 * .                    .
 * .                    .
 * |        __stack     | top of stack
 * +--------------------+ <- 0x01000000
 */
MEMORY
{
	rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00C00000
	ram : ORIGIN = 0x00FF0000, LENGTH = 0x00010000
}

/*
 * allocate the stack to be at the top of memory, since the stack
 * grows down
 */

PROVIDE (__stack = 0x01000000);

SECTIONS
{
  .text 0x00000000:
  {
    KEEP(*(.text.keepboot)) *(.text.*) *(.text)
    . = ALIGN(0x4);
     __CTOR_LIST__ = .;
    LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
    *(.ctors)
    LONG(0)
    __CTOR_END__ = .;
    __DTOR_LIST__ = .;
    LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
    *(.dtors)
     LONG(0)
    __DTOR_END__ = .;

    *(.rodata .rodata.*)
    *(.gcc_except_table .gcc_except_table.*)

    . = ALIGN(0x4);
    __INIT_SECTION__ = . ;
    *(.init)
    SHORT (0x4E75)	/* rts */

    __FINI_SECTION__ = . ;
    *(.fini)
    SHORT (0x4E75)	/* rts */

    _etext = .;
    *(.lit)

    *(.rodata_bin)
    *(.rodata_binf)
  } > rom
  _stext = SIZEOF (.text);

  .data 0xFF0000 :
  AT ( ADDR (.text) + SIZEOF (.text) )
  {
    *(.got.plt) *(.got)
    *(.shdata)
    *(.data .data.*)
    _edata = .;
  } > ram
  _sdata = SIZEOF (.data);

  .bss 0xFF0000 + SIZEOF (.data) :
  {
    _start = . ;
    *(.shbss)
    *(.bss .bss.*)
    *(COMMON)
    _bend = . ;
  } > ram

  .stab 0 (NOLOAD) :
  {
    *(.stab)
  }

  .stabstr 0 (NOLOAD) :
  {
    *(.stabstr)
  }

  .eh_frame 0 (NOLOAD) :
  {
    *(.eh_frame)
  }
}

OUTPUT_ARCH(m68k)
SEARCH_DIR(.)
/*GROUP(-lbcc -lc -lgcc)*/
__DYNAMIC  =  0;

/*
 * Setup the memory map of the SEGA Genesis.
 * stack grows down from high memory.
 *
 * The memory map look like this:
 * +--------------------+ <- low memory
 * | .text              |
 * |        _etext      |
 * |        ctor list   | the ctor and dtor lists are for
 * |        dtor list   | C++ support
 * +--------------------+
 * .                    .
 * .                    .
 * .                    .
 * +--------------------+ <- 0x00FF0000
 * | .data              | initialized data goes here
 * |        _data       |
 * |        _edata      |
 * +--------------------+
 * | .bss               |
 * |        _bstart     | start of bss, cleared by crt0
 * |        _bend       | start of heap, used by sbrk()
 * +--------------------+
 * .                    .
 * .                    .
 * .                    .
 * |        __stack     | top of stack
 * +--------------------+ <- 0x01000000
 */
MEMORY
{
	rom : ORIGIN = 0x00000000, LENGTH = 0x00A00000
	ram : ORIGIN = 0x00FF0000, LENGTH = 0x00010000
}

/*
 * allocate the stack to be at the top of memory, since the stack
 * grows down
 */

PROVIDE (__stack = 0x01000000);

SECTIONS
{
  .text 0x00000000:
  {
    KEEP(*(.text.keepboot)) *(.text.*) *(.text)
    . = ALIGN(0x4);
     __CTOR_LIST__ = .;
    LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
    *(.ctors)
    LONG(0)
    __CTOR_END__ = .;
    __DTOR_LIST__ = .;
    LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
    *(.dtors)
     LONG(0)
    __DTOR_END__ = .;

    *(.rodata .rodata.*)
    *(.gcc_except_table .gcc_except_table.*)

    . = ALIGN(0x4);
    __INIT_SECTION__ = . ;
    *(.init)
    SHORT (0x4E75)	/* rts */

    __FINI_SECTION__ = . ;
    *(.fini)
    SHORT (0x4E75)	/* rts */

    _etext = .;
    *(.lit)

    *(.rodata_bin)
    *(.rodata_binf)
  } > rom
  _stext = SIZEOF (.text);

  .data 0xFF0000 :
  AT ( ADDR (.text) + SIZEOF (.text) )
  {
    *(.got.plt) *(.got)
    *(.shdata)
    *(.data .data.*)
    _edata = .;
  } > ram
  _sdata = SIZEOF (.data);

  .bss 0xFF0000 + SIZEOF (.data) :
  {
    _start = . ;
    *(.shbss)
    *(.bss .bss.*)
    *(COMMON)
    _bend = . ;
  } > ram

  .stab 0 (NOLOAD) :
  {
    *(.stab)
  }

  .stabstr 0 (NOLOAD) :
  {
    *(.stabstr)
  }

  .eh_frame 0 (NOLOAD) :
  {
    *(.eh_frame)
  }
}


build: linker script: Link with crt0.o and -lc by default

OUTPUT_ARCH(mips)
STARTUP(crt0.o)
GROUP(-lcrt0 -lc -ljava)
ENTRY(__start)

SECTIONS
{
       	. = 0x1000000;
       	.text : ALIGN(4) { *(.init) *(.text) *(.text.*) *(.gnu.linkonce.t.*) }
       	. = 0x0;
       	.data : ALIGN(16) { *(.data0) *(.data) *(.rodata.str1.4)  *(.rodata.cst4) *(.rodata.cst8) *(.reginfo) }
       	.rodata : ALIGN(16) { *(.rodata) *(.rodata.*) *(.gnu.linkonce.r.*) *(.cibylsetjmp) }

	.ctors : ALIGN(4) {
	       PROVIDE(__ctors_begin = .);
	       *(.ctors)
	       PROVIDE(__ctors_end = .);
	}
	.dtors : ALIGN(4) {
	       PROVIDE(__dtors_begin = .);
	       *(.dtors)
	       PROVIDE(__dtors_end = .);
	}
       	.bss : ALIGN(16) {
	     *(.bss) *(.scommon) *(.sbss)
	     PROVIDE(__edata = .);
	}

        /* Exported symbols (to Java) */
       	.cibylexpsyms : { *(.cibylexpsyms) }

	/* The string table with the exception names */
	. = 0xfd000000;
       	.cibylexceptionstrs : { *(.cibylexceptionstrs) }

	/* The string table with the system call names */
	. = 0xff000000;
       	.cibylstrtab : { *(.cibylstrtab) }
}

OUTPUT_ARCH(mips)
ENTRY(__start)

SECTIONS
{
       	. = 0x1000000;
       	.text : ALIGN(4) { *(.init) *(.text) *(.text.*) *(.gnu.linkonce.t.*) }
       	. = 0x0;
       	.data : ALIGN(16) { *(.data0) *(.data) *(.rodata.str1.4)  *(.rodata.cst4) *(.rodata.cst8) *(.reginfo) }
       	.rodata : ALIGN(16) { *(.rodata) *(.rodata.*) *(.gnu.linkonce.r.*) *(.cibylsetjmp) }

	.ctors : ALIGN(4) {
	       PROVIDE(__ctors_begin = .);
	       *(.ctors)
	       PROVIDE(__ctors_end = .);
	}
	.dtors : ALIGN(4) {
	       PROVIDE(__dtors_begin = .);
	       *(.dtors)
	       PROVIDE(__dtors_end = .);
	}
       	.bss : ALIGN(16) {
	     *(.bss) *(.scommon) *(.sbss)
	     PROVIDE(__edata = .);
	}

        /* Exported symbols (to Java) */
       	.cibylexpsyms : { *(.cibylexpsyms) }

	/* The string table with the exception names */
	. = 0xfd000000;
       	.cibylexceptionstrs : { *(.cibylexceptionstrs) }

	/* The string table with the system call names */
	. = 0xff000000;
       	.cibylstrtab : { *(.cibylstrtab) }
}


hw/mcu/dialog: Provide generic names for CMAC sections

We do not want to rely on section names used in Dialog's libraries.
Instead, we provide generic "placeholders" for firmware image and CMAC
RAM and it's up to CMAC driver to load proper symbols into these
sections.


Fixed a misplaced "end" symbol in the linker script.

/*
Copyright (c) 2013 Robert Beam
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/

ENTRY(Reset_Handler);

_ramStart   = ORIGIN(RAM);
_ramEnd     = _ramStart + LENGTH(RAM);
_stackStart = _ramEnd;

SECTIONS
{
	.isr_vector   :
	{
		KEEP(*(.isr_vector))
	} > FLASH

	.text         :
	{
		*(.text)
		*(.text.*)
		*(.rodata)
		*(.rodata.*)
		*(.glue_7)
		*(.glue_7t)
		*(.vfp11_veneer)
		*(.v4_bx)
		*(.ARM.extab* .gnu.linkonce.armextab.*)
	} > FLASH

	.ARM.extab    :
	{
		*(.ARM.extab* .gnu.linkonce.armextab.*)
	} > FLASH

	.ARM.exidx    :
	{
		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
	} > FLASH

	. = ALIGN(4);
	_staticDataSource = .;

	/* Static non-zero init data */
	.data         : AT(_staticDataSource)
	{
		*(.data)
		*(.data.*)
	} > RAM

	_staticDataStart  = ADDR(.data);
	_staticDataLength = SIZEOF(.data);

	/* Static zero init data */
	.bss BLOCK(4) :
	{
		*(.bss)
		*(.bss.*)
		*(COMMON)
	} > RAM

	_staticZeroStart = ADDR(.bss);
	_staticZeroLength = SIZEOF(.bss);
	PROVIDE(end = _staticZeroStart + _staticZeroLength);

	.gdb_index    :
	{
		*(.gdb_index)
	}

	/** @section Debugging section-inception **/
	.debug				0	: { *(.debug) }
	.line				0	: { *(.line) }
	.debug_srcinfo		0	: { *(.debug_srcinfo) }
	.debug_sfnames		0	: { *(.debug_sfnames) }
	.debug_aranges		0	: { *(.debug_aranges) }
	.debug_pubnames		0	: { *(.debug_pubnames) }
	.debug_info			0	: { *(.debug_info) }
	.debug_abbrev		0	: { *(.debug_abbrev) }
	.debug_line			0	: { *(.debug_line) }
	.debug_frame		0	: { *(.debug_frame) }
	.debug_str			0	: { *(.debug_str) }
	.debug_loc			0	: { *(.debug_loc) }
	.debug_macinfo		0	: { *(.debug_macinfo) }
	.debug_weaknames	0	: { *(.debug_weaknames) }
	.debug_funcnames	0	: { *(.debug_funcnames) }
	.debug_typenames	0	: { *(.debug_typenames) }
	.debug_varnames		0	: { *(.debug_varnames) }
}

/*
Copyright (c) 2013 Robert Beam
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/

ENTRY(Reset_Handler);

_ramStart   = ORIGIN(RAM);
_ramEnd     = _ramStart + LENGTH(RAM);
_stackStart = _ramEnd;
PROVIDE(end = _ramStart);

SECTIONS
{
	.isr_vector   :
	{
		KEEP(*(.isr_vector))
	} > FLASH

	.text         :
	{
		*(.text)
		*(.text.*)
		*(.rodata)
		*(.rodata.*)
		*(.glue_7)
		*(.glue_7t)
		*(.vfp11_veneer)
		*(.v4_bx)
		*(.ARM.extab* .gnu.linkonce.armextab.*)
	} > FLASH

	.ARM.extab    :
	{
		*(.ARM.extab* .gnu.linkonce.armextab.*)
	} > FLASH

	.ARM.exidx    :
	{
		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
	} > FLASH

	. = ALIGN(4);
	_staticDataSource = .;

	/* Static non-zero init data */
	.data         : AT(_staticDataSource)
	{
		*(.data)
		*(.data.*)
	} > RAM

	_staticDataStart  = ADDR(.data);
	_staticDataLength = SIZEOF(.data);

	/* Static zero init data */
	.bss BLOCK(4) :
	{
		*(.bss)
		*(.bss.*)
		*(COMMON)
	} > RAM

	_staticZeroStart = ADDR(.bss);
	_staticZeroLength = SIZEOF(.bss);

	.gdb_index    :
	{
		*(.gdb_index)
	}

	/** @section Debugging section-inception **/
	.debug				0	: { *(.debug) }
	.line				0	: { *(.line) }
	.debug_srcinfo		0	: { *(.debug_srcinfo) }
	.debug_sfnames		0	: { *(.debug_sfnames) }
	.debug_aranges		0	: { *(.debug_aranges) }
	.debug_pubnames		0	: { *(.debug_pubnames) }
	.debug_info			0	: { *(.debug_info) }
	.debug_abbrev		0	: { *(.debug_abbrev) }
	.debug_line			0	: { *(.debug_line) }
	.debug_frame		0	: { *(.debug_frame) }
	.debug_str			0	: { *(.debug_str) }
	.debug_loc			0	: { *(.debug_loc) }
	.debug_macinfo		0	: { *(.debug_macinfo) }
	.debug_weaknames	0	: { *(.debug_weaknames) }
	.debug_funcnames	0	: { *(.debug_funcnames) }
	.debug_typenames	0	: { *(.debug_typenames) }
	.debug_varnames		0	: { *(.debug_varnames) }
}


linker.ld: add ELF header and keep alignment

/**
 * This file is a part of the IncludeOS unikernel - www.includeos.org
 *
 * Copyright 2015 Oslo and Akershus University College of Applied Sciences
 * and Alfred Bratterud
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http: *www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
**/

ENTRY(_start)

SECTIONS
{

  PROVIDE (__executable_start = SEGMENT_START("text-segment", 0xa00000));
  . = SEGMENT_START("text-segment", 0xa00000) + SIZEOF_HEADERS;

  /* For convenience w. multiboot */
  PROVIDE ( _ELF_START_ = __executable_start);
  PROVIDE ( _LOAD_START_ = _ELF_START_ );

  .multiboot : {
      PROVIDE(_MULTIBOOT_START_ = . );
      *(.multiboot)
   }

  .text ALIGN(0x1000):
  {
  PROVIDE( _TEXT_START_ = . );
    /* For solo5, although it's just used to print the mem layout. */
    _stext = .;
    *(.text)
    *(.text.*)
    *(.gnu.linkonce.t*)
    /* For solo5, although it's just used to print the mem layout. */
    _etext = .;
  }

  PROVIDE( _TEXT_END_ = . );
  .init ALIGN(0x10) : {
    _INIT_START_ = .;
    *(.init)
    _INIT_END_ = .;
  }

  .fini ALIGN(0x10) : {
    _FINI_START_ = .;
    *(.fini)
    _FINI_END_ = .;
  }

  /* Global offset-table. For dynamic linking */
  .got ALIGN(0x10) : {
      *(.got*)
  }

/**
 *  .ctors, .dtors, .preinit_array, .init_array, .fini_array
 *  from GNU LD default linker script
 */

.ctors          :
  {
    _GCONSTR_START_ = .;
      /* gcc uses crtbegin.o to find the start of
       the constructors, so we make sure it is
       first.  Because this is a wildcard, it
       doesn't matter if the user does not
       actually link against crtbegin.o; the
       linker won't look for a file to match a
       wildcard.  The wildcard also means that it
       doesn't matter which directory crtbegin.o
       is in.  */
       KEEP (*crtbegin.o(.ctors))
       KEEP (*crtbegin?.o(.ctors))
       /* We don't want to include the .ctor section from
       the crtend.o file until after the sorted ctors.
       The .ctor section from the crtend file contains the
       end of ctors marker and it must be last */
       KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
       KEEP (*(SORT(.ctors.*)))
       KEEP (*(.ctors))
    _GCONSTR_END_ = .;
  }

  .dtors :
  {
    KEEP (*crtbegin.o(.dtors))
    KEEP (*crtbegin?.o(.dtors))
    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
    KEEP (*(SORT(.dtors.*)))
    KEEP (*(.dtors))
  }

  .preinit_array :
  {
    PROVIDE_HIDDEN (__preinit_array_start = .);
    KEEP (*(.preinit_array))
    PROVIDE_HIDDEN (__preinit_array_end = .);
  }

  .init_array :
  {
    PROVIDE_HIDDEN (__init_array_start = .);
    KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
    KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
    PROVIDE_HIDDEN (__init_array_end = .);
  }

  .fini_array :
  {
   PROVIDE_HIDDEN (__fini_array_start = .);
   KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
   KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
   PROVIDE_HIDDEN (__fini_array_end = .);
  }

  .rodata ALIGN(0x1000):
  {
    _RODATA_START_ = .;
    *(.rodata*)
    *(.gnu.linkonce.r*)
    _RODATA_END_ = .;
    /* For solo5, although it's just used to print the mem layout. */
    _erodata = .;
  }

  .config ALIGN(0x8) : {
    _CONFIG_JSON_START_ = .;
    KEEP(*(.config))
    _CONFIG_JSON_END_ = .;
    BYTE(0);
  }

  .eh_frame :
  {
    PROVIDE (__eh_frame_start = .);
    KEEP(*(.eh_frame))
    PROVIDE (__eh_frame_end = .);
  }

  .eh_frame_hdr :
  {
    KEEP(*(.eh_frame_hdr))
  }

  .gcc_except_table :
  {
    *(.gcc_except_table)
  }

  .data :
  {
    _DATA_START_ = .;
    *(.data)
    *(.data.*)
    *(.gnu.linkonce.d*)
    _DATA_END_ = .;
  }

  .tdata ALIGN(0x10) :
  {
    _TDATA_START_ = .;
    *(.tdata .tdata.*)
    _TDATA_END_ = .;
    . = ALIGN(0x10);
  }

  .tbss :
  {
    _TBSS_START_ = .;
    *(.tbss .tbss.*)
    _TBSS_END_ = .;
    . = ALIGN(0x10);
  }

  .memdisk :
  {
    _DISK_START_ = .;
    *(.diskdata)
    _DISK_END_ = .;
  }

  .elf_symbols : {
    _ELF_SYM_START_ = .;
    LONG (0);
  }

  /** Optional memory hole between memdisk and bss **/
  . += PRE_BSS_AREA;

  .bss ALIGN(0x1000) :
  {

    _BSS_START_ = .;
    *(.bss .bss.* .gnu.linkonce.b.*)
    *(COMMON)
    _BSS_END_ = .;
  }
  . = ALIGN(0x8);

  _end = .;

  PROVIDE (end = .);
  PROVIDE (_ELF_END_ = .);
  PROVIDE (_LOAD_END_ = .);
}

/**
 * This file is a part of the IncludeOS unikernel - www.includeos.org
 *
 * Copyright 2015 Oslo and Akershus University College of Applied Sciences
 * and Alfred Bratterud
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http: *www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
**/
ENTRY(_start)

SECTIONS
{
  PROVIDE ( _ELF_START_ = . + 0xA00000);
  PROVIDE ( _LOAD_START_ = _ELF_START_); /* For convenience w. multiboot */

  . = _ELF_START_;

  .multiboot : {
      PROVIDE(_MULTIBOOT_START_ = .);
      *(.multiboot)
   }

  .text ALIGN(0x10):
  {
  PROVIDE( _TEXT_START_ = . );
    /* For solo5, although it's just used to print the mem layout. */
    _stext = .;
    *(.text)
    *(.text.*)
    *(.gnu.linkonce.t*)
    /* For solo5, although it's just used to print the mem layout. */
    _etext = .;
  }
  PROVIDE( _TEXT_END_ = . );

  .init ALIGN(0x10) : {
    _INIT_START_ = .;
    *(.init)
    _INIT_END_ = .;
  }

  .fini ALIGN(0x10) : {
    _FINI_START_ = .;
    *(.fini)
    _FINI_END_ = .;
  }

  /* Global offset-table. For dynamic linking */
  .got ALIGN(0x10) : {
      *(.got*)
  }

/**
 *  .ctors, .dtors, .preinit_array, .init_array, .fini_array
 *  from GNU LD default linker script
 */

.ctors          :
  {
    _GCONSTR_START_ = .;
      /* gcc uses crtbegin.o to find the start of
       the constructors, so we make sure it is
       first.  Because this is a wildcard, it
       doesn't matter if the user does not
       actually link against crtbegin.o; the
       linker won't look for a file to match a
       wildcard.  The wildcard also means that it
       doesn't matter which directory crtbegin.o
       is in.  */
       KEEP (*crtbegin.o(.ctors))
       KEEP (*crtbegin?.o(.ctors))
       /* We don't want to include the .ctor section from
       the crtend.o file until after the sorted ctors.
       The .ctor section from the crtend file contains the
       end of ctors marker and it must be last */
       KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
       KEEP (*(SORT(.ctors.*)))
       KEEP (*(.ctors))
    _GCONSTR_END_ = .;
  }

  .dtors :
  {
    KEEP (*crtbegin.o(.dtors))
    KEEP (*crtbegin?.o(.dtors))
    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
    KEEP (*(SORT(.dtors.*)))
    KEEP (*(.dtors))
  }

  .preinit_array :
  {
    PROVIDE_HIDDEN (__preinit_array_start = .);
    KEEP (*(.preinit_array))
    PROVIDE_HIDDEN (__preinit_array_end = .);
  }

  .init_array :
  {
    PROVIDE_HIDDEN (__init_array_start = .);
    KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
    KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
    PROVIDE_HIDDEN (__init_array_end = .);
  }

  .fini_array :
  {
   PROVIDE_HIDDEN (__fini_array_start = .);
   KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
   KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
   PROVIDE_HIDDEN (__fini_array_end = .);
  }

  .config ALIGN(0x8) : {
    _CONFIG_JSON_START_ = .;
    KEEP(*(.config))
    _CONFIG_JSON_END_ = .;
    BYTE(0);
  }

  .rodata :
  {
    _RODATA_START_ = .;
    *(.rodata*)
    *(.gnu.linkonce.r*)
    _RODATA_END_ = .;
    /* For solo5, although it's just used to print the mem layout. */
    _erodata = .;
  }

  /* For stack unwinding (exception handling)  */
  .eh_frame_hdr ALIGN(0x8):
  {
    KEEP(*(.eh_frame_hdr*))
  }
  .eh_frame ALIGN(0x8):
  {
    PROVIDE (__eh_frame_start = .);
    KEEP(*(.eh_frame))
    LONG (0);
  }

  .gcc_except_table :
  {
    *(.gcc_except_table)
  }

  .data :
  {
    _DATA_START_ = .;
    *(.data)
    *(.data.*)
    *(.gnu.linkonce.d*)
    _DATA_END_ = .;
  }

  .tdata ALIGN(0x10) :
  {
    _TDATA_START_ = .;
    *(.tdata .tdata.*)
    _TDATA_END_ = .;
    . = ALIGN(0x10);
  }
  .tbss :
  {
    _TBSS_START_ = .;
    *(.tbss .tbss.*)
    _TBSS_END_ = .;
    . = ALIGN(0x10);
  }

  .memdisk :
  {
    _DISK_START_ = .;
    *(.diskdata)
    _DISK_END_ = .;
  }

  .elf_symbols : {
    _ELF_SYM_START_ = .;
    LONG (0);
  }

  /** Optional memory hole between memdisk and bss **/
  . += PRE_BSS_AREA;

  .bss ALIGN(0x1000) :
  {
    _BSS_START_ = .;
    *(.bss .bss.* .gnu.linkonce.b.*)
    *(COMMON)
    _BSS_END_ = .;
  }
  . = ALIGN(0x8);

  _end = .;

  PROVIDE (end = .);
  PROVIDE (_ELF_END_ = .);
  PROVIDE (_LOAD_END_ = .);
}


Pin the reflection data sections on Linux

These had similar problems to the protocol conformance sections during
Linux bringup. There are relative offsets from the main reflection
section to the two string sections, so their position relative to each
other must remain fixed.

SECTIONS
{
  .swift3_typeref : { *(.swift3_typeref) },
  .swift3_reflstr : { *(.swift3_reflstr) },
  .swift3_reflect : { *(.swift3_reflect) },
  .swift2_protocol_conformances :
  {
    .swift2_protocol_conformances_start = . ;
    QUAD(SIZEOF(.swift2_protocol_conformances) - 8) ;
    *(.swift2_protocol_conformances) ;
  },
  .swift2_type_metadata :
  {
    .swift2_type_metadata_start = . ;
    QUAD(SIZEOF(.swift2_type_metadata) - 8) ;
    *(.swift2_type_metadata) ;
  }
}
INSERT AFTER .dtors

SECTIONS
{
  .swift2_protocol_conformances :
  {
    .swift2_protocol_conformances_start = . ;
    QUAD(SIZEOF(.swift2_protocol_conformances) - 8) ;
    *(.swift2_protocol_conformances) ;
  },
  .swift2_type_metadata :
  {
    .swift2_type_metadata_start = . ;
    QUAD(SIZEOF(.swift2_type_metadata) - 8) ;
    *(.swift2_type_metadata) ;
  }
}
INSERT AFTER .dtors


Multiboot fix

Multiboot fix

ENTRY(_start)

SECTIONS
{
	. = 1M;

	.text
	{
		*(.multiboot)
		*(.text)
	}

	/* Read-only data. */
	.rodata BLOCK(4K) : ALIGN(4K)
	{
		*(.rodata)
	}

	/* Read-write data (initialized) */
	.data BLOCK(4K) : ALIGN(4K)
	{
		*(.data)
	}

	/* Read-write data (uninitialized) and stack */
	.bss BLOCK(4K) : ALIGN(4K)
	{
		*(COMMON)
		*(.bootstrap_stack)
		*(.bss)
	}
}

ENTRY(_start)

SECTIONS
{
	. = 1M;

	.text BLOCK(4K) : ALIGN(4K)
	{
		*(.multiboot)
		*(.text)
	}

	/* Read-only data. */
	.rodata BLOCK(4K) : ALIGN(4K)
	{
		*(.rodata)
	}

	/* Read-write data (initialized) */
	.data BLOCK(4K) : ALIGN(4K)
	{
		*(.data)
	}

	/* Read-write data (uninitialized) and stack */
	.bss BLOCK(4K) : ALIGN(4K)
	{
		*(COMMON)
		*(.bootstrap_stack)
		*(.bss)
	}
}


Remove stray cc3200.lds file

Remove stray cc3200.lds file

/******************************************************************************
 *
 * Default Linker script for the Texas Instruments CC3200
 *
 *****************************************************************************/

MEMORY
{
    SRAM (RWX)  : ORIGIN = 0x20004000, LENGTH = 0x00030000 - 0x4000
}

REGION_ALIAS("REGION_TEXT", SRAM);
REGION_ALIAS("REGION_BSS", SRAM);
REGION_ALIAS("REGION_DATA", SRAM);
REGION_ALIAS("REGION_STACK", SRAM);
REGION_ALIAS("REGION_HEAP", SRAM);
REGION_ALIAS("REGION_ARM_EXIDX", SRAM);
REGION_ALIAS("REGION_ARM_EXTAB", SRAM);

SECTIONS {

    PROVIDE (_intvecs_base_address = 0x20004000);

    .intvecs (_intvecs_base_address) : AT (_intvecs_base_address) {
        KEEP (*(.intvecs))
    } > REGION_TEXT

    PROVIDE (_vtable_base_address = 0x20004000);

    .vtable (_vtable_base_address) : AT (_vtable_base_address) {
        KEEP (*(.vtable))
    } > REGION_DATA

    .text : {
        CREATE_OBJECT_SYMBOLS
        *(.text)
        *(.text.*)
        . = ALIGN(0x4);
        KEEP (*(.ctors))
        . = ALIGN(0x4);
        KEEP (*(.dtors))
        . = ALIGN(0x4);
        __init_array_start = .;
        KEEP (*(.init_array*))
        __init_array_end = .;
        *(.init)
        *(.fini*)
    } > REGION_TEXT

    PROVIDE (__etext = .);
    PROVIDE (_etext = .);
    PROVIDE (etext = .);

    .rodata : {
        *(.rodata)
        *(.rodata*)
    } > REGION_TEXT

    .data : ALIGN (4) {
        __data_load__ = LOADADDR (.data);
        __data_start__ = .;
        *(.data)
        *(.data*)
        . = ALIGN (4);
        __data_end__ = .;
    } > REGION_DATA AT> REGION_TEXT

    .ARM.exidx : {
        __exidx_start = .;
        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
        __exidx_end = .;
    } > REGION_ARM_EXIDX

    .ARM.extab : {
        *(.ARM.extab* .gnu.linkonce.armextab.*)
    } > REGION_ARM_EXTAB

    .bss : {
        __bss_start__ = .;
        *(.shbss)
        *(.bss)
        *(.bss.*)
        *(COMMON)
        . = ALIGN (4);
        __bss_end__ = .;
    } > REGION_BSS

    .heap : {
        __heap_start__ = .;
        end = __heap_start__;
        _end = end;
        __end = end;
        KEEP(*(.heap))
        __heap_end__ = .;
        __HeapLimit = __heap_end__;
    } > REGION_HEAP

    .stack : ALIGN(0x8) {
        _stack = .;
        __stack = .;
        KEEP(*(.stack))
    } > REGION_STACK
}


imx_usb.lds is auto-generated

imx_usb.lds is auto-generated

/* Script for -z combreloc: combine and sort reloc sections */
OUTPUT_FORMAT("elf32-i386", "elf32-i386",
	      "elf32-i386")
OUTPUT_ARCH(i386)
ENTRY(_start)
SEARCH_DIR("/usr/i486-linux-gnu/lib32"); SEARCH_DIR("/usr/local/lib32"); SEARCH_DIR("/lib32"); SEARCH_DIR("/usr/lib32"); SEARCH_DIR("/usr/i486-linux-gnu/lib"); SEARCH_DIR("/usr/local/lib"); SEARCH_DIR("/lib"); SEARCH_DIR("/usr/lib");
SECTIONS
{
  /* Read-only sections, merged into text segment: */
  PROVIDE (__executable_start = SEGMENT_START("text-segment", 0x08048000)); . = SEGMENT_START("text-segment", 0x08048000) + SIZEOF_HEADERS;
  .interp         : { *(.interp) }
  .note.gnu.build-id : { *(.note.gnu.build-id) }
  .hash           : { *(.hash) }
  .gnu.hash       : { *(.gnu.hash) }
  .dynsym         : { *(.dynsym) }
  .dynstr         : { *(.dynstr) }
  .gnu.version    : { *(.gnu.version) }
  .gnu.version_d  : { *(.gnu.version_d) }
  .gnu.version_r  : { *(.gnu.version_r) }
  .rel.dyn        :
    {
      *(.rel.init)
      *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*)
      *(.rel.fini)
      *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*)
      *(.rel.data.rel.ro* .rel.gnu.linkonce.d.rel.ro.*)
      *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*)
      *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*)
      *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*)
      *(.rel.ctors)
      *(.rel.dtors)
      *(.rel.got)
      *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*)
      *(.rel.ifunc)
    }
  .rel.plt        :
    {
      *(.rel.plt)
      PROVIDE_HIDDEN (__rel_iplt_start = .);
      *(.rel.iplt)
      PROVIDE_HIDDEN (__rel_iplt_end = .);
    }
  .init           :
  {
    KEEP (*(.init))
  } =0x90909090
  .plt            : { *(.plt) *(.iplt) }
  .text           :
  {
    *(.text.unlikely .text.*_unlikely)
    *(.text .stub .text.* .gnu.linkonce.t.*)
    /* .gnu.warning sections are handled specially by elf32.em.  */
    *(.gnu.warning)
  } =0x90909090
  .fini           :
  {
    KEEP (*(.fini))
  } =0x90909090
  PROVIDE (__etext = .);
  PROVIDE (_etext = .);
  PROVIDE (etext = .);
  .rodata         : { *(.rodata .rodata.* .gnu.linkonce.r.*) }
  .rodata1        : { *(.rodata1) }
  .eh_frame_hdr : { *(.eh_frame_hdr) }
  .eh_frame       : ONLY_IF_RO { KEEP (*(.eh_frame)) }
  .gcc_except_table   : ONLY_IF_RO { *(.gcc_except_table .gcc_except_table.*) }
  /* Adjust the address for the data segment.  We want to adjust up to
     the same address within the page on the next page up.  */
  . = ALIGN (CONSTANT (MAXPAGESIZE)) - ((CONSTANT (MAXPAGESIZE) - .) & (CONSTANT (MAXPAGESIZE) - 1)); . = DATA_SEGMENT_ALIGN (CONSTANT (MAXPAGESIZE), CONSTANT (COMMONPAGESIZE));
  /* Exception handling  */
  .eh_frame       : ONLY_IF_RW { KEEP (*(.eh_frame)) }
  .gcc_except_table   : ONLY_IF_RW { *(.gcc_except_table .gcc_except_table.*) }
  /* Thread Local Storage sections  */
  .tdata	  : { *(.tdata .tdata.* .gnu.linkonce.td.*) }
  .tbss		  : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) }
  .preinit_array     :
  {
    PROVIDE_HIDDEN (__preinit_array_start = .);
    KEEP (*(.preinit_array))
    PROVIDE_HIDDEN (__preinit_array_end = .);
  }
  .init_array     :
  {
     PROVIDE_HIDDEN (__init_array_start = .);
     KEEP (*(SORT(.init_array.*)))
     KEEP (*(.init_array))
     PROVIDE_HIDDEN (__init_array_end = .);
  }
  .fini_array     :
  {
    PROVIDE_HIDDEN (__fini_array_start = .);
    KEEP (*(.fini_array))
    KEEP (*(SORT(.fini_array.*)))
    PROVIDE_HIDDEN (__fini_array_end = .);
  }
  .ctors          :
  {
    /* gcc uses crtbegin.o to find the start of
       the constructors, so we make sure it is
       first.  Because this is a wildcard, it
       doesn't matter if the user does not
       actually link against crtbegin.o; the
       linker won't look for a file to match a
       wildcard.  The wildcard also means that it
       doesn't matter which directory crtbegin.o
       is in.  */
    KEEP (*crtbegin.o(.ctors))
    KEEP (*crtbegin?.o(.ctors))
    /* We don't want to include the .ctor section from
       the crtend.o file until after the sorted ctors.
       The .ctor section from the crtend file contains the
       end of ctors marker and it must be last */
    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
    KEEP (*(SORT(.ctors.*)))
    KEEP (*(.ctors))
  }
  .dtors          :
  {
    KEEP (*crtbegin.o(.dtors))
    KEEP (*crtbegin?.o(.dtors))
    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
    KEEP (*(SORT(.dtors.*)))
    KEEP (*(.dtors))
  }
  .jcr            : { KEEP (*(.jcr)) }
  .data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro* .gnu.linkonce.d.rel.ro.*) }
  .dynamic        : { *(.dynamic) }
  .got            : { *(.got) *(.igot) }
  . = DATA_SEGMENT_RELRO_END (12, .);
  .got.plt        : { *(.got.plt)  *(.igot.plt) }
  .data           :
  {
     __processor_info_start = .;     *(.data.processor_info);     __processor_info_end = .;
    *(.data .data.* .gnu.linkonce.d.*)
    SORT(CONSTRUCTORS)
  }
  .data1          : { *(.data1) }
  _edata = .; PROVIDE (edata = .);
  __bss_start = .;
  .bss            :
  {
   *(.dynbss)
   *(.bss .bss.* .gnu.linkonce.b.*)
   *(COMMON)
   /* Align here to ensure that the .bss section occupies space up to
      _end.  Align after .bss to ensure correct alignment even if the
      .bss section disappears because there are no input sections.
      FIXME: Why do we need it? When there is no .bss section, we don't
      pad the .data section.  */
   . = ALIGN(. != 0 ? 32 / 8 : 1);
  }
  . = ALIGN(32 / 8);
  . = ALIGN(32 / 8);
  _end = .; PROVIDE (end = .);
  . = DATA_SEGMENT_END (.);
  /* Stabs debugging sections.  */
  .stab          0 : { *(.stab) }
  .stabstr       0 : { *(.stabstr) }
  .stab.excl     0 : { *(.stab.excl) }
  .stab.exclstr  0 : { *(.stab.exclstr) }
  .stab.index    0 : { *(.stab.index) }
  .stab.indexstr 0 : { *(.stab.indexstr) }
  .comment       0 : { *(.comment) }
  /* DWARF debug sections.
     Symbols in the DWARF debugging sections are relative to the beginning
     of the section so we begin them at 0.  */
  /* DWARF 1 */
  .debug          0 : { *(.debug) }
  .line           0 : { *(.line) }
  /* GNU DWARF 1 extensions */
  .debug_srcinfo  0 : { *(.debug_srcinfo) }
  .debug_sfnames  0 : { *(.debug_sfnames) }
  /* DWARF 1.1 and DWARF 2 */
  .debug_aranges  0 : { *(.debug_aranges) }
  .debug_pubnames 0 : { *(.debug_pubnames) }
  /* DWARF 2 */
  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
  .debug_abbrev   0 : { *(.debug_abbrev) }
  .debug_line     0 : { *(.debug_line) }
  .debug_frame    0 : { *(.debug_frame) }
  .debug_str      0 : { *(.debug_str) }
  .debug_loc      0 : { *(.debug_loc) }
  .debug_macinfo  0 : { *(.debug_macinfo) }
  /* SGI/MIPS DWARF 2 extensions */
  .debug_weaknames 0 : { *(.debug_weaknames) }
  .debug_funcnames 0 : { *(.debug_funcnames) }
  .debug_typenames 0 : { *(.debug_typenames) }
  .debug_varnames  0 : { *(.debug_varnames) }
  /* DWARF 3 */
  .debug_pubtypes 0 : { *(.debug_pubtypes) }
  .debug_ranges   0 : { *(.debug_ranges) }
  .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
  /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }
}


Fixed linker script formatting; unbreaks master for real

INCLUDE ./src/zinc/hal/cortex_m3/armmem.ld

PROVIDE(isr_dma_0           = isr_default_fault);
PROVIDE(isr_dma_1           = isr_default_fault);
PROVIDE(isr_dma_2           = isr_default_fault);
PROVIDE(isr_dma_3           = isr_default_fault);
PROVIDE(isr_dma_4           = isr_default_fault);
PROVIDE(isr_dma_5           = isr_default_fault);
PROVIDE(isr_dma_6           = isr_default_fault);
PROVIDE(isr_dma_7           = isr_default_fault);
PROVIDE(isr_dma_8           = isr_default_fault);
PROVIDE(isr_dma_9           = isr_default_fault);
PROVIDE(isr_dma_10          = isr_default_fault);
PROVIDE(isr_dma_11          = isr_default_fault);
PROVIDE(isr_dma_12          = isr_default_fault);
PROVIDE(isr_dma_13          = isr_default_fault);
PROVIDE(isr_dma_14          = isr_default_fault);
PROVIDE(isr_dma_15          = isr_default_fault);
PROVIDE(isr_dma_err         = isr_default_fault);
PROVIDE(isr_flash_complete  = isr_default_fault);
PROVIDE(isr_flash_collision = isr_default_fault);
PROVIDE(isr_low_volt        = isr_default_fault);
PROVIDE(isr_llwu            = isr_default_fault);
PROVIDE(isr_wdt             = isr_default_fault);
PROVIDE(isr_i2c_0           = isr_default_fault);
PROVIDE(isr_i2c_1           = isr_default_fault);
PROVIDE(isr_spi_0           = isr_default_fault);
PROVIDE(isr_spi_1           = isr_default_fault);
PROVIDE(isr_can_0_msg       = isr_default_fault);
PROVIDE(isr_can_0_bus       = isr_default_fault);
PROVIDE(isr_can_0_err       = isr_default_fault);
PROVIDE(isr_can_0_tx        = isr_default_fault);
PROVIDE(isr_can_0_rx        = isr_default_fault);
PROVIDE(isr_can_0_wake      = isr_default_fault);
PROVIDE(isr_i2s_0_tx        = isr_default_fault);
PROVIDE(isr_i2s_0_rx        = isr_default_fault);
PROVIDE(isr_uart_0_lon      = isr_default_fault);
PROVIDE(isr_uart_0_stat     = isr_default_fault);
PROVIDE(isr_uart_0_err      = isr_default_fault);
PROVIDE(isr_uart_1_stat     = isr_default_fault);
PROVIDE(isr_uart_1_err      = isr_default_fault);
PROVIDE(isr_uart_2_stat     = isr_default_fault);
PROVIDE(isr_uart_2_err      = isr_default_fault);
PROVIDE(isr_adc_0           = isr_default_fault);
PROVIDE(isr_adc_1           = isr_default_fault);
PROVIDE(isr_cmp_0           = isr_default_fault);
PROVIDE(isr_cmp_1           = isr_default_fault);
PROVIDE(isr_cmp_2           = isr_default_fault);
PROVIDE(isr_ftm_0           = isr_default_fault);
PROVIDE(isr_ftm_1           = isr_default_fault);
PROVIDE(isr_ftm_2           = isr_default_fault);
PROVIDE(ist_cmt             = isr_default_fault);
PROVIDE(isr_rtc_alarm       = isr_default_fault);
PROVIDE(isr_rtc_tick        = isr_default_fault);
PROVIDE(isr_pit_0           = isr_default_fault);
PROVIDE(isr_pit_1           = isr_default_fault);
PROVIDE(isr_pit_2           = isr_default_fault);
PROVIDE(isr_pit_3           = isr_default_fault);
PROVIDE(isr_pdb             = isr_default_fault);
PROVIDE(isr_usb             = isr_default_fault);
PROVIDE(isr_usb_dcd         = isr_default_fault);
PROVIDE(isr_dac_0           = isr_default_fault);
PROVIDE(isr_tsi             = isr_default_fault);
PROVIDE(isr_mcg             = isr_default_fault);
PROVIDE(isr_lptimer         = isr_default_fault);
PROVIDE(isr_port_a          = isr_default_fault);
PROVIDE(isr_port_b          = isr_default_fault);
PROVIDE(isr_port_c          = isr_default_fault);
PROVIDE(isr_port_d          = isr_default_fault);
PROVIDE(isr_port_e          = isr_default_fault);
PROVIDE(isr_soft            = isr_default_fault);

/*
  This originated from the Freescale K20 Sub-Family Reference Manual
  Document number K20P48M50SF0RM, Rev. 2
*/

k20_iomem_PERIPH0   = 0x40000000;

k20_iomem_CROSSBAR  = 0x40004000;

k20_iomem_DMACON    = 0x40008000;
k20_iomem_DMATCD    = 0x40009000;

k20_iomem_FLASHCON  = 0x4001F000;
k20_iomem_FLASH     = 0x40020000;
k20_iomem_DMAMUX0   = 0x40021000;

k20_iomem_CAN0      = 0x40024000;

k20_iomem_SPI0      = 0x4002C000;
k20_iomem_SPI1      = 0x4002D000;
k20_iomem_I2S0      = 0x4002F000;

k20_iomem_CRC       = 0x40032000;

k20_iomem_USBDCD    = 0x40035000;
k20_iomem_PDB       = 0x40036000;
k20_iomem_PIT       = 0x40037000;
k20_iomem_FTM0      = 0x40038000;
k20_iomem_FTM1      = 0x40039000;

k20_iomem_ADC0      = 0x4003B000;

k20_iomem_RTC       = 0x4003D000;
k20_iomem_VBAT      = 0x4003E000;

k20_iomem_LPTMR     = 0x40040000;
k20_iomem_SYSREG    = 0x40041000;

k20_iomem_TSI       = 0x40045000;

k20_iomem_SIM       = 0x40047000;
k20_iomem_PORTA     = 0x40049000;
k20_iomem_PORTB     = 0x4004A000;
k20_iomem_PORTC     = 0x4004B000;
k20_iomem_PORTD     = 0x4004C000;
k20_iomem_PORTE     = 0x4004D000;

k20_iomem_WDINT     = 0x40052000;

k20_iomem_WDEXT     = 0x40061000;
k20_iomem_CMT       = 0x40062000;

k20_iomem_MCG       = 0x40064000;
k20_iomem_OSC       = 0x40065000;
k20_iomem_I2C0      = 0x40066000;
k20_iomem_I2C1      = 0x40067000;

k20_iomem_UART0     = 0x4006A000;
k20_iomem_UART1     = 0x4006B000;
k20_iomem_UART2     = 0x4006C000;

k20_iomem_USB       = 0x40072000;
k20_iomem_CMP       = 0x40073000;
k20_iomem_VREF      = 0x40074000;

k20_iomem_LLWU      = 0x4007C000;
k20_iomem_PMC       = 0x4007D000;
k20_iomem_SMC       = 0x4007E000;
k20_iomem_RCM       = 0x4007F000;

k20_iomem_PERIPH1   = 0x40080000;

k20_iomem_FTM2      = 0x400B8000;

k20_iomem_ADC1      = 0x400BB000;

k20_iomem_DAC0      = 0x400CC000;

k20_iomem_GPIOA     = 0x400ff000;
k20_iomem_GPIOB     = 0x400ff040;
k20_iomem_GPIOC     = 0x400ff080;
k20_iomem_GPIOD     = 0x400ff0C0;
k20_iomem_GPIOE     = 0x400ff100;

k20_iomem_WDOG      = 0x40052000;

INCLUDE ./src/zinc/hal/cortex_m3/armmem.ld

PROVIDE(isr_dma_0           = isr_default_fault);
PROVIDE(isr_dma_1           = isr_default_fault);
PROVIDE(isr_dma_2           = isr_default_fault);
PROVIDE(isr_dma_3           = isr_default_fault);
PROVIDE(isr_dma_4           = isr_default_fault);
PROVIDE(isr_dma_5           = isr_default_fault);
PROVIDE(isr_dma_6           = isr_default_fault);
PROVIDE(isr_dma_7           = isr_default_fault);
PROVIDE(isr_dma_8           = isr_default_fault);
PROVIDE(isr_dma_9           = isr_default_fault);
PROVIDE(isr_dma_10          = isr_default_fault);
PROVIDE(isr_dma_11          = isr_default_fault);
PROVIDE(isr_dma_12          = isr_default_fault);
PROVIDE(isr_dma_13          = isr_default_fault);
PROVIDE(isr_dma_14          = isr_default_fault);
PROVIDE(isr_dma_15          = isr_default_fault);
PROVIDE(isr_dma_err         = isr_default_fault);
PROVIDE(isr_flash_complete  = isr_default_fault);
PROVIDE(isr_flash_collision = isr_default_fault);
PROVIDE(isr_low_volt        = isr_default_fault);
PROVIDE(isr_llwu            = isr_default_fault);
PROVIDE(isr_wdt             = isr_default_fault);
PROVIDE(isr_i2c_0           = isr_default_fault);
PROVIDE(isr_i2c_1           = isr_default_fault);
PROVIDE(isr_spi_0           = isr_default_fault);
PROVIDE(isr_spi_1           = isr_default_fault);
PROVIDE(isr_can_0_msg       = isr_default_fault);
PROVIDE(isr_can_0_bus       = isr_default_fault);
PROVIDE(isr_can_0_err       = isr_default_fault);
PROVIDE(isr_can_0_tx        = isr_default_fault);
PROVIDE(isr_can_0_rx        = isr_default_fault);
PROVIDE(isr_can_0_wake      = isr_default_fault);
PROVIDE(isr_i2s_0_tx        = isr_default_fault);
PROVIDE(isr_i2s_0_rx        = isr_default_fault);
PROVIDE(isr_uart_0_lon      = isr_default_fault);
PROVIDE(isr_uart_0_stat     = isr_default_fault);
PROVIDE(isr_uart_0_err      = isr_default_fault);
PROVIDE(isr_uart_1_stat     = isr_default_fault);
PROVIDE(isr_uart_1_err      = isr_default_fault);
PROVIDE(isr_uart_2_stat     = isr_default_fault);
PROVIDE(isr_uart_2_err      = isr_default_fault);
PROVIDE(isr_adc_0           = isr_default_fault);
PROVIDE(isr_adc_1           = isr_default_fault);
PROVIDE(isr_cmp_0           = isr_default_fault);
PROVIDE(isr_cmp_1           = isr_default_fault);
PROVIDE(isr_cmp_2           = isr_default_fault);
PROVIDE(isr_ftm_0           = isr_default_fault);
PROVIDE(isr_ftm_1           = isr_default_fault);
PROVIDE(isr_ftm_2           = isr_default_fault);
PROVIDE(ist_cmt             = isr_default_fault);
PROVIDE(isr_rtc_alarm       = isr_default_fault);
PROVIDE(isr_rtc_tick        = isr_default_fault);
PROVIDE(isr_pit_0           = isr_default_fault);
PROVIDE(isr_pit_1           = isr_default_fault);
PROVIDE(isr_pit_2           = isr_default_fault);
PROVIDE(isr_pit_3           = isr_default_fault);
PROVIDE(isr_pdb             = isr_default_fault);
PROVIDE(isr_usb             = isr_default_fault);
PROVIDE(isr_usb_dcd         = isr_default_fault);
PROVIDE(isr_dac_0           = isr_default_fault);
PROVIDE(isr_tsi             = isr_default_fault);
PROVIDE(isr_mcg             = isr_default_fault);
PROVIDE(isr_lptimer         = isr_default_fault);
PROVIDE(isr_port_a          = isr_default_fault);
PROVIDE(isr_port_b          = isr_default_fault);
PROVIDE(isr_port_c          = isr_default_fault);
PROVIDE(isr_port_d          = isr_default_fault);
PROVIDE(isr_port_e          = isr_default_fault);
PROVIDE(isr_soft            = isr_default_fault);

# This originated from the Freescale K20 Sub-Family Reference Manual
# Document number K20P48M50SF0RM, Rev. 2

k20_iomem_PERIPH0   = 0x40000000;

k20_iomem_CROSSBAR  = 0x40004000;

k20_iomem_DMACON    = 0x40008000;
k20_iomem_DMATCD    = 0x40009000;

k20_iomem_FLASHCON  = 0x4001F000;
k20_iomem_FLASH     = 0x40020000;
k20_iomem_DMAMUX0   = 0x40021000;

k20_iomem_CAN0      = 0x40024000;

k20_iomem_SPI0      = 0x4002C000;
k20_iomem_SPI1      = 0x4002D000;
k20_iomem_I2S0      = 0x4002F000;

k20_iomem_CRC       = 0x40032000;

k20_iomem_USBDCD    = 0x40035000;
k20_iomem_PDB       = 0x40036000;
k20_iomem_PIT       = 0x40037000;
k20_iomem_FTM0      = 0x40038000;
k20_iomem_FTM1      = 0x40039000;

k20_iomem_ADC0      = 0x4003B000;

k20_iomem_RTC       = 0x4003D000;
k20_iomem_VBAT      = 0x4003E000;

k20_iomem_LPTMR     = 0x40040000;
k20_iomem_SYSREG    = 0x40041000;

k20_iomem_TSI       = 0x40045000;

k20_iomem_SIM       = 0x40047000;
k20_iomem_PORTA     = 0x40049000;
k20_iomem_PORTB     = 0x4004A000;
k20_iomem_PORTC     = 0x4004B000;
k20_iomem_PORTD     = 0x4004C000;
k20_iomem_PORTE     = 0x4004D000;

k20_iomem_WDINT     = 0x40052000;

k20_iomem_WDEXT     = 0x40061000;
k20_iomem_CMT       = 0x40062000;

k20_iomem_MCG       = 0x40064000;
k20_iomem_OSC       = 0x40065000;
k20_iomem_I2C0      = 0x40066000;
k20_iomem_I2C1      = 0x40067000;

k20_iomem_UART0     = 0x4006A000;
k20_iomem_UART1     = 0x4006B000;
k20_iomem_UART2     = 0x4006C000;

k20_iomem_USB       = 0x40072000;
k20_iomem_CMP       = 0x40073000;
k20_iomem_VREF      = 0x40074000;

k20_iomem_LLWU      = 0x4007C000;
k20_iomem_PMC       = 0x4007D000;
k20_iomem_SMC       = 0x4007E000;
k20_iomem_RCM       = 0x4007F000;

k20_iomem_PERIPH1   = 0x40080000;

k20_iomem_FTM2      = 0x400B8000;

k20_iomem_ADC1      = 0x400BB000;

k20_iomem_DAC0      = 0x400CC000;

k20_iomem_GPIOA     = 0x400ff000;
k20_iomem_GPIOB     = 0x400ff040;
k20_iomem_GPIOC     = 0x400ff080;
k20_iomem_GPIOD     = 0x400ff0C0;
k20_iomem_GPIOE     = 0x400ff100;

k20_iomem_WDOG      = 0x40052000;


rtc: fix rtc slow memory layout on esp32s3

/**
 *                    ESP32-S3 Linker Script Memory Layout
 * This file describes the memory layout (memory blocks) by virtual memory addresses.
 * This linker script is passed through the C preprocessor to include configuration options.
 * Please use preprocessor features sparingly!
 * Restrict to simple macros with numeric values, and/or #if/#endif blocks.
 */

#include "sdkconfig.h"

#define SRAM_IRAM_START     0x40370000
#define SRAM_DRAM_START     0x3FC80000
#define I_D_SRAM_OFFSET     (SRAM_IRAM_START - SRAM_DRAM_START)
#define SRAM_DRAM_END       0x403BA000 - I_D_SRAM_OFFSET  /* 2nd stage bootloader iram_loader_seg start address */

#define SRAM_IRAM_ORG       (SRAM_IRAM_START + CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE)
#define SRAM_DRAM_ORG       (SRAM_DRAM_START + CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE)

#define I_D_SRAM_SIZE       SRAM_DRAM_END - SRAM_DRAM_ORG

#if CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE
ASSERT((CONFIG_ESP32S3_FIXED_STATIC_RAM_SIZE <= I_D_SRAM_SIZE), "Fixed static ram data does not fit.")
#define DRAM0_0_SEG_LEN CONFIG_ESP32S3_FIXED_STATIC_RAM_SIZE
#else
#define DRAM0_0_SEG_LEN I_D_SRAM_SIZE
#endif // CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE

MEMORY
{
  /**
   *  All these values assume the flash cache is on, and have the blocks this uses subtracted from the length
   *  of the various regions. The 'data access port' dram/drom regions map to the same iram/irom regions but
   *  are connected to the data port of the CPU and eg allow byte-wise access.
   */

  /* IRAM for PRO CPU. */
  iram0_0_seg (RX) :                 org = SRAM_IRAM_ORG, len = I_D_SRAM_SIZE

#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
  /* Flash mapped instruction data */
  iram0_2_seg (RX) :                 org = 0x42000020, len = 0x8000000-0x20

  /**
   * (0x20 offset above is a convenience for the app binary image generation.
   * Flash cache has 64KB pages. The .bin file which is flashed to the chip
   * has a 0x18 byte file header, and each segment has a 0x08 byte segment
   * header. Setting this offset makes it simple to meet the flash cache MMU's
   * constraint that (paddr % 64KB == vaddr % 64KB).)
   */
#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS

  /**
   * Shared data RAM, excluding memory reserved for ROM bss/data/stack.
   * Enabling Bluetooth & Trace Memory features in menuconfig will decrease the amount of RAM available.
   */
  dram0_0_seg (RW) :                 org = SRAM_DRAM_ORG, len = DRAM0_0_SEG_LEN

#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
  /* Flash mapped constant data */
  drom0_0_seg (R) :                  org = 0x3C000020, len = 0x8000000-0x20

  /* (See iram0_2_seg for meaning of 0x20 offset in the above.) */
#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS

  /**
   * RTC fast memory (executable). Persists over deep sleep.
   */
  rtc_iram_seg(RWX) :                org = 0x600fe000, len = 0x2000

  /**
   * RTC fast memory (same block as above), viewed from data bus
   */
  rtc_data_seg(RW) :                 org = 0x600fe000, len = 0x2000

  /**
   * RTC slow memory (data accessible). Persists over deep sleep.
   * Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled.
   */
  rtc_slow_seg(RW)  :                org = 0x50000000 + CONFIG_ESP32S3_ULP_COPROC_RESERVE_MEM,
                                     len = 0x2000 - CONFIG_ESP32S3_ULP_COPROC_RESERVE_MEM
}

#if CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE
/* static data ends at defined address */
_static_data_end = 0x3FCA0000 + DRAM0_0_SEG_LEN;
#else
_static_data_end = _bss_end;
#endif // CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE

/* Heap ends at top of dram0_0_seg */
_heap_end = 0x40000000;

_data_seg_org = ORIGIN(rtc_data_seg);

#if CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM
REGION_ALIAS("rtc_data_location", rtc_slow_seg );
#else
REGION_ALIAS("rtc_data_location", rtc_data_seg );
#endif // CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM

#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
REGION_ALIAS("default_code_seg", iram0_2_seg);
#else
REGION_ALIAS("default_code_seg", iram0_0_seg);
#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS

#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
REGION_ALIAS("default_rodata_seg", drom0_0_seg);
#else
REGION_ALIAS("default_rodata_seg", dram0_0_seg);
#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS

/**
 *                    ESP32-S3 Linker Script Memory Layout
 * This file describes the memory layout (memory blocks) by virtual memory addresses.
 * This linker script is passed through the C preprocessor to include configuration options.
 * Please use preprocessor features sparingly!
 * Restrict to simple macros with numeric values, and/or #if/#endif blocks.
 */

#include "sdkconfig.h"

#define SRAM_IRAM_START     0x40370000
#define SRAM_DRAM_START     0x3FC80000
#define I_D_SRAM_OFFSET     (SRAM_IRAM_START - SRAM_DRAM_START)
#define SRAM_DRAM_END       0x403BA000 - I_D_SRAM_OFFSET  /* 2nd stage bootloader iram_loader_seg start address */

#define SRAM_IRAM_ORG       (SRAM_IRAM_START + CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE)
#define SRAM_DRAM_ORG       (SRAM_DRAM_START + CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE)

#define I_D_SRAM_SIZE       SRAM_DRAM_END - SRAM_DRAM_ORG

#if CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE
ASSERT((CONFIG_ESP32S3_FIXED_STATIC_RAM_SIZE <= I_D_SRAM_SIZE), "Fixed static ram data does not fit.")
#define DRAM0_0_SEG_LEN CONFIG_ESP32S3_FIXED_STATIC_RAM_SIZE
#else
#define DRAM0_0_SEG_LEN I_D_SRAM_SIZE
#endif // CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE

MEMORY
{
  /**
   *  All these values assume the flash cache is on, and have the blocks this uses subtracted from the length
   *  of the various regions. The 'data access port' dram/drom regions map to the same iram/irom regions but
   *  are connected to the data port of the CPU and eg allow byte-wise access.
   */

  /* IRAM for PRO CPU. */
  iram0_0_seg (RX) :                 org = SRAM_IRAM_ORG, len = I_D_SRAM_SIZE

#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
  /* Flash mapped instruction data */
  iram0_2_seg (RX) :                 org = 0x42000020, len = 0x8000000-0x20

  /**
   * (0x20 offset above is a convenience for the app binary image generation.
   * Flash cache has 64KB pages. The .bin file which is flashed to the chip
   * has a 0x18 byte file header, and each segment has a 0x08 byte segment
   * header. Setting this offset makes it simple to meet the flash cache MMU's
   * constraint that (paddr % 64KB == vaddr % 64KB).)
   */
#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS

  /**
   * Shared data RAM, excluding memory reserved for ROM bss/data/stack.
   * Enabling Bluetooth & Trace Memory features in menuconfig will decrease the amount of RAM available.
   */
  dram0_0_seg (RW) :                 org = SRAM_DRAM_ORG, len = DRAM0_0_SEG_LEN

#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
  /* Flash mapped constant data */
  drom0_0_seg (R) :                  org = 0x3C000020, len = 0x8000000-0x20

  /* (See iram0_2_seg for meaning of 0x20 offset in the above.) */
#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS

  /**
   * RTC fast memory (executable). Persists over deep sleep.
   */
  rtc_iram_seg(RWX) :                org = 0x600fe000, len = 0x2000

  /**
   * RTC fast memory (same block as above), viewed from data bus
   */
  rtc_data_seg(RW) :                 org = 0x3ff80000, len = 0x2000

  /**
   * RTC slow memory (data accessible). Persists over deep sleep.
   * Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled.
   */
  rtc_slow_seg(RW)  :                org = 0x50000000 + CONFIG_ESP32S3_ULP_COPROC_RESERVE_MEM,
                                     len = 0x1000 - CONFIG_ESP32S3_ULP_COPROC_RESERVE_MEM
}

#if CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE
/* static data ends at defined address */
_static_data_end = 0x3FCA0000 + DRAM0_0_SEG_LEN;
#else
_static_data_end = _bss_end;
#endif // CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE

/* Heap ends at top of dram0_0_seg */
_heap_end = 0x40000000;

_data_seg_org = ORIGIN(rtc_data_seg);

#if CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM
REGION_ALIAS("rtc_data_location", rtc_slow_seg );
#else
REGION_ALIAS("rtc_data_location", rtc_data_seg );
#endif // CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM

#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
REGION_ALIAS("default_code_seg", iram0_2_seg);
#else
REGION_ALIAS("default_code_seg", iram0_0_seg);
#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS

#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
REGION_ALIAS("default_rodata_seg", drom0_0_seg);
#else
REGION_ALIAS("default_rodata_seg", dram0_0_seg);
#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS


Fix linker script

Fix linker script

ENTRY(kernel)
OUTPUT_FORMAT(elf32-i386)

MEMORY {
	lowmem : org = 0xC000, l = 256K
}

SECTIONS {
	.text : {
		*(.text*)
	} >lowmem

	.data : {
		*(.data*)
	} >lowmem

	.rodata : {
		*(.rodata*)
	} >lowmem

	/DISCARD/ : {
		*(.comment)
		*(.eh_frame)
		*(.rel.eh_frame)
	}
}

ENTRY(kernel)
OUTPUT_FORMAT(elf32-i386)

MEMORY {
	lowmem : org = 0xC000, l = 256K
}

SECTIONS {
	.text : {
		*(.text*)
	} >lowmem

	.data: {
		*(.data*)
	} >lowmem

	.rodata: {
		*(.rodata*)
	} >lowmem

	/DISCARD/ : {
		*(.comment)
		*(.eh_frame)
		*(.rel.eh_frame)
	}
}


update ld script

update ld script

/*
 * Default linker script for Cortex-M (it includes specifics for STM32F[34]xx).
 * Based on GNU ARM Eclipse & STM32F7Cube templates
 */

/* Boot entry (defined in startup_stm32f746xx.s) */
ENTRY(Reset_Handler)

/* Specify the memory areas */
MEMORY {
  FLASH (rx)  : ORIGIN = 0x08000000, LENGTH = 1024K
  RAM (xrw)   : ORIGIN = 0x20000000, LENGTH = 320K
  /*
   * SRAM starts at 0xC0000000, but we reserve memory
   * for two LCD screen buffers (800 * 480 * 4 * 2)
   */
  SRAM (xrw)  : ORIGIN = 0xC02EE000, LENGTH = 5192K
}

/* Highest address of the user mode stack */
__stack = ORIGIN(RAM) + LENGTH(RAM);
_estack = __stack; /* STM specific */

/* Generate a link error if heap and stack don't fit into RAM */
_Min_Heap_Size = 0x200;      /* required amount of heap  */
_Min_Stack_Size = 0x400; /* required amount of stack */

/* Define output sections */
SECTIONS {
  /*
   * For Cortex-M devices, the beginning of the startup code is stored in
   * the .isr_vector section, which goes to FLASH.
   */
  .isr_vector : ALIGN(4) {
    KEEP(*(.isr_vector)) /* ISR jump table */
    . = ALIGN(4);
  } >FLASH

  /* Program code and other data goes into FLASH */
  .text : ALIGN(4) {
    *(.text .text.*)
    /*
		 * Stub sections generated by the linker, to glue together
		 * ARM and Thumb code. .glue_7 is used for ARM code calling
		 * Thumb code, and .glue_7t is used for Thumb code calling
		 * ARM code. Apparently always generated by the linker, for some
		 * architectures, so better leave them here.
		 */
    *(.glue_7 .glue_7t)
    *(.eh_frame)

    KEEP (*(.init))
    KEEP (*(.fini))

    . = ALIGN(4);
    _etext = .;        /* define a global symbols at end of code */
  } >FLASH

  /* Constant data (constants, strings, etc.) goes into FLASH */
  .rodata : ALIGN(4) {
    *(.rodata .rodata*)
    . = ALIGN(4);
  } >FLASH

  .ARM.extab : ALIGN(4) {
    *(.ARM.extab* .gnu.linkonce.armextab.*)
  } >FLASH

  .ARM : ALIGN(4) {
    __exidx_start = .;
    *(.ARM.exidx* .gnu.linkonce.armexidx.*)
    __exidx_end = .;
  } >FLASH

  .preinit_array : {
    PROVIDE_HIDDEN (__preinit_array_start = .);
    KEEP (*(.preinit_array*))
    PROVIDE_HIDDEN (__preinit_array_end = .);
  } >FLASH

  .init_array : {
    PROVIDE_HIDDEN (__init_array_start = .);
    KEEP (*(SORT(.init_array.*)))
    KEEP (*(.init_array*))
    PROVIDE_HIDDEN (__init_array_end = .);
  } >FLASH

  .fini_array : {
    PROVIDE_HIDDEN (__fini_array_start = .);
    KEEP (*(SORT(.fini_array.*)))
    KEEP (*(.fini_array*))
    PROVIDE_HIDDEN (__fini_array_end = .);
  } >FLASH

  /* used by the startup to initialize data */
  _sidata = LOADADDR(.data);

  /* Initialized data sections goes into RAM, load LMA copy after code */
  .data : ALIGN(4) {
    _sdata = .;        /* create a global symbol at data start */
    *(.data)           /* .data sections */
    *(.data*)          /* .data* sections */

    . = ALIGN(4);
    _edata = .;        /* define a global symbol at data end */
  } >RAM AT> FLASH

  /* Uninitialized data section */
  .bss (NOLOAD) : ALIGN(4) {
    /* This is used by the startup in order to initialize the .bss secion */
    _sbss = .;         /* define a global symbol at bss start */
    __bss_start__ = _sbss;
    *(.bss .bss*)
    *(COMMON)

    . = ALIGN(4);
    _ebss = .;         /* define a global symbol at bss end */
    __bss_end__ = _ebss;
  } >RAM

  /* User_heap_stack section, used to check that there is enough RAM left */
  ._user_heap_stack : ALIGN(8) {
    PROVIDE ( end = . );
    PROVIDE ( _end = . );
    . = . + _Min_Heap_Size;
    . = . + _Min_Stack_Size;
    . = ALIGN(8);
  } >RAM

  /* Remove information from the standard libraries */
  /DISCARD/ :
  {
    libc.a ( * )
    libm.a ( * )
    libgcc.a ( * )
  }

  .ARM.attributes 0 : { *(.ARM.attributes) }
}

/*
*****************************************************************************
**

**  File        : LinkerScript.ld
**
**  Abstract    : Linker script for STM32F746NGHx Device with
**                1024KByte FLASH, 320KByte RAM
**
**                Set heap size, stack size and stack location according
**                to application requirements.
**
**                Set memory bank area and size if external memory is used.
**
**  Target      : STMicroelectronics STM32
**
**
**  Distribution: The file is distributed as is, without any warranty
**                of any kind.
**
**  (c)Copyright Ac6.
**  You may use this file as-is or modify it according to the needs of your
**  project. Distribution of this file (unmodified or modified) is not
**  permitted. Ac6 permit registered System Workbench for MCU users the
**  rights to distribute the assembled, compiled & linked contents of this
**  file as part of an application binary file, provided that it is built
**  using the System Workbench for MCU toolchain.
**
*****************************************************************************
*/

/* Entry Point */
ENTRY(Reset_Handler)

/* Highest address of the user mode stack */
_estack = 0x20050000;    /* end of RAM */
/* Generate a link error if heap and stack don't fit into RAM */
_Min_Heap_Size = 0x200;      /* required amount of heap  */
_Min_Stack_Size = 0x400; /* required amount of stack */

/* Specify the memory areas */
MEMORY
{
FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 1024K
RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 320K
}

/* Define output sections */
SECTIONS
{
  /* The startup code goes first into FLASH */
  .isr_vector :
  {
    . = ALIGN(4);
    KEEP(*(.isr_vector)) /* Startup code */
    . = ALIGN(4);
  } >FLASH

  /* The program code and other data goes into FLASH */
  .text :
  {
    . = ALIGN(4);
    *(.text)           /* .text sections (code) */
    *(.text*)          /* .text* sections (code) */
    *(.glue_7)         /* glue arm to thumb code */
    *(.glue_7t)        /* glue thumb to arm code */
    *(.eh_frame)

    KEEP (*(.init))
    KEEP (*(.fini))

    . = ALIGN(4);
    _etext = .;        /* define a global symbols at end of code */
  } >FLASH

  /* Constant data goes into FLASH */
  .rodata :
  {
    . = ALIGN(4);
    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
    . = ALIGN(4);
  } >FLASH

  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
  .ARM : {
    __exidx_start = .;
    *(.ARM.exidx*)
    __exidx_end = .;
  } >FLASH

  .preinit_array     :
  {
    PROVIDE_HIDDEN (__preinit_array_start = .);
    KEEP (*(.preinit_array*))
    PROVIDE_HIDDEN (__preinit_array_end = .);
  } >FLASH
  .init_array :
  {
    PROVIDE_HIDDEN (__init_array_start = .);
    KEEP (*(SORT(.init_array.*)))
    KEEP (*(.init_array*))
    PROVIDE_HIDDEN (__init_array_end = .);
  } >FLASH
  .fini_array :
  {
    PROVIDE_HIDDEN (__fini_array_start = .);
    KEEP (*(SORT(.fini_array.*)))
    KEEP (*(.fini_array*))
    PROVIDE_HIDDEN (__fini_array_end = .);
  } >FLASH

  /* used by the startup to initialize data */
  _sidata = LOADADDR(.data);

  /* Initialized data sections goes into RAM, load LMA copy after code */
  .data :
  {
    . = ALIGN(4);
    _sdata = .;        /* create a global symbol at data start */
    *(.data)           /* .data sections */
    *(.data*)          /* .data* sections */

    . = ALIGN(4);
    _edata = .;        /* define a global symbol at data end */
  } >RAM AT> FLASH

  /* Uninitialized data section */
  . = ALIGN(4);
  .bss :
  {
    /* This is used by the startup in order to initialize the .bss secion */
    _sbss = .;         /* define a global symbol at bss start */
    __bss_start__ = _sbss;
    *(.bss)
    *(.bss*)
    *(COMMON)

    . = ALIGN(4);
    _ebss = .;         /* define a global symbol at bss end */
    __bss_end__ = _ebss;
  } >RAM

  /* User_heap_stack section, used to check that there is enough RAM left */
  ._user_heap_stack :
  {
    . = ALIGN(8);
    PROVIDE ( end = . );
    PROVIDE ( _end = . );
    . = . + _Min_Heap_Size;
    . = . + _Min_Stack_Size;
    . = ALIGN(8);
  } >RAM

  /* Remove information from the standard libraries */
  /DISCARD/ :
  {
    libc.a ( * )
    libm.a ( * )
    libgcc.a ( * )
  }

  .ARM.attributes 0 : { *(.ARM.attributes) }
}


apps: app_test: fix entry function in ld scripts

ENTRY(test)

SECTIONS
{
	.text 0x00000000 :
	{
		*(.text)
		*(.text.*)
	}

	.rodata :
	{
		*(.rodata)
		*(.rodata1)
		*(.rodata.*)
	}

	.data :
	{
		*(.data)
		*(.data1)
		*(.data.*)
	}

	.bss :
	{
		*(.bss)
		*(.bss.*)
		*(.sbss)
		*(.sbss.*)
		*(COMMON)
	}
}

ENTRY(_start)

SECTIONS
{
	.text 0x00000000 :
	{
		*(.text)
		*(.text.*)
	}

	.rodata :
	{
		*(.rodata)
		*(.rodata1)
		*(.rodata.*)
	}

	.data :
	{
		*(.data)
		*(.data1)
		*(.data.*)
	}

	.bss :
	{
		*(.bss)
		*(.bss.*)
		*(.sbss)
		*(.sbss.*)
		*(COMMON)
	}
}


change name in custom script to be clearer that the section resides in flash

/* Default linker script, for normal executables */
OUTPUT_FORMAT("elf32-avr32", "elf32-avr32",
	      "elf32-avr32")
OUTPUT_ARCH(avr32:uc)
ENTRY(_start)
SEARCH_DIR("/home/toolsbuild/jenkins-knuth/workspace/avr32-gnu-toolchain/avr32-gnu-toolchain-win32_x86/avr32/lib");
/* Do we need any of these for elf?
   __DYNAMIC = 0;    */
MEMORY
{
    FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 512K-10K-8K
		FLASHRSVD (rxai!w) : ORIGIN = 0x80000000+512K-10K-8K, LENGTH = 10K
    CPUSRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0xFFFC
    USERPAGE : ORIGIN = 0x80800000, LENGTH = 512
    FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 512
    FLASHVAULT_FLASH_SIZE (r) : ORIGIN = 0x80800400, LENGTH = 8
    FLASHVAULT_RAM_SIZE (r) : ORIGIN = 0x80800408, LENGTH = 8
}
SECTIONS
{
  /* Read-only sections, merged into text segment: */
  PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
	/* Next line should not be necessary for use of flash for storing rules */
	/* .flash-rsvd : { *(.flash-rsvd) } >FLASHRSVD AT>FLASHRSVD */
  .interp         : { *(.interp) } >FLASH AT>FLASH
  .reset : {  *(.reset) } >FLASH AT>FLASH
  .hash           : { *(.hash) } >FLASH AT>FLASH
  .dynsym         : { *(.dynsym) } >FLASH AT>FLASH
  .dynstr         : { *(.dynstr) } >FLASH AT>FLASH
  .gnu.version    : { *(.gnu.version) } >FLASH AT>FLASH
  .gnu.version_d  : { *(.gnu.version_d) } >FLASH AT>FLASH
  .gnu.version_r  : { *(.gnu.version_r) } >FLASH AT>FLASH
  .rel.init       : { *(.rel.init) } >FLASH AT>FLASH
  .rela.init      : { *(.rela.init) } >FLASH AT>FLASH
  .rel.text       : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH
  .rela.text      : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH
  .rel.fini       : { *(.rel.fini) } >FLASH AT>FLASH
  .rela.fini      : { *(.rela.fini) } >FLASH AT>FLASH
  .rel.rodata     : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH
  .rela.rodata    : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH
  .rel.data.rel.ro   : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH
  .rela.data.rel.ro   : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH
  .rel.data       : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH
  .rela.data      : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH
  .rel.tdata	  : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH
  .rela.tdata	  : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH
  .rel.tbss	  : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH
  .rela.tbss	  : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH
  .rel.ctors      : { *(.rel.ctors) } >FLASH AT>FLASH
  .rela.ctors     : { *(.rela.ctors) } >FLASH AT>FLASH
  .rel.dtors      : { *(.rel.dtors) } >FLASH AT>FLASH
  .rela.dtors     : { *(.rela.dtors) } >FLASH AT>FLASH
  .rel.got        : { *(.rel.got) } >FLASH AT>FLASH
  .rela.got       : { *(.rela.got) } >FLASH AT>FLASH
  .rel.bss        : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH
  .rela.bss       : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH
  .rel.plt        : { *(.rel.plt) } >FLASH AT>FLASH
  .rela.plt       : { *(.rela.plt) } >FLASH AT>FLASH
  .init           :
  {
    KEEP (*(.init))
  } >FLASH AT>FLASH =0xd703d703
  .plt            : { *(.plt) } >FLASH AT>FLASH
  .text           :
  {
    *(.text .stub .text.* .gnu.linkonce.t.*)
    KEEP (*(.text.*personality*))
    /* .gnu.warning sections are handled specially by elf32.em.  */
    *(.gnu.warning)
  } >FLASH AT>FLASH =0xd703d703
  .fini           :
  {
    KEEP (*(.fini))
  } >FLASH AT>FLASH =0xd703d703
  PROVIDE (__etext = .);
  PROVIDE (_etext = .);
  PROVIDE (etext = .);
  .rodata         : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH
  .rodata1        : { *(.rodata1) } >FLASH AT>FLASH
  .eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH
  .eh_frame       : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH
  .gcc_except_table   : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH
  .dalign	: { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH
  PROVIDE (_data = ORIGIN(CPUSRAM));
  . = ORIGIN(CPUSRAM);
  /* Exception handling  */
  .eh_frame       : ONLY_IF_RW { KEEP (*(.eh_frame)) } >CPUSRAM AT>FLASH
  .gcc_except_table   : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >CPUSRAM AT>FLASH
  /* Thread Local Storage sections  */
  .tdata	  : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >CPUSRAM AT>FLASH
  .tbss		  : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >CPUSRAM
  /* Ensure the __preinit_array_start label is properly aligned.  We
     could instead move the label definition inside the section, but
     the linker would then create the section even if it turns out to
     be empty, which isn't pretty.  */
  PROVIDE (__preinit_array_start = ALIGN(32 / 8));
  .preinit_array     : { KEEP (*(.preinit_array)) } >CPUSRAM AT>FLASH
  PROVIDE (__preinit_array_end = .);
  PROVIDE (__init_array_start = .);
  .init_array     : { KEEP (*(.init_array)) } >CPUSRAM AT>FLASH
  PROVIDE (__init_array_end = .);
  PROVIDE (__fini_array_start = .);
  .fini_array     : { KEEP (*(.fini_array)) } >CPUSRAM AT>FLASH
  PROVIDE (__fini_array_end = .);
  .ctors          :
  {
    /* gcc uses crtbegin.o to find the start of
       the constructors, so we make sure it is
       first.  Because this is a wildcard, it
       doesn't matter if the user does not
       actually link against crtbegin.o; the
       linker won't look for a file to match a
       wildcard.  The wildcard also means that it
       doesn't matter which directory crtbegin.o
       is in.  */
    KEEP (*crtbegin*.o(.ctors))
    /* We don't want to include the .ctor section from
       from the crtend.o file until after the sorted ctors.
       The .ctor section from the crtend file contains the
       end of ctors marker and it must be last */
    KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
    KEEP (*(SORT(.ctors.*)))
    KEEP (*(.ctors))
  } >CPUSRAM AT>FLASH
  .dtors          :
  {
    KEEP (*crtbegin*.o(.dtors))
    KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
    KEEP (*(SORT(.dtors.*)))
    KEEP (*(.dtors))
  } >CPUSRAM AT>FLASH
  .jcr            : { KEEP (*(.jcr)) } >CPUSRAM AT>FLASH
  .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >CPUSRAM AT>FLASH
  .dynamic        : { *(.dynamic) } >CPUSRAM AT>FLASH
  .got            : { *(.got.plt) *(.got) } >CPUSRAM AT>FLASH
  .data           :
  {
    *(.data .data.* .gnu.linkonce.d.*)
    KEEP (*(.gnu.linkonce.d.*personality*))
    SORT(CONSTRUCTORS)
  } >CPUSRAM AT>FLASH
  .data1          : { *(.data1) } >CPUSRAM AT>FLASH
  .balign	: { . = ALIGN(8); _edata = .; } >CPUSRAM AT>FLASH
  _edata = .;
  PROVIDE (edata = .);
  __bss_start = .;
  .bss            :
  {
   *(.dynbss)
   *(.bss .bss.* .gnu.linkonce.b.*)
   *(COMMON)
   /* Align here to ensure that the .bss section occupies space up to
      _end.  Align after .bss to ensure correct alignment even if the
      .bss section disappears because there are no input sections.  */
   . = ALIGN(8);
  } >CPUSRAM
  . = ALIGN(8);
  _end = .;
  PROVIDE (end = .);
  __heap_start__ = ALIGN(8);
  . = ORIGIN(CPUSRAM) + LENGTH(CPUSRAM) - _stack_size;
  __heap_end__ = .;
  /* Stabs debugging sections.  */
  .stab          0 : { *(.stab) }
  .stabstr       0 : { *(.stabstr) }
  .stab.excl     0 : { *(.stab.excl) }
  .stab.exclstr  0 : { *(.stab.exclstr) }
  .stab.index    0 : { *(.stab.index) }
  .stab.indexstr 0 : { *(.stab.indexstr) }
  .comment       0 : { *(.comment) }
  /* DWARF debug sections.
     Symbols in the DWARF debugging sections are relative to the beginning
     of the section so we begin them at 0.  */
  /* DWARF 1 */
  .debug          0 : { *(.debug) }
  .line           0 : { *(.line) }
  /* GNU DWARF 1 extensions */
  .debug_srcinfo  0 : { *(.debug_srcinfo) }
  .debug_sfnames  0 : { *(.debug_sfnames) }
  /* DWARF 1.1 and DWARF 2 */
  .debug_aranges  0 : { *(.debug_aranges) }
  .debug_pubnames 0 : { *(.debug_pubnames) }
  /* DWARF 2 */
  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
  .debug_abbrev   0 : { *(.debug_abbrev) }
  .debug_line     0 : { *(.debug_line) }
  .debug_frame    0 : { *(.debug_frame) }
  .debug_str      0 : { *(.debug_str) }
  .debug_loc      0 : { *(.debug_loc) }
  .debug_macinfo  0 : { *(.debug_macinfo) }
  /* SGI/MIPS DWARF 2 extensions */
  .debug_weaknames 0 : { *(.debug_weaknames) }
  .debug_funcnames 0 : { *(.debug_funcnames) }
  .debug_typenames 0 : { *(.debug_typenames) }
  .debug_varnames  0 : { *(.debug_varnames) }
  .stack         ORIGIN(CPUSRAM) + LENGTH(CPUSRAM) - _stack_size :
  {
    _stack = .;
    *(.stack)
    . = _stack_size;
    _estack = .;
  } >CPUSRAM
  .userpage :  { *(.userpage .userpage.*)  } >USERPAGE AT>USERPAGE
  .factorypage :  { *(.factorypage .factorypage.*)  } >FACTORYPAGE AT>FACTORYPAGE
	.flash : { *(.flash .flash.*) } >FLASH AT>FLASH
	.flash-rsvd : { *(.flash-rsvd .flash-rsvd.*) } >FLASHRSVD AT>FLASHRSVD
  .flashvault_flash_size : { KEEP(*(.flashvault_flash_size .flashvault_flash_size.*)) } > FLASHVAULT_FLASH_SIZE
  .flashvault_ram_size   : { KEEP(*(.flashvault_ram_size .flashvault_ram_size.*)) } > FLASHVAULT_RAM_SIZE
  /DISCARD/ : { *(.note.GNU-stack) }
}

/* Default linker script, for normal executables */
OUTPUT_FORMAT("elf32-avr32", "elf32-avr32",
	      "elf32-avr32")
OUTPUT_ARCH(avr32:uc)
ENTRY(_start)
SEARCH_DIR("/home/toolsbuild/jenkins-knuth/workspace/avr32-gnu-toolchain/avr32-gnu-toolchain-win32_x86/avr32/lib");
/* Do we need any of these for elf?
   __DYNAMIC = 0;    */
MEMORY
{
    FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 512K-10K-8K
		RSVDFLASH (rxai!w) : ORIGIN = 0x80000000+512K-10K-8K, LENGTH = 10K
    CPUSRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0xFFFC
    USERPAGE : ORIGIN = 0x80800000, LENGTH = 512
    FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 512
    FLASHVAULT_FLASH_SIZE (r) : ORIGIN = 0x80800400, LENGTH = 8
    FLASHVAULT_RAM_SIZE (r) : ORIGIN = 0x80800408, LENGTH = 8
}
SECTIONS
{
  /* Read-only sections, merged into text segment: */
  PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
	/* Next line should not be necessary for use of flash for storing rules */
	/* .rsvd_flash : { *(.rsvd_flash) } >RSVDFLASH AT>RSVDFLASH */
  .interp         : { *(.interp) } >FLASH AT>FLASH
  .reset : {  *(.reset) } >FLASH AT>FLASH
  .hash           : { *(.hash) } >FLASH AT>FLASH
  .dynsym         : { *(.dynsym) } >FLASH AT>FLASH
  .dynstr         : { *(.dynstr) } >FLASH AT>FLASH
  .gnu.version    : { *(.gnu.version) } >FLASH AT>FLASH
  .gnu.version_d  : { *(.gnu.version_d) } >FLASH AT>FLASH
  .gnu.version_r  : { *(.gnu.version_r) } >FLASH AT>FLASH
  .rel.init       : { *(.rel.init) } >FLASH AT>FLASH
  .rela.init      : { *(.rela.init) } >FLASH AT>FLASH
  .rel.text       : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH
  .rela.text      : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH
  .rel.fini       : { *(.rel.fini) } >FLASH AT>FLASH
  .rela.fini      : { *(.rela.fini) } >FLASH AT>FLASH
  .rel.rodata     : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH
  .rela.rodata    : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH
  .rel.data.rel.ro   : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH
  .rela.data.rel.ro   : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH
  .rel.data       : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH
  .rela.data      : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH
  .rel.tdata	  : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH
  .rela.tdata	  : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH
  .rel.tbss	  : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH
  .rela.tbss	  : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH
  .rel.ctors      : { *(.rel.ctors) } >FLASH AT>FLASH
  .rela.ctors     : { *(.rela.ctors) } >FLASH AT>FLASH
  .rel.dtors      : { *(.rel.dtors) } >FLASH AT>FLASH
  .rela.dtors     : { *(.rela.dtors) } >FLASH AT>FLASH
  .rel.got        : { *(.rel.got) } >FLASH AT>FLASH
  .rela.got       : { *(.rela.got) } >FLASH AT>FLASH
  .rel.bss        : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH
  .rela.bss       : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH
  .rel.plt        : { *(.rel.plt) } >FLASH AT>FLASH
  .rela.plt       : { *(.rela.plt) } >FLASH AT>FLASH
  .init           :
  {
    KEEP (*(.init))
  } >FLASH AT>FLASH =0xd703d703
  .plt            : { *(.plt) } >FLASH AT>FLASH
  .text           :
  {
    *(.text .stub .text.* .gnu.linkonce.t.*)
    KEEP (*(.text.*personality*))
    /* .gnu.warning sections are handled specially by elf32.em.  */
    *(.gnu.warning)
  } >FLASH AT>FLASH =0xd703d703
  .fini           :
  {
    KEEP (*(.fini))
  } >FLASH AT>FLASH =0xd703d703
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