Added undefined Default_Handler assertion in stm32f100xx.ld

ASSERT(DEFINED(Default_Handler), "Default_Handler not defined!")

SECTIONS {

	__end_of_ram__ = ALIGN(ORIGIN(SRAM) + LENGTH(SRAM), 4) ;

	.cm3.isr_vector ORIGIN(FLASH) : {
		LONG(__end_of_ram__)
		/* ARM Thumb interwork requires the LSB to be set.	*
		 * (Can ld do this automatically?) 			*/
		LONG(_start 		| 1)
		PROVIDE(Default_Handler		= _start);
		PROVIDE(NMI_Handler 		= Default_Handler);
		PROVIDE(HardFault_Handler 	= Default_Handler);
 		PROVIDE(MemManage_Handler 	= Default_Handler);
		PROVIDE(BusFault_Handler 	= Default_Handler);
		PROVIDE(SVC_Handler		= Default_Handler);
		PROVIDE(PendSV_Handler 		= Default_Handler);
		PROVIDE(SysTick_Handler 	= Default_Handler);
		LONG(NMI_Handler 	| 1)
		LONG(HardFault_Handler 	| 1)
		LONG(MemManage_Handler 	| 1)
		LONG(BusFault_Handler 	| 1)
		/*LONG(UsageFault_Handler | 1)*/
		. = 0x2c ; /* Reserved */
		LONG(SVC_Handler 	| 1)
		/*LONG(DebugMon_Handler	| 1)*/
		. = 0x38 ; /* Reserved */
		LONG(PendSV_Handler	| 1)
		LONG(SysTick_Handler	| 1)

		. = 0x40 ;
		* (.irqsr_vector)

		. = 0x134 ;

	} > FLASH

	.text : {
		. = ALIGN(4) ;
		* (.text)
	} > FLASH

	__data_lma__ = . ;
	.data : AT(__data_lma__) {
		__data_vma__ = . ;
		* (.data)
	} > SRAM
	__init_data_end = . ;

	.bss : {
		* (.bss)
	} > SRAM

	__brk = . ;

	.stm32f100xx.peripherals_registers : {

		/* TODO: Add remaing registers */
		. = 0x10800 ;
		GPIOA_CRL 	= . + 0x00 ;
		GPIOA_CRH 	= . + 0x04 ;
		GPIOA_IDR 	= . + 0x08 ;
		GPIOA_ODR 	= . + 0x0C ;
		GPIOA_BSRR 	= . + 0x10 ;
		GPIOA_BRR	= . + 0x14 ;
		GPIOA_LCKR	= . + 0x18 ;

		. = 0x11000 ;
		GPIOC_CRL 	= . + 0x00 ;
		GPIOC_CRH 	= . + 0x04 ;
		GPIOC_IDR 	= . + 0x08 ;
		GPIOC_ODR 	= . + 0x0C ;
		GPIOC_BSRR 	= . + 0x10 ;
		GPIOC_BRR	= . + 0x14 ;
		GPIOC_LCKR	= . + 0x18 ;

		. = 0x21000 ;
		RCC_CR		= . + 0x00 ;
		RCC_CFGR	= . + 0x04 ;
		RCC_CIR		= . + 0x08 ;
		RCC_APB2RSTR	= . + 0x0C ;
		RCC_APB1RSTR 	= . + 0x10 ;
		RCC_AHBENR	= . + 0x14 ;
		RCC_APB2ENR	= . + 0x18 ;
		RCC_APB1ENR	= . + 0x1C ;
		RCC_BDCR	= . + 0x20 ;
		RCC_CSR		= . + 0x24 ;
		RCC_CFGR2	= . + 0x2C ;

	} > PERIPH

	.stm32f100xx.peripherals_bitband_alias 0x42000000 : {

		. 		= (RCC_APB2ENR 	- ORIGIN(PERIPH)) * 32 ;
		IOPCEN		=  . +  4 * 4 ;

	} > PERIPH
}

INPUT(hw.o)

SECTIONS {

	__end_of_ram__ = ALIGN(ORIGIN(SRAM) + LENGTH(SRAM), 4) ;

	.cm3.isr_vector ORIGIN(FLASH) : {
		LONG(__end_of_ram__)
		/* ARM Thumb interwork requires the LSB to be set.	*
		 * (Can ld do this automatically?) 			*/
		LONG(_start 		| 1)
		/*PROVIDE(Default_Handler		= _start);*/
		PROVIDE(NMI_Handler 		= Default_Handler);
		PROVIDE(HardFault_Handler 	= Default_Handler);
 		PROVIDE(MemManage_Handler 	= Default_Handler);
		PROVIDE(BusFault_Handler 	= Default_Handler);
		PROVIDE(SVC_Handler		= Default_Handler);
		PROVIDE(PendSV_Handler 		= Default_Handler);
		PROVIDE(SysTick_Handler 	= Default_Handler);
		LONG(NMI_Handler 	| 1)
		LONG(HardFault_Handler 	| 1)
		LONG(MemManage_Handler 	| 1)
		LONG(BusFault_Handler 	| 1)
		/*LONG(UsageFault_Handler | 1)*/
		. = 0x2c ; /* Reserved */
		LONG(SVC_Handler 	| 1)
		/*LONG(DebugMon_Handler	| 1)*/
		. = 0x38 ; /* Reserved */
		LONG(PendSV_Handler	| 1)
		LONG(SysTick_Handler	| 1)

		. = 0x40 ;
		* (.irqsr_vector)

		. = 0x134 ;

	} > FLASH

	.text : {
		. = ALIGN(4) ;
		* (.text)
	} > FLASH

	__data_lma__ = . ;
	.data : AT(__data_lma__) {
		__data_vma__ = . ;
		* (.data)
	} > SRAM
	__init_data_end = . ;

	.bss : {
		* (.bss)
	} > SRAM

	__brk = . ;

	.stm32f100xx.peripherals_registers : {

		/* TODO: Add remaing registers */
		. = 0x10800 ;
		GPIOA_CRL 	= . + 0x00 ;
		GPIOA_CRH 	= . + 0x04 ;
		GPIOA_IDR 	= . + 0x08 ;
		GPIOA_ODR 	= . + 0x0C ;
		GPIOA_BSRR 	= . + 0x10 ;
		GPIOA_BRR	= . + 0x14 ;
		GPIOA_LCKR	= . + 0x18 ;

		. = 0x11000 ;
		GPIOC_CRL 	= . + 0x00 ;
		GPIOC_CRH 	= . + 0x04 ;
		GPIOC_IDR 	= . + 0x08 ;
		GPIOC_ODR 	= . + 0x0C ;
		GPIOC_BSRR 	= . + 0x10 ;
		GPIOC_BRR	= . + 0x14 ;
		GPIOC_LCKR	= . + 0x18 ;

		. = 0x21000 ;
		RCC_CR		= . + 0x00 ;
		RCC_CFGR	= . + 0x04 ;
		RCC_CIR		= . + 0x08 ;
		RCC_APB2RSTR	= . + 0x0C ;
		RCC_APB1RSTR 	= . + 0x10 ;
		RCC_AHBENR	= . + 0x14 ;
		RCC_APB2ENR	= . + 0x18 ;
		RCC_APB1ENR	= . + 0x1C ;
		RCC_BDCR	= . + 0x20 ;
		RCC_CSR		= . + 0x24 ;
		RCC_CFGR2	= . + 0x2C ;

	} > PERIPH

	.stm32f100xx.peripherals_bitband_alias 0x42000000 : {

		. 		= (RCC_APB2ENR 	- ORIGIN(PERIPH)) * 32 ;
		IOPCEN		=  . +  4 * 4 ;

	} > PERIPH
}


A little clean nosys.lds

A little clean nosys.lds

PROVIDE(irq_dispatch = nosys);

PROVIDE(timer_init = nosys);
PROVIDE(timer_set = nosys);
PROVIDE(timer_close = nosys);
PROVIDE(timers_off = nosys);
PROVIDE(usleep = nosys);

PROVIDE(irq_dispatch = nosys);

PROVIDE(printk = nosys);

PROVIDE(timer_init = nosys);
PROVIDE(timer_set = nosys);
PROVIDE(timer_close = nosys);
PROVIDE(timers_off = nosys);
PROVIDE(usleep = nosys);

/* XXX remove from here. -- Eldar
PROVIDE(uart_init = nosys);
*/


Add a message for rt_header and _start

Add a message for rt_header and _start

/* Layout file for Tock process binaries that use libtock-rs. This currently
 * implements static linking, because we do not have a working
 * position-independent relocation solution. This layout works for all
 * platforms libtock-rs supports (ARM and RISC-V).
 *
 * This layout should be included by a script that defines the FLASH and RAM
 * regions for the board as well as TBF_HEADER_SIZE. Here is a an example
 * process binary linker script to get started:
 *     MEMORY {
 *         FLASH (X) : ORIGIN = 0x10000, LENGTH = 0x10000
 *         RAM   (W) : ORIGIN = 0x20000, LENGTH = 0x10000
 *     }
 *     TBF_HEADER_SIZE = 0x48;
 *     INCLUDE ../libtock-rs/layout.ld
 *
 * FLASH refers to the area the process binary occupies in flash, including TBF
 * headers. RAM refers to the area the process will have access to in memory.
 * STACK_SIZE is the size of the process' stack (this layout file may round the
 * stack size up for alignment purposes). TBF_HEADER_SIZE must correspond to the
 * --protected-region-size flag passed to elf2tab.
 *
 * This places the flash sections in the following order:
 *     1. .rt_header -- Constants used by runtime initialization.
 *     2. .text      -- Executable code.
 *     3. .rodata    -- Read-only global data (e.g. most string constants).
 *     4. .data      -- Read-write data, copied to RAM at runtime.
 *
 * This places the RAM sections in the following order:
 *     1. .stack -- The stack grows downward. Putting it first gives us
 *                  MPU-based overflow detection.
 *     2. .data  -- Read-write data, initialized by copying from flash.
 *     3. .bss   -- Zero-initialized read-write global data.
 *     4. Heap   -- The heap (optional) comes after .bss and grows upwards to
 *                  the process break.
 */

/* TODO: Should TBF_HEADER_SIZE be configured via a similar mechanism to the
 * stack size? We should see if that is possible.
 */

/* GNU LD looks for `start` as an entry point by default, while LLVM's LLD looks
 * for `_start`. To be compatible with both, we manually specify an entry point.
 */
ENTRY(start)

SECTIONS {
    /* Sections located in FLASH at runtime.
     */

    /* Add a section where elf2tab will place the TBF headers, so that the rest
     * of the FLASH sections are in the right locations. */
    .tbf_header (NOLOAD) : {
        . = . + TBF_HEADER_SIZE;
    } > FLASH

    /* Runtime header. Contains values the linker knows that the runtime needs
     * to look up.
     */
    .start ALIGN(4) : {
        /* We combine rt_header and _start into a single section. If we don't,
         * elf2tab does not parse the ELF file correctly for unknown reasons.
         */
        rt_header = .;
        LONG(start);
        LONG(ADDR(.bss) + SIZEOF(.bss)); /* Initial process break */
        LONG(_stack_top);
        LONG(SIZEOF(.data));
        LONG(LOADADDR(.data));
        LONG(ADDR(.data));
        LONG(SIZEOF(.bss));
        LONG(ADDR(.bss));

        *(.start)
    } > FLASH

    /* Text section -- the application's code. */
    .text ALIGN(4) : {
        *(.text.*)
    } > FLASH

    /* Read-only data section. Contains strings and other global constants. */
    .rodata ALIGN(4) : {
        *(.rodata.*)
        /* .data is placed after .rodata in flash. data_flash_start is used by
         * AT() to place .data in flash as well as in rt_header.
         */
        _data_flash_start = .;
    } > FLASH

    /* Sections located in RAM at runtime.
     */

    /* Reserve space for the stack. Aligned to a multiple of 16 bytes for the
     * RISC-V calling convention:
     * https://riscv.org/wp-content/uploads/2015/01/riscv-calling.pdf
     */
    .stack (NOLOAD) : {
	/* _sram_origin is used by elf2tab:
	 * https://github.com/tock/elf2tab/blob/master/src/main.rs#L301
	 */
        _sram_origin = .;
        KEEP(*(.stack_buffer))
        . = ALIGN(16);
        _stack_top = .;  /* Used in rt_header */
    } > RAM

    /* Read-write data section. This is deployed as part of FLASH but is copied
     * into RAM at runtime.
     */
    .data ALIGN(4) : AT(_data_flash_start) {
        data_ram_start = .;
        /* .sdata is the RISC-V small data section */
        *(.sdata .data)
        /* Pad to word alignment so the relocation loop can use word-sized
         * copies.
         */
        . = ALIGN(4);
    } > RAM

    /* BSS section. These are zero-initialized static variables. This section is
     * not copied from FLASH into RAM but rather directly initialized, and is
     * mainly put in this linker script so that we get an error if it overflows
     * the RAM region.
     */
    .bss ALIGN(4) (NOLOAD) : {
        /* .sbss is the RISC-V small data section */
        *(.sbss .bss.*)
    } > RAM

    _heap_start = ADDR(.bss) + SIZEOF(.bss);  /* Used by rt_header */

    /* Sections we do not need. */
    /DISCARD/ :
    {
      *(.ARM.exidx .eh_frame)
    }
}

/* Layout file for Tock process binaries that use libtock-rs. This currently
 * implements static linking, because we do not have a working
 * position-independent relocation solution. This layout works for all
 * platforms libtock-rs supports (ARM and RISC-V).
 *
 * This layout should be included by a script that defines the FLASH and RAM
 * regions for the board as well as TBF_HEADER_SIZE. Here is a an example
 * process binary linker script to get started:
 *     MEMORY {
 *         FLASH (X) : ORIGIN = 0x10000, LENGTH = 0x10000
 *         RAM   (W) : ORIGIN = 0x20000, LENGTH = 0x10000
 *     }
 *     TBF_HEADER_SIZE = 0x48;
 *     INCLUDE ../libtock-rs/layout.ld
 *
 * FLASH refers to the area the process binary occupies in flash, including TBF
 * headers. RAM refers to the area the process will have access to in memory.
 * STACK_SIZE is the size of the process' stack (this layout file may round the
 * stack size up for alignment purposes). TBF_HEADER_SIZE must correspond to the
 * --protected-region-size flag passed to elf2tab.
 *
 * This places the flash sections in the following order:
 *     1. .rt_header -- Constants used by runtime initialization.
 *     2. .text      -- Executable code.
 *     3. .rodata    -- Read-only global data (e.g. most string constants).
 *     4. .data      -- Read-write data, copied to RAM at runtime.
 *
 * This places the RAM sections in the following order:
 *     1. .stack -- The stack grows downward. Putting it first gives us
 *                  MPU-based overflow detection.
 *     2. .data  -- Read-write data, initialized by copying from flash.
 *     3. .bss   -- Zero-initialized read-write global data.
 *     4. Heap   -- The heap (optional) comes after .bss and grows upwards to
 *                  the process break.
 */

/* TODO: Should TBF_HEADER_SIZE be configured via a similar mechanism to the
 * stack size? We should see if that is possible.
 */

/* GNU LD looks for `start` as an entry point by default, while LLVM's LLD looks
 * for `_start`. To be compatible with both, we manually specify an entry point.
 */
ENTRY(start)

SECTIONS {
    /* Sections located in FLASH at runtime.
     */

    /* Add a section where elf2tab will place the TBF headers, so that the rest
     * of the FLASH sections are in the right locations. */
    .tbf_header (NOLOAD) : {
        . = . + TBF_HEADER_SIZE;
    } > FLASH

    /* Runtime header. Contains values the linker knows that the runtime needs
     * to look up.
     */
    .start ALIGN(4) : {
        rt_header = .;
        LONG(start);
        LONG(ADDR(.bss) + SIZEOF(.bss)); /* Initial process break */
        LONG(_stack_top);
        LONG(SIZEOF(.data));
        LONG(LOADADDR(.data));
        LONG(ADDR(.data));
        LONG(SIZEOF(.bss));
        LONG(ADDR(.bss));

        *(.start)
    } > FLASH

    /* Text section -- the application's code. */
    .text ALIGN(4) : {
        *(.text.*)
    } > FLASH

    /* Read-only data section. Contains strings and other global constants. */
    .rodata ALIGN(4) : {
        *(.rodata.*)
        /* .data is placed after .rodata in flash. data_flash_start is used by
         * AT() to place .data in flash as well as in rt_header.
         */
        _data_flash_start = .;
    } > FLASH

    /* Sections located in RAM at runtime.
     */

    /* Reserve space for the stack. Aligned to a multiple of 16 bytes for the
     * RISC-V calling convention:
     * https://riscv.org/wp-content/uploads/2015/01/riscv-calling.pdf
     */
    .stack (NOLOAD) : {
	/* _sram_origin is used by elf2tab:
	 * https://github.com/tock/elf2tab/blob/master/src/main.rs#L301
	 */
        _sram_origin = .;
        KEEP(*(.stack_buffer))
        . = ALIGN(16);
        _stack_top = .;  /* Used in rt_header */
    } > RAM

    /* Read-write data section. This is deployed as part of FLASH but is copied
     * into RAM at runtime.
     */
    .data ALIGN(4) : AT(_data_flash_start) {
        data_ram_start = .;
        /* .sdata is the RISC-V small data section */
        *(.sdata .data)
        /* Pad to word alignment so the relocation loop can use word-sized
         * copies.
         */
        . = ALIGN(4);
    } > RAM

    /* BSS section. These are zero-initialized static variables. This section is
     * not copied from FLASH into RAM but rather directly initialized, and is
     * mainly put in this linker script so that we get an error if it overflows
     * the RAM region.
     */
    .bss ALIGN(4) (NOLOAD) : {
        /* .sbss is the RISC-V small data section */
        *(.sbss .bss.*)
    } > RAM

    _heap_start = ADDR(.bss) + SIZEOF(.bss);  /* Used by rt_header */

    /* Sections we do not need. */
    /DISCARD/ :
    {
      *(.ARM.exidx .eh_frame)
    }
}


STM32H7 : use RAM instead of DTCMRAM (GCC_ARM toolchain)

/* Linker script to configure memory regions. */

#if !defined(MBED_APP_START)
  #define MBED_APP_START 0x08000000
#endif

#if !defined(MBED_APP_SIZE)
  #define MBED_APP_SIZE 2048K
#endif

#if !defined(MBED_BOOT_STACK_SIZE)
    #define MBED_BOOT_STACK_SIZE 0x400
#endif

STACK_SIZE = MBED_BOOT_STACK_SIZE;

M_CRASH_DATA_RAM_SIZE = 0x100;

MEMORY
{
  FLASH (rx)     : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
  DTCMRAM (rwx)  : ORIGIN = 0x20000298, LENGTH = 128K-0x298
  RAM (xrw)      : ORIGIN = 0x24000000, LENGTH = 512K
  RAM_D2 (xrw)   : ORIGIN = 0x30000000, LENGTH = 288K
  RAM_D3 (xrw)   : ORIGIN = 0x38000000, LENGTH = 64K
  ITCMRAM (xrw)  : ORIGIN = 0x00000000, LENGTH = 64K
}

/* Linker script to place sections and symbol values. Should be used together
 * with other linker script that defines memory regions FLASH and RAM.
 * It references following symbols, which must be defined in code:
 *   Reset_Handler : Entry of reset handler
 *
 * It defines following symbols, which code can use without definition:
 *   __exidx_start
 *   __exidx_end
 *   __etext
 *   __data_start__
 *   __preinit_array_start
 *   __preinit_array_end
 *   __init_array_start
 *   __init_array_end
 *   __fini_array_start
 *   __fini_array_end
 *   __data_end__
 *   __bss_start__
 *   __bss_end__
 *   __end__
 *   end
 *   __HeapLimit
 *   __StackLimit
 *   __StackTop
 *   __stack
 *   _estack
 */
ENTRY(Reset_Handler)

SECTIONS
{
    .text :
    {
        KEEP(*(.isr_vector))
        *(.text*)
        KEEP(*(.init))
        KEEP(*(.fini))

        /* .ctors */
        *crtbegin.o(.ctors)
        *crtbegin?.o(.ctors)
        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
        *(SORT(.ctors.*))
        *(.ctors)

        /* .dtors */
        *crtbegin.o(.dtors)
        *crtbegin?.o(.dtors)
        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
        *(SORT(.dtors.*))
        *(.dtors)

        *(.rodata*)

        KEEP(*(.eh_frame*))
    } > FLASH

    .ARM.extab :
    {
        *(.ARM.extab* .gnu.linkonce.armextab.*)
    } > FLASH

    __exidx_start = .;
    .ARM.exidx :
    {
        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
    } > FLASH
    __exidx_end = .;

    __etext = .;
    _sidata = .;

    .crash_data_ram :
    {
        . = ALIGN(8);
        __CRASH_DATA_RAM__ = .;
        __CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
        KEEP(*(.keep.crash_data_ram))
        *(.m_crash_data_ram)     /* This is a user defined section */
        . += M_CRASH_DATA_RAM_SIZE;
        . = ALIGN(8);
        __CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
    } > DTCMRAM

    .data : AT (__etext)
    {
        __data_start__ = .;
        _sdata = .;
        *(vtable)
        *(.data*)

        . = ALIGN(8);
        /* preinit data */
        PROVIDE_HIDDEN (__preinit_array_start = .);
        KEEP(*(.preinit_array))
        PROVIDE_HIDDEN (__preinit_array_end = .);

        . = ALIGN(8);
        /* init data */
        PROVIDE_HIDDEN (__init_array_start = .);
        KEEP(*(SORT(.init_array.*)))
        KEEP(*(.init_array))
        PROVIDE_HIDDEN (__init_array_end = .);

        . = ALIGN(8);
        /* finit data */
        PROVIDE_HIDDEN (__fini_array_start = .);
        KEEP(*(SORT(.fini_array.*)))
        KEEP(*(.fini_array))
        PROVIDE_HIDDEN (__fini_array_end = .);

        KEEP(*(.jcr*))
        . = ALIGN(8);
        /* All data end */
        __data_end__ = .;
        _edata = .;

    } > RAM

    .bss :
    {
        . = ALIGN(8);
        __bss_start__ = .;
        _sbss = .;
        *(.bss*)
        *(COMMON)
        . = ALIGN(8);
        __bss_end__ = .;
        _ebss = .;
    } > RAM

    .heap (COPY):
    {
        __end__ = .;
        end = __end__;
        *(.heap*)
        . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE;
        __HeapLimit = .;
    } > RAM

    /* .stack_dummy section doesn't contains any symbols. It is only
     * used for linker to calculate size of stack sections, and assign
     * values to stack symbols later */
    .stack_dummy (COPY):
    {
        *(.stack*)
    } > RAM

    /* Set stack top to end of RAM, and stack limit move down by
     * size of stack_dummy section */
    __StackTop = ORIGIN(RAM) + LENGTH(RAM);
    _estack = __StackTop;
    __StackLimit = __StackTop - STACK_SIZE;
    PROVIDE(__stack = __StackTop);

    /* Check if data + heap + stack exceeds RAM limit */
    ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")

    .lwip_sec (NOLOAD) : {
        . = ABSOLUTE(0x30040000);
        *(.RxDecripSection)

        . = ABSOLUTE(0x30040100);
        *(.TxDecripSection)

        . = ABSOLUTE(0x30040400);
        *(.RxArraySection)

        . = ABSOLUTE(0x30044000);
        *(.ethusbram)

    } >RAM_D2 AT> FLASH
}

/* Linker script to configure memory regions. */

#if !defined(MBED_APP_START)
  #define MBED_APP_START 0x08000000
#endif

#if !defined(MBED_APP_SIZE)
  #define MBED_APP_SIZE 2048K
#endif

#if !defined(MBED_BOOT_STACK_SIZE)
    #define MBED_BOOT_STACK_SIZE 0x400
#endif

STACK_SIZE = MBED_BOOT_STACK_SIZE;

M_CRASH_DATA_RAM_SIZE = 0x100;

MEMORY
{
  FLASH (rx)     : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
  DTCMRAM (rwx)  : ORIGIN = 0x20000000, LENGTH = 128K
  RAM (xrw)      : ORIGIN = 0x24000298, LENGTH = 512K - 0x298  /* end = 0x24080000 */
  RAM_D2 (xrw)   : ORIGIN = 0x30000000, LENGTH = 288K
  RAM_D3 (xrw)   : ORIGIN = 0x38000000, LENGTH = 64K
  ITCMRAM (xrw)  : ORIGIN = 0x00000000, LENGTH = 64K
}

/* Linker script to place sections and symbol values. Should be used together
 * with other linker script that defines memory regions FLASH and RAM.
 * It references following symbols, which must be defined in code:
 *   Reset_Handler : Entry of reset handler
 *
 * It defines following symbols, which code can use without definition:
 *   __exidx_start
 *   __exidx_end
 *   __etext
 *   __data_start__
 *   __preinit_array_start
 *   __preinit_array_end
 *   __init_array_start
 *   __init_array_end
 *   __fini_array_start
 *   __fini_array_end
 *   __data_end__
 *   __bss_start__
 *   __bss_end__
 *   __end__
 *   end
 *   __HeapLimit
 *   __StackLimit
 *   __StackTop
 *   __stack
 *   _estack
 */
ENTRY(Reset_Handler)

SECTIONS
{
    .text :
    {
        KEEP(*(.isr_vector))
        *(.text*)
        KEEP(*(.init))
        KEEP(*(.fini))

        /* .ctors */
        *crtbegin.o(.ctors)
        *crtbegin?.o(.ctors)
        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
        *(SORT(.ctors.*))
        *(.ctors)

        /* .dtors */
        *crtbegin.o(.dtors)
        *crtbegin?.o(.dtors)
        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
        *(SORT(.dtors.*))
        *(.dtors)

        *(.rodata*)

        KEEP(*(.eh_frame*))
    } > FLASH

    .ARM.extab :
    {
        *(.ARM.extab* .gnu.linkonce.armextab.*)
    } > FLASH

    __exidx_start = .;
    .ARM.exidx :
    {
        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
    } > FLASH
    __exidx_end = .;

    __etext = .;
    _sidata = .;

    .crash_data_ram :
    {
        . = ALIGN(8);
        __CRASH_DATA_RAM__ = .;
        __CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
        KEEP(*(.keep.crash_data_ram))
        *(.m_crash_data_ram)     /* This is a user defined section */
        . += M_CRASH_DATA_RAM_SIZE;
        . = ALIGN(8);
        __CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
    } > RAM

    .data : AT (__etext)
    {
        __data_start__ = .;
        _sdata = .;
        *(vtable)
        *(.data*)

        . = ALIGN(8);
        /* preinit data */
        PROVIDE_HIDDEN (__preinit_array_start = .);
        KEEP(*(.preinit_array))
        PROVIDE_HIDDEN (__preinit_array_end = .);

        . = ALIGN(8);
        /* init data */
        PROVIDE_HIDDEN (__init_array_start = .);
        KEEP(*(SORT(.init_array.*)))
        KEEP(*(.init_array))
        PROVIDE_HIDDEN (__init_array_end = .);

        . = ALIGN(8);
        /* finit data */
        PROVIDE_HIDDEN (__fini_array_start = .);
        KEEP(*(SORT(.fini_array.*)))
        KEEP(*(.fini_array))
        PROVIDE_HIDDEN (__fini_array_end = .);

        KEEP(*(.jcr*))
        . = ALIGN(8);
        /* All data end */
        __data_end__ = .;
        _edata = .;

    } > RAM

    .bss :
    {
        . = ALIGN(8);
        __bss_start__ = .;
        _sbss = .;
        *(.bss*)
        *(COMMON)
        . = ALIGN(8);
        __bss_end__ = .;
        _ebss = .;
    } > RAM

    .heap (COPY):
    {
        __end__ = .;
        end = __end__;
        *(.heap*)
        . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE;
        __HeapLimit = .;
    } > RAM

    /* .stack_dummy section doesn't contains any symbols. It is only
     * used for linker to calculate size of stack sections, and assign
     * values to stack symbols later */
    .stack_dummy (COPY):
    {
        *(.stack*)
    } > RAM

    /* Set stack top to end of RAM, and stack limit move down by
     * size of stack_dummy section */
    __StackTop = ORIGIN(RAM) + LENGTH(RAM);
    _estack = __StackTop;
    __StackLimit = __StackTop - STACK_SIZE;
    PROVIDE(__stack = __StackTop);

    /* Check if data + heap + stack exceeds RAM limit */
    ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")

    .lwip_sec (NOLOAD) : {
        . = ABSOLUTE(0x30040000);
        *(.RxDecripSection)

        . = ABSOLUTE(0x30040100);
        *(.TxDecripSection)

        . = ABSOLUTE(0x30040400);
        *(.RxArraySection)

        . = ABSOLUTE(0x30044000);
        *(.ethusbram)

    } >RAM_D2 AT> FLASH
}


Fix / clean up linker script for iCEbreaker (solves TFLM unit test inconsistency).

INCLUDE output_format.ld
ENTRY(_start)

__DYNAMIC = 0;

INCLUDE regions.ld

SECTIONS
{
    /* .data first to take precedence for explicit code we want in SRAM. */
    .data : AT (_erodata) /* Loaded in spiflash but runtime copied to SRAM. */
    {
        . = ALIGN(4);
        _fdata = .;  /* Start of .data in SRAM, copied to in crt0. */

        *(.ramtext .ramtext*)

        /*
         * We need to ensure .data starts at > 0, otherwise a pointer to the
         * first element of .data will be mistaken for a nullptr.
         */
        . = MAX(., 0x4);

        *(.data .data*)
        *(.sdata .sdata*)

        . = ALIGN(4);
        _edata = .;  /* End of .data in SRAM, end of copying in crt0. */
    } > sram

    /* Start .text at 4 byte boundary after gateware. */
    _ftext = (ORIGIN(spiflash) + 0x30000 + 3) & ~3;
    .text _ftext :
    {
        *(.text.start)
        *(.text .text*)
    } > spiflash

    .rodata :
    {
        *(.rodata .rodata*)
        *(.srodata .srodata*)

        . = ALIGN(4);
        _erodata = .;  /* Start of .data in spiflash, copied from in crt0. */
    } > spiflash

    .bss :
    {
        . = ALIGN(4);
        _fbss = .;  /* Start of zeroing in crt0. */

        *(.bss .bss*)
        *(.sbss .sbss*)

        *(COMMON)

        . = ALIGN(4);
        _ebss = .;  /* End of zeroing in crt0. */
    } > sram
}

PROVIDE(_fstack = ORIGIN(sram) + LENGTH(sram) - 4);

INCLUDE output_format.ld
ENTRY(_start)

__DYNAMIC = 0;

INCLUDE regions.ld

SECTIONS
{
	.reserved :
	{
		/* Space reserved for gateware, shouldn't step on it. */
		. += 0x30000;
	} > spiflash

	.text :
	{
		_ftext = .;
		*(.text.start)
		*(.text .stub .text.* .gnu.linkonce.t.*)
		_etext = .;
	} > spiflash

	.rodata :
	{
		. = ALIGN(8);
		_frodata = .;
		*(.rodata .rodata.* .gnu.linkonce.r.*)
		*(.rodata1)
		*(.srodata .srodata.*)
		. = ALIGN(8);
		_erodata = .;
	} > spiflash

	.data : AT (ADDR(.rodata) + SIZEOF (.rodata))
	{
		. = ALIGN(8);
		_fdata = .;
		*(.data .data.* .gnu.linkonce.d.*)
		*(.data1)
		*(.ramtext .ramtext.*)
		_gp = ALIGN(16);
		*(.sdata .sdata.* .gnu.linkonce.s.* .sdata2 .sdata2.*)
		_edata = ALIGN(16); /* Make sure _edata is >= _gp. */
	} > sram

	.bss : AT (ADDR(.data) + SIZEOF (.data))
	{
		. = ALIGN(16);
		_fbss = .;
		*(.dynsbss)
		*(.sbss .sbss.* .gnu.linkonce.sb.*)
		*(.scommon)
		*(.dynbss)
		*(.bss .bss.* .gnu.linkonce.b.*)
		*(COMMON)
		. = ALIGN(8);
		_ebss = .;
		_end = .;
	} > sram
}

PROVIDE(_fstack = ORIGIN(sram) + LENGTH(sram) - 4);


Linkscript: place .dynamic section into its own PT_DYNAMIC segment

OUTPUT_ARCH(aarch64)
ENTRY(_start)

PHDRS
{
	code   PT_LOAD FLAGS(5) /* Read | Execute */;
	rodata PT_LOAD FLAGS(4) /* Read */;
	data   PT_LOAD FLAGS(6) /* Read | Write */;
	dyn    PT_DYNAMIC;
}

SECTIONS
{
	/* =========== CODE section =========== */
	PROVIDE(__start__ = 0x0);
	. = __start__;

	.crt0 :
	{
		KEEP (*(.crt0))
		. = ALIGN(8);
	} :code

	.init :
	{
		KEEP( *(.init) )
		. = ALIGN(8);
	} :code

	.plt :
	{
		*(.plt)
		*(.iplt)
		. = ALIGN(8);
	} :code

	.text :
	{
		*(.text.unlikely .text.*_unlikely .text.unlikely.*)
		*(.text.exit .text.exit.*)
		*(.text.startup .text.startup.*)
		*(.text.hot .text.hot.*)
		*(.text .stub .text.* .gnu.linkonce.t.*)
		. = ALIGN(8);
	} :code

	.fini :
	{
		KEEP( *(.fini) )
		. = ALIGN(8);
	} :code

	/* =========== RODATA section =========== */
	. = ALIGN(0x1000);

	.rodata :
	{
		*(.rodata .rodata.* .gnu.linkonce.r.*)
		. = ALIGN(8);
	} :rodata

	.eh_frame_hdr     : { *(.eh_frame_hdr) *(.eh_frame_entry .eh_frame_entry.*) } :rodata
	.eh_frame         : ONLY_IF_RO { KEEP (*(.eh_frame)) *(.eh_frame.*) } :rodata
	.gcc_except_table : ONLY_IF_RO { *(.gcc_except_table .gcc_except_table.*) } :rodata
	.gnu_extab        : ONLY_IF_RO { *(.gnu_extab*) } : rodata

	.dynamic           : { *(.dynamic) } :rodata :dyn
	.interp            : { *(.interp) } :rodata
	.note.gnu.build-id : { *(.note.gnu.build-id) } :rodata
	.hash              : { *(.hash) } :rodata
	.gnu.hash          : { *(.gnu.hash) } :rodata
	.gnu.version       : { *(.gnu.version) } :rodata
	.gnu.version_d     : { *(.gnu.version_d) } :rodata
	.gnu.version_r     : { *(.gnu.version_r) } :rodata
	.dynsym            : { *(.dynsym) } :rodata
	.dynstr            : { *(.dynstr) } :rodata
	.rela.dyn          : { *(.rela.*) } :rodata

	/* =========== DATA section =========== */
	. = ALIGN(0x1000);

	.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) *(.eh_frame.*) } :data
	.gcc_except_table : ONLY_IF_RW { *(.gcc_except_table .gcc_except_table.*) } :data
	.gnu_extab : ONLY_IF_RW { *(.gnu_extab*) } : data
	.exception_ranges : ONLY_IF_RW { *(.exception_ranges .exception_ranges*) } :data

	.tdata ALIGN(8) :
	{
		__tdata_lma = .;
		*(.tdata .tdata.* .gnu.linkonce.td.*)
		. = ALIGN(8);
		__tdata_lma_end = .;
	} :data

	.tbss ALIGN(8) :
	{
		*(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
		. = ALIGN(8);
	} :data

	.preinit_array ALIGN(8) :
	{
		PROVIDE (__preinit_array_start = .);
		KEEP (*(.preinit_array))
		PROVIDE (__preinit_array_end = .);
	} :data

	.init_array ALIGN(8) :
	{
		PROVIDE (__init_array_start = .);
		KEEP (*(SORT(.init_array.*)))
		KEEP (*(.init_array))
		PROVIDE (__init_array_end = .);
	} :data

	.fini_array ALIGN(8) :
	{
		PROVIDE (__fini_array_start = .);
		KEEP (*(.fini_array))
		KEEP (*(SORT(.fini_array.*)))
		PROVIDE (__fini_array_end = .);
	} :data

	.ctors ALIGN(8) :
	{
		KEEP (*crtbegin.o(.ctors)) /* MUST be first -- GCC requires it */
		KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
		KEEP (*(SORT(.ctors.*)))
		KEEP (*(.ctors))
	} :data

	.dtors ALIGN(8) :
	{
		KEEP (*crtbegin.o(.dtors))
		KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
		KEEP (*(SORT(.dtors.*)))
		KEEP (*(.dtors))
	} :data

	__got_start__ = .;

	.got            : { *(.got) *(.igot) } :data
	.got.plt        : { *(.got.plt)  *(.igot.plt) } :data

	__got_end__ = .;

	.data ALIGN(8) :
	{
		*(.data .data.* .gnu.linkonce.d.*)
		SORT(CONSTRUCTORS)
	} :data

	__bss_start__ = .;
	.bss ALIGN(8) :
	{
		*(.dynbss)
		*(.bss .bss.* .gnu.linkonce.b.*)
		*(COMMON)
		. = ALIGN(8);

		/* Reserve space for the TLS segment of the main thread */
		__tls_start = .;
		. += + SIZEOF(.tdata) + SIZEOF(.tbss);
		__tls_end = .;
	} : data
	__bss_end__ = .;

	__end__ = ABSOLUTE(.) ;

	/* ==================
	   ==== Metadata ====
	   ================== */

	/* Discard sections that difficult post-processing */
	/DISCARD/ : { *(.group .comment .note) }

	/* Stabs debugging sections. */
	.stab          0 : { *(.stab) }
	.stabstr       0 : { *(.stabstr) }
	.stab.excl     0 : { *(.stab.excl) }
	.stab.exclstr  0 : { *(.stab.exclstr) }
	.stab.index    0 : { *(.stab.index) }
	.stab.indexstr 0 : { *(.stab.indexstr) }

	/* DWARF debug sections.
	   Symbols in the DWARF debugging sections are relative to the beginning
	   of the section so we begin them at 0. */

	/* DWARF 1 */
	.debug          0 : { *(.debug) }
	.line           0 : { *(.line) }

	/* GNU DWARF 1 extensions */
	.debug_srcinfo  0 : { *(.debug_srcinfo) }
	.debug_sfnames  0 : { *(.debug_sfnames) }

	/* DWARF 1.1 and DWARF 2 */
	.debug_aranges  0 : { *(.debug_aranges) }
	.debug_pubnames 0 : { *(.debug_pubnames) }

	/* DWARF 2 */
	.debug_info     0 : { *(.debug_info) }
	.debug_abbrev   0 : { *(.debug_abbrev) }
	.debug_line     0 : { *(.debug_line) }
	.debug_frame    0 : { *(.debug_frame) }
	.debug_str      0 : { *(.debug_str) }
	.debug_loc      0 : { *(.debug_loc) }
	.debug_macinfo  0 : { *(.debug_macinfo) }
}

OUTPUT_ARCH(aarch64)
ENTRY(_start)

PHDRS
{
	code   PT_LOAD FLAGS(5) /* Read | Execute */;
	rodata PT_LOAD FLAGS(4) /* Read */;
	data   PT_LOAD FLAGS(6) /* Read | Write */;
}

SECTIONS
{
	/* =========== CODE section =========== */
	PROVIDE(__start__ = 0x0);
	. = __start__;

	.crt0 :
	{
		KEEP (*(.crt0))
		. = ALIGN(8);
	} :code

	.init :
	{
		KEEP( *(.init) )
		. = ALIGN(8);
	} :code

	.plt :
	{
		*(.plt)
		*(.iplt)
		. = ALIGN(8);
	} :code

	.text :
	{
		*(.text.unlikely .text.*_unlikely .text.unlikely.*)
		*(.text.exit .text.exit.*)
		*(.text.startup .text.startup.*)
		*(.text.hot .text.hot.*)
		*(.text .stub .text.* .gnu.linkonce.t.*)
		. = ALIGN(8);
	} :code

	.fini :
	{
		KEEP( *(.fini) )
		. = ALIGN(8);
	} :code

	/* =========== RODATA section =========== */
	. = ALIGN(0x1000);

	.rodata :
	{
		*(.rodata .rodata.* .gnu.linkonce.r.*)
		. = ALIGN(8);
	} :rodata

	.eh_frame_hdr     : { *(.eh_frame_hdr) *(.eh_frame_entry .eh_frame_entry.*) } :rodata
	.eh_frame         : ONLY_IF_RO { KEEP (*(.eh_frame)) *(.eh_frame.*) } :rodata
	.gcc_except_table : ONLY_IF_RO { *(.gcc_except_table .gcc_except_table.*) } :rodata
	.gnu_extab        : ONLY_IF_RO { *(.gnu_extab*) } : rodata

	.interp            : { *(.interp) } :rodata
	.note.gnu.build-id : { *(.note.gnu.build-id) } :rodata
	.hash              : { *(.hash) } :rodata
	.gnu.hash          : { *(.gnu.hash) } :rodata
	.gnu.version       : { *(.gnu.version) } :rodata
	.gnu.version_d     : { *(.gnu.version_d) } :rodata
	.gnu.version_r     : { *(.gnu.version_r) } :rodata
	.dynsym            : { *(.dynsym) } :rodata
	.dynstr            : { *(.dynstr) } :rodata
	.rela.dyn          : { *(.rela.*) } :rodata

	/* =========== DATA section =========== */
	. = ALIGN(0x1000);

	.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) *(.eh_frame.*) } :data
	.gcc_except_table : ONLY_IF_RW { *(.gcc_except_table .gcc_except_table.*) } :data
	.gnu_extab : ONLY_IF_RW { *(.gnu_extab*) } : data
	.exception_ranges : ONLY_IF_RW { *(.exception_ranges .exception_ranges*) } :data

	.tdata ALIGN(8) :
	{
		__tdata_lma = .;
		*(.tdata .tdata.* .gnu.linkonce.td.*)
		. = ALIGN(8);
		__tdata_lma_end = .;
	} :data

	.tbss ALIGN(8) :
	{
		*(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
		. = ALIGN(8);
	} :data

	.preinit_array ALIGN(8) :
	{
		PROVIDE (__preinit_array_start = .);
		KEEP (*(.preinit_array))
		PROVIDE (__preinit_array_end = .);
	} :data

	.init_array ALIGN(8) :
	{
		PROVIDE (__init_array_start = .);
		KEEP (*(SORT(.init_array.*)))
		KEEP (*(.init_array))
		PROVIDE (__init_array_end = .);
	} :data

	.fini_array ALIGN(8) :
	{
		PROVIDE (__fini_array_start = .);
		KEEP (*(.fini_array))
		KEEP (*(SORT(.fini_array.*)))
		PROVIDE (__fini_array_end = .);
	} :data

	.ctors ALIGN(8) :
	{
		KEEP (*crtbegin.o(.ctors)) /* MUST be first -- GCC requires it */
		KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
		KEEP (*(SORT(.ctors.*)))
		KEEP (*(.ctors))
	} :data

	.dtors ALIGN(8) :
	{
		KEEP (*crtbegin.o(.dtors))
		KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
		KEEP (*(SORT(.dtors.*)))
		KEEP (*(.dtors))
	} :data

	__got_start__ = .;

	.got            : { *(.got) *(.igot) } :data
	.got.plt        : { *(.got.plt)  *(.igot.plt) } :data

	__got_end__ = .;

	.data ALIGN(8) :
	{
		*(.data .data.* .gnu.linkonce.d.*)
		SORT(CONSTRUCTORS)
	} :data

	.dynamic ALIGN(8) :
	{
		*(.dynamic)
	} :data

	__bss_start__ = .;
	.bss ALIGN(8) :
	{
		*(.dynbss)
		*(.bss .bss.* .gnu.linkonce.b.*)
		*(COMMON)
		. = ALIGN(8);

		/* Reserve space for the TLS segment of the main thread */
		__tls_start = .;
		. += + SIZEOF(.tdata) + SIZEOF(.tbss);
		__tls_end = .;
	} : data
	__bss_end__ = .;

	__end__ = ABSOLUTE(.) ;

	/* ==================
	   ==== Metadata ====
	   ================== */

	/* Discard sections that difficult post-processing */
	/DISCARD/ : { *(.group .comment .note) }

	/* Stabs debugging sections. */
	.stab          0 : { *(.stab) }
	.stabstr       0 : { *(.stabstr) }
	.stab.excl     0 : { *(.stab.excl) }
	.stab.exclstr  0 : { *(.stab.exclstr) }
	.stab.index    0 : { *(.stab.index) }
	.stab.indexstr 0 : { *(.stab.indexstr) }

	/* DWARF debug sections.
	   Symbols in the DWARF debugging sections are relative to the beginning
	   of the section so we begin them at 0. */

	/* DWARF 1 */
	.debug          0 : { *(.debug) }
	.line           0 : { *(.line) }

	/* GNU DWARF 1 extensions */
	.debug_srcinfo  0 : { *(.debug_srcinfo) }
	.debug_sfnames  0 : { *(.debug_sfnames) }

	/* DWARF 1.1 and DWARF 2 */
	.debug_aranges  0 : { *(.debug_aranges) }
	.debug_pubnames 0 : { *(.debug_pubnames) }

	/* DWARF 2 */
	.debug_info     0 : { *(.debug_info) }
	.debug_abbrev   0 : { *(.debug_abbrev) }
	.debug_line     0 : { *(.debug_line) }
	.debug_frame    0 : { *(.debug_frame) }
	.debug_str      0 : { *(.debug_str) }
	.debug_loc      0 : { *(.debug_loc) }
	.debug_macinfo  0 : { *(.debug_macinfo) }
}


update c3 bootloader ld addr info

update c3 bootloader ld addr info

/** Simplified memory map for the bootloader.
 *  Make sure the bootloader can load into main memory without overwriting itself.
 *  We put 2nd bootloader in the high address space (before ROM stack/data/bss).
 *  See memory usage for ROM bootloader at the end of this file.
 */

MEMORY
{
  iram_seg (RWX) :                  org = 0x403CE000, len = 0x2000
  iram_loader_seg (RWX) :           org = 0x403D0000, len = 0x6000
  dram_seg (RW) :                   org = 0x3FCD6000, len = 0x4000
}

/* Default entry point: */
ENTRY(call_start_cpu0);

SECTIONS
{

  .iram_loader.text :
  {
    . = ALIGN (16);
    _loader_text_start = ABSOLUTE(.);
    *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
     *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
    *liblog.a:(.literal .text .literal.* .text.*)
    *libgcc.a:(.literal .text .literal.* .text.*)
    *libbootloader_support.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
    *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable)
    *libbootloader_support.a:bootloader_efuse_esp32c3.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:bootloader_panic.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:esp_image_format.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:flash_encrypt.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:flash_partitions.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:secure_boot.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
    *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
    *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
    *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
    *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
    *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
    *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
    *libefuse.a:*.*(.literal .text .literal.* .text.*)
    *(.fini.literal)
    *(.fini)
    *(.gnu.version)
    _loader_text_end = ABSOLUTE(.);
  } > iram_loader_seg

  .iram.text :
  {
    . = ALIGN (16);
    *(.entry.text)
    *(.init.literal)
    *(.init)
  } > iram_seg

  /* Shared RAM */
  .dram0.bss (NOLOAD) :
  {
    . = ALIGN (8);
    _dram_start = ABSOLUTE(.);
    _bss_start = ABSOLUTE(.);
    *(.dynsbss)
    *(.sbss)
    *(.sbss.*)
    *(.gnu.linkonce.sb.*)
    *(.scommon)
    *(.sbss2)
    *(.sbss2.*)
    *(.gnu.linkonce.sb2.*)
    *(.dynbss)
    *(.bss)
    *(.bss.*)
    *(.gnu.linkonce.b.*)
    *(COMMON)
    . = ALIGN (8);
    _bss_end = ABSOLUTE(.);
  } > dram_seg

  .dram0.data :
  {
    _data_start = ABSOLUTE(.);
    *(.data)
    *(.data.*)
    *(.gnu.linkonce.d.*)
    *(.data1)
    *(.sdata)
    *(.sdata.*)
    *(.gnu.linkonce.s.*)
    *(.sdata2)
    *(.sdata2.*)
    *(.gnu.linkonce.s2.*)
    *(.jcr)
    _data_end = ABSOLUTE(.);
  } > dram_seg

  .dram0.rodata :
  {
    _rodata_start = ABSOLUTE(.);
    *(.rodata)
    *(.rodata.*)
    *(.gnu.linkonce.r.*)
    *(.rodata1)
    __XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
    *(.xt_except_table)
    *(.gcc_except_table)
    *(.gnu.linkonce.e.*)
    *(.gnu.version_r)
    *(.eh_frame)
    . = (. + 3) & ~ 3;
    /* C++ constructor and destructor tables, properly ordered: */
    __init_array_start = ABSOLUTE(.);
    KEEP (*crtbegin.*(.ctors))
    KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors))
    KEEP (*(SORT(.ctors.*)))
    KEEP (*(.ctors))
    __init_array_end = ABSOLUTE(.);
    KEEP (*crtbegin.*(.dtors))
    KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
    KEEP (*(SORT(.dtors.*)))
    KEEP (*(.dtors))
    /*  C++ exception handlers table:  */
    __XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
    *(.xt_except_desc)
    *(.gnu.linkonce.h.*)
    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
    *(.xt_except_desc_end)
    *(.dynamic)
    *(.gnu.version_d)
    _rodata_end = ABSOLUTE(.);
    /* Literals are also RO data. */
    _lit4_start = ABSOLUTE(.);
    *(*.lit4)
    *(.lit4.*)
    *(.gnu.linkonce.lit4.*)
    _lit4_end = ABSOLUTE(.);
    . = ALIGN(4);
    _dram_end = ABSOLUTE(.);
  } > dram_seg

  .iram.text :
  {
    _stext = .;
    _text_start = ABSOLUTE(.);
    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
    *(.iram .iram.*) /* catch stray IRAM_ATTR */
    *(.fini.literal)
    *(.fini)
    *(.gnu.version)

    /** CPU will try to prefetch up to 16 bytes of
      * of instructions. This means that any configuration (e.g. MMU, PMS) must allow
      * safe access to up to 16 bytes after the last real instruction, add
      * dummy bytes to ensure this
      */
    . += 16;

    _text_end = ABSOLUTE(.);
    _etext = .;
  } > iram_seg

}

/**
 *  Appendix: Memory Usage of ROM bootloader
 *
 *  +--------+--------------+------+ 0x3FCC_AE00
 *  |        ^              |
 *  |        |              |
 *  |        | data/bss     |
 *  |        |              |
 *  |        v              |
 *  +------------------------------+ 0x3FCD_C710
 *  |        ^              |
 *  |        |              |
 *  |        | stack        |
 *  |        |              |
 *  |        v              |
 *  +------------------------------+ 0x3FCD_E710
 */

/** Simplified memory map for the bootloader.
 *  Make sure the bootloader can load into main memory without overwriting itself.
 *  We put 2nd bootloader in the high address space (before ROM stack/data/bss).
 *  See memory usage for ROM bootloader at the end of this file.
 */

MEMORY
{
  iram_seg (RWX) :                  org = 0x403CE000, len = 0x2000
  iram_loader_seg (RWX) :           org = 0x403D0000, len = 0x6000
  dram_seg (RW) :                   org = 0x3FCD6000, len = 0x4000
}

/* Default entry point: */
ENTRY(call_start_cpu0);

SECTIONS
{

  .iram_loader.text :
  {
    . = ALIGN (16);
    _loader_text_start = ABSOLUTE(.);
    *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
     *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
    *liblog.a:(.literal .text .literal.* .text.*)
    *libgcc.a:(.literal .text .literal.* .text.*)
    *libbootloader_support.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
    *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable)
    *libbootloader_support.a:bootloader_efuse_esp32c3.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:bootloader_panic.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:esp_image_format.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:flash_encrypt.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:flash_partitions.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:secure_boot.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*)
    *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
    *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
    *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
    *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
    *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
    *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
    *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
    *libefuse.a:*.*(.literal .text .literal.* .text.*)
    *(.fini.literal)
    *(.fini)
    *(.gnu.version)
    _loader_text_end = ABSOLUTE(.);
  } > iram_loader_seg

  .iram.text :
  {
    . = ALIGN (16);
    *(.entry.text)
    *(.init.literal)
    *(.init)
  } > iram_seg

  /* Shared RAM */
  .dram0.bss (NOLOAD) :
  {
    . = ALIGN (8);
    _dram_start = ABSOLUTE(.);
    _bss_start = ABSOLUTE(.);
    *(.dynsbss)
    *(.sbss)
    *(.sbss.*)
    *(.gnu.linkonce.sb.*)
    *(.scommon)
    *(.sbss2)
    *(.sbss2.*)
    *(.gnu.linkonce.sb2.*)
    *(.dynbss)
    *(.bss)
    *(.bss.*)
    *(.gnu.linkonce.b.*)
    *(COMMON)
    . = ALIGN (8);
    _bss_end = ABSOLUTE(.);
  } > dram_seg

  .dram0.data :
  {
    _data_start = ABSOLUTE(.);
    *(.data)
    *(.data.*)
    *(.gnu.linkonce.d.*)
    *(.data1)
    *(.sdata)
    *(.sdata.*)
    *(.gnu.linkonce.s.*)
    *(.sdata2)
    *(.sdata2.*)
    *(.gnu.linkonce.s2.*)
    *(.jcr)
    _data_end = ABSOLUTE(.);
  } > dram_seg

  .dram0.rodata :
  {
    _rodata_start = ABSOLUTE(.);
    *(.rodata)
    *(.rodata.*)
    *(.gnu.linkonce.r.*)
    *(.rodata1)
    __XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
    *(.xt_except_table)
    *(.gcc_except_table)
    *(.gnu.linkonce.e.*)
    *(.gnu.version_r)
    *(.eh_frame)
    . = (. + 3) & ~ 3;
    /* C++ constructor and destructor tables, properly ordered: */
    __init_array_start = ABSOLUTE(.);
    KEEP (*crtbegin.*(.ctors))
    KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors))
    KEEP (*(SORT(.ctors.*)))
    KEEP (*(.ctors))
    __init_array_end = ABSOLUTE(.);
    KEEP (*crtbegin.*(.dtors))
    KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
    KEEP (*(SORT(.dtors.*)))
    KEEP (*(.dtors))
    /*  C++ exception handlers table:  */
    __XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
    *(.xt_except_desc)
    *(.gnu.linkonce.h.*)
    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
    *(.xt_except_desc_end)
    *(.dynamic)
    *(.gnu.version_d)
    _rodata_end = ABSOLUTE(.);
    /* Literals are also RO data. */
    _lit4_start = ABSOLUTE(.);
    *(*.lit4)
    *(.lit4.*)
    *(.gnu.linkonce.lit4.*)
    _lit4_end = ABSOLUTE(.);
    . = ALIGN(4);
    _dram_end = ABSOLUTE(.);
  } > dram_seg

  .iram.text :
  {
    _stext = .;
    _text_start = ABSOLUTE(.);
    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
    *(.iram .iram.*) /* catch stray IRAM_ATTR */
    *(.fini.literal)
    *(.fini)
    *(.gnu.version)

    /** CPU will try to prefetch up to 16 bytes of
      * of instructions. This means that any configuration (e.g. MMU, PMS) must allow
      * safe access to up to 16 bytes after the last real instruction, add
      * dummy bytes to ensure this
      */
    . += 16;

    _text_end = ABSOLUTE(.);
    _etext = .;
  } > iram_seg

}

/**
 *  Appendix: Memory Usage of ROM bootloader
 *
 *  +--------+--------------+------+ 0x3FCC_B000
 *  |        ^              |
 *  |        |              |
 *  |        | data/bss     |
 *  |        |              |
 *  |        v              |
 *  +------------------------------+ 0x3FCD_C910
 *  |        ^              |
 *  |        |              |
 *  |        | stack        |
 *  |        |              |
 *  |        v              |
 *  +------------------------------+ 0x3FCD_E910
 */


update ld add *(.sdk.version)

update ld add *(.sdk.version)

/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* Linker Script for ld -N */

PHDRS
{
  dport0_0_phdr PT_LOAD;
  dram0_0_phdr PT_LOAD;
  dram0_0_bss_phdr PT_LOAD;
  iram1_0_phdr PT_LOAD;
  irom0_0_phdr PT_LOAD;
}

/*  Default entry point:  */
ENTRY(call_user_start)
EXTERN(_DebugExceptionVector)
EXTERN(_DoubleExceptionVector)
EXTERN(_KernelExceptionVector)
EXTERN(_NMIExceptionVector)
EXTERN(_UserExceptionVector)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wb_base = 0x00000110;
_memmap_cacheattr_wt_base = 0x00000110;
_memmap_cacheattr_bp_base = 0x00000220;
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
_memmap_cacheattr_wb_trapnull = 0x2222211F;
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
_memmap_cacheattr_wb_allvalid = 0x22222112;
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_allvalid = 0x22222222;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);

SECTIONS
{

  .dport0.rodata : ALIGN(4)
  {
    _dport0_rodata_start = ABSOLUTE(.);
    *(.dport0.rodata)
    *(.dport.rodata)
    _dport0_rodata_end = ABSOLUTE(.);
  } >dport0_0_seg :dport0_0_phdr

  .dport0.literal : ALIGN(4)
  {
    _dport0_literal_start = ABSOLUTE(.);
    *(.dport0.literal)
    *(.dport.literal)
    _dport0_literal_end = ABSOLUTE(.);
  } >dport0_0_seg :dport0_0_phdr

  .dport0.data : ALIGN(4)
  {
    _dport0_data_start = ABSOLUTE(.);
    *(.dport0.data)
    *(.dport.data)
    _dport0_data_end = ABSOLUTE(.);
  } >dport0_0_seg :dport0_0_phdr

  .data : ALIGN(4)
  {
    _data_start = ABSOLUTE(.);
    *(.data)
    *(.data.*)
    *(.gnu.linkonce.d.*)
    *(.data1)
    *(.sdata)
    *(.sdata.*)
    *(.gnu.linkonce.s.*)
    *(.sdata2)
    *(.sdata2.*)
    *(.gnu.linkonce.s2.*)
    *(.jcr)
    _data_end = ABSOLUTE(.);
  } >dram0_0_seg :dram0_0_phdr

  .rodata : ALIGN(4)
  {
    _rodata_start = ABSOLUTE(.);
    *(.sdk.version)
    *(.rodata)
    *(.rodata.*)
    *(.gnu.linkonce.r.*)
    *(.rodata1)
    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
    *(.xt_except_table)
    *(.gcc_except_table)
    *(.gnu.linkonce.e.*)
    *(.gnu.version_r)
    *(.eh_frame)
    . = (. + 3) & ~ 3;
    /*  C++ constructor and destructor tables, properly ordered:  */
    __init_array_start = ABSOLUTE(.);
    KEEP (*crtbegin.o(.ctors))
    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
    KEEP (*(SORT(.ctors.*)))
    KEEP (*(.ctors))
    __init_array_end = ABSOLUTE(.);
    KEEP (*crtbegin.o(.dtors))
    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
    KEEP (*(SORT(.dtors.*)))
    KEEP (*(.dtors))
    /*  C++ exception handlers table:  */
    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
    *(.xt_except_desc)
    *(.gnu.linkonce.h.*)
    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
    *(.xt_except_desc_end)
    *(.dynamic)
    *(.gnu.version_d)
    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
    _bss_table_start = ABSOLUTE(.);
    LONG(_bss_start)
    LONG(_bss_end)
    _bss_table_end = ABSOLUTE(.);
    _rodata_end = ABSOLUTE(.);
  } >dram0_0_seg :dram0_0_phdr

  .bss ALIGN(8) (NOLOAD) : ALIGN(4)
  {
    . = ALIGN (8);
    _bss_start = ABSOLUTE(.);
    *(.dynsbss)
    *(.sbss)
    *(.sbss.*)
    *(.gnu.linkonce.sb.*)
    *(.scommon)
    *(.sbss2)
    *(.sbss2.*)
    *(.gnu.linkonce.sb2.*)
    *(.dynbss)
    *(.bss)
    *(.bss.*)
    *(.gnu.linkonce.b.*)
    *(COMMON)
    . = ALIGN (8);
    _bss_end = ABSOLUTE(.);
    _heap_start = ABSOLUTE(.);
/*    _stack_sentry = ALIGN(0x8); */
  } >dram0_0_seg :dram0_0_bss_phdr
/* __stack = 0x3ffc8000; */

  .irom0.text : ALIGN(4)
  {
    _irom0_text_start = ABSOLUTE(.);
    *core_esp8266_*.o(.literal*, .text*)
    *spiffs*.o(.literal*, .text*)
    *.cpp.o(.literal*, .text*)
    *libm.a:(.literal .text .literal.* .text.*)
    *libsmartconfig.a:(.literal .text .literal.* .text.*)
    *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
    _irom0_text_end = ABSOLUTE(.);
    _flash_code_end = ABSOLUTE(.);
  } >irom0_0_seg :irom0_0_phdr

  .text : ALIGN(4)
  {
    _stext = .;
    _text_start = ABSOLUTE(.);
     *(.UserEnter.text)
    . = ALIGN(16);
    *(.DebugExceptionVector.text)
    . = ALIGN(16);
    *(.NMIExceptionVector.text)
    . = ALIGN(16);
    *(.KernelExceptionVector.text)
    LONG(0)
    LONG(0)
    LONG(0)
    LONG(0)
    . = ALIGN(16);
    *(.UserExceptionVector.text)
    LONG(0)
    LONG(0)
    LONG(0)
    LONG(0)
    . = ALIGN(16);
    *(.DoubleExceptionVector.text)
    LONG(0)
    LONG(0)
    LONG(0)
    LONG(0)
    . = ALIGN (16);
    *(.entry.text)
    *(.init.literal)
    *(.init)
    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
    *(.fini.literal)
    *(.fini)
    *(.gnu.version)
    _text_end = ABSOLUTE(.);
    _etext = .;
  } >iram1_0_seg :iram1_0_phdr

  .lit4 : ALIGN(4)
  {
    _lit4_start = ABSOLUTE(.);
    *(*.lit4)
    *(.lit4.*)
    *(.gnu.linkonce.lit4.*)
    _lit4_end = ABSOLUTE(.);
  } >iram1_0_seg :iram1_0_phdr

}

/* get ROM code address */
INCLUDE "../ld/eagle.rom.addr.v6.ld"

/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* Linker Script for ld -N */

PHDRS
{
  dport0_0_phdr PT_LOAD;
  dram0_0_phdr PT_LOAD;
  dram0_0_bss_phdr PT_LOAD;
  iram1_0_phdr PT_LOAD;
  irom0_0_phdr PT_LOAD;
}

/*  Default entry point:  */
ENTRY(call_user_start)
EXTERN(_DebugExceptionVector)
EXTERN(_DoubleExceptionVector)
EXTERN(_KernelExceptionVector)
EXTERN(_NMIExceptionVector)
EXTERN(_UserExceptionVector)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wb_base = 0x00000110;
_memmap_cacheattr_wt_base = 0x00000110;
_memmap_cacheattr_bp_base = 0x00000220;
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
_memmap_cacheattr_wb_trapnull = 0x2222211F;
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
_memmap_cacheattr_wb_allvalid = 0x22222112;
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_allvalid = 0x22222222;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);

SECTIONS
{

  .dport0.rodata : ALIGN(4)
  {
    _dport0_rodata_start = ABSOLUTE(.);
    *(.dport0.rodata)
    *(.dport.rodata)
    _dport0_rodata_end = ABSOLUTE(.);
  } >dport0_0_seg :dport0_0_phdr

  .dport0.literal : ALIGN(4)
  {
    _dport0_literal_start = ABSOLUTE(.);
    *(.dport0.literal)
    *(.dport.literal)
    _dport0_literal_end = ABSOLUTE(.);
  } >dport0_0_seg :dport0_0_phdr

  .dport0.data : ALIGN(4)
  {
    _dport0_data_start = ABSOLUTE(.);
    *(.dport0.data)
    *(.dport.data)
    _dport0_data_end = ABSOLUTE(.);
  } >dport0_0_seg :dport0_0_phdr

  .data : ALIGN(4)
  {
    _data_start = ABSOLUTE(.);
    *(.data)
    *(.data.*)
    *(.gnu.linkonce.d.*)
    *(.data1)
    *(.sdata)
    *(.sdata.*)
    *(.gnu.linkonce.s.*)
    *(.sdata2)
    *(.sdata2.*)
    *(.gnu.linkonce.s2.*)
    *(.jcr)
    _data_end = ABSOLUTE(.);
  } >dram0_0_seg :dram0_0_phdr

  .rodata : ALIGN(4)
  {
    _rodata_start = ABSOLUTE(.);
    *(.rodata)
    *(.rodata.*)
    *(.gnu.linkonce.r.*)
    *(.rodata1)
    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
    *(.xt_except_table)
    *(.gcc_except_table)
    *(.gnu.linkonce.e.*)
    *(.gnu.version_r)
    *(.eh_frame)
    . = (. + 3) & ~ 3;
    /*  C++ constructor and destructor tables, properly ordered:  */
    __init_array_start = ABSOLUTE(.);
    KEEP (*crtbegin.o(.ctors))
    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
    KEEP (*(SORT(.ctors.*)))
    KEEP (*(.ctors))
    __init_array_end = ABSOLUTE(.);
    KEEP (*crtbegin.o(.dtors))
    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
    KEEP (*(SORT(.dtors.*)))
    KEEP (*(.dtors))
    /*  C++ exception handlers table:  */
    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
    *(.xt_except_desc)
    *(.gnu.linkonce.h.*)
    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
    *(.xt_except_desc_end)
    *(.dynamic)
    *(.gnu.version_d)
    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
    _bss_table_start = ABSOLUTE(.);
    LONG(_bss_start)
    LONG(_bss_end)
    _bss_table_end = ABSOLUTE(.);
    _rodata_end = ABSOLUTE(.);
  } >dram0_0_seg :dram0_0_phdr

  .bss ALIGN(8) (NOLOAD) : ALIGN(4)
  {
    . = ALIGN (8);
    _bss_start = ABSOLUTE(.);
    *(.dynsbss)
    *(.sbss)
    *(.sbss.*)
    *(.gnu.linkonce.sb.*)
    *(.scommon)
    *(.sbss2)
    *(.sbss2.*)
    *(.gnu.linkonce.sb2.*)
    *(.dynbss)
    *(.bss)
    *(.bss.*)
    *(.gnu.linkonce.b.*)
    *(COMMON)
    . = ALIGN (8);
    _bss_end = ABSOLUTE(.);
    _heap_start = ABSOLUTE(.);
/*    _stack_sentry = ALIGN(0x8); */
  } >dram0_0_seg :dram0_0_bss_phdr
/* __stack = 0x3ffc8000; */

  .irom0.text : ALIGN(4)
  {
    _irom0_text_start = ABSOLUTE(.);
    *core_esp8266_*.o(.literal*, .text*)
    *spiffs*.o(.literal*, .text*)
    *.cpp.o(.literal*, .text*)
    *libm.a:(.literal .text .literal.* .text.*)
    *libsmartconfig.a:(.literal .text .literal.* .text.*)
    *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
    _irom0_text_end = ABSOLUTE(.);
    _flash_code_end = ABSOLUTE(.);
  } >irom0_0_seg :irom0_0_phdr

  .text : ALIGN(4)
  {
    _stext = .;
    _text_start = ABSOLUTE(.);
     *(.UserEnter.text)
    . = ALIGN(16);
    *(.DebugExceptionVector.text)
    . = ALIGN(16);
    *(.NMIExceptionVector.text)
    . = ALIGN(16);
    *(.KernelExceptionVector.text)
    LONG(0)
    LONG(0)
    LONG(0)
    LONG(0)
    . = ALIGN(16);
    *(.UserExceptionVector.text)
    LONG(0)
    LONG(0)
    LONG(0)
    LONG(0)
    . = ALIGN(16);
    *(.DoubleExceptionVector.text)
    LONG(0)
    LONG(0)
    LONG(0)
    LONG(0)
    . = ALIGN (16);
    *(.entry.text)
    *(.init.literal)
    *(.init)
    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
    *(.fini.literal)
    *(.fini)
    *(.gnu.version)
    _text_end = ABSOLUTE(.);
    _etext = .;
  } >iram1_0_seg :iram1_0_phdr

  .lit4 : ALIGN(4)
  {
    _lit4_start = ABSOLUTE(.);
    *(*.lit4)
    *(.lit4.*)
    *(.gnu.linkonce.lit4.*)
    _lit4_end = ABSOLUTE(.);
  } >iram1_0_seg :iram1_0_phdr

}

/* get ROM code address */
INCLUDE "../ld/eagle.rom.addr.v6.ld"


boards: qemu_x86_tiny: pin logging subsys code and data

This pins the logging subsys code and data so logging can be
used with demand paging.

Signed-off-by: Daniel Leung <d94e04d205b5962d7873a139ef298b03c1717f72@intel.com>

/*
 * Copyright (c) 2013-2014 Wind River Systems, Inc.
 * Copyright (c) 2021 Intel Corporation
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <autoconf.h>
#include <devicetree.h>
#include <offsets.h>
#include <linker/linker-defs.h>
#include <linker/linker-tool.h>
#include <sys/util.h>
#include <sys/mem_manage.h>

/* Bounds of physical RAM from DTS */
#define PHYS_RAM_ADDR			DT_REG_ADDR(DT_CHOSEN(zephyr_sram))
#define PHYS_RAM_SIZE			DT_REG_SIZE(DT_CHOSEN(zephyr_sram))

/* Bounds of flash from DTS */
#define FLASH_ROM_ADDR			DT_REG_ADDR(DT_CHOSEN(zephyr_flash))
#define FLASH_ROM_SIZE			DT_REG_SIZE(DT_CHOSEN(zephyr_flash))

/* Virtual base address for the kernel; with CONFIG_MMU this is not necessarily
 * the same as its physical location, although an identity mapping for RAM
 * is still supported by setting CONFIG_KERNEL_VM_BASE=CONFIG_SRAM_BASE_ADDRESS.
 */
#ifdef Z_VM_KERNEL

#define KERNEL_BASE_ADDR \
	(CONFIG_KERNEL_VM_BASE + CONFIG_KERNEL_VM_OFFSET)

#define KERNEL_RAM_SIZE \
	(CONFIG_KERNEL_VM_SIZE - CONFIG_KERNEL_VM_OFFSET)

#define PHYS_RAM_AVAIL \
	(PHYS_RAM_SIZE - CONFIG_SRAM_OFFSET)

#else

#define KERNEL_BASE_ADDR		(PHYS_RAM_ADDR + CONFIG_SRAM_OFFSET)
#define KERNEL_RAM_SIZE			(PHYS_RAM_SIZE - CONFIG_SRAM_OFFSET)

#endif

/* "kernel RAM" for linker VMA allocations starts at the offset */

/* Physical RAM location where the kernel image is loaded */
#define PHYS_LOAD_ADDR			(PHYS_RAM_ADDR + CONFIG_SRAM_OFFSET)

#ifdef CONFIG_USERSPACE
#define SMEM_PARTITION_ALIGN(size)	MMU_PAGE_ALIGN_PERM
#define APP_SHARED_ALIGN		MMU_PAGE_ALIGN_PERM
#endif

MEMORY
    {
#if defined(Z_VM_KERNEL)
    ROM (rx)        : ORIGIN = PHYS_LOAD_ADDR, LENGTH = PHYS_RAM_AVAIL
#endif
    RAM (wx)        : ORIGIN = KERNEL_BASE_ADDR, LENGTH = KERNEL_RAM_SIZE

#if defined(CONFIG_DEMAND_PAGING) && !defined(CONFIG_LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT)
    FLASH (rw)      : ORIGIN = FLASH_ROM_ADDR, LENGTH = FLASH_ROM_SIZE
#endif

    /*
     * On 32-bit x86, fake memory area for build-time IDT generation data.
     *
     * It doesn't matter where this region goes as it is stripped from the
     * final ELF image. The address doesn't even have to be valid on the
     * target. However, it shouldn't overlap any other regions.
     */

    IDT_LIST        : ORIGIN = 0xFFFF1000, LENGTH = 2K
    }

#if defined(Z_VM_KERNEL)
	#define ROMABLE_REGION ROM
	#define RAMABLE_REGION RAM
#else
	#define ROMABLE_REGION RAM
	#define RAMABLE_REGION RAM
#endif

#ifdef CONFIG_MMU
	#define MMU_PAGE_ALIGN		. = ALIGN(CONFIG_MMU_PAGE_SIZE);
#else
	#define MMU_PAGE_ALIGN
#endif

#if defined(CONFIG_DEMAND_PAGING) && !defined(CONFIG_LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT)

#undef SECTION_PROLOGUE
#define SECTION_PROLOGUE(name, options, align) \
        name options : ALIGN_WITH_INPUT align

#undef SECTION_DATA_PROLOGUE
#define SECTION_DATA_PROLOGUE(name, options, align) \
        name options : ALIGN_WITH_INPUT align

#undef GROUP_ROM_LINK_IN
#define GROUP_ROM_LINK_IN(vregion, lregion) > vregion AT > lregion

#undef GROUP_DATA_LINK_IN
#define GROUP_DATA_LINK_IN(vregion, lregion) > vregion AT > lregion

#undef GROUP_NOLOAD_LINK_IN
#define GROUP_NOLOAD_LINK_IN(vregion, lregion) > vregion AT > lregion

#endif

/* Used to align areas with separate memory permission characteristics
 * so that the page permissions can be set in the MMU. Without this,
 * the kernel is just one blob with the same RWX permissions on all RAM
 */
#ifdef CONFIG_SRAM_REGION_PERMISSIONS
	#define MMU_PAGE_ALIGN_PERM	MMU_PAGE_ALIGN
#else
	#define MMU_PAGE_ALIGN_PERM
#endif

/* For all source files under arch/x86/. */
#define LIB_ARCH_X86_IN_SECT(lsect)					\
	*libarch__x86__core.a.a:(.##lsect)				\
	*libarch__x86__core.a:(.##lsect##.*)

#ifdef CONFIG_MINIMAL_LIBC
/* For all source files under lib/libc/minimal/.
 * These files includes, for example, math and string functions.
 */
#define LIB_C_IN_SECT(lsect)						\
	*liblib__libc__minimal.a:(.##lsect)				\
	*liblib__libc__minimal.a:(.##lsect##.*)

#endif /* CONFIG_MINIMAL_LIBC */

#ifdef CONFIG_NEWLIB_LIBC
/* For Newlib libc-hook.c. */
#define LIB_C_IN_SECT(lsect)						\
	*liblib__libc__newlib.a:libc-hooks.c.obj(.##lsect)		\
	*liblib__libc__newlib.a:libc-hooks.c.obj(.##lsect##.*)

#endif /* CONFIG_NEWLIB_LIBC */

/*
 * For drivers that are usually used (e.g. serial)
 */
#define LIB_DRIVERS_IN_SECT(lsect)					\
	*libdrivers__serial.a:(.##lsect)				\
	*libdrivers__serial.a:(.##lsect##.*)				\
	*hpet.c.obj(.##lsect)						\
	*hpet.c.obj(.##lsect##.*)					\
	*intc_ioapic.c.obj(.##lsect)					\
	*intc_ioapic.c.obj(.##lsect##.*)				\
	*intc_loapic.c.obj(.##lsect)					\
	*intc_loapic.c.obj(.##lsect##.*)				\
	*intc_system_apic.c.obj(.##lsect)				\
	*intc_system_apic.c.obj(.##lsect##.*)				\
	*rand32_timer.c.obj(.##lsect)					\
	*rand32_timer.c.obj(.##lsect##.*)				\
	*uart_console.c.obj(.##lsect)					\
	*uart_console.c.obj(.##lsect##.*)

/* For all source files under kernel/. and kernel related files */
#define LIB_KERNEL_IN_SECT(lsect)					\
	*libkernel.a:(.##lsect)						\
	*libkernel.a:(.##lsect##.*)					\
	*libsubsys__demand_paging__*.a:(.##lsect)			\
	*libsubsys__demand_paging__*.a:(.##lsect##.*)

/* For particular file packaged in libzephyr.a. */
#define LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, objfile)			\
	*libzephyr.a:objfile.c.obj(.##lsect)				\
	*libzephyr.a:objfile.c.obj(.##lsect##.*)

/* For source files under lib/os/ with commonly used functions. */
#define LIB_ZEPHYR_IN_SECT(lsect)					\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, assert)			\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, bitarray)			\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, cbprintf_complete)	\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, cbprintf_nano)		\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, configs)			\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, heap)			\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, heap-validate)		\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, mutex)			\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, notify)			\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, printk)			\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, sem)			\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, stdout_console)		\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, sys_clock_init)		\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, rb)			\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, thread_entry)		\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, work_q)

/*
 * Catch all for all internal/external kernel functions
 * as they are usually defined as "static inline" where
 * they are attached to the source which uses them.
 * Hence the need to specify them here so they can be pinned.
 */
#define ZEPHYR_KERNEL_FUNCS_IN_SECT					\
	*(.text.atomic_*)						\
	*(.text.k_*)							\
	*(.text.sys_*_bit)						\
	*(.text.sys_bitfield_*)						\
	*(.text.sys_clock_hw_cycles_per_sec)				\
	*(.text.sys_cache_*)						\
	*(.text.sys_dcache_*)						\
	*(.text.sys_icache_*)						\
	*(.text.sys_mutex_*)						\
	*(.text.sys_notify_*)						\
	*(.text.sys_dlist_*)						\
	*(.text.sys_slist_*)						\
	*(.text.sys_sflist_*)						\
	*(.text.sys_sfnode_*)						\
	*(.text.sys_io_*)						\
	*(.text.sys_in*)						\
	*(.text.sys_out*)						\
	*(.text.sys_read*)						\
	*(.text.sys_write*)						\
	*(.text.sys_get_be*)						\
	*(.text.sys_get_le*)						\
	*(.text.sys_put_be*)						\
	*(.text.sys_put_le*)						\
	*(.text.sys_mem_swap)						\
	*(.text.sys_memcpy_swap)					\
	*(.text.z_*)

/* For logging subsys */
#define LIB_SUBSYS_LOGGING_IN_SECT(lsect)				\
	*log_*.c.obj(.##lsect)						\
	*log_*.c.obj(.##lsect.*)					\
	*mpsc_pbuf.c.obj(.##lsect)					\
	*mpsc_pbuf.c.obj(.##lsect.*)

epoint = Z_MEM_PHYS_ADDR(CONFIG_KERNEL_ENTRY);
ENTRY(epoint)

/* SECTIONS definitions */
SECTIONS
	{

#include <linker/rel-sections.ld>

    /DISCARD/ :
	{
	*(.plt)
	}

    /DISCARD/ :
	{
	*(.iplt)
	}

#ifdef CONFIG_LINKER_USE_BOOT_SECTION

	SECTION_PROLOGUE(boot.text,,)
	{
#include <snippets-rom-start.ld>

		MMU_PAGE_ALIGN
		lnkr_boot_start = .;
		z_mapped_start = .;

		lnkr_boot_text_start = .;

		KEEP(*(.boot_text.__start))
		*(.boot_text)
		*(.boot_text.*)

		*(.text.k_mem_paging_backing_store_init)
		*(.text.k_mem_paging_eviction_init)

		MMU_PAGE_ALIGN_PERM

		lnkr_boot_text_end = .;
	} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	SECTION_PROLOGUE(boot.rodata,,)
	{
		MMU_PAGE_ALIGN_PERM

		lnkr_boot_rodata_start = .;

		*(.boot_rodata)
		*(.boot_rodata.*)

		MMU_PAGE_ALIGN_PERM

		lnkr_boot_rodata_end = .;
	} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	SECTION_PROLOGUE(boot.data,,)
	{
		MMU_PAGE_ALIGN_PERM

		. = ALIGN(4);

		lnkr_boot_data_start = .;

		*(.boot_data)
		*(.boot_data.*)

		lnkr_boot_data_end = .;
	} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	SECTION_PROLOGUE(boot.bss, (NOLOAD),)
	{
		. = ALIGN(4);

		lnkr_boot_bss_start = .;

		*(.boot_bss)
		*(.boot_bss.*)

		lnkr_boot_bss_end = .;
	} GROUP_NOLOAD_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	SECTION_PROLOGUE(boot.noinit, (NOLOAD),)
	{
		. = ALIGN(4);

		lnkr_boot_noinit_start = .;

		*(.boot_noinit)
		*(.boot_noinit.*)

		lnkr_boot_noinit_end = .;

		MMU_PAGE_ALIGN

		lnkr_boot_end = .;
	} GROUP_NOLOAD_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	lnkr_boot_text_size = lnkr_boot_text_end - lnkr_boot_text_start;
	lnkr_boot_rodata_size = lnkr_boot_rodata_end - lnkr_boot_rodata_start;
	lnkr_boot_data_size = lnkr_boot_data_end - lnkr_boot_data_start;
	lnkr_boot_bss_size = lnkr_boot_bss_end - lnkr_boot_bss_start;
	lnkr_boot_noinit_size = lnkr_boot_noinit_end - lnkr_boot_noinit_start;

#endif /* CONFIG_LINKER_USE_BOOT_SECTION */

#ifdef CONFIG_LINKER_USE_PINNED_SECTION

	SECTION_PROLOGUE(pinned.text,,)
	{
#ifndef CONFIG_LINKER_USE_BOOT_SECTION
#include <snippets-rom-start.ld>
#endif

		MMU_PAGE_ALIGN

		lnkr_pinned_start = .;

#ifndef CONFIG_LINKER_USE_BOOT_SECTION
		z_mapped_start = .;
#endif

		lnkr_pinned_text_start = .;

		LIB_KERNEL_IN_SECT(text)
		LIB_ARCH_X86_IN_SECT(text)
		*(.text._OffsetAbsSyms)

		*(.pinned_text)
		*(.pinned_text.*)

		LIB_ZEPHYR_IN_SECT(text)
		LIB_C_IN_SECT(text)
		LIB_DRIVERS_IN_SECT(text)
		LIB_SUBSYS_LOGGING_IN_SECT(text)

		*_divdi3.o(.text)
		*_udivdi3.o(.text)
		*_udivmoddi4.o(.text)
		*_umoddi3.o(.text)
		*_popcountsi2.o(.text)

		*(.gnu.linkonce.t.exc_*)

		*(.text.*.constprop)
		*(.text.*.constprop.*)

#ifdef CONFIG_NEWLIB_LIBC
		*libc.a:(.text)
		*libc.a:(.text.*)
#endif /* CONFIG_NEWLIB_LIBC */

		ZEPHYR_KERNEL_FUNCS_IN_SECT

#include <linker/kobject-text.ld>

		MMU_PAGE_ALIGN_PERM

		lnkr_pinned_text_end = .;
	} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	MMU_PAGE_ALIGN_PERM

	lnkr_pinned_rodata_start = .;

#include <linker/common-rom.ld>
#include <linker/thread-local-storage.ld>

	SECTION_PROLOGUE(pinned.rodata,,)
	{
#include <arch/x86/ia32/scripts/static_intr.ld>

		LIB_KERNEL_IN_SECT(rodata)
		LIB_ARCH_X86_IN_SECT(rodata)

		*(.pinned_rodata)
		*(.pinned_rodata.*)

		LIB_ZEPHYR_IN_SECT(rodata)
		LIB_C_IN_SECT(rodata)
		LIB_DRIVERS_IN_SECT(rodata)
		LIB_SUBSYS_LOGGING_IN_SECT(rodata)

		/* Static strings */
		*(.rodata.str*.*)
		*(.rodata.*.str*.*)

#ifdef CONFIG_NEWLIB_LIBC
		*libc.a:(.rodata)
		*libc.a:(.rodata.*)
#endif /* CONFIG_NEWLIB_LIBC */

#include <snippets-rodata.ld>

#include <linker/kobject-rom.ld>

		MMU_PAGE_ALIGN_PERM

		lnkr_pinned_rodata_end = .;
	} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	SECTION_PROLOGUE(pinned.data,,)
	{
		MMU_PAGE_ALIGN_PERM

		lnkr_pinned_data_start = .;

		. = ALIGN(4);

#include <arch/x86/ia32/scripts/shared_kernel_pages.ld>
#include <arch/x86/ia32/scripts/dynamic_intr.ld>

		LIB_KERNEL_IN_SECT(data)
		LIB_ARCH_X86_IN_SECT(data)

		*(.pinned_data)
		*(.pinned_data.*)

		LIB_ZEPHYR_IN_SECT(data)
		LIB_C_IN_SECT(data)
		LIB_DRIVERS_IN_SECT(data)
		LIB_SUBSYS_LOGGING_IN_SECT(data)

	} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

#include <linker/common-ram.ld>
#include <arch/x86/pagetables.ld>
#include <linker/kobject-data.ld>

	lnkr_pinned_data_end = .;

	SECTION_PROLOGUE(pinned.bss, (NOLOAD),)
	{
		. = ALIGN(4);

		lnkr_pinned_bss_start = .;

		LIB_KERNEL_IN_SECT(bss)
		LIB_ARCH_X86_IN_SECT(bss)

		*(.pinned_bss)
		*(.pinned_bss.*)

		LIB_ZEPHYR_IN_SECT(bss)
		LIB_C_IN_SECT(bss)
		LIB_DRIVERS_IN_SECT(bss)
		LIB_SUBSYS_LOGGING_IN_SECT(bss)

		lnkr_pinned_bss_end = .;
	} GROUP_NOLOAD_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

#ifdef CONFIG_USERSPACE
	/* PINNED APP SHARED MEMORY REGION */
#include <app_smem_pinned.ld>

	_app_smem_pinned_size = _app_smem_pinned_end - _app_smem_pinned_start;
	_app_smem_pinned_num_words = _app_smem_pinned_size >> 2;
#endif /* CONFIG_USERSPACE */

	SECTION_PROLOGUE(pinned.noinit, (NOLOAD),)
	{
		. = ALIGN(4);

		lnkr_pinned_noinit_start = .;

		LIB_KERNEL_IN_SECT(noinit)
		LIB_ARCH_X86_IN_SECT(noinit)

		*(.pinned_noinit)
		*(.pinned_noinit.*)

		LIB_ZEPHYR_IN_SECT(noinit)
		LIB_C_IN_SECT(noinit)
		LIB_DRIVERS_IN_SECT(noinit)
		LIB_SUBSYS_LOGGING_IN_SECT(noinit)

#ifdef CONFIG_ZTEST
		/* For tests/kernel/mem_slab/ tests */
		*(.noinit.*.k_mem_slab_buf_*)

		/* For tests/kernel/mem_heap tests */
		*(.noinit.*.kheap_buf_*)

		/* Pin ztest_thread_stack.
		 * This must be done or else double fault
		 * may arise: testing exceptions while
		 * page fault for the ztest stack.
		 */
		*libsubsys__testsuite__ztest.a:(.noinit.*)
#endif

		lnkr_pinned_noinit_end = .;

		MMU_PAGE_ALIGN

		lnkr_pinned_end = .;

	} GROUP_NOLOAD_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	lnkr_pinned_text_size = lnkr_pinned_text_end - lnkr_pinned_text_start;
	lnkr_pinned_rodata_size = lnkr_pinned_rodata_end - lnkr_pinned_rodata_start;
	lnkr_pinned_data_size = lnkr_pinned_data_end - lnkr_pinned_data_start;
	lnkr_pinned_bss_size = lnkr_pinned_bss_end - lnkr_pinned_bss_start;
	lnkr_pinned_noinit_size = lnkr_pinned_noinit_end - lnkr_pinned_noinit_start;

#endif /* CONFIG_LINKER_USE_PINNED_SECTION */

#if defined(CONFIG_DEMAND_PAGING) && !defined(CONFIG_LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT)
/* From now on, put symbols into FLASH */
#undef ROMABLE_REGION
#define ROMABLE_REGION	FLASH

	/* This is to align the following sections in flash
	 * to their corresponding virtual addresses.
	 * In other words, the offset from start of flash
	 * for these sections would be the same from start of
	 * their virtual addresses. This provides a simple and
	 * direct mapping from backing store.
	 */
	flash_load_offset :
	{
		. = FLASH_ROM_ADDR + (lnkr_pinned_end - KERNEL_BASE_ADDR);
	} > FLASH AT > FLASH

#endif

	GROUP_START(ROMABLE_REGION)

	. = ALIGN(8);

	SECTION_PROLOGUE(_TEXT_SECTION_NAME,,)
	{
	__text_region_start = .;

#if !defined(CONFIG_LINKER_USE_BOOT_SECTION) || \
    !defined(CONFIG_LINKER_USE_PINNED_SECTION)
	z_mapped_start = .;
#endif

#if !defined(CONFIG_LINKER_USE_BOOT_SECTION) || \
    !defined(CONFIG_LINKER_USE_PINNED_SECTION)
/* Located in generated directory. This file is populated by calling
 * zephyr_linker_sources(ROM_START ...). This typically contains the vector
 * table and debug information.
 */
#include <snippets-rom-start.ld>
#endif

	/* Needs KEEP() as ENTRY() is given a physical address */
	KEEP(*(.text.__start))
	*(.text)
	*(".text.*")
	*(.gnu.linkonce.t.*)
	*(.init)
	*(.fini)
	*(.eini)

#ifndef CONFIG_LINKER_USE_PINNED_SECTION
#include <linker/kobject-text.ld>
#endif

	MMU_PAGE_ALIGN_PERM
	} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	__text_region_end = .;
	__text_region_size = __text_region_end - __text_region_start;
	__rodata_region_start = .;

#ifndef CONFIG_LINKER_USE_PINNED_SECTION
#include <linker/common-rom.ld>
#include <linker/thread-local-storage.ld>
#endif

	SECTION_PROLOGUE(_RODATA_SECTION_NAME,,)
	{
	*(.rodata)
	*(".rodata.*")
	*(.gnu.linkonce.r.*)

#ifndef CONFIG_DYNAMIC_INTERRUPTS
#ifndef CONFIG_LINKER_USE_PINNED_SECTION
#include <arch/x86/ia32/scripts/static_intr.ld>
#endif /* !CONFIG_LINKER_USE_PINNED_SECTION */
#endif /* CONFIG_DYNAMIC_INTERRUPTS */

#ifndef CONFIG_LINKER_USE_PINNED_SECTION
/* Located in generated directory. This file is populated by the
 * zephyr_linker_sources() Cmake function.
 */
#include <snippets-rodata.ld>

#include <linker/kobject-rom.ld>
#endif
	} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

#include <linker/cplusplus-rom.ld>

	MMU_PAGE_ALIGN_PERM
	/* ROM ends here, position counter will now be in RAM areas */
	__rodata_region_end = .;
	__rodata_region_size = __rodata_region_end - __rodata_region_start;
	GROUP_END(ROMABLE_REGION)
	/*
	 * Needed for dynamic linking which we do not have, do discard
	 */
	/DISCARD/ : {
		*(.got.plt)
		*(.igot.plt)
		*(.got)
		*(.igot)
	}
	/* RAMABLE_REGION */
	GROUP_START(RAMABLE_REGION)

/* Located in generated directory. This file is populated by the
 * zephyr_linker_sources() Cmake function.
 */
#include <snippets-ram-sections.ld>

#ifdef CONFIG_USERSPACE
	/* APP SHARED MEMORY REGION */
#include <app_smem.ld>

	_image_ram_start = _app_smem_start;
	_app_smem_size = _app_smem_end - _app_smem_start;
	_app_smem_num_words = _app_smem_size >> 2;
	_app_smem_rom_start = LOADADDR(_APP_SMEM_SECTION_NAME);
#endif /* CONFIG_USERSPACE */

	SECTION_PROLOGUE(_BSS_SECTION_NAME, (NOLOAD),)
	{
	MMU_PAGE_ALIGN_PERM
#if !defined(CONFIG_USERSPACE)
	_image_ram_start = .;
#endif
	/*
	 * For performance, BSS section is forced to be both 4 byte aligned and
	 * a multiple of 4 bytes.
	 */
	. = ALIGN(4);
	__kernel_ram_start = .;
	__bss_start = .;

	*(.bss)
	*(".bss.*")
	*(COMMON)
	*(".kernel_bss.*")

	/*
	 * As memory is cleared in words only, it is simpler to ensure the BSS
	 * section ends on a 4 byte boundary. This wastes a maximum of 3 bytes.
	 */
	. = ALIGN(4);
	__bss_end = .;
	} GROUP_NOLOAD_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	__bss_num_words	= (__bss_end - __bss_start) >> 2;

#include <linker/common-noinit.ld>

	MMU_PAGE_ALIGN_PERM

	SECTION_DATA_PROLOGUE(_DATA_SECTION_NAME,,)
	{

	__data_ram_start = .;

	*(.data)
	*(".data.*")
	*(".kernel.*")

#ifdef CONFIG_DYNAMIC_INTERRUPTS
#ifndef CONFIG_LINKER_USE_PINNED_SECTION
#include <arch/x86/ia32/scripts/dynamic_intr.ld>
#endif /* !CONFIG_LINKER_USE_PINNED_SECTION */
#endif /* CONFIG_DYNAMIC_INTERRUPTS */

/* Located in generated directory. This file is populated by the
 * zephyr_linker_sources() Cmake function.
 */
#include <snippets-rwdata.ld>

#ifndef CONFIG_LINKER_USE_PINNED_SECTION
#include <arch/x86/ia32/scripts/shared_kernel_pages.ld>
#endif /* !CONFIG_LINKER_USE_PINNED_SECTION */

	. = ALIGN(4);
	} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	__data_rom_start = LOADADDR(_DATA_SECTION_NAME);

#include <linker/cplusplus-ram.ld>

#ifndef CONFIG_LINKER_USE_PINNED_SECTION
#include <linker/common-ram.ld>
#include <arch/x86/pagetables.ld>

/* Must be last in RAM */
#include <linker/kobject-data.ld>
#endif /* !CONFIG_LINKER_USE_PINNED_SECTION */

	MMU_PAGE_ALIGN
	__data_ram_end = .;

	/* All unused memory also owned by the kernel for heaps */
	__kernel_ram_end = KERNEL_BASE_ADDR + KERNEL_RAM_SIZE;
	__kernel_ram_size = __kernel_ram_end - __kernel_ram_start;

	_image_ram_end = .;
	_image_ram_all = (KERNEL_BASE_ADDR + KERNEL_RAM_SIZE) - _image_ram_start;

	z_mapped_end = .;
	z_mapped_size = z_mapped_end - z_mapped_start;
	_end = .; /* end of image */

	GROUP_END(RAMABLE_REGION)

#ifndef LINKER_ZEPHYR_FINAL
	/* static interrupts */
	SECTION_PROLOGUE(intList,,)
	{
	KEEP(*(.spurIsr))
	KEEP(*(.spurNoErrIsr))
	KEEP(*(.intList))
	KEEP(*(.gnu.linkonce.intList.*))
	} > IDT_LIST
#else
	/DISCARD/ :
	{
	KEEP(*(.spurIsr))
	KEEP(*(.spurNoErrIsr))
	KEEP(*(.intList))
	KEEP(*(.gnu.linkonce.intList.*))
	}
#endif

/* Located in generated directory. This file is populated by the
 * zephyr_linker_sources() Cmake function.
 */
#include <snippets-sections.ld>

#include <linker/debug-sections.ld>

	/DISCARD/ : { *(.note.GNU-stack) }

	}

/*
 * Copyright (c) 2013-2014 Wind River Systems, Inc.
 * Copyright (c) 2021 Intel Corporation
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <autoconf.h>
#include <devicetree.h>
#include <offsets.h>
#include <linker/linker-defs.h>
#include <linker/linker-tool.h>
#include <sys/util.h>
#include <sys/mem_manage.h>

/* Bounds of physical RAM from DTS */
#define PHYS_RAM_ADDR			DT_REG_ADDR(DT_CHOSEN(zephyr_sram))
#define PHYS_RAM_SIZE			DT_REG_SIZE(DT_CHOSEN(zephyr_sram))

/* Bounds of flash from DTS */
#define FLASH_ROM_ADDR			DT_REG_ADDR(DT_CHOSEN(zephyr_flash))
#define FLASH_ROM_SIZE			DT_REG_SIZE(DT_CHOSEN(zephyr_flash))

/* Virtual base address for the kernel; with CONFIG_MMU this is not necessarily
 * the same as its physical location, although an identity mapping for RAM
 * is still supported by setting CONFIG_KERNEL_VM_BASE=CONFIG_SRAM_BASE_ADDRESS.
 */
#ifdef Z_VM_KERNEL

#define KERNEL_BASE_ADDR \
	(CONFIG_KERNEL_VM_BASE + CONFIG_KERNEL_VM_OFFSET)

#define KERNEL_RAM_SIZE \
	(CONFIG_KERNEL_VM_SIZE - CONFIG_KERNEL_VM_OFFSET)

#define PHYS_RAM_AVAIL \
	(PHYS_RAM_SIZE - CONFIG_SRAM_OFFSET)

#else

#define KERNEL_BASE_ADDR		(PHYS_RAM_ADDR + CONFIG_SRAM_OFFSET)
#define KERNEL_RAM_SIZE			(PHYS_RAM_SIZE - CONFIG_SRAM_OFFSET)

#endif

/* "kernel RAM" for linker VMA allocations starts at the offset */

/* Physical RAM location where the kernel image is loaded */
#define PHYS_LOAD_ADDR			(PHYS_RAM_ADDR + CONFIG_SRAM_OFFSET)

#ifdef CONFIG_USERSPACE
#define SMEM_PARTITION_ALIGN(size)	MMU_PAGE_ALIGN_PERM
#define APP_SHARED_ALIGN		MMU_PAGE_ALIGN_PERM
#endif

MEMORY
    {
#if defined(Z_VM_KERNEL)
    ROM (rx)        : ORIGIN = PHYS_LOAD_ADDR, LENGTH = PHYS_RAM_AVAIL
#endif
    RAM (wx)        : ORIGIN = KERNEL_BASE_ADDR, LENGTH = KERNEL_RAM_SIZE

#if defined(CONFIG_DEMAND_PAGING) && !defined(CONFIG_LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT)
    FLASH (rw)      : ORIGIN = FLASH_ROM_ADDR, LENGTH = FLASH_ROM_SIZE
#endif

    /*
     * On 32-bit x86, fake memory area for build-time IDT generation data.
     *
     * It doesn't matter where this region goes as it is stripped from the
     * final ELF image. The address doesn't even have to be valid on the
     * target. However, it shouldn't overlap any other regions.
     */

    IDT_LIST        : ORIGIN = 0xFFFF1000, LENGTH = 2K
    }

#if defined(Z_VM_KERNEL)
	#define ROMABLE_REGION ROM
	#define RAMABLE_REGION RAM
#else
	#define ROMABLE_REGION RAM
	#define RAMABLE_REGION RAM
#endif

#ifdef CONFIG_MMU
	#define MMU_PAGE_ALIGN		. = ALIGN(CONFIG_MMU_PAGE_SIZE);
#else
	#define MMU_PAGE_ALIGN
#endif

#if defined(CONFIG_DEMAND_PAGING) && !defined(CONFIG_LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT)

#undef SECTION_PROLOGUE
#define SECTION_PROLOGUE(name, options, align) \
        name options : ALIGN_WITH_INPUT align

#undef SECTION_DATA_PROLOGUE
#define SECTION_DATA_PROLOGUE(name, options, align) \
        name options : ALIGN_WITH_INPUT align

#undef GROUP_ROM_LINK_IN
#define GROUP_ROM_LINK_IN(vregion, lregion) > vregion AT > lregion

#undef GROUP_DATA_LINK_IN
#define GROUP_DATA_LINK_IN(vregion, lregion) > vregion AT > lregion

#undef GROUP_NOLOAD_LINK_IN
#define GROUP_NOLOAD_LINK_IN(vregion, lregion) > vregion AT > lregion

#endif

/* Used to align areas with separate memory permission characteristics
 * so that the page permissions can be set in the MMU. Without this,
 * the kernel is just one blob with the same RWX permissions on all RAM
 */
#ifdef CONFIG_SRAM_REGION_PERMISSIONS
	#define MMU_PAGE_ALIGN_PERM	MMU_PAGE_ALIGN
#else
	#define MMU_PAGE_ALIGN_PERM
#endif

/* For all source files under arch/x86/. */
#define LIB_ARCH_X86_IN_SECT(lsect)					\
	*libarch__x86__core.a.a:(.##lsect)				\
	*libarch__x86__core.a:(.##lsect##.*)

#ifdef CONFIG_MINIMAL_LIBC
/* For all source files under lib/libc/minimal/.
 * These files includes, for example, math and string functions.
 */
#define LIB_C_IN_SECT(lsect)						\
	*liblib__libc__minimal.a:(.##lsect)				\
	*liblib__libc__minimal.a:(.##lsect##.*)

#endif /* CONFIG_MINIMAL_LIBC */

#ifdef CONFIG_NEWLIB_LIBC
/* For Newlib libc-hook.c. */
#define LIB_C_IN_SECT(lsect)						\
	*liblib__libc__newlib.a:libc-hooks.c.obj(.##lsect)		\
	*liblib__libc__newlib.a:libc-hooks.c.obj(.##lsect##.*)

#endif /* CONFIG_NEWLIB_LIBC */

/*
 * For drivers that are usually used (e.g. serial)
 */
#define LIB_DRIVERS_IN_SECT(lsect)					\
	*libdrivers__serial.a:(.##lsect)				\
	*libdrivers__serial.a:(.##lsect##.*)				\
	*hpet.c.obj(.##lsect)						\
	*hpet.c.obj(.##lsect##.*)					\
	*intc_ioapic.c.obj(.##lsect)					\
	*intc_ioapic.c.obj(.##lsect##.*)				\
	*intc_loapic.c.obj(.##lsect)					\
	*intc_loapic.c.obj(.##lsect##.*)				\
	*intc_system_apic.c.obj(.##lsect)				\
	*intc_system_apic.c.obj(.##lsect##.*)				\
	*rand32_timer.c.obj(.##lsect)					\
	*rand32_timer.c.obj(.##lsect##.*)				\
	*uart_console.c.obj(.##lsect)					\
	*uart_console.c.obj(.##lsect##.*)

/* For all source files under kernel/. and kernel related files */
#define LIB_KERNEL_IN_SECT(lsect)					\
	*libkernel.a:(.##lsect)						\
	*libkernel.a:(.##lsect##.*)					\
	*libsubsys__demand_paging__*.a:(.##lsect)			\
	*libsubsys__demand_paging__*.a:(.##lsect##.*)

/* For particular file packaged in libzephyr.a. */
#define LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, objfile)			\
	*libzephyr.a:objfile.c.obj(.##lsect)				\
	*libzephyr.a:objfile.c.obj(.##lsect##.*)

/* For source files under lib/os/ with commonly used functions. */
#define LIB_ZEPHYR_IN_SECT(lsect)					\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, assert)			\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, bitarray)			\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, cbprintf_complete)	\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, cbprintf_nano)		\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, configs)			\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, heap)			\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, heap-validate)		\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, mutex)			\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, notify)			\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, printk)			\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, sem)			\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, stdout_console)		\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, sys_clock_init)		\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, rb)			\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, thread_entry)		\
	LIB_ZEPHYR_OBJECT_FILE_IN_SECT(lsect, work_q)

/*
 * Catch all for all internal/external kernel functions
 * as they are usually defined as "static inline" where
 * they are attached to the source which uses them.
 * Hence the need to specify them here so they can be pinned.
 */
#define ZEPHYR_KERNEL_FUNCS_IN_SECT					\
	*(.text.atomic_*)						\
	*(.text.k_*)							\
	*(.text.sys_*_bit)						\
	*(.text.sys_bitfield_*)						\
	*(.text.sys_clock_hw_cycles_per_sec)				\
	*(.text.sys_cache_*)						\
	*(.text.sys_dcache_*)						\
	*(.text.sys_icache_*)						\
	*(.text.sys_mutex_*)						\
	*(.text.sys_notify_*)						\
	*(.text.sys_dlist_*)						\
	*(.text.sys_slist_*)						\
	*(.text.sys_sflist_*)						\
	*(.text.sys_sfnode_*)						\
	*(.text.sys_io_*)						\
	*(.text.sys_in*)						\
	*(.text.sys_out*)						\
	*(.text.sys_read*)						\
	*(.text.sys_write*)						\
	*(.text.sys_get_be*)						\
	*(.text.sys_get_le*)						\
	*(.text.sys_put_be*)						\
	*(.text.sys_put_le*)						\
	*(.text.sys_mem_swap)						\
	*(.text.sys_memcpy_swap)					\
	*(.text.z_*)

epoint = Z_MEM_PHYS_ADDR(CONFIG_KERNEL_ENTRY);
ENTRY(epoint)

/* SECTIONS definitions */
SECTIONS
	{

#include <linker/rel-sections.ld>

    /DISCARD/ :
	{
	*(.plt)
	}

    /DISCARD/ :
	{
	*(.iplt)
	}

#ifdef CONFIG_LINKER_USE_BOOT_SECTION

	SECTION_PROLOGUE(boot.text,,)
	{
#include <snippets-rom-start.ld>

		MMU_PAGE_ALIGN
		lnkr_boot_start = .;
		z_mapped_start = .;

		lnkr_boot_text_start = .;

		KEEP(*(.boot_text.__start))
		*(.boot_text)
		*(.boot_text.*)

		*(.text.k_mem_paging_backing_store_init)
		*(.text.k_mem_paging_eviction_init)

		MMU_PAGE_ALIGN_PERM

		lnkr_boot_text_end = .;
	} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	SECTION_PROLOGUE(boot.rodata,,)
	{
		MMU_PAGE_ALIGN_PERM

		lnkr_boot_rodata_start = .;

		*(.boot_rodata)
		*(.boot_rodata.*)

		MMU_PAGE_ALIGN_PERM

		lnkr_boot_rodata_end = .;
	} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	SECTION_PROLOGUE(boot.data,,)
	{
		MMU_PAGE_ALIGN_PERM

		. = ALIGN(4);

		lnkr_boot_data_start = .;

		*(.boot_data)
		*(.boot_data.*)

		lnkr_boot_data_end = .;
	} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	SECTION_PROLOGUE(boot.bss, (NOLOAD),)
	{
		. = ALIGN(4);

		lnkr_boot_bss_start = .;

		*(.boot_bss)
		*(.boot_bss.*)

		lnkr_boot_bss_end = .;
	} GROUP_NOLOAD_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	SECTION_PROLOGUE(boot.noinit, (NOLOAD),)
	{
		. = ALIGN(4);

		lnkr_boot_noinit_start = .;

		*(.boot_noinit)
		*(.boot_noinit.*)

		lnkr_boot_noinit_end = .;

		MMU_PAGE_ALIGN

		lnkr_boot_end = .;
	} GROUP_NOLOAD_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	lnkr_boot_text_size = lnkr_boot_text_end - lnkr_boot_text_start;
	lnkr_boot_rodata_size = lnkr_boot_rodata_end - lnkr_boot_rodata_start;
	lnkr_boot_data_size = lnkr_boot_data_end - lnkr_boot_data_start;
	lnkr_boot_bss_size = lnkr_boot_bss_end - lnkr_boot_bss_start;
	lnkr_boot_noinit_size = lnkr_boot_noinit_end - lnkr_boot_noinit_start;

#endif /* CONFIG_LINKER_USE_BOOT_SECTION */

#ifdef CONFIG_LINKER_USE_PINNED_SECTION

	SECTION_PROLOGUE(pinned.text,,)
	{
#ifndef CONFIG_LINKER_USE_BOOT_SECTION
#include <snippets-rom-start.ld>
#endif

		MMU_PAGE_ALIGN

		lnkr_pinned_start = .;

#ifndef CONFIG_LINKER_USE_BOOT_SECTION
		z_mapped_start = .;
#endif

		lnkr_pinned_text_start = .;

		LIB_KERNEL_IN_SECT(text)
		LIB_ARCH_X86_IN_SECT(text)
		*(.text._OffsetAbsSyms)

		*(.pinned_text)
		*(.pinned_text.*)

		LIB_ZEPHYR_IN_SECT(text)
		LIB_C_IN_SECT(text)
		LIB_DRIVERS_IN_SECT(text)

		*_divdi3.o(.text)
		*_udivdi3.o(.text)
		*_udivmoddi4.o(.text)
		*_umoddi3.o(.text)
		*_popcountsi2.o(.text)

		*(.gnu.linkonce.t.exc_*)

		*(.text.*.constprop)
		*(.text.*.constprop.*)

#ifdef CONFIG_NEWLIB_LIBC
		*libc.a:(.text)
		*libc.a:(.text.*)
#endif /* CONFIG_NEWLIB_LIBC */

		ZEPHYR_KERNEL_FUNCS_IN_SECT

#include <linker/kobject-text.ld>

		MMU_PAGE_ALIGN_PERM

		lnkr_pinned_text_end = .;
	} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	MMU_PAGE_ALIGN_PERM

	lnkr_pinned_rodata_start = .;

#include <linker/common-rom.ld>
#include <linker/thread-local-storage.ld>

	SECTION_PROLOGUE(pinned.rodata,,)
	{
#include <arch/x86/ia32/scripts/static_intr.ld>

		LIB_KERNEL_IN_SECT(rodata)
		LIB_ARCH_X86_IN_SECT(rodata)

		*(.pinned_rodata)
		*(.pinned_rodata.*)

		LIB_ZEPHYR_IN_SECT(rodata)
		LIB_C_IN_SECT(rodata)
		LIB_DRIVERS_IN_SECT(rodata)

		/* Static strings */
		*(.rodata.str*.*)
		*(.rodata.*.str*.*)

#ifdef CONFIG_NEWLIB_LIBC
		*libc.a:(.rodata)
		*libc.a:(.rodata.*)
#endif /* CONFIG_NEWLIB_LIBC */

#include <snippets-rodata.ld>

#include <linker/kobject-rom.ld>

		MMU_PAGE_ALIGN_PERM

		lnkr_pinned_rodata_end = .;
	} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	SECTION_PROLOGUE(pinned.data,,)
	{
		MMU_PAGE_ALIGN_PERM

		lnkr_pinned_data_start = .;

		. = ALIGN(4);

#include <arch/x86/ia32/scripts/shared_kernel_pages.ld>
#include <arch/x86/ia32/scripts/dynamic_intr.ld>

		LIB_KERNEL_IN_SECT(data)
		LIB_ARCH_X86_IN_SECT(data)

		*(.pinned_data)
		*(.pinned_data.*)

		LIB_ZEPHYR_IN_SECT(data)
		LIB_C_IN_SECT(data)
		LIB_DRIVERS_IN_SECT(data)

	} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

#include <linker/common-ram.ld>
#include <arch/x86/pagetables.ld>
#include <linker/kobject-data.ld>

	lnkr_pinned_data_end = .;

	SECTION_PROLOGUE(pinned.bss, (NOLOAD),)
	{
		. = ALIGN(4);

		lnkr_pinned_bss_start = .;

		LIB_KERNEL_IN_SECT(bss)
		LIB_ARCH_X86_IN_SECT(bss)

		*(.pinned_bss)
		*(.pinned_bss.*)

		LIB_ZEPHYR_IN_SECT(bss)
		LIB_C_IN_SECT(bss)
		LIB_DRIVERS_IN_SECT(bss)

		lnkr_pinned_bss_end = .;
	} GROUP_NOLOAD_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

#ifdef CONFIG_USERSPACE
	/* PINNED APP SHARED MEMORY REGION */
#include <app_smem_pinned.ld>

	_app_smem_pinned_size = _app_smem_pinned_end - _app_smem_pinned_start;
	_app_smem_pinned_num_words = _app_smem_pinned_size >> 2;
#endif /* CONFIG_USERSPACE */

	SECTION_PROLOGUE(pinned.noinit, (NOLOAD),)
	{
		. = ALIGN(4);

		lnkr_pinned_noinit_start = .;

		LIB_KERNEL_IN_SECT(noinit)
		LIB_ARCH_X86_IN_SECT(noinit)

		*(.pinned_noinit)
		*(.pinned_noinit.*)

		LIB_ZEPHYR_IN_SECT(noinit)
		LIB_C_IN_SECT(noinit)
		LIB_DRIVERS_IN_SECT(noinit)

#ifdef CONFIG_ZTEST
		/* For tests/kernel/mem_slab/ tests */
		*(.noinit.*.k_mem_slab_buf_*)

		/* For tests/kernel/mem_heap tests */
		*(.noinit.*.kheap_buf_*)

		/* Pin ztest_thread_stack.
		 * This must be done or else double fault
		 * may arise: testing exceptions while
		 * page fault for the ztest stack.
		 */
		*libsubsys__testsuite__ztest.a:(.noinit.*)
#endif

		lnkr_pinned_noinit_end = .;

		MMU_PAGE_ALIGN

		lnkr_pinned_end = .;

	} GROUP_NOLOAD_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	lnkr_pinned_text_size = lnkr_pinned_text_end - lnkr_pinned_text_start;
	lnkr_pinned_rodata_size = lnkr_pinned_rodata_end - lnkr_pinned_rodata_start;
	lnkr_pinned_data_size = lnkr_pinned_data_end - lnkr_pinned_data_start;
	lnkr_pinned_bss_size = lnkr_pinned_bss_end - lnkr_pinned_bss_start;
	lnkr_pinned_noinit_size = lnkr_pinned_noinit_end - lnkr_pinned_noinit_start;

#endif /* CONFIG_LINKER_USE_PINNED_SECTION */

#if defined(CONFIG_DEMAND_PAGING) && !defined(CONFIG_LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT)
/* From now on, put symbols into FLASH */
#undef ROMABLE_REGION
#define ROMABLE_REGION	FLASH

	/* This is to align the following sections in flash
	 * to their corresponding virtual addresses.
	 * In other words, the offset from start of flash
	 * for these sections would be the same from start of
	 * their virtual addresses. This provides a simple and
	 * direct mapping from backing store.
	 */
	flash_load_offset :
	{
		. = FLASH_ROM_ADDR + (lnkr_pinned_end - KERNEL_BASE_ADDR);
	} > FLASH AT > FLASH

#endif

	GROUP_START(ROMABLE_REGION)

	. = ALIGN(8);

	SECTION_PROLOGUE(_TEXT_SECTION_NAME,,)
	{
	__text_region_start = .;

#if !defined(CONFIG_LINKER_USE_BOOT_SECTION) || \
    !defined(CONFIG_LINKER_USE_PINNED_SECTION)
	z_mapped_start = .;
#endif

#if !defined(CONFIG_LINKER_USE_BOOT_SECTION) || \
    !defined(CONFIG_LINKER_USE_PINNED_SECTION)
/* Located in generated directory. This file is populated by calling
 * zephyr_linker_sources(ROM_START ...). This typically contains the vector
 * table and debug information.
 */
#include <snippets-rom-start.ld>
#endif

	/* Needs KEEP() as ENTRY() is given a physical address */
	KEEP(*(.text.__start))
	*(.text)
	*(".text.*")
	*(.gnu.linkonce.t.*)
	*(.init)
	*(.fini)
	*(.eini)

#ifndef CONFIG_LINKER_USE_PINNED_SECTION
#include <linker/kobject-text.ld>
#endif

	MMU_PAGE_ALIGN_PERM
	} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	__text_region_end = .;
	__text_region_size = __text_region_end - __text_region_start;
	__rodata_region_start = .;

#ifndef CONFIG_LINKER_USE_PINNED_SECTION
#include <linker/common-rom.ld>
#include <linker/thread-local-storage.ld>
#endif

	SECTION_PROLOGUE(_RODATA_SECTION_NAME,,)
	{
	*(.rodata)
	*(".rodata.*")
	*(.gnu.linkonce.r.*)

#ifndef CONFIG_DYNAMIC_INTERRUPTS
#ifndef CONFIG_LINKER_USE_PINNED_SECTION
#include <arch/x86/ia32/scripts/static_intr.ld>
#endif /* !CONFIG_LINKER_USE_PINNED_SECTION */
#endif /* CONFIG_DYNAMIC_INTERRUPTS */

#ifndef CONFIG_LINKER_USE_PINNED_SECTION
/* Located in generated directory. This file is populated by the
 * zephyr_linker_sources() Cmake function.
 */
#include <snippets-rodata.ld>

#include <linker/kobject-rom.ld>
#endif
	} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

#include <linker/cplusplus-rom.ld>

	MMU_PAGE_ALIGN_PERM
	/* ROM ends here, position counter will now be in RAM areas */
	__rodata_region_end = .;
	__rodata_region_size = __rodata_region_end - __rodata_region_start;
	GROUP_END(ROMABLE_REGION)
	/*
	 * Needed for dynamic linking which we do not have, do discard
	 */
	/DISCARD/ : {
		*(.got.plt)
		*(.igot.plt)
		*(.got)
		*(.igot)
	}
	/* RAMABLE_REGION */
	GROUP_START(RAMABLE_REGION)

/* Located in generated directory. This file is populated by the
 * zephyr_linker_sources() Cmake function.
 */
#include <snippets-ram-sections.ld>

#ifdef CONFIG_USERSPACE
	/* APP SHARED MEMORY REGION */
#include <app_smem.ld>

	_image_ram_start = _app_smem_start;
	_app_smem_size = _app_smem_end - _app_smem_start;
	_app_smem_num_words = _app_smem_size >> 2;
	_app_smem_rom_start = LOADADDR(_APP_SMEM_SECTION_NAME);
#endif /* CONFIG_USERSPACE */

	SECTION_PROLOGUE(_BSS_SECTION_NAME, (NOLOAD),)
	{
	MMU_PAGE_ALIGN_PERM
#if !defined(CONFIG_USERSPACE)
	_image_ram_start = .;
#endif
	/*
	 * For performance, BSS section is forced to be both 4 byte aligned and
	 * a multiple of 4 bytes.
	 */
	. = ALIGN(4);
	__kernel_ram_start = .;
	__bss_start = .;

	*(.bss)
	*(".bss.*")
	*(COMMON)
	*(".kernel_bss.*")

	/*
	 * As memory is cleared in words only, it is simpler to ensure the BSS
	 * section ends on a 4 byte boundary. This wastes a maximum of 3 bytes.
	 */
	. = ALIGN(4);
	__bss_end = .;
	} GROUP_NOLOAD_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	__bss_num_words	= (__bss_end - __bss_start) >> 2;

#include <linker/common-noinit.ld>

	MMU_PAGE_ALIGN_PERM

	SECTION_DATA_PROLOGUE(_DATA_SECTION_NAME,,)
	{

	__data_ram_start = .;

	*(.data)
	*(".data.*")
	*(".kernel.*")

#ifdef CONFIG_DYNAMIC_INTERRUPTS
#ifndef CONFIG_LINKER_USE_PINNED_SECTION
#include <arch/x86/ia32/scripts/dynamic_intr.ld>
#endif /* !CONFIG_LINKER_USE_PINNED_SECTION */
#endif /* CONFIG_DYNAMIC_INTERRUPTS */

/* Located in generated directory. This file is populated by the
 * zephyr_linker_sources() Cmake function.
 */
#include <snippets-rwdata.ld>

#ifndef CONFIG_LINKER_USE_PINNED_SECTION
#include <arch/x86/ia32/scripts/shared_kernel_pages.ld>
#endif /* !CONFIG_LINKER_USE_PINNED_SECTION */

	. = ALIGN(4);
	} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	__data_rom_start = LOADADDR(_DATA_SECTION_NAME);

#include <linker/cplusplus-ram.ld>

#ifndef CONFIG_LINKER_USE_PINNED_SECTION
#include <linker/common-ram.ld>
#include <arch/x86/pagetables.ld>

/* Must be last in RAM */
#include <linker/kobject-data.ld>
#endif /* !CONFIG_LINKER_USE_PINNED_SECTION */

	MMU_PAGE_ALIGN
	__data_ram_end = .;

	/* All unused memory also owned by the kernel for heaps */
	__kernel_ram_end = KERNEL_BASE_ADDR + KERNEL_RAM_SIZE;
	__kernel_ram_size = __kernel_ram_end - __kernel_ram_start;

	_image_ram_end = .;
	_image_ram_all = (KERNEL_BASE_ADDR + KERNEL_RAM_SIZE) - _image_ram_start;

	z_mapped_end = .;
	z_mapped_size = z_mapped_end - z_mapped_start;
	_end = .; /* end of image */

	GROUP_END(RAMABLE_REGION)

#ifndef LINKER_ZEPHYR_FINAL
	/* static interrupts */
	SECTION_PROLOGUE(intList,,)
	{
	KEEP(*(.spurIsr))
	KEEP(*(.spurNoErrIsr))
	KEEP(*(.intList))
	KEEP(*(.gnu.linkonce.intList.*))
	} > IDT_LIST
#else
	/DISCARD/ :
	{
	KEEP(*(.spurIsr))
	KEEP(*(.spurNoErrIsr))
	KEEP(*(.intList))
	KEEP(*(.gnu.linkonce.intList.*))
	}
#endif

/* Located in generated directory. This file is populated by the
 * zephyr_linker_sources() Cmake function.
 */
#include <snippets-sections.ld>

#include <linker/debug-sections.ld>

	/DISCARD/ : { *(.note.GNU-stack) }

	}