Title: Exploiting Hierarchy in the Abstraction-Based Verification of Statecharts Using SMT Solvers,
Abstract: Statecharts are frequently used as a modeling formalism in the design of
state-based systems. Formal verification techniques are also often applied to
prove certain properties about the behavior of the system. One of the most
efficient techniques for formal verification is Counterexample-Guided
Abstraction Refinement (CEGAR), which reduces the complexity of systems by
automatically building and refining abstractions. In our paper we present a
novel adaptation of the CEGAR approach to hierarchical statechart models. First
we introduce an encoding of the statechart to logical formulas that preserves
information about the state hierarchy. Based on this encoding we propose
abstraction and refinement techniques that utilize the hierarchical structure
of statecharts and also handle variables in the model. The encoding allows us
to use SMT solvers for the systematic exploration and verification of the
abstract model, including also bounded model checking. We demonstrate the
applicability and efficiency of our abstraction techniques with measurements on
an industry-motivated example.