Title: Nanoscale superconducting memory based on the kinetic inductance of asymmetric nanowire loops,
Abstract: The demand for low-dissipation nanoscale memory devices is as strong as ever.
As Moore's Law is staggering, and the demand for a low-power-consuming
supercomputer is high, the goal of making information processing circuits out
of superconductors is one of the central goals of modern technology and
physics. So far, digital superconducting circuits could not demonstrate their
immense potential. One important reason for this is that a dense
superconducting memory technology is not yet available. Miniaturization of
traditional superconducting quantum interference devices is difficult below a
few micrometers because their operation relies on the geometric inductance of
the superconducting loop. Magnetic memories do allow nanometer-scale
miniaturization, but they are not purely superconducting (Baek et al 2014 Nat.
Commun. 5 3888). Our approach is to make nanometer scale memory cells based on
the kinetic inductance (and not geometric inductance) of superconducting
nanowire loops, which have already shown many fascinating properties (Aprili
2006 Nat. Nanotechnol. 1 15; Hopkins et al 2005 Science 308 1762). This allows
much smaller devices and naturally eliminates magnetic-field cross-talk. We
demonstrate that the vorticity, i.e., the winding number of the order
parameter, of a closed superconducting loop can be used for realizing a
nanoscale nonvolatile memory device. We demonstrate how to alter the vorticity
in a controlled fashion by applying calibrated current pulses. A reliable
read-out of the memory is also demonstrated. We present arguments that such
memory can be developed to operate without energy dissipation.