Title: Characterisation of novel prototypes of monolithic HV-CMOS pixel detectors for high energy physics experiments,
Abstract: An upgrade of the ATLAS experiment for the High Luminosity phase of LHC is
planned for 2024 and foresees the replacement of the present Inner Detector
(ID) with a new Inner Tracker (ITk) completely made of silicon devices.
Depleted active pixel sensors built with the High Voltage CMOS (HV-CMOS)
technology are investigated as an option to cover large areas in the outermost
layers of the pixel detector and are especially interesting for the development
of monolithic devices which will reduce the production costs and the material
budget with respect to the present hybrid assemblies. For this purpose the
H35DEMO, a large area HV-CMOS demonstrator chip, was designed by KIT, IFAE and
University of Liverpool, and produced in AMS 350 nm CMOS technology. It
consists of four pixel matrices and additional test structures. Two of the
matrices include amplifiers and discriminator stages and are thus designed to
be operated as monolithic detectors. In these devices the signal is mainly
produced by charge drift in a small depleted volume obtained by applying a bias
voltage of the order of 100 V. Moreover, to enhance the radiation hardness of
the chip, this technology allows to enclose the electronics in the same deep
N-WELLs which are also used as collecting electrodes. In this contribution the
characterisation of H35DEMO chips and results of the very first beam test
measurements of the monolithic CMOS matrices with high energetic pions at CERN
SPS will be presented.