###
### This file was automatically generated
###

from archinfo.arch import register_arch, Endness, Register

from .common import ArchPcode


class ArchPcode_PowerPC_LE_32_QUICC(ArchPcode):
    name = 'PowerPC:LE:32:QUICC'
    pcode_arch = 'PowerPC:LE:32:QUICC'
    description = 'PowerQUICC-III 32-bit little endian family'
    bits = 32
    ip_offset = 0x780
    sp_offset = 0x4
    bp_offset = sp_offset
    instruction_endness = Endness.LE
    register_list = [
        Register('r0', 4, 0x0),
        Register('r1', 4, 0x4),
        Register('r2', 4, 0x8),
        Register('r3', 4, 0xc),
        Register('r4', 4, 0x10),
        Register('r5', 4, 0x14),
        Register('r6', 4, 0x18),
        Register('r7', 4, 0x1c),
        Register('r8', 4, 0x20),
        Register('r9', 4, 0x24),
        Register('r10', 4, 0x28),
        Register('r11', 4, 0x2c),
        Register('r12', 4, 0x30),
        Register('r13', 4, 0x34),
        Register('r14', 4, 0x38),
        Register('r15', 4, 0x3c),
        Register('r16', 4, 0x40),
        Register('r17', 4, 0x44),
        Register('r18', 4, 0x48),
        Register('r19', 4, 0x4c),
        Register('r20', 4, 0x50),
        Register('r21', 4, 0x54),
        Register('r22', 4, 0x58),
        Register('r23', 4, 0x5c),
        Register('r24', 4, 0x60),
        Register('r25', 4, 0x64),
        Register('r26', 4, 0x68),
        Register('r27', 4, 0x6c),
        Register('r28', 4, 0x70),
        Register('r29', 4, 0x74),
        Register('r30', 4, 0x78),
        Register('r31', 4, 0x7c),
        Register('xer_so', 1, 0x400),
        Register('xer_ov', 1, 0x401),
        Register('xer_ov32', 1, 0x402),
        Register('xer_ca', 1, 0x403),
        Register('xer_ca32', 1, 0x404),
        Register('xer_count', 1, 0x405),
        Register('fp_fx', 1, 0x500),
        Register('fp_fex', 1, 0x501),
        Register('fp_vx', 1, 0x502),
        Register('fp_ox', 1, 0x503),
        Register('fp_ux', 1, 0x504),
        Register('fp_zx', 1, 0x505),
        Register('fp_xx', 1, 0x506),
        Register('fp_vxsnan', 1, 0x507),
        Register('fp_vxisi', 1, 0x508),
        Register('fp_vxidi', 1, 0x509),
        Register('fp_vxzdz', 1, 0x50a),
        Register('fp_vximz', 1, 0x50b),
        Register('fp_vxvc', 1, 0x50c),
        Register('fp_fr', 1, 0x50d),
        Register('fp_fi', 1, 0x50e),
        Register('fp_c', 1, 0x50f),
        Register('fp_cc0', 1, 0x510),
        Register('fp_cc1', 1, 0x511),
        Register('fp_cc2', 1, 0x512),
        Register('fp_cc3', 1, 0x513),
        Register('fp_reserve1', 1, 0x514),
        Register('fp_vxsoft', 1, 0x515),
        Register('fp_vxsqrt', 1, 0x516),
        Register('fp_vxcvi', 1, 0x517),
        Register('fp_ve', 1, 0x518),
        Register('fp_oe', 1, 0x519),
        Register('fp_ue', 1, 0x51a),
        Register('fp_ze', 1, 0x51b),
        Register('fp_xe', 1, 0x51c),
        Register('fp_ni', 1, 0x51d),
        Register('fp_rn0', 1, 0x51e),
        Register('fp_rn1', 1, 0x51f),
        Register('msr', 4, 0x700),
        Register('reserve_address', 4, 0x720),
        Register('reserve', 1, 0x728),
        Register('reserve_length', 1, 0x730),
        Register('pc', 4, 0x780, alias_names=('ip',)),
        Register('sr0', 4, 0x800),
        Register('sr1', 4, 0x804),
        Register('sr2', 4, 0x808),
        Register('sr3', 4, 0x80c),
        Register('sr4', 4, 0x810),
        Register('sr5', 4, 0x814),
        Register('sr6', 4, 0x818),
        Register('sr7', 4, 0x81c),
        Register('sr8', 4, 0x820),
        Register('sr9', 4, 0x824),
        Register('sr10', 4, 0x828),
        Register('sr11', 4, 0x82c),
        Register('sr12', 4, 0x830),
        Register('sr13', 4, 0x834),
        Register('sr14', 4, 0x838),
        Register('sr15', 4, 0x83c),
        Register('crall', 8, 0x900),
        Register('cr0', 1, 0x900),
        Register('cr1', 1, 0x901),
        Register('cr2', 1, 0x902),
        Register('cr3', 1, 0x903),
        Register('cr4', 1, 0x904),
        Register('cr5', 1, 0x905),
        Register('cr6', 1, 0x906),
        Register('cr7', 1, 0x907),
        Register('tea', 4, 0x980),
        Register('r2save', 4, 0x988),
        Register('spr000', 4, 0x1000),
        Register('xer', 4, 0x1004),
        Register('spr002', 4, 0x1008),
        Register('spr003', 4, 0x100c),
        Register('spr004', 4, 0x1010),
        Register('spr005', 4, 0x1014),
        Register('spr006', 4, 0x1018),
        Register('spr007', 4, 0x101c),
        Register('lr', 4, 0x1020),
        Register('ctr', 4, 0x1024),
        Register('spr00a', 4, 0x1028),
        Register('spr00b', 4, 0x102c),
        Register('spr00c', 4, 0x1030),
        Register('spr00d', 4, 0x1034),
        Register('spr00e', 4, 0x1038),
        Register('spr00f', 4, 0x103c),
        Register('spr010', 4, 0x1040),
        Register('spr011', 4, 0x1044),
        Register('spr012', 4, 0x1048),
        Register('spr013', 4, 0x104c),
        Register('spr014', 4, 0x1050),
        Register('spr015', 4, 0x1054),
        Register('spr016', 4, 0x1058),
        Register('spr017', 4, 0x105c),
        Register('spr018', 4, 0x1060),
        Register('spr019', 4, 0x1064),
        Register('srr0', 4, 0x1068),
        Register('srr1', 4, 0x106c),
        Register('spr01c', 4, 0x1070),
        Register('spr01d', 4, 0x1074),
        Register('spr01e', 4, 0x1078),
        Register('spr01f', 4, 0x107c),
        Register('spr020', 4, 0x1080),
        Register('spr021', 4, 0x1084),
        Register('spr022', 4, 0x1088),
        Register('spr023', 4, 0x108c),
        Register('spr024', 4, 0x1090),
        Register('spr025', 4, 0x1094),
        Register('spr026', 4, 0x1098),
        Register('spr027', 4, 0x109c),
        Register('spr028', 4, 0x10a0),
        Register('spr029', 4, 0x10a4),
        Register('spr02a', 4, 0x10a8),
        Register('spr02b', 4, 0x10ac),
        Register('spr02c', 4, 0x10b0),
        Register('spr02d', 4, 0x10b4),
        Register('spr02e', 4, 0x10b8),
        Register('spr02f', 4, 0x10bc),
        Register('spr030', 4, 0x10c0),
        Register('spr031', 4, 0x10c4),
        Register('spr032', 4, 0x10c8),
        Register('spr033', 4, 0x10cc),
        Register('spr034', 4, 0x10d0),
        Register('spr035', 4, 0x10d4),
        Register('spr036', 4, 0x10d8),
        Register('spr037', 4, 0x10dc),
        Register('spr038', 4, 0x10e0),
        Register('spr039', 4, 0x10e4),
        Register('spr03a', 4, 0x10e8),
        Register('spr03b', 4, 0x10ec),
        Register('spr03c', 4, 0x10f0),
        Register('spr03d', 4, 0x10f4),
        Register('spr03e', 4, 0x10f8),
        Register('spr03f', 4, 0x10fc),
        Register('spr040', 4, 0x1100),
        Register('spr041', 4, 0x1104),
        Register('spr042', 4, 0x1108),
        Register('spr043', 4, 0x110c),
        Register('spr044', 4, 0x1110),
        Register('spr045', 4, 0x1114),
        Register('spr046', 4, 0x1118),
        Register('spr047', 4, 0x111c),
        Register('spr048', 4, 0x1120),
        Register('spr049', 4, 0x1124),
        Register('spr04a', 4, 0x1128),
        Register('spr04b', 4, 0x112c),
        Register('spr04c', 4, 0x1130),
        Register('spr04d', 4, 0x1134),
        Register('spr04e', 4, 0x1138),
        Register('spr04f', 4, 0x113c),
        Register('spr050', 4, 0x1140),
        Register('spr051', 4, 0x1144),
        Register('spr052', 4, 0x1148),
        Register('spr053', 4, 0x114c),
        Register('spr054', 4, 0x1150),
        Register('spr055', 4, 0x1154),
        Register('spr056', 4, 0x1158),
        Register('spr057', 4, 0x115c),
        Register('spr058', 4, 0x1160),
        Register('spr059', 4, 0x1164),
        Register('spr05a', 4, 0x1168),
        Register('spr05b', 4, 0x116c),
        Register('spr05c', 4, 0x1170),
        Register('spr05d', 4, 0x1174),
        Register('spr05e', 4, 0x1178),
        Register('spr05f', 4, 0x117c),
        Register('spr060', 4, 0x1180),
        Register('spr061', 4, 0x1184),
        Register('spr062', 4, 0x1188),
        Register('spr063', 4, 0x118c),
        Register('spr064', 4, 0x1190),
        Register('spr065', 4, 0x1194),
        Register('spr066', 4, 0x1198),
        Register('spr067', 4, 0x119c),
        Register('spr068', 4, 0x11a0),
        Register('spr069', 4, 0x11a4),
        Register('spr06a', 4, 0x11a8),
        Register('spr06b', 4, 0x11ac),
        Register('spr06c', 4, 0x11b0),
        Register('spr06d', 4, 0x11b4),
        Register('spr06e', 4, 0x11b8),
        Register('spr06f', 4, 0x11bc),
        Register('spr070', 4, 0x11c0),
        Register('spr071', 4, 0x11c4),
        Register('spr072', 4, 0x11c8),
        Register('spr073', 4, 0x11cc),
        Register('spr074', 4, 0x11d0),
        Register('spr075', 4, 0x11d4),
        Register('spr076', 4, 0x11d8),
        Register('spr077', 4, 0x11dc),
        Register('spr078', 4, 0x11e0),
        Register('spr079', 4, 0x11e4),
        Register('spr07a', 4, 0x11e8),
        Register('spr07b', 4, 0x11ec),
        Register('spr07c', 4, 0x11f0),
        Register('spr07d', 4, 0x11f4),
        Register('spr07e', 4, 0x11f8),
        Register('spr07f', 4, 0x11fc),
        Register('spr080', 4, 0x1200),
        Register('spr081', 4, 0x1204),
        Register('spr082', 4, 0x1208),
        Register('spr083', 4, 0x120c),
        Register('spr084', 4, 0x1210),
        Register('spr085', 4, 0x1214),
        Register('spr086', 4, 0x1218),
        Register('spr087', 4, 0x121c),
        Register('spr088', 4, 0x1220),
        Register('spr089', 4, 0x1224),
        Register('spr08a', 4, 0x1228),
        Register('spr08b', 4, 0x122c),
        Register('spr08c', 4, 0x1230),
        Register('spr08d', 4, 0x1234),
        Register('spr08e', 4, 0x1238),
        Register('spr08f', 4, 0x123c),
        Register('spr090', 4, 0x1240),
        Register('spr091', 4, 0x1244),
        Register('spr092', 4, 0x1248),
        Register('spr093', 4, 0x124c),
        Register('spr094', 4, 0x1250),
        Register('spr095', 4, 0x1254),
        Register('spr096', 4, 0x1258),
        Register('spr097', 4, 0x125c),
        Register('spr098', 4, 0x1260),
        Register('spr099', 4, 0x1264),
        Register('spr09a', 4, 0x1268),
        Register('spr09b', 4, 0x126c),
        Register('spr09c', 4, 0x1270),
        Register('spr09d', 4, 0x1274),
        Register('spr09e', 4, 0x1278),
        Register('spr09f', 4, 0x127c),
        Register('spr0a0', 4, 0x1280),
        Register('spr0a1', 4, 0x1284),
        Register('spr0a2', 4, 0x1288),
        Register('spr0a3', 4, 0x128c),
        Register('spr0a4', 4, 0x1290),
        Register('spr0a5', 4, 0x1294),
        Register('spr0a6', 4, 0x1298),
        Register('spr0a7', 4, 0x129c),
        Register('spr0a8', 4, 0x12a0),
        Register('spr0a9', 4, 0x12a4),
        Register('spr0aa', 4, 0x12a8),
        Register('spr0ab', 4, 0x12ac),
        Register('spr0ac', 4, 0x12b0),
        Register('spr0ad', 4, 0x12b4),
        Register('spr0ae', 4, 0x12b8),
        Register('spr0af', 4, 0x12bc),
        Register('spr0b0', 4, 0x12c0),
        Register('spr0b1', 4, 0x12c4),
        Register('spr0b2', 4, 0x12c8),
        Register('spr0b3', 4, 0x12cc),
        Register('spr0b4', 4, 0x12d0),
        Register('spr0b5', 4, 0x12d4),
        Register('spr0b6', 4, 0x12d8),
        Register('spr0b7', 4, 0x12dc),
        Register('spr0b8', 4, 0x12e0),
        Register('spr0b9', 4, 0x12e4),
        Register('spr0ba', 4, 0x12e8),
        Register('spr0bb', 4, 0x12ec),
        Register('spr0bc', 4, 0x12f0),
        Register('spr0bd', 4, 0x12f4),
        Register('spr0be', 4, 0x12f8),
        Register('spr0bf', 4, 0x12fc),
        Register('spr0c0', 4, 0x1300),
        Register('spr0c1', 4, 0x1304),
        Register('spr0c2', 4, 0x1308),
        Register('spr0c3', 4, 0x130c),
        Register('spr0c4', 4, 0x1310),
        Register('spr0c5', 4, 0x1314),
        Register('spr0c6', 4, 0x1318),
        Register('spr0c7', 4, 0x131c),
        Register('spr0c8', 4, 0x1320),
        Register('spr0c9', 4, 0x1324),
        Register('spr0ca', 4, 0x1328),
        Register('spr0cb', 4, 0x132c),
        Register('spr0cc', 4, 0x1330),
        Register('spr0cd', 4, 0x1334),
        Register('spr0ce', 4, 0x1338),
        Register('spr0cf', 4, 0x133c),
        Register('spr0d0', 4, 0x1340),
        Register('spr0d1', 4, 0x1344),
        Register('spr0d2', 4, 0x1348),
        Register('spr0d3', 4, 0x134c),
        Register('spr0d4', 4, 0x1350),
        Register('spr0d5', 4, 0x1354),
        Register('spr0d6', 4, 0x1358),
        Register('spr0d7', 4, 0x135c),
        Register('spr0d8', 4, 0x1360),
        Register('spr0d9', 4, 0x1364),
        Register('spr0da', 4, 0x1368),
        Register('spr0db', 4, 0x136c),
        Register('spr0dc', 4, 0x1370),
        Register('spr0dd', 4, 0x1374),
        Register('spr0de', 4, 0x1378),
        Register('spr0df', 4, 0x137c),
        Register('spr0e0', 4, 0x1380),
        Register('spr0e1', 4, 0x1384),
        Register('spr0e2', 4, 0x1388),
        Register('spr0e3', 4, 0x138c),
        Register('spr0e4', 4, 0x1390),
        Register('spr0e5', 4, 0x1394),
        Register('spr0e6', 4, 0x1398),
        Register('spr0e7', 4, 0x139c),
        Register('spr0e8', 4, 0x13a0),
        Register('spr0e9', 4, 0x13a4),
        Register('spr0ea', 4, 0x13a8),
        Register('spr0eb', 4, 0x13ac),
        Register('spr0ec', 4, 0x13b0),
        Register('spr0ed', 4, 0x13b4),
        Register('spr0ee', 4, 0x13b8),
        Register('spr0ef', 4, 0x13bc),
        Register('spr0f0', 4, 0x13c0),
        Register('spr0f1', 4, 0x13c4),
        Register('spr0f2', 4, 0x13c8),
        Register('spr0f3', 4, 0x13cc),
        Register('spr0f4', 4, 0x13d0),
        Register('spr0f5', 4, 0x13d4),
        Register('spr0f6', 4, 0x13d8),
        Register('spr0f7', 4, 0x13dc),
        Register('spr0f8', 4, 0x13e0),
        Register('spr0f9', 4, 0x13e4),
        Register('spr0fa', 4, 0x13e8),
        Register('spr0fb', 4, 0x13ec),
        Register('spr0fc', 4, 0x13f0),
        Register('spr0fd', 4, 0x13f4),
        Register('spr0fe', 4, 0x13f8),
        Register('spr0ff', 4, 0x13fc),
        Register('spr100', 4, 0x1400),
        Register('spr101', 4, 0x1404),
        Register('spr102', 4, 0x1408),
        Register('spr103', 4, 0x140c),
        Register('spr104', 4, 0x1410),
        Register('spr105', 4, 0x1414),
        Register('spr106', 4, 0x1418),
        Register('spr107', 4, 0x141c),
        Register('spr108', 4, 0x1420),
        Register('spr109', 4, 0x1424),
        Register('spr10a', 4, 0x1428),
        Register('spr10b', 4, 0x142c),
        Register('tblr', 4, 0x1430),
        Register('tbur', 4, 0x1434),
        Register('spr10e', 4, 0x1438),
        Register('spr10f', 4, 0x143c),
        Register('spr110', 4, 0x1440),
        Register('spr111', 4, 0x1444),
        Register('spr112', 4, 0x1448),
        Register('spr113', 4, 0x144c),
        Register('spr114', 4, 0x1450),
        Register('spr115', 4, 0x1454),
        Register('spr116', 4, 0x1458),
        Register('spr117', 4, 0x145c),
        Register('spr118', 4, 0x1460),
        Register('spr119', 4, 0x1464),
        Register('spr11a', 4, 0x1468),
        Register('spr11b', 4, 0x146c),
        Register('tblw', 4, 0x1470),
        Register('tbuw', 4, 0x1474),
        Register('spr11e', 4, 0x1478),
        Register('spr11f', 4, 0x147c),
        Register('spr120', 4, 0x1480),
        Register('spr121', 4, 0x1484),
        Register('spr122', 4, 0x1488),
        Register('spr123', 4, 0x148c),
        Register('spr124', 4, 0x1490),
        Register('spr125', 4, 0x1494),
        Register('spr126', 4, 0x1498),
        Register('spr127', 4, 0x149c),
        Register('spr128', 4, 0x14a0),
        Register('spr129', 4, 0x14a4),
        Register('spr12a', 4, 0x14a8),
        Register('spr12b', 4, 0x14ac),
        Register('spr12c', 4, 0x14b0),
        Register('spr12d', 4, 0x14b4),
        Register('spr12e', 4, 0x14b8),
        Register('spr12f', 4, 0x14bc),
        Register('spr130', 4, 0x14c0),
        Register('spr131', 4, 0x14c4),
        Register('spr132', 4, 0x14c8),
        Register('spr133', 4, 0x14cc),
        Register('spr134', 4, 0x14d0),
        Register('spr135', 4, 0x14d4),
        Register('spr136', 4, 0x14d8),
        Register('spr137', 4, 0x14dc),
        Register('spr138', 4, 0x14e0),
        Register('spr139', 4, 0x14e4),
        Register('spr13a', 4, 0x14e8),
        Register('spr13b', 4, 0x14ec),
        Register('spr13c', 4, 0x14f0),
        Register('spr13d', 4, 0x14f4),
        Register('spr13e', 4, 0x14f8),
        Register('spr13f', 4, 0x14fc),
        Register('spr140', 4, 0x1500),
        Register('spr141', 4, 0x1504),
        Register('spr142', 4, 0x1508),
        Register('spr143', 4, 0x150c),
        Register('spr144', 4, 0x1510),
        Register('spr145', 4, 0x1514),
        Register('spr146', 4, 0x1518),
        Register('spr147', 4, 0x151c),
        Register('spr148', 4, 0x1520),
        Register('spr149', 4, 0x1524),
        Register('spr14a', 4, 0x1528),
        Register('spr14b', 4, 0x152c),
        Register('spr14c', 4, 0x1530),
        Register('spr14d', 4, 0x1534),
        Register('spr14e', 4, 0x1538),
        Register('spr14f', 4, 0x153c),
        Register('spr150', 4, 0x1540),
        Register('spr151', 4, 0x1544),
        Register('spr152', 4, 0x1548),
        Register('spr153', 4, 0x154c),
        Register('spr154', 4, 0x1550),
        Register('spr155', 4, 0x1554),
        Register('spr156', 4, 0x1558),
        Register('spr157', 4, 0x155c),
        Register('spr158', 4, 0x1560),
        Register('spr159', 4, 0x1564),
        Register('spr15a', 4, 0x1568),
        Register('spr15b', 4, 0x156c),
        Register('spr15c', 4, 0x1570),
        Register('spr15d', 4, 0x1574),
        Register('spr15e', 4, 0x1578),
        Register('spr15f', 4, 0x157c),
        Register('spr160', 4, 0x1580),
        Register('spr161', 4, 0x1584),
        Register('spr162', 4, 0x1588),
        Register('spr163', 4, 0x158c),
        Register('spr164', 4, 0x1590),
        Register('spr165', 4, 0x1594),
        Register('spr166', 4, 0x1598),
        Register('spr167', 4, 0x159c),
        Register('spr168', 4, 0x15a0),
        Register('spr169', 4, 0x15a4),
        Register('spr16a', 4, 0x15a8),
        Register('spr16b', 4, 0x15ac),
        Register('spr16c', 4, 0x15b0),
        Register('spr16d', 4, 0x15b4),
        Register('spr16e', 4, 0x15b8),
        Register('spr16f', 4, 0x15bc),
        Register('spr170', 4, 0x15c0),
        Register('spr171', 4, 0x15c4),
        Register('spr172', 4, 0x15c8),
        Register('spr173', 4, 0x15cc),
        Register('spr174', 4, 0x15d0),
        Register('spr175', 4, 0x15d4),
        Register('spr176', 4, 0x15d8),
        Register('spr177', 4, 0x15dc),
        Register('spr178', 4, 0x15e0),
        Register('spr179', 4, 0x15e4),
        Register('spr17a', 4, 0x15e8),
        Register('spr17b', 4, 0x15ec),
        Register('spr17c', 4, 0x15f0),
        Register('spr17d', 4, 0x15f4),
        Register('spr17e', 4, 0x15f8),
        Register('spr17f', 4, 0x15fc),
        Register('spr180', 4, 0x1600),
        Register('spr181', 4, 0x1604),
        Register('spr182', 4, 0x1608),
        Register('spr183', 4, 0x160c),
        Register('spr184', 4, 0x1610),
        Register('spr185', 4, 0x1614),
        Register('spr186', 4, 0x1618),
        Register('spr187', 4, 0x161c),
        Register('spr188', 4, 0x1620),
        Register('spr189', 4, 0x1624),
        Register('spr18a', 4, 0x1628),
        Register('spr18b', 4, 0x162c),
        Register('spr18c', 4, 0x1630),
        Register('spr18d', 4, 0x1634),
        Register('spr18e', 4, 0x1638),
        Register('spr18f', 4, 0x163c),
        Register('spr190', 4, 0x1640),
        Register('spr191', 4, 0x1644),
        Register('spr192', 4, 0x1648),
        Register('spr193', 4, 0x164c),
        Register('spr194', 4, 0x1650),
        Register('spr195', 4, 0x1654),
        Register('spr196', 4, 0x1658),
        Register('spr197', 4, 0x165c),
        Register('spr198', 4, 0x1660),
        Register('spr199', 4, 0x1664),
        Register('spr19a', 4, 0x1668),
        Register('spr19b', 4, 0x166c),
        Register('spr19c', 4, 0x1670),
        Register('spr19d', 4, 0x1674),
        Register('spr19e', 4, 0x1678),
        Register('spr19f', 4, 0x167c),
        Register('spr1a0', 4, 0x1680),
        Register('spr1a1', 4, 0x1684),
        Register('spr1a2', 4, 0x1688),
        Register('spr1a3', 4, 0x168c),
        Register('spr1a4', 4, 0x1690),
        Register('spr1a5', 4, 0x1694),
        Register('spr1a6', 4, 0x1698),
        Register('spr1a7', 4, 0x169c),
        Register('spr1a8', 4, 0x16a0),
        Register('spr1a9', 4, 0x16a4),
        Register('spr1aa', 4, 0x16a8),
        Register('spr1ab', 4, 0x16ac),
        Register('spr1ac', 4, 0x16b0),
        Register('spr1ad', 4, 0x16b4),
        Register('spr1ae', 4, 0x16b8),
        Register('spr1af', 4, 0x16bc),
        Register('spr1b0', 4, 0x16c0),
        Register('spr1b1', 4, 0x16c4),
        Register('spr1b2', 4, 0x16c8),
        Register('spr1b3', 4, 0x16cc),
        Register('spr1b4', 4, 0x16d0),
        Register('spr1b5', 4, 0x16d4),
        Register('spr1b6', 4, 0x16d8),
        Register('spr1b7', 4, 0x16dc),
        Register('spr1b8', 4, 0x16e0),
        Register('spr1b9', 4, 0x16e4),
        Register('spr1ba', 4, 0x16e8),
        Register('spr1bb', 4, 0x16ec),
        Register('spr1bc', 4, 0x16f0),
        Register('spr1bd', 4, 0x16f4),
        Register('spr1be', 4, 0x16f8),
        Register('spr1bf', 4, 0x16fc),
        Register('spr1c0', 4, 0x1700),
        Register('spr1c1', 4, 0x1704),
        Register('spr1c2', 4, 0x1708),
        Register('spr1c3', 4, 0x170c),
        Register('spr1c4', 4, 0x1710),
        Register('spr1c5', 4, 0x1714),
        Register('spr1c6', 4, 0x1718),
        Register('spr1c7', 4, 0x171c),
        Register('spr1c8', 4, 0x1720),
        Register('spr1c9', 4, 0x1724),
        Register('spr1ca', 4, 0x1728),
        Register('spr1cb', 4, 0x172c),
        Register('spr1cc', 4, 0x1730),
        Register('spr1cd', 4, 0x1734),
        Register('spr1ce', 4, 0x1738),
        Register('spr1cf', 4, 0x173c),
        Register('spr1d0', 4, 0x1740),
        Register('spr1d1', 4, 0x1744),
        Register('spr1d2', 4, 0x1748),
        Register('spr1d3', 4, 0x174c),
        Register('spr1d4', 4, 0x1750),
        Register('spr1d5', 4, 0x1754),
        Register('spr1d6', 4, 0x1758),
        Register('spr1d7', 4, 0x175c),
        Register('spr1d8', 4, 0x1760),
        Register('spr1d9', 4, 0x1764),
        Register('spr1da', 4, 0x1768),
        Register('spr1db', 4, 0x176c),
        Register('spr1dc', 4, 0x1770),
        Register('spr1dd', 4, 0x1774),
        Register('spr1de', 4, 0x1778),
        Register('spr1df', 4, 0x177c),
        Register('spr1e0', 4, 0x1780),
        Register('spr1e1', 4, 0x1784),
        Register('spr1e2', 4, 0x1788),
        Register('spr1e3', 4, 0x178c),
        Register('spr1e4', 4, 0x1790),
        Register('spr1e5', 4, 0x1794),
        Register('spr1e6', 4, 0x1798),
        Register('spr1e7', 4, 0x179c),
        Register('spr1e8', 4, 0x17a0),
        Register('spr1e9', 4, 0x17a4),
        Register('spr1ea', 4, 0x17a8),
        Register('spr1eb', 4, 0x17ac),
        Register('spr1ec', 4, 0x17b0),
        Register('spr1ed', 4, 0x17b4),
        Register('spr1ee', 4, 0x17b8),
        Register('spr1ef', 4, 0x17bc),
        Register('spr1f0', 4, 0x17c0),
        Register('spr1f1', 4, 0x17c4),
        Register('spr1f2', 4, 0x17c8),
        Register('spr1f3', 4, 0x17cc),
        Register('spr1f4', 4, 0x17d0),
        Register('spr1f5', 4, 0x17d4),
        Register('spr1f6', 4, 0x17d8),
        Register('spr1f7', 4, 0x17dc),
        Register('spr1f8', 4, 0x17e0),
        Register('spr1f9', 4, 0x17e4),
        Register('spr1fa', 4, 0x17e8),
        Register('spr1fb', 4, 0x17ec),
        Register('spr1fc', 4, 0x17f0),
        Register('spr1fd', 4, 0x17f4),
        Register('spr1fe', 4, 0x17f8),
        Register('spr1ff', 4, 0x17fc),
        Register('spr200', 4, 0x1800),
        Register('spr201', 4, 0x1804),
        Register('spr202', 4, 0x1808),
        Register('spr203', 4, 0x180c),
        Register('spr204', 4, 0x1810),
        Register('spr205', 4, 0x1814),
        Register('spr206', 4, 0x1818),
        Register('spr207', 4, 0x181c),
        Register('spr208', 4, 0x1820),
        Register('spr209', 4, 0x1824),
        Register('spr20a', 4, 0x1828),
        Register('spr20b', 4, 0x182c),
        Register('spr20c', 4, 0x1830),
        Register('spr20d', 4, 0x1834),
        Register('spr20e', 4, 0x1838),
        Register('spr20f', 4, 0x183c),
        Register('spr210', 4, 0x1840),
        Register('spr211', 4, 0x1844),
        Register('spr212', 4, 0x1848),
        Register('spr213', 4, 0x184c),
        Register('spr214', 4, 0x1850),
        Register('spr215', 4, 0x1854),
        Register('spr216', 4, 0x1858),
        Register('spr217', 4, 0x185c),
        Register('spr218', 4, 0x1860),
        Register('spr219', 4, 0x1864),
        Register('spr21a', 4, 0x1868),
        Register('spr21b', 4, 0x186c),
        Register('spr21c', 4, 0x1870),
        Register('spr21d', 4, 0x1874),
        Register('spr21e', 4, 0x1878),
        Register('spr21f', 4, 0x187c),
        Register('spr220', 4, 0x1880),
        Register('spr221', 4, 0x1884),
        Register('spr222', 4, 0x1888),
        Register('spr223', 4, 0x188c),
        Register('spr224', 4, 0x1890),
        Register('spr225', 4, 0x1894),
        Register('spr226', 4, 0x1898),
        Register('spr227', 4, 0x189c),
        Register('spr228', 4, 0x18a0),
        Register('spr229', 4, 0x18a4),
        Register('spr22a', 4, 0x18a8),
        Register('spr22b', 4, 0x18ac),
        Register('spr22c', 4, 0x18b0),
        Register('spr22d', 4, 0x18b4),
        Register('spr22e', 4, 0x18b8),
        Register('spr22f', 4, 0x18bc),
        Register('spr230', 4, 0x18c0),
        Register('spr231', 4, 0x18c4),
        Register('spr232', 4, 0x18c8),
        Register('spr233', 4, 0x18cc),
        Register('spr234', 4, 0x18d0),
        Register('spr235', 4, 0x18d4),
        Register('spr236', 4, 0x18d8),
        Register('spr237', 4, 0x18dc),
        Register('spr238', 4, 0x18e0),
        Register('spr239', 4, 0x18e4),
        Register('spr23a', 4, 0x18e8),
        Register('spr23b', 4, 0x18ec),
        Register('spr23c', 4, 0x18f0),
        Register('spr23d', 4, 0x18f4),
        Register('spr23e', 4, 0x18f8),
        Register('spr23f', 4, 0x18fc),
        Register('spr240', 4, 0x1900),
        Register('spr241', 4, 0x1904),
        Register('spr242', 4, 0x1908),
        Register('spr243', 4, 0x190c),
        Register('spr244', 4, 0x1910),
        Register('spr245', 4, 0x1914),
        Register('spr246', 4, 0x1918),
        Register('spr247', 4, 0x191c),
        Register('spr248', 4, 0x1920),
        Register('spr249', 4, 0x1924),
        Register('spr24a', 4, 0x1928),
        Register('spr24b', 4, 0x192c),
        Register('spr24c', 4, 0x1930),
        Register('spr24d', 4, 0x1934),
        Register('spr24e', 4, 0x1938),
        Register('spr24f', 4, 0x193c),
        Register('spr250', 4, 0x1940),
        Register('spr251', 4, 0x1944),
        Register('spr252', 4, 0x1948),
        Register('spr253', 4, 0x194c),
        Register('spr254', 4, 0x1950),
        Register('spr255', 4, 0x1954),
        Register('spr256', 4, 0x1958),
        Register('spr257', 4, 0x195c),
        Register('spr258', 4, 0x1960),
        Register('spr259', 4, 0x1964),
        Register('spr25a', 4, 0x1968),
        Register('spr25b', 4, 0x196c),
        Register('spr25c', 4, 0x1970),
        Register('spr25d', 4, 0x1974),
        Register('spr25e', 4, 0x1978),
        Register('spr25f', 4, 0x197c),
        Register('spr260', 4, 0x1980),
        Register('spr261', 4, 0x1984),
        Register('spr262', 4, 0x1988),
        Register('spr263', 4, 0x198c),
        Register('spr264', 4, 0x1990),
        Register('spr265', 4, 0x1994),
        Register('spr266', 4, 0x1998),
        Register('spr267', 4, 0x199c),
        Register('spr268', 4, 0x19a0),
        Register('spr269', 4, 0x19a4),
        Register('spr26a', 4, 0x19a8),
        Register('spr26b', 4, 0x19ac),
        Register('spr26c', 4, 0x19b0),
        Register('spr26d', 4, 0x19b4),
        Register('spr26e', 4, 0x19b8),
        Register('spr26f', 4, 0x19bc),
        Register('spr270', 4, 0x19c0),
        Register('spr271', 4, 0x19c4),
        Register('spr272', 4, 0x19c8),
        Register('spr273', 4, 0x19cc),
        Register('spr274', 4, 0x19d0),
        Register('spr275', 4, 0x19d4),
        Register('spr276', 4, 0x19d8),
        Register('spr277', 4, 0x19dc),
        Register('spr278', 4, 0x19e0),
        Register('spr279', 4, 0x19e4),
        Register('spr27a', 4, 0x19e8),
        Register('spr27b', 4, 0x19ec),
        Register('spr27c', 4, 0x19f0),
        Register('spr27d', 4, 0x19f4),
        Register('spr27e', 4, 0x19f8),
        Register('spr27f', 4, 0x19fc),
        Register('spr280', 4, 0x1a00),
        Register('spr281', 4, 0x1a04),
        Register('spr282', 4, 0x1a08),
        Register('spr283', 4, 0x1a0c),
        Register('spr284', 4, 0x1a10),
        Register('spr285', 4, 0x1a14),
        Register('spr286', 4, 0x1a18),
        Register('spr287', 4, 0x1a1c),
        Register('spr288', 4, 0x1a20),
        Register('spr289', 4, 0x1a24),
        Register('spr28a', 4, 0x1a28),
        Register('spr28b', 4, 0x1a2c),
        Register('spr28c', 4, 0x1a30),
        Register('spr28d', 4, 0x1a34),
        Register('spr28e', 4, 0x1a38),
        Register('spr28f', 4, 0x1a3c),
        Register('spr290', 4, 0x1a40),
        Register('spr291', 4, 0x1a44),
        Register('spr292', 4, 0x1a48),
        Register('spr293', 4, 0x1a4c),
        Register('spr294', 4, 0x1a50),
        Register('spr295', 4, 0x1a54),
        Register('spr296', 4, 0x1a58),
        Register('spr297', 4, 0x1a5c),
        Register('spr298', 4, 0x1a60),
        Register('spr299', 4, 0x1a64),
        Register('spr29a', 4, 0x1a68),
        Register('spr29b', 4, 0x1a6c),
        Register('spr29c', 4, 0x1a70),
        Register('spr29d', 4, 0x1a74),
        Register('spr29e', 4, 0x1a78),
        Register('spr29f', 4, 0x1a7c),
        Register('spr2a0', 4, 0x1a80),
        Register('spr2a1', 4, 0x1a84),
        Register('spr2a2', 4, 0x1a88),
        Register('spr2a3', 4, 0x1a8c),
        Register('spr2a4', 4, 0x1a90),
        Register('spr2a5', 4, 0x1a94),
        Register('spr2a6', 4, 0x1a98),
        Register('spr2a7', 4, 0x1a9c),
        Register('spr2a8', 4, 0x1aa0),
        Register('spr2a9', 4, 0x1aa4),
        Register('spr2aa', 4, 0x1aa8),
        Register('spr2ab', 4, 0x1aac),
        Register('spr2ac', 4, 0x1ab0),
        Register('spr2ad', 4, 0x1ab4),
        Register('spr2ae', 4, 0x1ab8),
        Register('spr2af', 4, 0x1abc),
        Register('spr2b0', 4, 0x1ac0),
        Register('spr2b1', 4, 0x1ac4),
        Register('spr2b2', 4, 0x1ac8),
        Register('spr2b3', 4, 0x1acc),
        Register('spr2b4', 4, 0x1ad0),
        Register('spr2b5', 4, 0x1ad4),
        Register('spr2b6', 4, 0x1ad8),
        Register('spr2b7', 4, 0x1adc),
        Register('spr2b8', 4, 0x1ae0),
        Register('spr2b9', 4, 0x1ae4),
        Register('spr2ba', 4, 0x1ae8),
        Register('spr2bb', 4, 0x1aec),
        Register('spr2bc', 4, 0x1af0),
        Register('spr2bd', 4, 0x1af4),
        Register('spr2be', 4, 0x1af8),
        Register('spr2bf', 4, 0x1afc),
        Register('spr2c0', 4, 0x1b00),
        Register('spr2c1', 4, 0x1b04),
        Register('spr2c2', 4, 0x1b08),
        Register('spr2c3', 4, 0x1b0c),
        Register('spr2c4', 4, 0x1b10),
        Register('spr2c5', 4, 0x1b14),
        Register('spr2c6', 4, 0x1b18),
        Register('spr2c7', 4, 0x1b1c),
        Register('spr2c8', 4, 0x1b20),
        Register('spr2c9', 4, 0x1b24),
        Register('spr2ca', 4, 0x1b28),
        Register('spr2cb', 4, 0x1b2c),
        Register('spr2cc', 4, 0x1b30),
        Register('spr2cd', 4, 0x1b34),
        Register('spr2ce', 4, 0x1b38),
        Register('spr2cf', 4, 0x1b3c),
        Register('spr2d0', 4, 0x1b40),
        Register('spr2d1', 4, 0x1b44),
        Register('spr2d2', 4, 0x1b48),
        Register('spr2d3', 4, 0x1b4c),
        Register('spr2d4', 4, 0x1b50),
        Register('spr2d5', 4, 0x1b54),
        Register('spr2d6', 4, 0x1b58),
        Register('spr2d7', 4, 0x1b5c),
        Register('spr2d8', 4, 0x1b60),
        Register('spr2d9', 4, 0x1b64),
        Register('spr2da', 4, 0x1b68),
        Register('spr2db', 4, 0x1b6c),
        Register('spr2dc', 4, 0x1b70),
        Register('spr2dd', 4, 0x1b74),
        Register('spr2de', 4, 0x1b78),
        Register('spr2df', 4, 0x1b7c),
        Register('spr2e0', 4, 0x1b80),
        Register('spr2e1', 4, 0x1b84),
        Register('spr2e2', 4, 0x1b88),
        Register('spr2e3', 4, 0x1b8c),
        Register('spr2e4', 4, 0x1b90),
        Register('spr2e5', 4, 0x1b94),
        Register('spr2e6', 4, 0x1b98),
        Register('spr2e7', 4, 0x1b9c),
        Register('spr2e8', 4, 0x1ba0),
        Register('spr2e9', 4, 0x1ba4),
        Register('spr2ea', 4, 0x1ba8),
        Register('spr2eb', 4, 0x1bac),
        Register('spr2ec', 4, 0x1bb0),
        Register('spr2ed', 4, 0x1bb4),
        Register('spr2ee', 4, 0x1bb8),
        Register('spr2ef', 4, 0x1bbc),
        Register('spr2f0', 4, 0x1bc0),
        Register('spr2f1', 4, 0x1bc4),
        Register('spr2f2', 4, 0x1bc8),
        Register('spr2f3', 4, 0x1bcc),
        Register('spr2f4', 4, 0x1bd0),
        Register('spr2f5', 4, 0x1bd4),
        Register('spr2f6', 4, 0x1bd8),
        Register('spr2f7', 4, 0x1bdc),
        Register('spr2f8', 4, 0x1be0),
        Register('spr2f9', 4, 0x1be4),
        Register('spr2fa', 4, 0x1be8),
        Register('spr2fb', 4, 0x1bec),
        Register('spr2fc', 4, 0x1bf0),
        Register('spr2fd', 4, 0x1bf4),
        Register('spr2fe', 4, 0x1bf8),
        Register('spr2ff', 4, 0x1bfc),
        Register('spr300', 4, 0x1c00),
        Register('spr301', 4, 0x1c04),
        Register('spr302', 4, 0x1c08),
        Register('spr303', 4, 0x1c0c),
        Register('spr304', 4, 0x1c10),
        Register('spr305', 4, 0x1c14),
        Register('spr306', 4, 0x1c18),
        Register('spr307', 4, 0x1c1c),
        Register('spr308', 4, 0x1c20),
        Register('spr309', 4, 0x1c24),
        Register('spr30a', 4, 0x1c28),
        Register('spr30b', 4, 0x1c2c),
        Register('spr30c', 4, 0x1c30),
        Register('spr30d', 4, 0x1c34),
        Register('spr30e', 4, 0x1c38),
        Register('spr30f', 4, 0x1c3c),
        Register('spr310', 4, 0x1c40),
        Register('spr311', 4, 0x1c44),
        Register('spr312', 4, 0x1c48),
        Register('spr313', 4, 0x1c4c),
        Register('spr314', 4, 0x1c50),
        Register('spr315', 4, 0x1c54),
        Register('spr316', 4, 0x1c58),
        Register('spr317', 4, 0x1c5c),
        Register('spr318', 4, 0x1c60),
        Register('spr319', 4, 0x1c64),
        Register('spr31a', 4, 0x1c68),
        Register('spr31b', 4, 0x1c6c),
        Register('spr31c', 4, 0x1c70),
        Register('spr31d', 4, 0x1c74),
        Register('spr31e', 4, 0x1c78),
        Register('spr31f', 4, 0x1c7c),
        Register('spr320', 4, 0x1c80),
        Register('spr321', 4, 0x1c84),
        Register('spr322', 4, 0x1c88),
        Register('spr323', 4, 0x1c8c),
        Register('spr324', 4, 0x1c90),
        Register('spr325', 4, 0x1c94),
        Register('spr326', 4, 0x1c98),
        Register('spr327', 4, 0x1c9c),
        Register('spr328', 4, 0x1ca0),
        Register('spr329', 4, 0x1ca4),
        Register('spr32a', 4, 0x1ca8),
        Register('spr32b', 4, 0x1cac),
        Register('spr32c', 4, 0x1cb0),
        Register('spr32d', 4, 0x1cb4),
        Register('spr32e', 4, 0x1cb8),
        Register('tar', 4, 0x1cbc),
        Register('spr330', 4, 0x1cc0),
        Register('spr331', 4, 0x1cc4),
        Register('spr332', 4, 0x1cc8),
        Register('spr333', 4, 0x1ccc),
        Register('spr334', 4, 0x1cd0),
        Register('spr335', 4, 0x1cd4),
        Register('spr336', 4, 0x1cd8),
        Register('spr337', 4, 0x1cdc),
        Register('spr338', 4, 0x1ce0),
        Register('spr339', 4, 0x1ce4),
        Register('spr33a', 4, 0x1ce8),
        Register('spr33b', 4, 0x1cec),
        Register('spr33c', 4, 0x1cf0),
        Register('spr33d', 4, 0x1cf4),
        Register('spr33e', 4, 0x1cf8),
        Register('spr33f', 4, 0x1cfc),
        Register('spr340', 4, 0x1d00),
        Register('spr341', 4, 0x1d04),
        Register('spr342', 4, 0x1d08),
        Register('spr343', 4, 0x1d0c),
        Register('spr344', 4, 0x1d10),
        Register('spr345', 4, 0x1d14),
        Register('spr346', 4, 0x1d18),
        Register('spr347', 4, 0x1d1c),
        Register('spr348', 4, 0x1d20),
        Register('spr349', 4, 0x1d24),
        Register('spr34a', 4, 0x1d28),
        Register('spr34b', 4, 0x1d2c),
        Register('spr34c', 4, 0x1d30),
        Register('spr34d', 4, 0x1d34),
        Register('spr34e', 4, 0x1d38),
        Register('spr34f', 4, 0x1d3c),
        Register('spr350', 4, 0x1d40),
        Register('spr351', 4, 0x1d44),
        Register('spr352', 4, 0x1d48),
        Register('spr353', 4, 0x1d4c),
        Register('spr354', 4, 0x1d50),
        Register('spr355', 4, 0x1d54),
        Register('spr356', 4, 0x1d58),
        Register('spr357', 4, 0x1d5c),
        Register('spr358', 4, 0x1d60),
        Register('spr359', 4, 0x1d64),
        Register('spr35a', 4, 0x1d68),
        Register('spr35b', 4, 0x1d6c),
        Register('spr35c', 4, 0x1d70),
        Register('spr35d', 4, 0x1d74),
        Register('spr35e', 4, 0x1d78),
        Register('spr35f', 4, 0x1d7c),
        Register('spr360', 4, 0x1d80),
        Register('spr361', 4, 0x1d84),
        Register('spr362', 4, 0x1d88),
        Register('spr363', 4, 0x1d8c),
        Register('spr364', 4, 0x1d90),
        Register('spr365', 4, 0x1d94),
        Register('spr366', 4, 0x1d98),
        Register('spr367', 4, 0x1d9c),
        Register('spr368', 4, 0x1da0),
        Register('spr369', 4, 0x1da4),
        Register('spr36a', 4, 0x1da8),
        Register('spr36b', 4, 0x1dac),
        Register('spr36c', 4, 0x1db0),
        Register('spr36d', 4, 0x1db4),
        Register('spr36e', 4, 0x1db8),
        Register('spr36f', 4, 0x1dbc),
        Register('spr370', 4, 0x1dc0),
        Register('spr371', 4, 0x1dc4),
        Register('spr372', 4, 0x1dc8),
        Register('spr373', 4, 0x1dcc),
        Register('spr374', 4, 0x1dd0),
        Register('spr375', 4, 0x1dd4),
        Register('spr376', 4, 0x1dd8),
        Register('spr377', 4, 0x1ddc),
        Register('spr378', 4, 0x1de0),
        Register('spr379', 4, 0x1de4),
        Register('spr37a', 4, 0x1de8),
        Register('spr37b', 4, 0x1dec),
        Register('spr37c', 4, 0x1df0),
        Register('spr37d', 4, 0x1df4),
        Register('spr37e', 4, 0x1df8),
        Register('spr37f', 4, 0x1dfc),
        Register('spr380', 4, 0x1e00),
        Register('spr381', 4, 0x1e04),
        Register('spr382', 4, 0x1e08),
        Register('spr383', 4, 0x1e0c),
        Register('spr384', 4, 0x1e10),
        Register('spr385', 4, 0x1e14),
        Register('spr386', 4, 0x1e18),
        Register('spr387', 4, 0x1e1c),
        Register('spr388', 4, 0x1e20),
        Register('spr389', 4, 0x1e24),
        Register('spr38a', 4, 0x1e28),
        Register('spr38b', 4, 0x1e2c),
        Register('spr38c', 4, 0x1e30),
        Register('spr38d', 4, 0x1e34),
        Register('spr38e', 4, 0x1e38),
        Register('spr38f', 4, 0x1e3c),
        Register('spr390', 4, 0x1e40),
        Register('spr391', 4, 0x1e44),
        Register('spr392', 4, 0x1e48),
        Register('spr393', 4, 0x1e4c),
        Register('spr394', 4, 0x1e50),
        Register('spr395', 4, 0x1e54),
        Register('spr396', 4, 0x1e58),
        Register('spr397', 4, 0x1e5c),
        Register('spr398', 4, 0x1e60),
        Register('spr399', 4, 0x1e64),
        Register('spr39a', 4, 0x1e68),
        Register('spr39b', 4, 0x1e6c),
        Register('spr39c', 4, 0x1e70),
        Register('spr39d', 4, 0x1e74),
        Register('spr39e', 4, 0x1e78),
        Register('spr39f', 4, 0x1e7c),
        Register('spr3a0', 4, 0x1e80),
        Register('spr3a1', 4, 0x1e84),
        Register('spr3a2', 4, 0x1e88),
        Register('spr3a3', 4, 0x1e8c),
        Register('spr3a4', 4, 0x1e90),
        Register('spr3a5', 4, 0x1e94),
        Register('spr3a6', 4, 0x1e98),
        Register('spr3a7', 4, 0x1e9c),
        Register('spr3a8', 4, 0x1ea0),
        Register('spr3a9', 4, 0x1ea4),
        Register('spr3aa', 4, 0x1ea8),
        Register('spr3ab', 4, 0x1eac),
        Register('spr3ac', 4, 0x1eb0),
        Register('spr3ad', 4, 0x1eb4),
        Register('spr3ae', 4, 0x1eb8),
        Register('spr3af', 4, 0x1ebc),
        Register('spr3b0', 4, 0x1ec0),
        Register('spr3b1', 4, 0x1ec4),
        Register('spr3b2', 4, 0x1ec8),
        Register('spr3b3', 4, 0x1ecc),
        Register('spr3b4', 4, 0x1ed0),
        Register('spr3b5', 4, 0x1ed4),
        Register('spr3b6', 4, 0x1ed8),
        Register('spr3b7', 4, 0x1edc),
        Register('spr3b8', 4, 0x1ee0),
        Register('spr3b9', 4, 0x1ee4),
        Register('spr3ba', 4, 0x1ee8),
        Register('spr3bb', 4, 0x1eec),
        Register('spr3bc', 4, 0x1ef0),
        Register('spr3bd', 4, 0x1ef4),
        Register('spr3be', 4, 0x1ef8),
        Register('spr3bf', 4, 0x1efc),
        Register('spr3c0', 4, 0x1f00),
        Register('spr3c1', 4, 0x1f04),
        Register('spr3c2', 4, 0x1f08),
        Register('spr3c3', 4, 0x1f0c),
        Register('spr3c4', 4, 0x1f10),
        Register('spr3c5', 4, 0x1f14),
        Register('spr3c6', 4, 0x1f18),
        Register('spr3c7', 4, 0x1f1c),
        Register('spr3c8', 4, 0x1f20),
        Register('spr3c9', 4, 0x1f24),
        Register('spr3ca', 4, 0x1f28),
        Register('spr3cb', 4, 0x1f2c),
        Register('spr3cc', 4, 0x1f30),
        Register('spr3cd', 4, 0x1f34),
        Register('spr3ce', 4, 0x1f38),
        Register('spr3cf', 4, 0x1f3c),
        Register('spr3d0', 4, 0x1f40),
        Register('spr3d1', 4, 0x1f44),
        Register('spr3d2', 4, 0x1f48),
        Register('spr3d3', 4, 0x1f4c),
        Register('spr3d4', 4, 0x1f50),
        Register('spr3d5', 4, 0x1f54),
        Register('spr3d6', 4, 0x1f58),
        Register('spr3d7', 4, 0x1f5c),
        Register('spr3d8', 4, 0x1f60),
        Register('spr3d9', 4, 0x1f64),
        Register('spr3da', 4, 0x1f68),
        Register('spr3db', 4, 0x1f6c),
        Register('spr3dc', 4, 0x1f70),
        Register('spr3dd', 4, 0x1f74),
        Register('spr3de', 4, 0x1f78),
        Register('spr3df', 4, 0x1f7c),
        Register('spr3e0', 4, 0x1f80),
        Register('spr3e1', 4, 0x1f84),
        Register('spr3e2', 4, 0x1f88),
        Register('spr3e3', 4, 0x1f8c),
        Register('spr3e4', 4, 0x1f90),
        Register('spr3e5', 4, 0x1f94),
        Register('spr3e6', 4, 0x1f98),
        Register('spr3e7', 4, 0x1f9c),
        Register('spr3e8', 4, 0x1fa0),
        Register('spr3e9', 4, 0x1fa4),
        Register('spr3ea', 4, 0x1fa8),
        Register('spr3eb', 4, 0x1fac),
        Register('spr3ec', 4, 0x1fb0),
        Register('spr3ed', 4, 0x1fb4),
        Register('spr3ee', 4, 0x1fb8),
        Register('spr3ef', 4, 0x1fbc),
        Register('spr3f0', 4, 0x1fc0),
        Register('spr3f1', 4, 0x1fc4),
        Register('spr3f2', 4, 0x1fc8),
        Register('spr3f3', 4, 0x1fcc),
        Register('spr3f4', 4, 0x1fd0),
        Register('spr3f5', 4, 0x1fd4),
        Register('spr3f6', 4, 0x1fd8),
        Register('spr3f7', 4, 0x1fdc),
        Register('spr3f8', 4, 0x1fe0),
        Register('spr3f9', 4, 0x1fe4),
        Register('spr3fa', 4, 0x1fe8),
        Register('spr3fb', 4, 0x1fec),
        Register('spr3fc', 4, 0x1ff0),
        Register('spr3fd', 4, 0x1ff4),
        Register('spr3fe', 4, 0x1ff8),
        Register('spr3ff', 4, 0x1ffc),
        Register('vs0', 16, 0x4000),
        Register('f0', 8, 0x4008),
        Register('vs1', 16, 0x4010),
        Register('f1', 8, 0x4018),
        Register('vs2', 16, 0x4020),
        Register('f2', 8, 0x4028),
        Register('vs3', 16, 0x4030),
        Register('f3', 8, 0x4038),
        Register('vs4', 16, 0x4040),
        Register('f4', 8, 0x4048),
        Register('vs5', 16, 0x4050),
        Register('f5', 8, 0x4058),
        Register('vs6', 16, 0x4060),
        Register('f6', 8, 0x4068),
        Register('vs7', 16, 0x4070),
        Register('f7', 8, 0x4078),
        Register('vs8', 16, 0x4080),
        Register('f8', 8, 0x4088),
        Register('vs9', 16, 0x4090),
        Register('f9', 8, 0x4098),
        Register('vs10', 16, 0x40a0),
        Register('f10', 8, 0x40a8),
        Register('vs11', 16, 0x40b0),
        Register('f11', 8, 0x40b8),
        Register('vs12', 16, 0x40c0),
        Register('f12', 8, 0x40c8),
        Register('vs13', 16, 0x40d0),
        Register('f13', 8, 0x40d8),
        Register('vs14', 16, 0x40e0),
        Register('f14', 8, 0x40e8),
        Register('vs15', 16, 0x40f0),
        Register('f15', 8, 0x40f8),
        Register('vs16', 16, 0x4100),
        Register('f16', 8, 0x4108),
        Register('vs17', 16, 0x4110),
        Register('f17', 8, 0x4118),
        Register('vs18', 16, 0x4120),
        Register('f18', 8, 0x4128),
        Register('vs19', 16, 0x4130),
        Register('f19', 8, 0x4138),
        Register('vs20', 16, 0x4140),
        Register('f20', 8, 0x4148),
        Register('vs21', 16, 0x4150),
        Register('f21', 8, 0x4158),
        Register('vs22', 16, 0x4160),
        Register('f22', 8, 0x4168),
        Register('vs23', 16, 0x4170),
        Register('f23', 8, 0x4178),
        Register('vs24', 16, 0x4180),
        Register('f24', 8, 0x4188),
        Register('vs25', 16, 0x4190),
        Register('f25', 8, 0x4198),
        Register('vs26', 16, 0x41a0),
        Register('f26', 8, 0x41a8),
        Register('vs27', 16, 0x41b0),
        Register('f27', 8, 0x41b8),
        Register('vs28', 16, 0x41c0),
        Register('f28', 8, 0x41c8),
        Register('vs29', 16, 0x41d0),
        Register('f29', 8, 0x41d8),
        Register('vs30', 16, 0x41e0),
        Register('f30', 8, 0x41e8),
        Register('vs31', 16, 0x41f0),
        Register('f31', 8, 0x41f8),
        Register('vs32', 16, 0x4200),
        Register('vr0_64_1', 8, 0x4200),
        Register('vr0_32_3', 4, 0x4200),
        Register('vr0_16_7', 2, 0x4200),
        Register('vr0_8_15', 1, 0x4200),
        Register('vr0_8_14', 1, 0x4201),
        Register('vr0_16_6', 2, 0x4202),
        Register('vr0_8_13', 1, 0x4202),
        Register('vr0_8_12', 1, 0x4203),
        Register('vr0_32_2', 4, 0x4204),
        Register('vr0_16_5', 2, 0x4204),
        Register('vr0_8_11', 1, 0x4204),
        Register('vr0_8_10', 1, 0x4205),
        Register('vr0_16_4', 2, 0x4206),
        Register('vr0_8_9', 1, 0x4206),
        Register('vr0_8_8', 1, 0x4207),
        Register('vr0_64_0', 8, 0x4208),
        Register('vr0_32_1', 4, 0x4208),
        Register('vr0_16_3', 2, 0x4208),
        Register('vr0_8_7', 1, 0x4208),
        Register('vr0_8_6', 1, 0x4209),
        Register('vr0_16_2', 2, 0x420a),
        Register('vr0_8_5', 1, 0x420a),
        Register('vr0_8_4', 1, 0x420b),
        Register('vr0_32_0', 4, 0x420c),
        Register('vr0_16_1', 2, 0x420c),
        Register('vr0_8_3', 1, 0x420c),
        Register('vr0_8_2', 1, 0x420d),
        Register('vr0_16_0', 2, 0x420e),
        Register('vr0_8_1', 1, 0x420e),
        Register('vr0_8_0', 1, 0x420f),
        Register('vs33', 16, 0x4210),
        Register('vr1_64_1', 8, 0x4210),
        Register('vr1_32_3', 4, 0x4210),
        Register('vr1_16_7', 2, 0x4210),
        Register('vr1_8_15', 1, 0x4210),
        Register('vr1_8_14', 1, 0x4211),
        Register('vr1_16_6', 2, 0x4212),
        Register('vr1_8_13', 1, 0x4212),
        Register('vr1_8_12', 1, 0x4213),
        Register('vr1_32_2', 4, 0x4214),
        Register('vr1_16_5', 2, 0x4214),
        Register('vr1_8_11', 1, 0x4214),
        Register('vr1_8_10', 1, 0x4215),
        Register('vr1_16_4', 2, 0x4216),
        Register('vr1_8_9', 1, 0x4216),
        Register('vr1_8_8', 1, 0x4217),
        Register('vr1_64_0', 8, 0x4218),
        Register('vr1_32_1', 4, 0x4218),
        Register('vr1_16_3', 2, 0x4218),
        Register('vr1_8_7', 1, 0x4218),
        Register('vr1_8_6', 1, 0x4219),
        Register('vr1_16_2', 2, 0x421a),
        Register('vr1_8_5', 1, 0x421a),
        Register('vr1_8_4', 1, 0x421b),
        Register('vr1_32_0', 4, 0x421c),
        Register('vr1_16_1', 2, 0x421c),
        Register('vr1_8_3', 1, 0x421c),
        Register('vr1_8_2', 1, 0x421d),
        Register('vr1_16_0', 2, 0x421e),
        Register('vr1_8_1', 1, 0x421e),
        Register('vr1_8_0', 1, 0x421f),
        Register('vs34', 16, 0x4220),
        Register('vr2_64_1', 8, 0x4220),
        Register('vr2_32_3', 4, 0x4220),
        Register('vr2_16_7', 2, 0x4220),
        Register('vr2_8_15', 1, 0x4220),
        Register('vr2_8_14', 1, 0x4221),
        Register('vr2_16_6', 2, 0x4222),
        Register('vr2_8_13', 1, 0x4222),
        Register('vr2_8_12', 1, 0x4223),
        Register('vr2_32_2', 4, 0x4224),
        Register('vr2_16_5', 2, 0x4224),
        Register('vr2_8_11', 1, 0x4224),
        Register('vr2_8_10', 1, 0x4225),
        Register('vr2_16_4', 2, 0x4226),
        Register('vr2_8_9', 1, 0x4226),
        Register('vr2_8_8', 1, 0x4227),
        Register('vr2_64_0', 8, 0x4228),
        Register('vr2_32_1', 4, 0x4228),
        Register('vr2_16_3', 2, 0x4228),
        Register('vr2_8_7', 1, 0x4228),
        Register('vr2_8_6', 1, 0x4229),
        Register('vr2_16_2', 2, 0x422a),
        Register('vr2_8_5', 1, 0x422a),
        Register('vr2_8_4', 1, 0x422b),
        Register('vr2_32_0', 4, 0x422c),
        Register('vr2_16_1', 2, 0x422c),
        Register('vr2_8_3', 1, 0x422c),
        Register('vr2_8_2', 1, 0x422d),
        Register('vr2_16_0', 2, 0x422e),
        Register('vr2_8_1', 1, 0x422e),
        Register('vr2_8_0', 1, 0x422f),
        Register('vs35', 16, 0x4230),
        Register('vr3_64_1', 8, 0x4230),
        Register('vr3_32_3', 4, 0x4230),
        Register('vr3_16_7', 2, 0x4230),
        Register('vr3_8_15', 1, 0x4230),
        Register('vr3_8_14', 1, 0x4231),
        Register('vr3_16_6', 2, 0x4232),
        Register('vr3_8_13', 1, 0x4232),
        Register('vr3_8_12', 1, 0x4233),
        Register('vr3_32_2', 4, 0x4234),
        Register('vr3_16_5', 2, 0x4234),
        Register('vr3_8_11', 1, 0x4234),
        Register('vr3_8_10', 1, 0x4235),
        Register('vr3_16_4', 2, 0x4236),
        Register('vr3_8_9', 1, 0x4236),
        Register('vr3_8_8', 1, 0x4237),
        Register('vr3_64_0', 8, 0x4238),
        Register('vr3_32_1', 4, 0x4238),
        Register('vr3_16_3', 2, 0x4238),
        Register('vr3_8_7', 1, 0x4238),
        Register('vr3_8_6', 1, 0x4239),
        Register('vr3_16_2', 2, 0x423a),
        Register('vr3_8_5', 1, 0x423a),
        Register('vr3_8_4', 1, 0x423b),
        Register('vr3_32_0', 4, 0x423c),
        Register('vr3_16_1', 2, 0x423c),
        Register('vr3_8_3', 1, 0x423c),
        Register('vr3_8_2', 1, 0x423d),
        Register('vr3_16_0', 2, 0x423e),
        Register('vr3_8_1', 1, 0x423e),
        Register('vr3_8_0', 1, 0x423f),
        Register('vs36', 16, 0x4240),
        Register('vr4_64_1', 8, 0x4240),
        Register('vr4_32_3', 4, 0x4240),
        Register('vr4_16_7', 2, 0x4240),
        Register('vr4_8_15', 1, 0x4240),
        Register('vr4_8_14', 1, 0x4241),
        Register('vr4_16_6', 2, 0x4242),
        Register('vr4_8_13', 1, 0x4242),
        Register('vr4_8_12', 1, 0x4243),
        Register('vr4_32_2', 4, 0x4244),
        Register('vr4_16_5', 2, 0x4244),
        Register('vr4_8_11', 1, 0x4244),
        Register('vr4_8_10', 1, 0x4245),
        Register('vr4_16_4', 2, 0x4246),
        Register('vr4_8_9', 1, 0x4246),
        Register('vr4_8_8', 1, 0x4247),
        Register('vr4_64_0', 8, 0x4248),
        Register('vr4_32_1', 4, 0x4248),
        Register('vr4_16_3', 2, 0x4248),
        Register('vr4_8_7', 1, 0x4248),
        Register('vr4_8_6', 1, 0x4249),
        Register('vr4_16_2', 2, 0x424a),
        Register('vr4_8_5', 1, 0x424a),
        Register('vr4_8_4', 1, 0x424b),
        Register('vr4_32_0', 4, 0x424c),
        Register('vr4_16_1', 2, 0x424c),
        Register('vr4_8_3', 1, 0x424c),
        Register('vr4_8_2', 1, 0x424d),
        Register('vr4_16_0', 2, 0x424e),
        Register('vr4_8_1', 1, 0x424e),
        Register('vr4_8_0', 1, 0x424f),
        Register('vs37', 16, 0x4250),
        Register('vr5_64_1', 8, 0x4250),
        Register('vr5_32_3', 4, 0x4250),
        Register('vr5_16_7', 2, 0x4250),
        Register('vr5_8_15', 1, 0x4250),
        Register('vr5_8_14', 1, 0x4251),
        Register('vr5_16_6', 2, 0x4252),
        Register('vr5_8_13', 1, 0x4252),
        Register('vr5_8_12', 1, 0x4253),
        Register('vr5_32_2', 4, 0x4254),
        Register('vr5_16_5', 2, 0x4254),
        Register('vr5_8_11', 1, 0x4254),
        Register('vr5_8_10', 1, 0x4255),
        Register('vr5_16_4', 2, 0x4256),
        Register('vr5_8_9', 1, 0x4256),
        Register('vr5_8_8', 1, 0x4257),
        Register('vr5_64_0', 8, 0x4258),
        Register('vr5_32_1', 4, 0x4258),
        Register('vr5_16_3', 2, 0x4258),
        Register('vr5_8_7', 1, 0x4258),
        Register('vr5_8_6', 1, 0x4259),
        Register('vr5_16_2', 2, 0x425a),
        Register('vr5_8_5', 1, 0x425a),
        Register('vr5_8_4', 1, 0x425b),
        Register('vr5_32_0', 4, 0x425c),
        Register('vr5_16_1', 2, 0x425c),
        Register('vr5_8_3', 1, 0x425c),
        Register('vr5_8_2', 1, 0x425d),
        Register('vr5_16_0', 2, 0x425e),
        Register('vr5_8_1', 1, 0x425e),
        Register('vr5_8_0', 1, 0x425f),
        Register('vs38', 16, 0x4260),
        Register('vr6_64_1', 8, 0x4260),
        Register('vr6_32_3', 4, 0x4260),
        Register('vr6_16_7', 2, 0x4260),
        Register('vr6_8_15', 1, 0x4260),
        Register('vr6_8_14', 1, 0x4261),
        Register('vr6_16_6', 2, 0x4262),
        Register('vr6_8_13', 1, 0x4262),
        Register('vr6_8_12', 1, 0x4263),
        Register('vr6_32_2', 4, 0x4264),
        Register('vr6_16_5', 2, 0x4264),
        Register('vr6_8_11', 1, 0x4264),
        Register('vr6_8_10', 1, 0x4265),
        Register('vr6_16_4', 2, 0x4266),
        Register('vr6_8_9', 1, 0x4266),
        Register('vr6_8_8', 1, 0x4267),
        Register('vr6_64_0', 8, 0x4268),
        Register('vr6_32_1', 4, 0x4268),
        Register('vr6_16_3', 2, 0x4268),
        Register('vr6_8_7', 1, 0x4268),
        Register('vr6_8_6', 1, 0x4269),
        Register('vr6_16_2', 2, 0x426a),
        Register('vr6_8_5', 1, 0x426a),
        Register('vr6_8_4', 1, 0x426b),
        Register('vr6_32_0', 4, 0x426c),
        Register('vr6_16_1', 2, 0x426c),
        Register('vr6_8_3', 1, 0x426c),
        Register('vr6_8_2', 1, 0x426d),
        Register('vr6_16_0', 2, 0x426e),
        Register('vr6_8_1', 1, 0x426e),
        Register('vr6_8_0', 1, 0x426f),
        Register('vs39', 16, 0x4270),
        Register('vr7_64_1', 8, 0x4270),
        Register('vr7_32_3', 4, 0x4270),
        Register('vr7_16_7', 2, 0x4270),
        Register('vr7_8_15', 1, 0x4270),
        Register('vr7_8_14', 1, 0x4271),
        Register('vr7_16_6', 2, 0x4272),
        Register('vr7_8_13', 1, 0x4272),
        Register('vr7_8_12', 1, 0x4273),
        Register('vr7_32_2', 4, 0x4274),
        Register('vr7_16_5', 2, 0x4274),
        Register('vr7_8_11', 1, 0x4274),
        Register('vr7_8_10', 1, 0x4275),
        Register('vr7_16_4', 2, 0x4276),
        Register('vr7_8_9', 1, 0x4276),
        Register('vr7_8_8', 1, 0x4277),
        Register('vr7_64_0', 8, 0x4278),
        Register('vr7_32_1', 4, 0x4278),
        Register('vr7_16_3', 2, 0x4278),
        Register('vr7_8_7', 1, 0x4278),
        Register('vr7_8_6', 1, 0x4279),
        Register('vr7_16_2', 2, 0x427a),
        Register('vr7_8_5', 1, 0x427a),
        Register('vr7_8_4', 1, 0x427b),
        Register('vr7_32_0', 4, 0x427c),
        Register('vr7_16_1', 2, 0x427c),
        Register('vr7_8_3', 1, 0x427c),
        Register('vr7_8_2', 1, 0x427d),
        Register('vr7_16_0', 2, 0x427e),
        Register('vr7_8_1', 1, 0x427e),
        Register('vr7_8_0', 1, 0x427f),
        Register('vs40', 16, 0x4280),
        Register('vr8_64_1', 8, 0x4280),
        Register('vr8_32_3', 4, 0x4280),
        Register('vr8_16_7', 2, 0x4280),
        Register('vr8_8_15', 1, 0x4280),
        Register('vr8_8_14', 1, 0x4281),
        Register('vr8_16_6', 2, 0x4282),
        Register('vr8_8_13', 1, 0x4282),
        Register('vr8_8_12', 1, 0x4283),
        Register('vr8_32_2', 4, 0x4284),
        Register('vr8_16_5', 2, 0x4284),
        Register('vr8_8_11', 1, 0x4284),
        Register('vr8_8_10', 1, 0x4285),
        Register('vr8_16_4', 2, 0x4286),
        Register('vr8_8_9', 1, 0x4286),
        Register('vr8_8_8', 1, 0x4287),
        Register('vr8_64_0', 8, 0x4288),
        Register('vr8_32_1', 4, 0x4288),
        Register('vr8_16_3', 2, 0x4288),
        Register('vr8_8_7', 1, 0x4288),
        Register('vr8_8_6', 1, 0x4289),
        Register('vr8_16_2', 2, 0x428a),
        Register('vr8_8_5', 1, 0x428a),
        Register('vr8_8_4', 1, 0x428b),
        Register('vr8_32_0', 4, 0x428c),
        Register('vr8_16_1', 2, 0x428c),
        Register('vr8_8_3', 1, 0x428c),
        Register('vr8_8_2', 1, 0x428d),
        Register('vr8_16_0', 2, 0x428e),
        Register('vr8_8_1', 1, 0x428e),
        Register('vr8_8_0', 1, 0x428f),
        Register('vs41', 16, 0x4290),
        Register('vr9_64_1', 8, 0x4290),
        Register('vr9_32_3', 4, 0x4290),
        Register('vr9_16_7', 2, 0x4290),
        Register('vr9_8_15', 1, 0x4290),
        Register('vr9_8_14', 1, 0x4291),
        Register('vr9_16_6', 2, 0x4292),
        Register('vr9_8_13', 1, 0x4292),
        Register('vr9_8_12', 1, 0x4293),
        Register('vr9_32_2', 4, 0x4294),
        Register('vr9_16_5', 2, 0x4294),
        Register('vr9_8_11', 1, 0x4294),
        Register('vr9_8_10', 1, 0x4295),
        Register('vr9_16_4', 2, 0x4296),
        Register('vr9_8_9', 1, 0x4296),
        Register('vr9_8_8', 1, 0x4297),
        Register('vr9_64_0', 8, 0x4298),
        Register('vr9_32_1', 4, 0x4298),
        Register('vr9_16_3', 2, 0x4298),
        Register('vr9_8_7', 1, 0x4298),
        Register('vr9_8_6', 1, 0x4299),
        Register('vr9_16_2', 2, 0x429a),
        Register('vr9_8_5', 1, 0x429a),
        Register('vr9_8_4', 1, 0x429b),
        Register('vr9_32_0', 4, 0x429c),
        Register('vr9_16_1', 2, 0x429c),
        Register('vr9_8_3', 1, 0x429c),
        Register('vr9_8_2', 1, 0x429d),
        Register('vr9_16_0', 2, 0x429e),
        Register('vr9_8_1', 1, 0x429e),
        Register('vr9_8_0', 1, 0x429f),
        Register('vs42', 16, 0x42a0),
        Register('vr10_64_1', 8, 0x42a0),
        Register('vr10_32_3', 4, 0x42a0),
        Register('vr10_16_7', 2, 0x42a0),
        Register('vr10_8_15', 1, 0x42a0),
        Register('vr10_8_14', 1, 0x42a1),
        Register('vr10_16_6', 2, 0x42a2),
        Register('vr10_8_13', 1, 0x42a2),
        Register('vr10_8_12', 1, 0x42a3),
        Register('vr10_32_2', 4, 0x42a4),
        Register('vr10_16_5', 2, 0x42a4),
        Register('vr10_8_11', 1, 0x42a4),
        Register('vr10_8_10', 1, 0x42a5),
        Register('vr10_16_4', 2, 0x42a6),
        Register('vr10_8_9', 1, 0x42a6),
        Register('vr10_8_8', 1, 0x42a7),
        Register('vr10_64_0', 8, 0x42a8),
        Register('vr10_32_1', 4, 0x42a8),
        Register('vr10_16_3', 2, 0x42a8),
        Register('vr10_8_7', 1, 0x42a8),
        Register('vr10_8_6', 1, 0x42a9),
        Register('vr10_16_2', 2, 0x42aa),
        Register('vr10_8_5', 1, 0x42aa),
        Register('vr10_8_4', 1, 0x42ab),
        Register('vr10_32_0', 4, 0x42ac),
        Register('vr10_16_1', 2, 0x42ac),
        Register('vr10_8_3', 1, 0x42ac),
        Register('vr10_8_2', 1, 0x42ad),
        Register('vr10_16_0', 2, 0x42ae),
        Register('vr10_8_1', 1, 0x42ae),
        Register('vr10_8_0', 1, 0x42af),
        Register('vs43', 16, 0x42b0),
        Register('vr11_64_1', 8, 0x42b0),
        Register('vr11_32_3', 4, 0x42b0),
        Register('vr11_16_7', 2, 0x42b0),
        Register('vr11_8_15', 1, 0x42b0),
        Register('vr11_8_14', 1, 0x42b1),
        Register('vr11_16_6', 2, 0x42b2),
        Register('vr11_8_13', 1, 0x42b2),
        Register('vr11_8_12', 1, 0x42b3),
        Register('vr11_32_2', 4, 0x42b4),
        Register('vr11_16_5', 2, 0x42b4),
        Register('vr11_8_11', 1, 0x42b4),
        Register('vr11_8_10', 1, 0x42b5),
        Register('vr11_16_4', 2, 0x42b6),
        Register('vr11_8_9', 1, 0x42b6),
        Register('vr11_8_8', 1, 0x42b7),
        Register('vr11_64_0', 8, 0x42b8),
        Register('vr11_32_1', 4, 0x42b8),
        Register('vr11_16_3', 2, 0x42b8),
        Register('vr11_8_7', 1, 0x42b8),
        Register('vr11_8_6', 1, 0x42b9),
        Register('vr11_16_2', 2, 0x42ba),
        Register('vr11_8_5', 1, 0x42ba),
        Register('vr11_8_4', 1, 0x42bb),
        Register('vr11_32_0', 4, 0x42bc),
        Register('vr11_16_1', 2, 0x42bc),
        Register('vr11_8_3', 1, 0x42bc),
        Register('vr11_8_2', 1, 0x42bd),
        Register('vr11_16_0', 2, 0x42be),
        Register('vr11_8_1', 1, 0x42be),
        Register('vr11_8_0', 1, 0x42bf),
        Register('vs44', 16, 0x42c0),
        Register('vr12_64_1', 8, 0x42c0),
        Register('vr12_32_3', 4, 0x42c0),
        Register('vr12_16_7', 2, 0x42c0),
        Register('vr12_8_15', 1, 0x42c0),
        Register('vr12_8_14', 1, 0x42c1),
        Register('vr12_16_6', 2, 0x42c2),
        Register('vr12_8_13', 1, 0x42c2),
        Register('vr12_8_12', 1, 0x42c3),
        Register('vr12_32_2', 4, 0x42c4),
        Register('vr12_16_5', 2, 0x42c4),
        Register('vr12_8_11', 1, 0x42c4),
        Register('vr12_8_10', 1, 0x42c5),
        Register('vr12_16_4', 2, 0x42c6),
        Register('vr12_8_9', 1, 0x42c6),
        Register('vr12_8_8', 1, 0x42c7),
        Register('vr12_64_0', 8, 0x42c8),
        Register('vr12_32_1', 4, 0x42c8),
        Register('vr12_16_3', 2, 0x42c8),
        Register('vr12_8_7', 1, 0x42c8),
        Register('vr12_8_6', 1, 0x42c9),
        Register('vr12_16_2', 2, 0x42ca),
        Register('vr12_8_5', 1, 0x42ca),
        Register('vr12_8_4', 1, 0x42cb),
        Register('vr12_32_0', 4, 0x42cc),
        Register('vr12_16_1', 2, 0x42cc),
        Register('vr12_8_3', 1, 0x42cc),
        Register('vr12_8_2', 1, 0x42cd),
        Register('vr12_16_0', 2, 0x42ce),
        Register('vr12_8_1', 1, 0x42ce),
        Register('vr12_8_0', 1, 0x42cf),
        Register('vs45', 16, 0x42d0),
        Register('vr13_64_1', 8, 0x42d0),
        Register('vr13_32_3', 4, 0x42d0),
        Register('vr13_16_7', 2, 0x42d0),
        Register('vr13_8_15', 1, 0x42d0),
        Register('vr13_8_14', 1, 0x42d1),
        Register('vr13_16_6', 2, 0x42d2),
        Register('vr13_8_13', 1, 0x42d2),
        Register('vr13_8_12', 1, 0x42d3),
        Register('vr13_32_2', 4, 0x42d4),
        Register('vr13_16_5', 2, 0x42d4),
        Register('vr13_8_11', 1, 0x42d4),
        Register('vr13_8_10', 1, 0x42d5),
        Register('vr13_16_4', 2, 0x42d6),
        Register('vr13_8_9', 1, 0x42d6),
        Register('vr13_8_8', 1, 0x42d7),
        Register('vr13_64_0', 8, 0x42d8),
        Register('vr13_32_1', 4, 0x42d8),
        Register('vr13_16_3', 2, 0x42d8),
        Register('vr13_8_7', 1, 0x42d8),
        Register('vr13_8_6', 1, 0x42d9),
        Register('vr13_16_2', 2, 0x42da),
        Register('vr13_8_5', 1, 0x42da),
        Register('vr13_8_4', 1, 0x42db),
        Register('vr13_32_0', 4, 0x42dc),
        Register('vr13_16_1', 2, 0x42dc),
        Register('vr13_8_3', 1, 0x42dc),
        Register('vr13_8_2', 1, 0x42dd),
        Register('vr13_16_0', 2, 0x42de),
        Register('vr13_8_1', 1, 0x42de),
        Register('vr13_8_0', 1, 0x42df),
        Register('vs46', 16, 0x42e0),
        Register('vr14_64_1', 8, 0x42e0),
        Register('vr14_32_3', 4, 0x42e0),
        Register('vr14_16_7', 2, 0x42e0),
        Register('vr14_8_15', 1, 0x42e0),
        Register('vr14_8_14', 1, 0x42e1),
        Register('vr14_16_6', 2, 0x42e2),
        Register('vr14_8_13', 1, 0x42e2),
        Register('vr14_8_12', 1, 0x42e3),
        Register('vr14_32_2', 4, 0x42e4),
        Register('vr14_16_5', 2, 0x42e4),
        Register('vr14_8_11', 1, 0x42e4),
        Register('vr14_8_10', 1, 0x42e5),
        Register('vr14_16_4', 2, 0x42e6),
        Register('vr14_8_9', 1, 0x42e6),
        Register('vr14_8_8', 1, 0x42e7),
        Register('vr14_64_0', 8, 0x42e8),
        Register('vr14_32_1', 4, 0x42e8),
        Register('vr14_16_3', 2, 0x42e8),
        Register('vr14_8_7', 1, 0x42e8),
        Register('vr14_8_6', 1, 0x42e9),
        Register('vr14_16_2', 2, 0x42ea),
        Register('vr14_8_5', 1, 0x42ea),
        Register('vr14_8_4', 1, 0x42eb),
        Register('vr14_32_0', 4, 0x42ec),
        Register('vr14_16_1', 2, 0x42ec),
        Register('vr14_8_3', 1, 0x42ec),
        Register('vr14_8_2', 1, 0x42ed),
        Register('vr14_16_0', 2, 0x42ee),
        Register('vr14_8_1', 1, 0x42ee),
        Register('vr14_8_0', 1, 0x42ef),
        Register('vs47', 16, 0x42f0),
        Register('vr15_64_1', 8, 0x42f0),
        Register('vr15_32_3', 4, 0x42f0),
        Register('vr15_16_7', 2, 0x42f0),
        Register('vr15_8_15', 1, 0x42f0),
        Register('vr15_8_14', 1, 0x42f1),
        Register('vr15_16_6', 2, 0x42f2),
        Register('vr15_8_13', 1, 0x42f2),
        Register('vr15_8_12', 1, 0x42f3),
        Register('vr15_32_2', 4, 0x42f4),
        Register('vr15_16_5', 2, 0x42f4),
        Register('vr15_8_11', 1, 0x42f4),
        Register('vr15_8_10', 1, 0x42f5),
        Register('vr15_16_4', 2, 0x42f6),
        Register('vr15_8_9', 1, 0x42f6),
        Register('vr15_8_8', 1, 0x42f7),
        Register('vr15_64_0', 8, 0x42f8),
        Register('vr15_32_1', 4, 0x42f8),
        Register('vr15_16_3', 2, 0x42f8),
        Register('vr15_8_7', 1, 0x42f8),
        Register('vr15_8_6', 1, 0x42f9),
        Register('vr15_16_2', 2, 0x42fa),
        Register('vr15_8_5', 1, 0x42fa),
        Register('vr15_8_4', 1, 0x42fb),
        Register('vr15_32_0', 4, 0x42fc),
        Register('vr15_16_1', 2, 0x42fc),
        Register('vr15_8_3', 1, 0x42fc),
        Register('vr15_8_2', 1, 0x42fd),
        Register('vr15_16_0', 2, 0x42fe),
        Register('vr15_8_1', 1, 0x42fe),
        Register('vr15_8_0', 1, 0x42ff),
        Register('vs48', 16, 0x4300),
        Register('vr16_64_1', 8, 0x4300),
        Register('vr16_32_3', 4, 0x4300),
        Register('vr16_16_7', 2, 0x4300),
        Register('vr16_8_15', 1, 0x4300),
        Register('vr16_8_14', 1, 0x4301),
        Register('vr16_16_6', 2, 0x4302),
        Register('vr16_8_13', 1, 0x4302),
        Register('vr16_8_12', 1, 0x4303),
        Register('vr16_32_2', 4, 0x4304),
        Register('vr16_16_5', 2, 0x4304),
        Register('vr16_8_11', 1, 0x4304),
        Register('vr16_8_10', 1, 0x4305),
        Register('vr16_16_4', 2, 0x4306),
        Register('vr16_8_9', 1, 0x4306),
        Register('vr16_8_8', 1, 0x4307),
        Register('vr16_64_0', 8, 0x4308),
        Register('vr16_32_1', 4, 0x4308),
        Register('vr16_16_3', 2, 0x4308),
        Register('vr16_8_7', 1, 0x4308),
        Register('vr16_8_6', 1, 0x4309),
        Register('vr16_16_2', 2, 0x430a),
        Register('vr16_8_5', 1, 0x430a),
        Register('vr16_8_4', 1, 0x430b),
        Register('vr16_32_0', 4, 0x430c),
        Register('vr16_16_1', 2, 0x430c),
        Register('vr16_8_3', 1, 0x430c),
        Register('vr16_8_2', 1, 0x430d),
        Register('vr16_16_0', 2, 0x430e),
        Register('vr16_8_1', 1, 0x430e),
        Register('vr16_8_0', 1, 0x430f),
        Register('vs49', 16, 0x4310),
        Register('vr17_64_1', 8, 0x4310),
        Register('vr17_32_3', 4, 0x4310),
        Register('vr17_16_7', 2, 0x4310),
        Register('vr17_8_15', 1, 0x4310),
        Register('vr17_8_14', 1, 0x4311),
        Register('vr17_16_6', 2, 0x4312),
        Register('vr17_8_13', 1, 0x4312),
        Register('vr17_8_12', 1, 0x4313),
        Register('vr17_32_2', 4, 0x4314),
        Register('vr17_16_5', 2, 0x4314),
        Register('vr17_8_11', 1, 0x4314),
        Register('vr17_8_10', 1, 0x4315),
        Register('vr17_16_4', 2, 0x4316),
        Register('vr17_8_9', 1, 0x4316),
        Register('vr17_8_8', 1, 0x4317),
        Register('vr17_64_0', 8, 0x4318),
        Register('vr17_32_1', 4, 0x4318),
        Register('vr17_16_3', 2, 0x4318),
        Register('vr17_8_7', 1, 0x4318),
        Register('vr17_8_6', 1, 0x4319),
        Register('vr17_16_2', 2, 0x431a),
        Register('vr17_8_5', 1, 0x431a),
        Register('vr17_8_4', 1, 0x431b),
        Register('vr17_32_0', 4, 0x431c),
        Register('vr17_16_1', 2, 0x431c),
        Register('vr17_8_3', 1, 0x431c),
        Register('vr17_8_2', 1, 0x431d),
        Register('vr17_16_0', 2, 0x431e),
        Register('vr17_8_1', 1, 0x431e),
        Register('vr17_8_0', 1, 0x431f),
        Register('vs50', 16, 0x4320),
        Register('vr18_64_1', 8, 0x4320),
        Register('vr18_32_3', 4, 0x4320),
        Register('vr18_16_7', 2, 0x4320),
        Register('vr18_8_15', 1, 0x4320),
        Register('vr18_8_14', 1, 0x4321),
        Register('vr18_16_6', 2, 0x4322),
        Register('vr18_8_13', 1, 0x4322),
        Register('vr18_8_12', 1, 0x4323),
        Register('vr18_32_2', 4, 0x4324),
        Register('vr18_16_5', 2, 0x4324),
        Register('vr18_8_11', 1, 0x4324),
        Register('vr18_8_10', 1, 0x4325),
        Register('vr18_16_4', 2, 0x4326),
        Register('vr18_8_9', 1, 0x4326),
        Register('vr18_8_8', 1, 0x4327),
        Register('vr18_64_0', 8, 0x4328),
        Register('vr18_32_1', 4, 0x4328),
        Register('vr18_16_3', 2, 0x4328),
        Register('vr18_8_7', 1, 0x4328),
        Register('vr18_8_6', 1, 0x4329),
        Register('vr18_16_2', 2, 0x432a),
        Register('vr18_8_5', 1, 0x432a),
        Register('vr18_8_4', 1, 0x432b),
        Register('vr18_32_0', 4, 0x432c),
        Register('vr18_16_1', 2, 0x432c),
        Register('vr18_8_3', 1, 0x432c),
        Register('vr18_8_2', 1, 0x432d),
        Register('vr18_16_0', 2, 0x432e),
        Register('vr18_8_1', 1, 0x432e),
        Register('vr18_8_0', 1, 0x432f),
        Register('vs51', 16, 0x4330),
        Register('vr19_64_1', 8, 0x4330),
        Register('vr19_32_3', 4, 0x4330),
        Register('vr19_16_7', 2, 0x4330),
        Register('vr19_8_15', 1, 0x4330),
        Register('vr19_8_14', 1, 0x4331),
        Register('vr19_16_6', 2, 0x4332),
        Register('vr19_8_13', 1, 0x4332),
        Register('vr19_8_12', 1, 0x4333),
        Register('vr19_32_2', 4, 0x4334),
        Register('vr19_16_5', 2, 0x4334),
        Register('vr19_8_11', 1, 0x4334),
        Register('vr19_8_10', 1, 0x4335),
        Register('vr19_16_4', 2, 0x4336),
        Register('vr19_8_9', 1, 0x4336),
        Register('vr19_8_8', 1, 0x4337),
        Register('vr19_64_0', 8, 0x4338),
        Register('vr19_32_1', 4, 0x4338),
        Register('vr19_16_3', 2, 0x4338),
        Register('vr19_8_7', 1, 0x4338),
        Register('vr19_8_6', 1, 0x4339),
        Register('vr19_16_2', 2, 0x433a),
        Register('vr19_8_5', 1, 0x433a),
        Register('vr19_8_4', 1, 0x433b),
        Register('vr19_32_0', 4, 0x433c),
        Register('vr19_16_1', 2, 0x433c),
        Register('vr19_8_3', 1, 0x433c),
        Register('vr19_8_2', 1, 0x433d),
        Register('vr19_16_0', 2, 0x433e),
        Register('vr19_8_1', 1, 0x433e),
        Register('vr19_8_0', 1, 0x433f),
        Register('vs52', 16, 0x4340),
        Register('vr20_64_1', 8, 0x4340),
        Register('vr20_32_3', 4, 0x4340),
        Register('vr20_16_7', 2, 0x4340),
        Register('vr20_8_15', 1, 0x4340),
        Register('vr20_8_14', 1, 0x4341),
        Register('vr20_16_6', 2, 0x4342),
        Register('vr20_8_13', 1, 0x4342),
        Register('vr20_8_12', 1, 0x4343),
        Register('vr20_32_2', 4, 0x4344),
        Register('vr20_16_5', 2, 0x4344),
        Register('vr20_8_11', 1, 0x4344),
        Register('vr20_8_10', 1, 0x4345),
        Register('vr20_16_4', 2, 0x4346),
        Register('vr20_8_9', 1, 0x4346),
        Register('vr20_8_8', 1, 0x4347),
        Register('vr20_64_0', 8, 0x4348),
        Register('vr20_32_1', 4, 0x4348),
        Register('vr20_16_3', 2, 0x4348),
        Register('vr20_8_7', 1, 0x4348),
        Register('vr20_8_6', 1, 0x4349),
        Register('vr20_16_2', 2, 0x434a),
        Register('vr20_8_5', 1, 0x434a),
        Register('vr20_8_4', 1, 0x434b),
        Register('vr20_32_0', 4, 0x434c),
        Register('vr20_16_1', 2, 0x434c),
        Register('vr20_8_3', 1, 0x434c),
        Register('vr20_8_2', 1, 0x434d),
        Register('vr20_16_0', 2, 0x434e),
        Register('vr20_8_1', 1, 0x434e),
        Register('vr20_8_0', 1, 0x434f),
        Register('vs53', 16, 0x4350),
        Register('vr21_64_1', 8, 0x4350),
        Register('vr21_32_3', 4, 0x4350),
        Register('vr21_16_7', 2, 0x4350),
        Register('vr21_8_15', 1, 0x4350),
        Register('vr21_8_14', 1, 0x4351),
        Register('vr21_16_6', 2, 0x4352),
        Register('vr21_8_13', 1, 0x4352),
        Register('vr21_8_12', 1, 0x4353),
        Register('vr21_32_2', 4, 0x4354),
        Register('vr21_16_5', 2, 0x4354),
        Register('vr21_8_11', 1, 0x4354),
        Register('vr21_8_10', 1, 0x4355),
        Register('vr21_16_4', 2, 0x4356),
        Register('vr21_8_9', 1, 0x4356),
        Register('vr21_8_8', 1, 0x4357),
        Register('vr21_64_0', 8, 0x4358),
        Register('vr21_32_1', 4, 0x4358),
        Register('vr21_16_3', 2, 0x4358),
        Register('vr21_8_7', 1, 0x4358),
        Register('vr21_8_6', 1, 0x4359),
        Register('vr21_16_2', 2, 0x435a),
        Register('vr21_8_5', 1, 0x435a),
        Register('vr21_8_4', 1, 0x435b),
        Register('vr21_32_0', 4, 0x435c),
        Register('vr21_16_1', 2, 0x435c),
        Register('vr21_8_3', 1, 0x435c),
        Register('vr21_8_2', 1, 0x435d),
        Register('vr21_16_0', 2, 0x435e),
        Register('vr21_8_1', 1, 0x435e),
        Register('vr21_8_0', 1, 0x435f),
        Register('vs54', 16, 0x4360),
        Register('vr22_64_1', 8, 0x4360),
        Register('vr22_32_3', 4, 0x4360),
        Register('vr22_16_7', 2, 0x4360),
        Register('vr22_8_15', 1, 0x4360),
        Register('vr22_8_14', 1, 0x4361),
        Register('vr22_16_6', 2, 0x4362),
        Register('vr22_8_13', 1, 0x4362),
        Register('vr22_8_12', 1, 0x4363),
        Register('vr22_32_2', 4, 0x4364),
        Register('vr22_16_5', 2, 0x4364),
        Register('vr22_8_11', 1, 0x4364),
        Register('vr22_8_10', 1, 0x4365),
        Register('vr22_16_4', 2, 0x4366),
        Register('vr22_8_9', 1, 0x4366),
        Register('vr22_8_8', 1, 0x4367),
        Register('vr22_64_0', 8, 0x4368),
        Register('vr22_32_1', 4, 0x4368),
        Register('vr22_16_3', 2, 0x4368),
        Register('vr22_8_7', 1, 0x4368),
        Register('vr22_8_6', 1, 0x4369),
        Register('vr22_16_2', 2, 0x436a),
        Register('vr22_8_5', 1, 0x436a),
        Register('vr22_8_4', 1, 0x436b),
        Register('vr22_32_0', 4, 0x436c),
        Register('vr22_16_1', 2, 0x436c),
        Register('vr22_8_3', 1, 0x436c),
        Register('vr22_8_2', 1, 0x436d),
        Register('vr22_16_0', 2, 0x436e),
        Register('vr22_8_1', 1, 0x436e),
        Register('vr22_8_0', 1, 0x436f),
        Register('vs55', 16, 0x4370),
        Register('vr23_64_1', 8, 0x4370),
        Register('vr23_32_3', 4, 0x4370),
        Register('vr23_16_7', 2, 0x4370),
        Register('vr23_8_15', 1, 0x4370),
        Register('vr23_8_14', 1, 0x4371),
        Register('vr23_16_6', 2, 0x4372),
        Register('vr23_8_13', 1, 0x4372),
        Register('vr23_8_12', 1, 0x4373),
        Register('vr23_32_2', 4, 0x4374),
        Register('vr23_16_5', 2, 0x4374),
        Register('vr23_8_11', 1, 0x4374),
        Register('vr23_8_10', 1, 0x4375),
        Register('vr23_16_4', 2, 0x4376),
        Register('vr23_8_9', 1, 0x4376),
        Register('vr23_8_8', 1, 0x4377),
        Register('vr23_64_0', 8, 0x4378),
        Register('vr23_32_1', 4, 0x4378),
        Register('vr23_16_3', 2, 0x4378),
        Register('vr23_8_7', 1, 0x4378),
        Register('vr23_8_6', 1, 0x4379),
        Register('vr23_16_2', 2, 0x437a),
        Register('vr23_8_5', 1, 0x437a),
        Register('vr23_8_4', 1, 0x437b),
        Register('vr23_32_0', 4, 0x437c),
        Register('vr23_16_1', 2, 0x437c),
        Register('vr23_8_3', 1, 0x437c),
        Register('vr23_8_2', 1, 0x437d),
        Register('vr23_16_0', 2, 0x437e),
        Register('vr23_8_1', 1, 0x437e),
        Register('vr23_8_0', 1, 0x437f),
        Register('vs56', 16, 0x4380),
        Register('vr24_64_1', 8, 0x4380),
        Register('vr24_32_3', 4, 0x4380),
        Register('vr24_16_7', 2, 0x4380),
        Register('vr24_8_15', 1, 0x4380),
        Register('vr24_8_14', 1, 0x4381),
        Register('vr24_16_6', 2, 0x4382),
        Register('vr24_8_13', 1, 0x4382),
        Register('vr24_8_12', 1, 0x4383),
        Register('vr24_32_2', 4, 0x4384),
        Register('vr24_16_5', 2, 0x4384),
        Register('vr24_8_11', 1, 0x4384),
        Register('vr24_8_10', 1, 0x4385),
        Register('vr24_16_4', 2, 0x4386),
        Register('vr24_8_9', 1, 0x4386),
        Register('vr24_8_8', 1, 0x4387),
        Register('vr24_64_0', 8, 0x4388),
        Register('vr24_32_1', 4, 0x4388),
        Register('vr24_16_3', 2, 0x4388),
        Register('vr24_8_7', 1, 0x4388),
        Register('vr24_8_6', 1, 0x4389),
        Register('vr24_16_2', 2, 0x438a),
        Register('vr24_8_5', 1, 0x438a),
        Register('vr24_8_4', 1, 0x438b),
        Register('vr24_32_0', 4, 0x438c),
        Register('vr24_16_1', 2, 0x438c),
        Register('vr24_8_3', 1, 0x438c),
        Register('vr24_8_2', 1, 0x438d),
        Register('vr24_16_0', 2, 0x438e),
        Register('vr24_8_1', 1, 0x438e),
        Register('vr24_8_0', 1, 0x438f),
        Register('vs57', 16, 0x4390),
        Register('vr25_64_1', 8, 0x4390),
        Register('vr25_32_3', 4, 0x4390),
        Register('vr25_16_7', 2, 0x4390),
        Register('vr25_8_15', 1, 0x4390),
        Register('vr25_8_14', 1, 0x4391),
        Register('vr25_16_6', 2, 0x4392),
        Register('vr25_8_13', 1, 0x4392),
        Register('vr25_8_12', 1, 0x4393),
        Register('vr25_32_2', 4, 0x4394),
        Register('vr25_16_5', 2, 0x4394),
        Register('vr25_8_11', 1, 0x4394),
        Register('vr25_8_10', 1, 0x4395),
        Register('vr25_16_4', 2, 0x4396),
        Register('vr25_8_9', 1, 0x4396),
        Register('vr25_8_8', 1, 0x4397),
        Register('vr25_64_0', 8, 0x4398),
        Register('vr25_32_1', 4, 0x4398),
        Register('vr25_16_3', 2, 0x4398),
        Register('vr25_8_7', 1, 0x4398),
        Register('vr25_8_6', 1, 0x4399),
        Register('vr25_16_2', 2, 0x439a),
        Register('vr25_8_5', 1, 0x439a),
        Register('vr25_8_4', 1, 0x439b),
        Register('vr25_32_0', 4, 0x439c),
        Register('vr25_16_1', 2, 0x439c),
        Register('vr25_8_3', 1, 0x439c),
        Register('vr25_8_2', 1, 0x439d),
        Register('vr25_16_0', 2, 0x439e),
        Register('vr25_8_1', 1, 0x439e),
        Register('vr25_8_0', 1, 0x439f),
        Register('vs58', 16, 0x43a0),
        Register('vr26_64_1', 8, 0x43a0),
        Register('vr26_32_3', 4, 0x43a0),
        Register('vr26_16_7', 2, 0x43a0),
        Register('vr26_8_15', 1, 0x43a0),
        Register('vr26_8_14', 1, 0x43a1),
        Register('vr26_16_6', 2, 0x43a2),
        Register('vr26_8_13', 1, 0x43a2),
        Register('vr26_8_12', 1, 0x43a3),
        Register('vr26_32_2', 4, 0x43a4),
        Register('vr26_16_5', 2, 0x43a4),
        Register('vr26_8_11', 1, 0x43a4),
        Register('vr26_8_10', 1, 0x43a5),
        Register('vr26_16_4', 2, 0x43a6),
        Register('vr26_8_9', 1, 0x43a6),
        Register('vr26_8_8', 1, 0x43a7),
        Register('vr26_64_0', 8, 0x43a8),
        Register('vr26_32_1', 4, 0x43a8),
        Register('vr26_16_3', 2, 0x43a8),
        Register('vr26_8_7', 1, 0x43a8),
        Register('vr26_8_6', 1, 0x43a9),
        Register('vr26_16_2', 2, 0x43aa),
        Register('vr26_8_5', 1, 0x43aa),
        Register('vr26_8_4', 1, 0x43ab),
        Register('vr26_32_0', 4, 0x43ac),
        Register('vr26_16_1', 2, 0x43ac),
        Register('vr26_8_3', 1, 0x43ac),
        Register('vr26_8_2', 1, 0x43ad),
        Register('vr26_16_0', 2, 0x43ae),
        Register('vr26_8_1', 1, 0x43ae),
        Register('vr26_8_0', 1, 0x43af),
        Register('vs59', 16, 0x43b0),
        Register('vr27_64_1', 8, 0x43b0),
        Register('vr27_32_3', 4, 0x43b0),
        Register('vr27_16_7', 2, 0x43b0),
        Register('vr27_8_15', 1, 0x43b0),
        Register('vr27_8_14', 1, 0x43b1),
        Register('vr27_16_6', 2, 0x43b2),
        Register('vr27_8_13', 1, 0x43b2),
        Register('vr27_8_12', 1, 0x43b3),
        Register('vr27_32_2', 4, 0x43b4),
        Register('vr27_16_5', 2, 0x43b4),
        Register('vr27_8_11', 1, 0x43b4),
        Register('vr27_8_10', 1, 0x43b5),
        Register('vr27_16_4', 2, 0x43b6),
        Register('vr27_8_9', 1, 0x43b6),
        Register('vr27_8_8', 1, 0x43b7),
        Register('vr27_64_0', 8, 0x43b8),
        Register('vr27_32_1', 4, 0x43b8),
        Register('vr27_16_3', 2, 0x43b8),
        Register('vr27_8_7', 1, 0x43b8),
        Register('vr27_8_6', 1, 0x43b9),
        Register('vr27_16_2', 2, 0x43ba),
        Register('vr27_8_5', 1, 0x43ba),
        Register('vr27_8_4', 1, 0x43bb),
        Register('vr27_32_0', 4, 0x43bc),
        Register('vr27_16_1', 2, 0x43bc),
        Register('vr27_8_3', 1, 0x43bc),
        Register('vr27_8_2', 1, 0x43bd),
        Register('vr27_16_0', 2, 0x43be),
        Register('vr27_8_1', 1, 0x43be),
        Register('vr27_8_0', 1, 0x43bf),
        Register('vs60', 16, 0x43c0),
        Register('vr28_64_1', 8, 0x43c0),
        Register('vr28_32_3', 4, 0x43c0),
        Register('vr28_16_7', 2, 0x43c0),
        Register('vr28_8_15', 1, 0x43c0),
        Register('vr28_8_14', 1, 0x43c1),
        Register('vr28_16_6', 2, 0x43c2),
        Register('vr28_8_13', 1, 0x43c2),
        Register('vr28_8_12', 1, 0x43c3),
        Register('vr28_32_2', 4, 0x43c4),
        Register('vr28_16_5', 2, 0x43c4),
        Register('vr28_8_11', 1, 0x43c4),
        Register('vr28_8_10', 1, 0x43c5),
        Register('vr28_16_4', 2, 0x43c6),
        Register('vr28_8_9', 1, 0x43c6),
        Register('vr28_8_8', 1, 0x43c7),
        Register('vr28_64_0', 8, 0x43c8),
        Register('vr28_32_1', 4, 0x43c8),
        Register('vr28_16_3', 2, 0x43c8),
        Register('vr28_8_7', 1, 0x43c8),
        Register('vr28_8_6', 1, 0x43c9),
        Register('vr28_16_2', 2, 0x43ca),
        Register('vr28_8_5', 1, 0x43ca),
        Register('vr28_8_4', 1, 0x43cb),
        Register('vr28_32_0', 4, 0x43cc),
        Register('vr28_16_1', 2, 0x43cc),
        Register('vr28_8_3', 1, 0x43cc),
        Register('vr28_8_2', 1, 0x43cd),
        Register('vr28_16_0', 2, 0x43ce),
        Register('vr28_8_1', 1, 0x43ce),
        Register('vr28_8_0', 1, 0x43cf),
        Register('vs61', 16, 0x43d0),
        Register('vr29_64_1', 8, 0x43d0),
        Register('vr29_32_3', 4, 0x43d0),
        Register('vr29_16_7', 2, 0x43d0),
        Register('vr29_8_15', 1, 0x43d0),
        Register('vr29_8_14', 1, 0x43d1),
        Register('vr29_16_6', 2, 0x43d2),
        Register('vr29_8_13', 1, 0x43d2),
        Register('vr29_8_12', 1, 0x43d3),
        Register('vr29_32_2', 4, 0x43d4),
        Register('vr29_16_5', 2, 0x43d4),
        Register('vr29_8_11', 1, 0x43d4),
        Register('vr29_8_10', 1, 0x43d5),
        Register('vr29_16_4', 2, 0x43d6),
        Register('vr29_8_9', 1, 0x43d6),
        Register('vr29_8_8', 1, 0x43d7),
        Register('vr29_64_0', 8, 0x43d8),
        Register('vr29_32_1', 4, 0x43d8),
        Register('vr29_16_3', 2, 0x43d8),
        Register('vr29_8_7', 1, 0x43d8),
        Register('vr29_8_6', 1, 0x43d9),
        Register('vr29_16_2', 2, 0x43da),
        Register('vr29_8_5', 1, 0x43da),
        Register('vr29_8_4', 1, 0x43db),
        Register('vr29_32_0', 4, 0x43dc),
        Register('vr29_16_1', 2, 0x43dc),
        Register('vr29_8_3', 1, 0x43dc),
        Register('vr29_8_2', 1, 0x43dd),
        Register('vr29_16_0', 2, 0x43de),
        Register('vr29_8_1', 1, 0x43de),
        Register('vr29_8_0', 1, 0x43df),
        Register('vs62', 16, 0x43e0),
        Register('vr30_64_1', 8, 0x43e0),
        Register('vr30_32_3', 4, 0x43e0),
        Register('vr30_16_7', 2, 0x43e0),
        Register('vr30_8_15', 1, 0x43e0),
        Register('vr30_8_14', 1, 0x43e1),
        Register('vr30_16_6', 2, 0x43e2),
        Register('vr30_8_13', 1, 0x43e2),
        Register('vr30_8_12', 1, 0x43e3),
        Register('vr30_32_2', 4, 0x43e4),
        Register('vr30_16_5', 2, 0x43e4),
        Register('vr30_8_11', 1, 0x43e4),
        Register('vr30_8_10', 1, 0x43e5),
        Register('vr30_16_4', 2, 0x43e6),
        Register('vr30_8_9', 1, 0x43e6),
        Register('vr30_8_8', 1, 0x43e7),
        Register('vr30_64_0', 8, 0x43e8),
        Register('vr30_32_1', 4, 0x43e8),
        Register('vr30_16_3', 2, 0x43e8),
        Register('vr30_8_7', 1, 0x43e8),
        Register('vr30_8_6', 1, 0x43e9),
        Register('vr30_16_2', 2, 0x43ea),
        Register('vr30_8_5', 1, 0x43ea),
        Register('vr30_8_4', 1, 0x43eb),
        Register('vr30_32_0', 4, 0x43ec),
        Register('vr30_16_1', 2, 0x43ec),
        Register('vr30_8_3', 1, 0x43ec),
        Register('vr30_8_2', 1, 0x43ed),
        Register('vr30_16_0', 2, 0x43ee),
        Register('vr30_8_1', 1, 0x43ee),
        Register('vr30_8_0', 1, 0x43ef),
        Register('vs63', 16, 0x43f0),
        Register('vr31_64_1', 8, 0x43f0),
        Register('vr31_32_3', 4, 0x43f0),
        Register('vr31_16_7', 2, 0x43f0),
        Register('vr31_8_15', 1, 0x43f0),
        Register('vr31_8_14', 1, 0x43f1),
        Register('vr31_16_6', 2, 0x43f2),
        Register('vr31_8_13', 1, 0x43f2),
        Register('vr31_8_12', 1, 0x43f3),
        Register('vr31_32_2', 4, 0x43f4),
        Register('vr31_16_5', 2, 0x43f4),
        Register('vr31_8_11', 1, 0x43f4),
        Register('vr31_8_10', 1, 0x43f5),
        Register('vr31_16_4', 2, 0x43f6),
        Register('vr31_8_9', 1, 0x43f6),
        Register('vr31_8_8', 1, 0x43f7),
        Register('vr31_64_0', 8, 0x43f8),
        Register('vr31_32_1', 4, 0x43f8),
        Register('vr31_16_3', 2, 0x43f8),
        Register('vr31_8_7', 1, 0x43f8),
        Register('vr31_8_6', 1, 0x43f9),
        Register('vr31_16_2', 2, 0x43fa),
        Register('vr31_8_5', 1, 0x43fa),
        Register('vr31_8_4', 1, 0x43fb),
        Register('vr31_32_0', 4, 0x43fc),
        Register('vr31_16_1', 2, 0x43fc),
        Register('vr31_8_3', 1, 0x43fc),
        Register('vr31_8_2', 1, 0x43fd),
        Register('vr31_16_0', 2, 0x43fe),
        Register('vr31_8_1', 1, 0x43fe),
        Register('vr31_8_0', 1, 0x43ff),
        Register('contextreg', 4, 0x6000),
        Register('dcr000', 4, 0x7000),
        Register('dcr001', 4, 0x7004),
        Register('dcr002', 4, 0x7008),
        Register('dcr003', 4, 0x700c),
        Register('dcr004', 4, 0x7010),
        Register('dcr005', 4, 0x7014),
        Register('dcr006', 4, 0x7018),
        Register('dcr007', 4, 0x701c),
        Register('dcr008', 4, 0x7020),
        Register('dcr009', 4, 0x7024),
        Register('dcr00a', 4, 0x7028),
        Register('dcr00b', 4, 0x702c),
        Register('dcr00c', 4, 0x7030),
        Register('dcr00d', 4, 0x7034),
        Register('dcr00e', 4, 0x7038),
        Register('dcr00f', 4, 0x703c),
        Register('dcr010', 4, 0x7040),
        Register('dcr011', 4, 0x7044),
        Register('dcr012', 4, 0x7048),
        Register('dcr013', 4, 0x704c),
        Register('dcr014', 4, 0x7050),
        Register('dcr015', 4, 0x7054),
        Register('dcr016', 4, 0x7058),
        Register('dcr017', 4, 0x705c),
        Register('dcr018', 4, 0x7060),
        Register('dcr019', 4, 0x7064),
        Register('dcr01a', 4, 0x7068),
        Register('dcr01b', 4, 0x706c),
        Register('dcr01c', 4, 0x7070),
        Register('dcr01d', 4, 0x7074),
        Register('dcr01e', 4, 0x7078),
        Register('dcr01f', 4, 0x707c),
        Register('dcr020', 4, 0x7080),
        Register('dcr021', 4, 0x7084),
        Register('dcr022', 4, 0x7088),
        Register('dcr023', 4, 0x708c),
        Register('dcr024', 4, 0x7090),
        Register('dcr025', 4, 0x7094),
        Register('dcr026', 4, 0x7098),
        Register('dcr027', 4, 0x709c),
        Register('dcr028', 4, 0x70a0),
        Register('dcr029', 4, 0x70a4),
        Register('dcr02a', 4, 0x70a8),
        Register('dcr02b', 4, 0x70ac),
        Register('dcr02c', 4, 0x70b0),
        Register('dcr02d', 4, 0x70b4),
        Register('dcr02e', 4, 0x70b8),
        Register('dcr02f', 4, 0x70bc),
        Register('dcr030', 4, 0x70c0),
        Register('dcr031', 4, 0x70c4),
        Register('dcr032', 4, 0x70c8),
        Register('dcr033', 4, 0x70cc),
        Register('dcr034', 4, 0x70d0),
        Register('dcr035', 4, 0x70d4),
        Register('dcr036', 4, 0x70d8),
        Register('dcr037', 4, 0x70dc),
        Register('dcr038', 4, 0x70e0),
        Register('dcr039', 4, 0x70e4),
        Register('dcr03a', 4, 0x70e8),
        Register('dcr03b', 4, 0x70ec),
        Register('dcr03c', 4, 0x70f0),
        Register('dcr03d', 4, 0x70f4),
        Register('dcr03e', 4, 0x70f8),
        Register('dcr03f', 4, 0x70fc),
        Register('dcr040', 4, 0x7100),
        Register('dcr041', 4, 0x7104),
        Register('dcr042', 4, 0x7108),
        Register('dcr043', 4, 0x710c),
        Register('dcr044', 4, 0x7110),
        Register('dcr045', 4, 0x7114),
        Register('dcr046', 4, 0x7118),
        Register('dcr047', 4, 0x711c),
        Register('dcr048', 4, 0x7120),
        Register('dcr049', 4, 0x7124),
        Register('dcr04a', 4, 0x7128),
        Register('dcr04b', 4, 0x712c),
        Register('dcr04c', 4, 0x7130),
        Register('dcr04d', 4, 0x7134),
        Register('dcr04e', 4, 0x7138),
        Register('dcr04f', 4, 0x713c),
        Register('dcr050', 4, 0x7140),
        Register('dcr051', 4, 0x7144),
        Register('dcr052', 4, 0x7148),
        Register('dcr053', 4, 0x714c),
        Register('dcr054', 4, 0x7150),
        Register('dcr055', 4, 0x7154),
        Register('dcr056', 4, 0x7158),
        Register('dcr057', 4, 0x715c),
        Register('dcr058', 4, 0x7160),
        Register('dcr059', 4, 0x7164),
        Register('dcr05a', 4, 0x7168),
        Register('dcr05b', 4, 0x716c),
        Register('dcr05c', 4, 0x7170),
        Register('dcr05d', 4, 0x7174),
        Register('dcr05e', 4, 0x7178),
        Register('dcr05f', 4, 0x717c),
        Register('dcr060', 4, 0x7180),
        Register('dcr061', 4, 0x7184),
        Register('dcr062', 4, 0x7188),
        Register('dcr063', 4, 0x718c),
        Register('dcr064', 4, 0x7190),
        Register('dcr065', 4, 0x7194),
        Register('dcr066', 4, 0x7198),
        Register('dcr067', 4, 0x719c),
        Register('dcr068', 4, 0x71a0),
        Register('dcr069', 4, 0x71a4),
        Register('dcr06a', 4, 0x71a8),
        Register('dcr06b', 4, 0x71ac),
        Register('dcr06c', 4, 0x71b0),
        Register('dcr06d', 4, 0x71b4),
        Register('dcr06e', 4, 0x71b8),
        Register('dcr06f', 4, 0x71bc),
        Register('dcr070', 4, 0x71c0),
        Register('dcr071', 4, 0x71c4),
        Register('dcr072', 4, 0x71c8),
        Register('dcr073', 4, 0x71cc),
        Register('dcr074', 4, 0x71d0),
        Register('dcr075', 4, 0x71d4),
        Register('dcr076', 4, 0x71d8),
        Register('dcr077', 4, 0x71dc),
        Register('dcr078', 4, 0x71e0),
        Register('dcr079', 4, 0x71e4),
        Register('dcr07a', 4, 0x71e8),
        Register('dcr07b', 4, 0x71ec),
        Register('dcr07c', 4, 0x71f0),
        Register('dcr07d', 4, 0x71f4),
        Register('dcr07e', 4, 0x71f8),
        Register('dcr07f', 4, 0x71fc),
        Register('dcr080', 4, 0x7200),
        Register('dcr081', 4, 0x7204),
        Register('dcr082', 4, 0x7208),
        Register('dcr083', 4, 0x720c),
        Register('dcr084', 4, 0x7210),
        Register('dcr085', 4, 0x7214),
        Register('dcr086', 4, 0x7218),
        Register('dcr087', 4, 0x721c),
        Register('dcr088', 4, 0x7220),
        Register('dcr089', 4, 0x7224),
        Register('dcr08a', 4, 0x7228),
        Register('dcr08b', 4, 0x722c),
        Register('dcr08c', 4, 0x7230),
        Register('dcr08d', 4, 0x7234),
        Register('dcr08e', 4, 0x7238),
        Register('dcr08f', 4, 0x723c),
        Register('dcr090', 4, 0x7240),
        Register('dcr091', 4, 0x7244),
        Register('dcr092', 4, 0x7248),
        Register('dcr093', 4, 0x724c),
        Register('dcr094', 4, 0x7250),
        Register('dcr095', 4, 0x7254),
        Register('dcr096', 4, 0x7258),
        Register('dcr097', 4, 0x725c),
        Register('dcr098', 4, 0x7260),
        Register('dcr099', 4, 0x7264),
        Register('dcr09a', 4, 0x7268),
        Register('dcr09b', 4, 0x726c),
        Register('dcr09c', 4, 0x7270),
        Register('dcr09d', 4, 0x7274),
        Register('dcr09e', 4, 0x7278),
        Register('dcr09f', 4, 0x727c),
        Register('dcr0a0', 4, 0x7280),
        Register('dcr0a1', 4, 0x7284),
        Register('dcr0a2', 4, 0x7288),
        Register('dcr0a3', 4, 0x728c),
        Register('dcr0a4', 4, 0x7290),
        Register('dcr0a5', 4, 0x7294),
        Register('dcr0a6', 4, 0x7298),
        Register('dcr0a7', 4, 0x729c),
        Register('dcr0a8', 4, 0x72a0),
        Register('dcr0a9', 4, 0x72a4),
        Register('dcr0aa', 4, 0x72a8),
        Register('dcr0ab', 4, 0x72ac),
        Register('dcr0ac', 4, 0x72b0),
        Register('dcr0ad', 4, 0x72b4),
        Register('dcr0ae', 4, 0x72b8),
        Register('dcr0af', 4, 0x72bc),
        Register('dcr0b0', 4, 0x72c0),
        Register('dcr0b1', 4, 0x72c4),
        Register('dcr0b2', 4, 0x72c8),
        Register('dcr0b3', 4, 0x72cc),
        Register('dcr0b4', 4, 0x72d0),
        Register('dcr0b5', 4, 0x72d4),
        Register('dcr0b6', 4, 0x72d8),
        Register('dcr0b7', 4, 0x72dc),
        Register('dcr0b8', 4, 0x72e0),
        Register('dcr0b9', 4, 0x72e4),
        Register('dcr0ba', 4, 0x72e8),
        Register('dcr0bb', 4, 0x72ec),
        Register('dcr0bc', 4, 0x72f0),
        Register('dcr0bd', 4, 0x72f4),
        Register('dcr0be', 4, 0x72f8),
        Register('dcr0bf', 4, 0x72fc),
        Register('dcr0c0', 4, 0x7300),
        Register('dcr0c1', 4, 0x7304),
        Register('dcr0c2', 4, 0x7308),
        Register('dcr0c3', 4, 0x730c),
        Register('dcr0c4', 4, 0x7310),
        Register('dcr0c5', 4, 0x7314),
        Register('dcr0c6', 4, 0x7318),
        Register('dcr0c7', 4, 0x731c),
        Register('dcr0c8', 4, 0x7320),
        Register('dcr0c9', 4, 0x7324),
        Register('dcr0ca', 4, 0x7328),
        Register('dcr0cb', 4, 0x732c),
        Register('dcr0cc', 4, 0x7330),
        Register('dcr0cd', 4, 0x7334),
        Register('dcr0ce', 4, 0x7338),
        Register('dcr0cf', 4, 0x733c),
        Register('dcr0d0', 4, 0x7340),
        Register('dcr0d1', 4, 0x7344),
        Register('dcr0d2', 4, 0x7348),
        Register('dcr0d3', 4, 0x734c),
        Register('dcr0d4', 4, 0x7350),
        Register('dcr0d5', 4, 0x7354),
        Register('dcr0d6', 4, 0x7358),
        Register('dcr0d7', 4, 0x735c),
        Register('dcr0d8', 4, 0x7360),
        Register('dcr0d9', 4, 0x7364),
        Register('dcr0da', 4, 0x7368),
        Register('dcr0db', 4, 0x736c),
        Register('dcr0dc', 4, 0x7370),
        Register('dcr0dd', 4, 0x7374),
        Register('dcr0de', 4, 0x7378),
        Register('dcr0df', 4, 0x737c),
        Register('dcr0e0', 4, 0x7380),
        Register('dcr0e1', 4, 0x7384),
        Register('dcr0e2', 4, 0x7388),
        Register('dcr0e3', 4, 0x738c),
        Register('dcr0e4', 4, 0x7390),
        Register('dcr0e5', 4, 0x7394),
        Register('dcr0e6', 4, 0x7398),
        Register('dcr0e7', 4, 0x739c),
        Register('dcr0e8', 4, 0x73a0),
        Register('dcr0e9', 4, 0x73a4),
        Register('dcr0ea', 4, 0x73a8),
        Register('dcr0eb', 4, 0x73ac),
        Register('dcr0ec', 4, 0x73b0),
        Register('dcr0ed', 4, 0x73b4),
        Register('dcr0ee', 4, 0x73b8),
        Register('dcr0ef', 4, 0x73bc),
        Register('dcr0f0', 4, 0x73c0),
        Register('dcr0f1', 4, 0x73c4),
        Register('dcr0f2', 4, 0x73c8),
        Register('dcr0f3', 4, 0x73cc),
        Register('dcr0f4', 4, 0x73d0),
        Register('dcr0f5', 4, 0x73d4),
        Register('dcr0f6', 4, 0x73d8),
        Register('dcr0f7', 4, 0x73dc),
        Register('dcr0f8', 4, 0x73e0),
        Register('dcr0f9', 4, 0x73e4),
        Register('dcr0fa', 4, 0x73e8),
        Register('dcr0fb', 4, 0x73ec),
        Register('dcr0fc', 4, 0x73f0),
        Register('dcr0fd', 4, 0x73f4),
        Register('dcr0fe', 4, 0x73f8),
        Register('dcr0ff', 4, 0x73fc),
        Register('dcr100', 4, 0x7400),
        Register('dcr101', 4, 0x7404),
        Register('dcr102', 4, 0x7408),
        Register('dcr103', 4, 0x740c),
        Register('dcr104', 4, 0x7410),
        Register('dcr105', 4, 0x7414),
        Register('dcr106', 4, 0x7418),
        Register('dcr107', 4, 0x741c),
        Register('dcr108', 4, 0x7420),
        Register('dcr109', 4, 0x7424),
        Register('dcr10a', 4, 0x7428),
        Register('dcr10b', 4, 0x742c),
        Register('dcr10c', 4, 0x7430),
        Register('dcr10d', 4, 0x7434),
        Register('dcr10e', 4, 0x7438),
        Register('dcr10f', 4, 0x743c),
        Register('dcr110', 4, 0x7440),
        Register('dcr111', 4, 0x7444),
        Register('dcr112', 4, 0x7448),
        Register('dcr113', 4, 0x744c),
        Register('dcr114', 4, 0x7450),
        Register('dcr115', 4, 0x7454),
        Register('dcr116', 4, 0x7458),
        Register('dcr117', 4, 0x745c),
        Register('dcr118', 4, 0x7460),
        Register('dcr119', 4, 0x7464),
        Register('dcr11a', 4, 0x7468),
        Register('dcr11b', 4, 0x746c),
        Register('dcr11c', 4, 0x7470),
        Register('dcr11d', 4, 0x7474),
        Register('dcr11e', 4, 0x7478),
        Register('dcr11f', 4, 0x747c),
        Register('dcr120', 4, 0x7480),
        Register('dcr121', 4, 0x7484),
        Register('dcr122', 4, 0x7488),
        Register('dcr123', 4, 0x748c),
        Register('dcr124', 4, 0x7490),
        Register('dcr125', 4, 0x7494),
        Register('dcr126', 4, 0x7498),
        Register('dcr127', 4, 0x749c),
        Register('dcr128', 4, 0x74a0),
        Register('dcr129', 4, 0x74a4),
        Register('dcr12a', 4, 0x74a8),
        Register('dcr12b', 4, 0x74ac),
        Register('dcr12c', 4, 0x74b0),
        Register('dcr12d', 4, 0x74b4),
        Register('dcr12e', 4, 0x74b8),
        Register('dcr12f', 4, 0x74bc),
        Register('dcr130', 4, 0x74c0),
        Register('dcr131', 4, 0x74c4),
        Register('dcr132', 4, 0x74c8),
        Register('dcr133', 4, 0x74cc),
        Register('dcr134', 4, 0x74d0),
        Register('dcr135', 4, 0x74d4),
        Register('dcr136', 4, 0x74d8),
        Register('dcr137', 4, 0x74dc),
        Register('dcr138', 4, 0x74e0),
        Register('dcr139', 4, 0x74e4),
        Register('dcr13a', 4, 0x74e8),
        Register('dcr13b', 4, 0x74ec),
        Register('dcr13c', 4, 0x74f0),
        Register('dcr13d', 4, 0x74f4),
        Register('dcr13e', 4, 0x74f8),
        Register('dcr13f', 4, 0x74fc),
        Register('dcr140', 4, 0x7500),
        Register('dcr141', 4, 0x7504),
        Register('dcr142', 4, 0x7508),
        Register('dcr143', 4, 0x750c),
        Register('dcr144', 4, 0x7510),
        Register('dcr145', 4, 0x7514),
        Register('dcr146', 4, 0x7518),
        Register('dcr147', 4, 0x751c),
        Register('dcr148', 4, 0x7520),
        Register('dcr149', 4, 0x7524),
        Register('dcr14a', 4, 0x7528),
        Register('dcr14b', 4, 0x752c),
        Register('dcr14c', 4, 0x7530),
        Register('dcr14d', 4, 0x7534),
        Register('dcr14e', 4, 0x7538),
        Register('dcr14f', 4, 0x753c),
        Register('dcr150', 4, 0x7540),
        Register('dcr151', 4, 0x7544),
        Register('dcr152', 4, 0x7548),
        Register('dcr153', 4, 0x754c),
        Register('dcr154', 4, 0x7550),
        Register('dcr155', 4, 0x7554),
        Register('dcr156', 4, 0x7558),
        Register('dcr157', 4, 0x755c),
        Register('dcr158', 4, 0x7560),
        Register('dcr159', 4, 0x7564),
        Register('dcr15a', 4, 0x7568),
        Register('dcr15b', 4, 0x756c),
        Register('dcr15c', 4, 0x7570),
        Register('dcr15d', 4, 0x7574),
        Register('dcr15e', 4, 0x7578),
        Register('dcr15f', 4, 0x757c),
        Register('dcr160', 4, 0x7580),
        Register('dcr161', 4, 0x7584),
        Register('dcr162', 4, 0x7588),
        Register('dcr163', 4, 0x758c),
        Register('dcr164', 4, 0x7590),
        Register('dcr165', 4, 0x7594),
        Register('dcr166', 4, 0x7598),
        Register('dcr167', 4, 0x759c),
        Register('dcr168', 4, 0x75a0),
        Register('dcr169', 4, 0x75a4),
        Register('dcr16a', 4, 0x75a8),
        Register('dcr16b', 4, 0x75ac),
        Register('dcr16c', 4, 0x75b0),
        Register('dcr16d', 4, 0x75b4),
        Register('dcr16e', 4, 0x75b8),
        Register('dcr16f', 4, 0x75bc),
        Register('dcr170', 4, 0x75c0),
        Register('dcr171', 4, 0x75c4),
        Register('dcr172', 4, 0x75c8),
        Register('dcr173', 4, 0x75cc),
        Register('dcr174', 4, 0x75d0),
        Register('dcr175', 4, 0x75d4),
        Register('dcr176', 4, 0x75d8),
        Register('dcr177', 4, 0x75dc),
        Register('dcr178', 4, 0x75e0),
        Register('dcr179', 4, 0x75e4),
        Register('dcr17a', 4, 0x75e8),
        Register('dcr17b', 4, 0x75ec),
        Register('dcr17c', 4, 0x75f0),
        Register('dcr17d', 4, 0x75f4),
        Register('dcr17e', 4, 0x75f8),
        Register('dcr17f', 4, 0x75fc),
        Register('dcr180', 4, 0x7600),
        Register('dcr181', 4, 0x7604),
        Register('dcr182', 4, 0x7608),
        Register('dcr183', 4, 0x760c),
        Register('dcr184', 4, 0x7610),
        Register('dcr185', 4, 0x7614),
        Register('dcr186', 4, 0x7618),
        Register('dcr187', 4, 0x761c),
        Register('dcr188', 4, 0x7620),
        Register('dcr189', 4, 0x7624),
        Register('dcr18a', 4, 0x7628),
        Register('dcr18b', 4, 0x762c),
        Register('dcr18c', 4, 0x7630),
        Register('dcr18d', 4, 0x7634),
        Register('dcr18e', 4, 0x7638),
        Register('dcr18f', 4, 0x763c),
        Register('dcr190', 4, 0x7640),
        Register('dcr191', 4, 0x7644),
        Register('dcr192', 4, 0x7648),
        Register('dcr193', 4, 0x764c),
        Register('dcr194', 4, 0x7650),
        Register('dcr195', 4, 0x7654),
        Register('dcr196', 4, 0x7658),
        Register('dcr197', 4, 0x765c),
        Register('dcr198', 4, 0x7660),
        Register('dcr199', 4, 0x7664),
        Register('dcr19a', 4, 0x7668),
        Register('dcr19b', 4, 0x766c),
        Register('dcr19c', 4, 0x7670),
        Register('dcr19d', 4, 0x7674),
        Register('dcr19e', 4, 0x7678),
        Register('dcr19f', 4, 0x767c),
        Register('dcr1a0', 4, 0x7680),
        Register('dcr1a1', 4, 0x7684),
        Register('dcr1a2', 4, 0x7688),
        Register('dcr1a3', 4, 0x768c),
        Register('dcr1a4', 4, 0x7690),
        Register('dcr1a5', 4, 0x7694),
        Register('dcr1a6', 4, 0x7698),
        Register('dcr1a7', 4, 0x769c),
        Register('dcr1a8', 4, 0x76a0),
        Register('dcr1a9', 4, 0x76a4),
        Register('dcr1aa', 4, 0x76a8),
        Register('dcr1ab', 4, 0x76ac),
        Register('dcr1ac', 4, 0x76b0),
        Register('dcr1ad', 4, 0x76b4),
        Register('dcr1ae', 4, 0x76b8),
        Register('dcr1af', 4, 0x76bc),
        Register('dcr1b0', 4, 0x76c0),
        Register('dcr1b1', 4, 0x76c4),
        Register('dcr1b2', 4, 0x76c8),
        Register('dcr1b3', 4, 0x76cc),
        Register('dcr1b4', 4, 0x76d0),
        Register('dcr1b5', 4, 0x76d4),
        Register('dcr1b6', 4, 0x76d8),
        Register('dcr1b7', 4, 0x76dc),
        Register('dcr1b8', 4, 0x76e0),
        Register('dcr1b9', 4, 0x76e4),
        Register('dcr1ba', 4, 0x76e8),
        Register('dcr1bb', 4, 0x76ec),
        Register('dcr1bc', 4, 0x76f0),
        Register('dcr1bd', 4, 0x76f4),
        Register('dcr1be', 4, 0x76f8),
        Register('dcr1bf', 4, 0x76fc),
        Register('dcr1c0', 4, 0x7700),
        Register('dcr1c1', 4, 0x7704),
        Register('dcr1c2', 4, 0x7708),
        Register('dcr1c3', 4, 0x770c),
        Register('dcr1c4', 4, 0x7710),
        Register('dcr1c5', 4, 0x7714),
        Register('dcr1c6', 4, 0x7718),
        Register('dcr1c7', 4, 0x771c),
        Register('dcr1c8', 4, 0x7720),
        Register('dcr1c9', 4, 0x7724),
        Register('dcr1ca', 4, 0x7728),
        Register('dcr1cb', 4, 0x772c),
        Register('dcr1cc', 4, 0x7730),
        Register('dcr1cd', 4, 0x7734),
        Register('dcr1ce', 4, 0x7738),
        Register('dcr1cf', 4, 0x773c),
        Register('dcr1d0', 4, 0x7740),
        Register('dcr1d1', 4, 0x7744),
        Register('dcr1d2', 4, 0x7748),
        Register('dcr1d3', 4, 0x774c),
        Register('dcr1d4', 4, 0x7750),
        Register('dcr1d5', 4, 0x7754),
        Register('dcr1d6', 4, 0x7758),
        Register('dcr1d7', 4, 0x775c),
        Register('dcr1d8', 4, 0x7760),
        Register('dcr1d9', 4, 0x7764),
        Register('dcr1da', 4, 0x7768),
        Register('dcr1db', 4, 0x776c),
        Register('dcr1dc', 4, 0x7770),
        Register('dcr1dd', 4, 0x7774),
        Register('dcr1de', 4, 0x7778),
        Register('dcr1df', 4, 0x777c),
        Register('dcr1e0', 4, 0x7780),
        Register('dcr1e1', 4, 0x7784),
        Register('dcr1e2', 4, 0x7788),
        Register('dcr1e3', 4, 0x778c),
        Register('dcr1e4', 4, 0x7790),
        Register('dcr1e5', 4, 0x7794),
        Register('dcr1e6', 4, 0x7798),
        Register('dcr1e7', 4, 0x779c),
        Register('dcr1e8', 4, 0x77a0),
        Register('dcr1e9', 4, 0x77a4),
        Register('dcr1ea', 4, 0x77a8),
        Register('dcr1eb', 4, 0x77ac),
        Register('dcr1ec', 4, 0x77b0),
        Register('dcr1ed', 4, 0x77b4),
        Register('dcr1ee', 4, 0x77b8),
        Register('dcr1ef', 4, 0x77bc),
        Register('dcr1f0', 4, 0x77c0),
        Register('dcr1f1', 4, 0x77c4),
        Register('dcr1f2', 4, 0x77c8),
        Register('dcr1f3', 4, 0x77cc),
        Register('dcr1f4', 4, 0x77d0),
        Register('dcr1f5', 4, 0x77d4),
        Register('dcr1f6', 4, 0x77d8),
        Register('dcr1f7', 4, 0x77dc),
        Register('dcr1f8', 4, 0x77e0),
        Register('dcr1f9', 4, 0x77e4),
        Register('dcr1fa', 4, 0x77e8),
        Register('dcr1fb', 4, 0x77ec),
        Register('dcr1fc', 4, 0x77f0),
        Register('dcr1fd', 4, 0x77f4),
        Register('dcr1fe', 4, 0x77f8),
        Register('dcr1ff', 4, 0x77fc),
        Register('dcr200', 4, 0x7800),
        Register('dcr201', 4, 0x7804),
        Register('dcr202', 4, 0x7808),
        Register('dcr203', 4, 0x780c),
        Register('dcr204', 4, 0x7810),
        Register('dcr205', 4, 0x7814),
        Register('dcr206', 4, 0x7818),
        Register('dcr207', 4, 0x781c),
        Register('dcr208', 4, 0x7820),
        Register('dcr209', 4, 0x7824),
        Register('dcr20a', 4, 0x7828),
        Register('dcr20b', 4, 0x782c),
        Register('dcr20c', 4, 0x7830),
        Register('dcr20d', 4, 0x7834),
        Register('dcr20e', 4, 0x7838),
        Register('dcr20f', 4, 0x783c),
        Register('dcr210', 4, 0x7840),
        Register('dcr211', 4, 0x7844),
        Register('dcr212', 4, 0x7848),
        Register('dcr213', 4, 0x784c),
        Register('dcr214', 4, 0x7850),
        Register('dcr215', 4, 0x7854),
        Register('dcr216', 4, 0x7858),
        Register('dcr217', 4, 0x785c),
        Register('dcr218', 4, 0x7860),
        Register('dcr219', 4, 0x7864),
        Register('dcr21a', 4, 0x7868),
        Register('dcr21b', 4, 0x786c),
        Register('dcr21c', 4, 0x7870),
        Register('dcr21d', 4, 0x7874),
        Register('dcr21e', 4, 0x7878),
        Register('dcr21f', 4, 0x787c),
        Register('dcr220', 4, 0x7880),
        Register('dcr221', 4, 0x7884),
        Register('dcr222', 4, 0x7888),
        Register('dcr223', 4, 0x788c),
        Register('dcr224', 4, 0x7890),
        Register('dcr225', 4, 0x7894),
        Register('dcr226', 4, 0x7898),
        Register('dcr227', 4, 0x789c),
        Register('dcr228', 4, 0x78a0),
        Register('dcr229', 4, 0x78a4),
        Register('dcr22a', 4, 0x78a8),
        Register('dcr22b', 4, 0x78ac),
        Register('dcr22c', 4, 0x78b0),
        Register('dcr22d', 4, 0x78b4),
        Register('dcr22e', 4, 0x78b8),
        Register('dcr22f', 4, 0x78bc),
        Register('dcr230', 4, 0x78c0),
        Register('dcr231', 4, 0x78c4),
        Register('dcr232', 4, 0x78c8),
        Register('dcr233', 4, 0x78cc),
        Register('dcr234', 4, 0x78d0),
        Register('dcr235', 4, 0x78d4),
        Register('dcr236', 4, 0x78d8),
        Register('dcr237', 4, 0x78dc),
        Register('dcr238', 4, 0x78e0),
        Register('dcr239', 4, 0x78e4),
        Register('dcr23a', 4, 0x78e8),
        Register('dcr23b', 4, 0x78ec),
        Register('dcr23c', 4, 0x78f0),
        Register('dcr23d', 4, 0x78f4),
        Register('dcr23e', 4, 0x78f8),
        Register('dcr23f', 4, 0x78fc),
        Register('dcr240', 4, 0x7900),
        Register('dcr241', 4, 0x7904),
        Register('dcr242', 4, 0x7908),
        Register('dcr243', 4, 0x790c),
        Register('dcr244', 4, 0x7910),
        Register('dcr245', 4, 0x7914),
        Register('dcr246', 4, 0x7918),
        Register('dcr247', 4, 0x791c),
        Register('dcr248', 4, 0x7920),
        Register('dcr249', 4, 0x7924),
        Register('dcr24a', 4, 0x7928),
        Register('dcr24b', 4, 0x792c),
        Register('dcr24c', 4, 0x7930),
        Register('dcr24d', 4, 0x7934),
        Register('dcr24e', 4, 0x7938),
        Register('dcr24f', 4, 0x793c),
        Register('dcr250', 4, 0x7940),
        Register('dcr251', 4, 0x7944),
        Register('dcr252', 4, 0x7948),
        Register('dcr253', 4, 0x794c),
        Register('dcr254', 4, 0x7950),
        Register('dcr255', 4, 0x7954),
        Register('dcr256', 4, 0x7958),
        Register('dcr257', 4, 0x795c),
        Register('dcr258', 4, 0x7960),
        Register('dcr259', 4, 0x7964),
        Register('dcr25a', 4, 0x7968),
        Register('dcr25b', 4, 0x796c),
        Register('dcr25c', 4, 0x7970),
        Register('dcr25d', 4, 0x7974),
        Register('dcr25e', 4, 0x7978),
        Register('dcr25f', 4, 0x797c),
        Register('dcr260', 4, 0x7980),
        Register('dcr261', 4, 0x7984),
        Register('dcr262', 4, 0x7988),
        Register('dcr263', 4, 0x798c),
        Register('dcr264', 4, 0x7990),
        Register('dcr265', 4, 0x7994),
        Register('dcr266', 4, 0x7998),
        Register('dcr267', 4, 0x799c),
        Register('dcr268', 4, 0x79a0),
        Register('dcr269', 4, 0x79a4),
        Register('dcr26a', 4, 0x79a8),
        Register('dcr26b', 4, 0x79ac),
        Register('dcr26c', 4, 0x79b0),
        Register('dcr26d', 4, 0x79b4),
        Register('dcr26e', 4, 0x79b8),
        Register('dcr26f', 4, 0x79bc),
        Register('dcr270', 4, 0x79c0),
        Register('dcr271', 4, 0x79c4),
        Register('dcr272', 4, 0x79c8),
        Register('dcr273', 4, 0x79cc),
        Register('dcr274', 4, 0x79d0),
        Register('dcr275', 4, 0x79d4),
        Register('dcr276', 4, 0x79d8),
        Register('dcr277', 4, 0x79dc),
        Register('dcr278', 4, 0x79e0),
        Register('dcr279', 4, 0x79e4),
        Register('dcr27a', 4, 0x79e8),
        Register('dcr27b', 4, 0x79ec),
        Register('dcr27c', 4, 0x79f0),
        Register('dcr27d', 4, 0x79f4),
        Register('dcr27e', 4, 0x79f8),
        Register('dcr27f', 4, 0x79fc),
        Register('dcr280', 4, 0x7a00),
        Register('dcr281', 4, 0x7a04),
        Register('dcr282', 4, 0x7a08),
        Register('dcr283', 4, 0x7a0c),
        Register('dcr284', 4, 0x7a10),
        Register('dcr285', 4, 0x7a14),
        Register('dcr286', 4, 0x7a18),
        Register('dcr287', 4, 0x7a1c),
        Register('dcr288', 4, 0x7a20),
        Register('dcr289', 4, 0x7a24),
        Register('dcr28a', 4, 0x7a28),
        Register('dcr28b', 4, 0x7a2c),
        Register('dcr28c', 4, 0x7a30),
        Register('dcr28d', 4, 0x7a34),
        Register('dcr28e', 4, 0x7a38),
        Register('dcr28f', 4, 0x7a3c),
        Register('dcr290', 4, 0x7a40),
        Register('dcr291', 4, 0x7a44),
        Register('dcr292', 4, 0x7a48),
        Register('dcr293', 4, 0x7a4c),
        Register('dcr294', 4, 0x7a50),
        Register('dcr295', 4, 0x7a54),
        Register('dcr296', 4, 0x7a58),
        Register('dcr297', 4, 0x7a5c),
        Register('dcr298', 4, 0x7a60),
        Register('dcr299', 4, 0x7a64),
        Register('dcr29a', 4, 0x7a68),
        Register('dcr29b', 4, 0x7a6c),
        Register('dcr29c', 4, 0x7a70),
        Register('dcr29d', 4, 0x7a74),
        Register('dcr29e', 4, 0x7a78),
        Register('dcr29f', 4, 0x7a7c),
        Register('dcr2a0', 4, 0x7a80),
        Register('dcr2a1', 4, 0x7a84),
        Register('dcr2a2', 4, 0x7a88),
        Register('dcr2a3', 4, 0x7a8c),
        Register('dcr2a4', 4, 0x7a90),
        Register('dcr2a5', 4, 0x7a94),
        Register('dcr2a6', 4, 0x7a98),
        Register('dcr2a7', 4, 0x7a9c),
        Register('dcr2a8', 4, 0x7aa0),
        Register('dcr2a9', 4, 0x7aa4),
        Register('dcr2aa', 4, 0x7aa8),
        Register('dcr2ab', 4, 0x7aac),
        Register('dcr2ac', 4, 0x7ab0),
        Register('dcr2ad', 4, 0x7ab4),
        Register('dcr2ae', 4, 0x7ab8),
        Register('dcr2af', 4, 0x7abc),
        Register('dcr2b0', 4, 0x7ac0),
        Register('dcr2b1', 4, 0x7ac4),
        Register('dcr2b2', 4, 0x7ac8),
        Register('dcr2b3', 4, 0x7acc),
        Register('dcr2b4', 4, 0x7ad0),
        Register('dcr2b5', 4, 0x7ad4),
        Register('dcr2b6', 4, 0x7ad8),
        Register('dcr2b7', 4, 0x7adc),
        Register('dcr2b8', 4, 0x7ae0),
        Register('dcr2b9', 4, 0x7ae4),
        Register('dcr2ba', 4, 0x7ae8),
        Register('dcr2bb', 4, 0x7aec),
        Register('dcr2bc', 4, 0x7af0),
        Register('dcr2bd', 4, 0x7af4),
        Register('dcr2be', 4, 0x7af8),
        Register('dcr2bf', 4, 0x7afc),
        Register('dcr2c0', 4, 0x7b00),
        Register('dcr2c1', 4, 0x7b04),
        Register('dcr2c2', 4, 0x7b08),
        Register('dcr2c3', 4, 0x7b0c),
        Register('dcr2c4', 4, 0x7b10),
        Register('dcr2c5', 4, 0x7b14),
        Register('dcr2c6', 4, 0x7b18),
        Register('dcr2c7', 4, 0x7b1c),
        Register('dcr2c8', 4, 0x7b20),
        Register('dcr2c9', 4, 0x7b24),
        Register('dcr2ca', 4, 0x7b28),
        Register('dcr2cb', 4, 0x7b2c),
        Register('dcr2cc', 4, 0x7b30),
        Register('dcr2cd', 4, 0x7b34),
        Register('dcr2ce', 4, 0x7b38),
        Register('dcr2cf', 4, 0x7b3c),
        Register('dcr2d0', 4, 0x7b40),
        Register('dcr2d1', 4, 0x7b44),
        Register('dcr2d2', 4, 0x7b48),
        Register('dcr2d3', 4, 0x7b4c),
        Register('dcr2d4', 4, 0x7b50),
        Register('dcr2d5', 4, 0x7b54),
        Register('dcr2d6', 4, 0x7b58),
        Register('dcr2d7', 4, 0x7b5c),
        Register('dcr2d8', 4, 0x7b60),
        Register('dcr2d9', 4, 0x7b64),
        Register('dcr2da', 4, 0x7b68),
        Register('dcr2db', 4, 0x7b6c),
        Register('dcr2dc', 4, 0x7b70),
        Register('dcr2dd', 4, 0x7b74),
        Register('dcr2de', 4, 0x7b78),
        Register('dcr2df', 4, 0x7b7c),
        Register('dcr2e0', 4, 0x7b80),
        Register('dcr2e1', 4, 0x7b84),
        Register('dcr2e2', 4, 0x7b88),
        Register('dcr2e3', 4, 0x7b8c),
        Register('dcr2e4', 4, 0x7b90),
        Register('dcr2e5', 4, 0x7b94),
        Register('dcr2e6', 4, 0x7b98),
        Register('dcr2e7', 4, 0x7b9c),
        Register('dcr2e8', 4, 0x7ba0),
        Register('dcr2e9', 4, 0x7ba4),
        Register('dcr2ea', 4, 0x7ba8),
        Register('dcr2eb', 4, 0x7bac),
        Register('dcr2ec', 4, 0x7bb0),
        Register('dcr2ed', 4, 0x7bb4),
        Register('dcr2ee', 4, 0x7bb8),
        Register('dcr2ef', 4, 0x7bbc),
        Register('dcr2f0', 4, 0x7bc0),
        Register('dcr2f1', 4, 0x7bc4),
        Register('dcr2f2', 4, 0x7bc8),
        Register('dcr2f3', 4, 0x7bcc),
        Register('dcr2f4', 4, 0x7bd0),
        Register('dcr2f5', 4, 0x7bd4),
        Register('dcr2f6', 4, 0x7bd8),
        Register('dcr2f7', 4, 0x7bdc),
        Register('dcr2f8', 4, 0x7be0),
        Register('dcr2f9', 4, 0x7be4),
        Register('dcr2fa', 4, 0x7be8),
        Register('dcr2fb', 4, 0x7bec),
        Register('dcr2fc', 4, 0x7bf0),
        Register('dcr2fd', 4, 0x7bf4),
        Register('dcr2fe', 4, 0x7bf8),
        Register('dcr2ff', 4, 0x7bfc),
        Register('dcr300', 4, 0x7c00),
        Register('dcr301', 4, 0x7c04),
        Register('dcr302', 4, 0x7c08),
        Register('dcr303', 4, 0x7c0c),
        Register('dcr304', 4, 0x7c10),
        Register('dcr305', 4, 0x7c14),
        Register('dcr306', 4, 0x7c18),
        Register('dcr307', 4, 0x7c1c),
        Register('dcr308', 4, 0x7c20),
        Register('dcr309', 4, 0x7c24),
        Register('dcr30a', 4, 0x7c28),
        Register('dcr30b', 4, 0x7c2c),
        Register('dcr30c', 4, 0x7c30),
        Register('dcr30d', 4, 0x7c34),
        Register('dcr30e', 4, 0x7c38),
        Register('dcr30f', 4, 0x7c3c),
        Register('dcr310', 4, 0x7c40),
        Register('dcr311', 4, 0x7c44),
        Register('dcr312', 4, 0x7c48),
        Register('dcr313', 4, 0x7c4c),
        Register('dcr314', 4, 0x7c50),
        Register('dcr315', 4, 0x7c54),
        Register('dcr316', 4, 0x7c58),
        Register('dcr317', 4, 0x7c5c),
        Register('dcr318', 4, 0x7c60),
        Register('dcr319', 4, 0x7c64),
        Register('dcr31a', 4, 0x7c68),
        Register('dcr31b', 4, 0x7c6c),
        Register('dcr31c', 4, 0x7c70),
        Register('dcr31d', 4, 0x7c74),
        Register('dcr31e', 4, 0x7c78),
        Register('dcr31f', 4, 0x7c7c),
        Register('dcr320', 4, 0x7c80),
        Register('dcr321', 4, 0x7c84),
        Register('dcr322', 4, 0x7c88),
        Register('dcr323', 4, 0x7c8c),
        Register('dcr324', 4, 0x7c90),
        Register('dcr325', 4, 0x7c94),
        Register('dcr326', 4, 0x7c98),
        Register('dcr327', 4, 0x7c9c),
        Register('dcr328', 4, 0x7ca0),
        Register('dcr329', 4, 0x7ca4),
        Register('dcr32a', 4, 0x7ca8),
        Register('dcr32b', 4, 0x7cac),
        Register('dcr32c', 4, 0x7cb0),
        Register('dcr32d', 4, 0x7cb4),
        Register('dcr32e', 4, 0x7cb8),
        Register('dcr32f', 4, 0x7cbc),
        Register('dcr330', 4, 0x7cc0),
        Register('dcr331', 4, 0x7cc4),
        Register('dcr332', 4, 0x7cc8),
        Register('dcr333', 4, 0x7ccc),
        Register('dcr334', 4, 0x7cd0),
        Register('dcr335', 4, 0x7cd4),
        Register('dcr336', 4, 0x7cd8),
        Register('dcr337', 4, 0x7cdc),
        Register('dcr338', 4, 0x7ce0),
        Register('dcr339', 4, 0x7ce4),
        Register('dcr33a', 4, 0x7ce8),
        Register('dcr33b', 4, 0x7cec),
        Register('dcr33c', 4, 0x7cf0),
        Register('dcr33d', 4, 0x7cf4),
        Register('dcr33e', 4, 0x7cf8),
        Register('dcr33f', 4, 0x7cfc),
        Register('dcr340', 4, 0x7d00),
        Register('dcr341', 4, 0x7d04),
        Register('dcr342', 4, 0x7d08),
        Register('dcr343', 4, 0x7d0c),
        Register('dcr344', 4, 0x7d10),
        Register('dcr345', 4, 0x7d14),
        Register('dcr346', 4, 0x7d18),
        Register('dcr347', 4, 0x7d1c),
        Register('dcr348', 4, 0x7d20),
        Register('dcr349', 4, 0x7d24),
        Register('dcr34a', 4, 0x7d28),
        Register('dcr34b', 4, 0x7d2c),
        Register('dcr34c', 4, 0x7d30),
        Register('dcr34d', 4, 0x7d34),
        Register('dcr34e', 4, 0x7d38),
        Register('dcr34f', 4, 0x7d3c),
        Register('dcr350', 4, 0x7d40),
        Register('dcr351', 4, 0x7d44),
        Register('dcr352', 4, 0x7d48),
        Register('dcr353', 4, 0x7d4c),
        Register('dcr354', 4, 0x7d50),
        Register('dcr355', 4, 0x7d54),
        Register('dcr356', 4, 0x7d58),
        Register('dcr357', 4, 0x7d5c),
        Register('dcr358', 4, 0x7d60),
        Register('dcr359', 4, 0x7d64),
        Register('dcr35a', 4, 0x7d68),
        Register('dcr35b', 4, 0x7d6c),
        Register('dcr35c', 4, 0x7d70),
        Register('dcr35d', 4, 0x7d74),
        Register('dcr35e', 4, 0x7d78),
        Register('dcr35f', 4, 0x7d7c),
        Register('dcr360', 4, 0x7d80),
        Register('dcr361', 4, 0x7d84),
        Register('dcr362', 4, 0x7d88),
        Register('dcr363', 4, 0x7d8c),
        Register('dcr364', 4, 0x7d90),
        Register('dcr365', 4, 0x7d94),
        Register('dcr366', 4, 0x7d98),
        Register('dcr367', 4, 0x7d9c),
        Register('dcr368', 4, 0x7da0),
        Register('dcr369', 4, 0x7da4),
        Register('dcr36a', 4, 0x7da8),
        Register('dcr36b', 4, 0x7dac),
        Register('dcr36c', 4, 0x7db0),
        Register('dcr36d', 4, 0x7db4),
        Register('dcr36e', 4, 0x7db8),
        Register('dcr36f', 4, 0x7dbc),
        Register('dcr370', 4, 0x7dc0),
        Register('dcr371', 4, 0x7dc4),
        Register('dcr372', 4, 0x7dc8),
        Register('dcr373', 4, 0x7dcc),
        Register('dcr374', 4, 0x7dd0),
        Register('dcr375', 4, 0x7dd4),
        Register('dcr376', 4, 0x7dd8),
        Register('dcr377', 4, 0x7ddc),
        Register('dcr378', 4, 0x7de0),
        Register('dcr379', 4, 0x7de4),
        Register('dcr37a', 4, 0x7de8),
        Register('dcr37b', 4, 0x7dec),
        Register('dcr37c', 4, 0x7df0),
        Register('dcr37d', 4, 0x7df4),
        Register('dcr37e', 4, 0x7df8),
        Register('dcr37f', 4, 0x7dfc),
        Register('dcr380', 4, 0x7e00),
        Register('dcr381', 4, 0x7e04),
        Register('dcr382', 4, 0x7e08),
        Register('dcr383', 4, 0x7e0c),
        Register('dcr384', 4, 0x7e10),
        Register('dcr385', 4, 0x7e14),
        Register('dcr386', 4, 0x7e18),
        Register('dcr387', 4, 0x7e1c),
        Register('dcr388', 4, 0x7e20),
        Register('dcr389', 4, 0x7e24),
        Register('dcr38a', 4, 0x7e28),
        Register('dcr38b', 4, 0x7e2c),
        Register('dcr38c', 4, 0x7e30),
        Register('dcr38d', 4, 0x7e34),
        Register('dcr38e', 4, 0x7e38),
        Register('dcr38f', 4, 0x7e3c),
        Register('dcr390', 4, 0x7e40),
        Register('dcr391', 4, 0x7e44),
        Register('dcr392', 4, 0x7e48),
        Register('dcr393', 4, 0x7e4c),
        Register('dcr394', 4, 0x7e50),
        Register('dcr395', 4, 0x7e54),
        Register('dcr396', 4, 0x7e58),
        Register('dcr397', 4, 0x7e5c),
        Register('dcr398', 4, 0x7e60),
        Register('dcr399', 4, 0x7e64),
        Register('dcr39a', 4, 0x7e68),
        Register('dcr39b', 4, 0x7e6c),
        Register('dcr39c', 4, 0x7e70),
        Register('dcr39d', 4, 0x7e74),
        Register('dcr39e', 4, 0x7e78),
        Register('dcr39f', 4, 0x7e7c),
        Register('dcr3a0', 4, 0x7e80),
        Register('dcr3a1', 4, 0x7e84),
        Register('dcr3a2', 4, 0x7e88),
        Register('dcr3a3', 4, 0x7e8c),
        Register('dcr3a4', 4, 0x7e90),
        Register('dcr3a5', 4, 0x7e94),
        Register('dcr3a6', 4, 0x7e98),
        Register('dcr3a7', 4, 0x7e9c),
        Register('dcr3a8', 4, 0x7ea0),
        Register('dcr3a9', 4, 0x7ea4),
        Register('dcr3aa', 4, 0x7ea8),
        Register('dcr3ab', 4, 0x7eac),
        Register('dcr3ac', 4, 0x7eb0),
        Register('dcr3ad', 4, 0x7eb4),
        Register('dcr3ae', 4, 0x7eb8),
        Register('dcr3af', 4, 0x7ebc),
        Register('dcr3b0', 4, 0x7ec0),
        Register('dcr3b1', 4, 0x7ec4),
        Register('dcr3b2', 4, 0x7ec8),
        Register('dcr3b3', 4, 0x7ecc),
        Register('dcr3b4', 4, 0x7ed0),
        Register('dcr3b5', 4, 0x7ed4),
        Register('dcr3b6', 4, 0x7ed8),
        Register('dcr3b7', 4, 0x7edc),
        Register('dcr3b8', 4, 0x7ee0),
        Register('dcr3b9', 4, 0x7ee4),
        Register('dcr3ba', 4, 0x7ee8),
        Register('dcr3bb', 4, 0x7eec),
        Register('dcr3bc', 4, 0x7ef0),
        Register('dcr3bd', 4, 0x7ef4),
        Register('dcr3be', 4, 0x7ef8),
        Register('dcr3bf', 4, 0x7efc),
        Register('dcr3c0', 4, 0x7f00),
        Register('dcr3c1', 4, 0x7f04),
        Register('dcr3c2', 4, 0x7f08),
        Register('dcr3c3', 4, 0x7f0c),
        Register('dcr3c4', 4, 0x7f10),
        Register('dcr3c5', 4, 0x7f14),
        Register('dcr3c6', 4, 0x7f18),
        Register('dcr3c7', 4, 0x7f1c),
        Register('dcr3c8', 4, 0x7f20),
        Register('dcr3c9', 4, 0x7f24),
        Register('dcr3ca', 4, 0x7f28),
        Register('dcr3cb', 4, 0x7f2c),
        Register('dcr3cc', 4, 0x7f30),
        Register('dcr3cd', 4, 0x7f34),
        Register('dcr3ce', 4, 0x7f38),
        Register('dcr3cf', 4, 0x7f3c),
        Register('dcr3d0', 4, 0x7f40),
        Register('dcr3d1', 4, 0x7f44),
        Register('dcr3d2', 4, 0x7f48),
        Register('dcr3d3', 4, 0x7f4c),
        Register('dcr3d4', 4, 0x7f50),
        Register('dcr3d5', 4, 0x7f54),
        Register('dcr3d6', 4, 0x7f58),
        Register('dcr3d7', 4, 0x7f5c),
        Register('dcr3d8', 4, 0x7f60),
        Register('dcr3d9', 4, 0x7f64),
        Register('dcr3da', 4, 0x7f68),
        Register('dcr3db', 4, 0x7f6c),
        Register('dcr3dc', 4, 0x7f70),
        Register('dcr3dd', 4, 0x7f74),
        Register('dcr3de', 4, 0x7f78),
        Register('dcr3df', 4, 0x7f7c),
        Register('dcr3e0', 4, 0x7f80),
        Register('dcr3e1', 4, 0x7f84),
        Register('dcr3e2', 4, 0x7f88),
        Register('dcr3e3', 4, 0x7f8c),
        Register('dcr3e4', 4, 0x7f90),
        Register('dcr3e5', 4, 0x7f94),
        Register('dcr3e6', 4, 0x7f98),
        Register('dcr3e7', 4, 0x7f9c),
        Register('dcr3e8', 4, 0x7fa0),
        Register('dcr3e9', 4, 0x7fa4),
        Register('dcr3ea', 4, 0x7fa8),
        Register('dcr3eb', 4, 0x7fac),
        Register('dcr3ec', 4, 0x7fb0),
        Register('dcr3ed', 4, 0x7fb4),
        Register('dcr3ee', 4, 0x7fb8),
        Register('dcr3ef', 4, 0x7fbc),
        Register('dcr3f0', 4, 0x7fc0),
        Register('dcr3f1', 4, 0x7fc4),
        Register('dcr3f2', 4, 0x7fc8),
        Register('dcr3f3', 4, 0x7fcc),
        Register('dcr3f4', 4, 0x7fd0),
        Register('dcr3f5', 4, 0x7fd4),
        Register('dcr3f6', 4, 0x7fd8),
        Register('dcr3f7', 4, 0x7fdc),
        Register('dcr3f8', 4, 0x7fe0),
        Register('dcr3f9', 4, 0x7fe4),
        Register('dcr3fa', 4, 0x7fe8),
        Register('dcr3fb', 4, 0x7fec),
        Register('dcr3fc', 4, 0x7ff0),
        Register('dcr3fd', 4, 0x7ff4),
        Register('dcr3fe', 4, 0x7ff8),
        Register('dcr3ff', 4, 0x7ffc),
        Register('acc', 8, 0x10000)
    ]

register_arch(['powerpc:le:32:quicc'], 32, Endness.LE, ArchPcode_PowerPC_LE_32_QUICC)

[((3230, 0, 3230, 85), 'archinfo.arch.register_arch', 'register_arch', ({(3230, 14, 3230, 37): "['powerpc:le:32:quicc']", (3230, 39, 3230, 41): '(32)', (3230, 43, 3230, 53): 'Endness.LE', (3230, 55, 3230, 84): 'ArchPcode_PowerPC_LE_32_QUICC'}, {}), "(['powerpc:le:32:quicc'], 32, Endness.LE,\n    ArchPcode_PowerPC_LE_32_QUICC)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((20, 8, 20, 30), 'archinfo.arch.Register', 'Register', ({(20, 17, 20, 21): '"""r0"""', (20, 23, 20, 24): '(4)', (20, 26, 20, 29): '(0)'}, {}), "('r0', 4, 0)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((21, 8, 21, 30), 'archinfo.arch.Register', 'Register', ({(21, 17, 21, 21): '"""r1"""', (21, 23, 21, 24): '(4)', (21, 26, 21, 29): '(4)'}, {}), "('r1', 4, 4)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((22, 8, 22, 30), 'archinfo.arch.Register', 'Register', ({(22, 17, 22, 21): '"""r2"""', (22, 23, 22, 24): '(4)', (22, 26, 22, 29): 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'archinfo.arch.Register', 'Register', ({(80, 17, 80, 28): '"""fp_vxsqrt"""', (80, 30, 80, 31): '(1)', (80, 33, 80, 38): '(1302)'}, {}), "('fp_vxsqrt', 1, 1302)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((81, 8, 81, 38), 'archinfo.arch.Register', 'Register', ({(81, 17, 81, 27): '"""fp_vxcvi"""', (81, 29, 81, 30): '(1)', (81, 32, 81, 37): '(1303)'}, {}), "('fp_vxcvi', 1, 1303)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((82, 8, 82, 35), 'archinfo.arch.Register', 'Register', ({(82, 17, 82, 24): '"""fp_ve"""', (82, 26, 82, 27): '(1)', (82, 29, 82, 34): '(1304)'}, {}), "('fp_ve', 1, 1304)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((83, 8, 83, 35), 'archinfo.arch.Register', 'Register', ({(83, 17, 83, 24): '"""fp_oe"""', (83, 26, 83, 27): '(1)', (83, 29, 83, 34): '(1305)'}, {}), "('fp_oe', 1, 1305)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((84, 8, 84, 35), 'archinfo.arch.Register', 'Register', ({(84, 17, 84, 24): '"""fp_ue"""', (84, 26, 84, 27): '(1)', (84, 29, 84, 34): '(1306)'}, {}), "('fp_ue', 1, 1306)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((85, 8, 85, 35), 'archinfo.arch.Register', 'Register', ({(85, 17, 85, 24): '"""fp_ze"""', (85, 26, 85, 27): '(1)', (85, 29, 85, 34): '(1307)'}, {}), "('fp_ze', 1, 1307)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((86, 8, 86, 35), 'archinfo.arch.Register', 'Register', ({(86, 17, 86, 24): '"""fp_xe"""', (86, 26, 86, 27): '(1)', (86, 29, 86, 34): '(1308)'}, {}), "('fp_xe', 1, 1308)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((87, 8, 87, 35), 'archinfo.arch.Register', 'Register', ({(87, 17, 87, 24): '"""fp_ni"""', (87, 26, 87, 27): '(1)', (87, 29, 87, 34): '(1309)'}, {}), "('fp_ni', 1, 1309)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((88, 8, 88, 36), 'archinfo.arch.Register', 'Register', ({(88, 17, 88, 25): '"""fp_rn0"""', (88, 27, 88, 28): '(1)', (88, 30, 88, 35): '(1310)'}, {}), "('fp_rn0', 1, 1310)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((89, 8, 89, 36), 'archinfo.arch.Register', 'Register', ({(89, 17, 89, 25): '"""fp_rn1"""', (89, 27, 89, 28): '(1)', (89, 30, 89, 35): '(1311)'}, {}), "('fp_rn1', 1, 1311)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((90, 8, 90, 33), 'archinfo.arch.Register', 'Register', ({(90, 17, 90, 22): '"""msr"""', (90, 24, 90, 25): '(4)', (90, 27, 90, 32): '(1792)'}, {}), "('msr', 4, 1792)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((91, 8, 91, 45), 'archinfo.arch.Register', 'Register', ({(91, 17, 91, 34): '"""reserve_address"""', (91, 36, 91, 37): '(4)', (91, 39, 91, 44): '(1824)'}, {}), "('reserve_address', 4, 1824)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((92, 8, 92, 37), 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17, 391, 23): '"""tbur"""', (391, 25, 391, 26): '(4)', (391, 28, 391, 34): '(5172)'}, {}), "('tbur', 4, 5172)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((392, 8, 392, 37), 'archinfo.arch.Register', 'Register', ({(392, 17, 392, 25): '"""spr10e"""', (392, 27, 392, 28): '(4)', (392, 30, 392, 36): '(5176)'}, {}), "('spr10e', 4, 5176)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((393, 8, 393, 37), 'archinfo.arch.Register', 'Register', ({(393, 17, 393, 25): '"""spr10f"""', (393, 27, 393, 28): '(4)', (393, 30, 393, 36): '(5180)'}, {}), "('spr10f', 4, 5180)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((394, 8, 394, 37), 'archinfo.arch.Register', 'Register', ({(394, 17, 394, 25): '"""spr110"""', (394, 27, 394, 28): '(4)', (394, 30, 394, 36): '(5184)'}, {}), "('spr110', 4, 5184)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((395, 8, 395, 37), 'archinfo.arch.Register', 'Register', ({(395, 17, 395, 25): '"""spr111"""', (395, 27, 395, 28): '(4)', (395, 30, 395, 36): '(5188)'}, {}), "('spr111', 4, 5188)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((396, 8, 396, 37), 'archinfo.arch.Register', 'Register', ({(396, 17, 396, 25): '"""spr112"""', (396, 27, 396, 28): '(4)', (396, 30, 396, 36): '(5192)'}, {}), "('spr112', 4, 5192)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((397, 8, 397, 37), 'archinfo.arch.Register', 'Register', ({(397, 17, 397, 25): '"""spr113"""', (397, 27, 397, 28): '(4)', (397, 30, 397, 36): '(5196)'}, {}), "('spr113', 4, 5196)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((398, 8, 398, 37), 'archinfo.arch.Register', 'Register', ({(398, 17, 398, 25): '"""spr114"""', (398, 27, 398, 28): '(4)', (398, 30, 398, 36): '(5200)'}, {}), "('spr114', 4, 5200)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((399, 8, 399, 37), 'archinfo.arch.Register', 'Register', ({(399, 17, 399, 25): '"""spr115"""', (399, 27, 399, 28): '(4)', (399, 30, 399, 36): '(5204)'}, {}), "('spr115', 4, 5204)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((400, 8, 400, 37), 'archinfo.arch.Register', 'Register', ({(400, 17, 400, 25): '"""spr116"""', (400, 27, 400, 28): '(4)', (400, 30, 400, 36): '(5208)'}, {}), "('spr116', 4, 5208)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((401, 8, 401, 37), 'archinfo.arch.Register', 'Register', ({(401, 17, 401, 25): '"""spr117"""', (401, 27, 401, 28): '(4)', (401, 30, 401, 36): '(5212)'}, {}), "('spr117', 4, 5212)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((402, 8, 402, 37), 'archinfo.arch.Register', 'Register', ({(402, 17, 402, 25): '"""spr118"""', (402, 27, 402, 28): '(4)', (402, 30, 402, 36): '(5216)'}, {}), "('spr118', 4, 5216)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((403, 8, 403, 37), 'archinfo.arch.Register', 'Register', ({(403, 17, 403, 25): '"""spr119"""', (403, 27, 403, 28): '(4)', (403, 30, 403, 36): '(5220)'}, {}), "('spr119', 4, 5220)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((404, 8, 404, 37), 'archinfo.arch.Register', 'Register', ({(404, 17, 404, 25): '"""spr11a"""', (404, 27, 404, 28): '(4)', (404, 30, 404, 36): '(5224)'}, {}), "('spr11a', 4, 5224)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((405, 8, 405, 37), 'archinfo.arch.Register', 'Register', ({(405, 17, 405, 25): '"""spr11b"""', (405, 27, 405, 28): '(4)', (405, 30, 405, 36): '(5228)'}, {}), "('spr11b', 4, 5228)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((406, 8, 406, 35), 'archinfo.arch.Register', 'Register', ({(406, 17, 406, 23): '"""tblw"""', (406, 25, 406, 26): '(4)', (406, 28, 406, 34): '(5232)'}, {}), "('tblw', 4, 5232)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((407, 8, 407, 35), 'archinfo.arch.Register', 'Register', ({(407, 17, 407, 23): '"""tbuw"""', (407, 25, 407, 26): '(4)', (407, 28, 407, 34): '(5236)'}, {}), "('tbuw', 4, 5236)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((408, 8, 408, 37), 'archinfo.arch.Register', 'Register', ({(408, 17, 408, 25): '"""spr11e"""', (408, 27, 408, 28): '(4)', (408, 30, 408, 36): '(5240)'}, {}), "('spr11e', 4, 5240)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((409, 8, 409, 37), 'archinfo.arch.Register', 'Register', ({(409, 17, 409, 25): '"""spr11f"""', (409, 27, 409, 28): '(4)', (409, 30, 409, 36): '(5244)'}, {}), "('spr11f', 4, 5244)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((410, 8, 410, 37), 'archinfo.arch.Register', 'Register', ({(410, 17, 410, 25): '"""spr120"""', (410, 27, 410, 28): '(4)', (410, 30, 410, 36): '(5248)'}, {}), "('spr120', 4, 5248)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((411, 8, 411, 37), 'archinfo.arch.Register', 'Register', ({(411, 17, 411, 25): '"""spr121"""', (411, 27, 411, 28): '(4)', (411, 30, 411, 36): '(5252)'}, {}), "('spr121', 4, 5252)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((412, 8, 412, 37), 'archinfo.arch.Register', 'Register', ({(412, 17, 412, 25): '"""spr122"""', (412, 27, 412, 28): '(4)', (412, 30, 412, 36): '(5256)'}, {}), "('spr122', 4, 5256)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((413, 8, 413, 37), 'archinfo.arch.Register', 'Register', ({(413, 17, 413, 25): '"""spr123"""', (413, 27, 413, 28): '(4)', (413, 30, 413, 36): '(5260)'}, {}), "('spr123', 4, 5260)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((414, 8, 414, 37), 'archinfo.arch.Register', 'Register', ({(414, 17, 414, 25): '"""spr124"""', (414, 27, 414, 28): '(4)', (414, 30, 414, 36): '(5264)'}, {}), "('spr124', 4, 5264)", False, 'from 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5280)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((419, 8, 419, 37), 'archinfo.arch.Register', 'Register', ({(419, 17, 419, 25): '"""spr129"""', (419, 27, 419, 28): '(4)', (419, 30, 419, 36): '(5284)'}, {}), "('spr129', 4, 5284)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((420, 8, 420, 37), 'archinfo.arch.Register', 'Register', ({(420, 17, 420, 25): '"""spr12a"""', (420, 27, 420, 28): '(4)', (420, 30, 420, 36): '(5288)'}, {}), "('spr12a', 4, 5288)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((421, 8, 421, 37), 'archinfo.arch.Register', 'Register', ({(421, 17, 421, 25): '"""spr12b"""', (421, 27, 421, 28): '(4)', (421, 30, 421, 36): '(5292)'}, {}), "('spr12b', 4, 5292)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((422, 8, 422, 37), 'archinfo.arch.Register', 'Register', ({(422, 17, 422, 25): '"""spr12c"""', (422, 27, 422, 28): '(4)', (422, 30, 422, 36): '(5296)'}, {}), "('spr12c', 4, 5296)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((423, 8, 423, 37), 'archinfo.arch.Register', 'Register', ({(423, 17, 423, 25): '"""spr12d"""', (423, 27, 423, 28): '(4)', (423, 30, 423, 36): '(5300)'}, {}), "('spr12d', 4, 5300)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((424, 8, 424, 37), 'archinfo.arch.Register', 'Register', ({(424, 17, 424, 25): '"""spr12e"""', (424, 27, 424, 28): '(4)', (424, 30, 424, 36): '(5304)'}, {}), "('spr12e', 4, 5304)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((425, 8, 425, 37), 'archinfo.arch.Register', 'Register', ({(425, 17, 425, 25): '"""spr12f"""', (425, 27, 425, 28): '(4)', (425, 30, 425, 36): '(5308)'}, {}), "('spr12f', 4, 5308)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((426, 8, 426, 37), 'archinfo.arch.Register', 'Register', ({(426, 17, 426, 25): '"""spr130"""', (426, 27, 426, 28): '(4)', (426, 30, 426, 36): '(5312)'}, {}), "('spr130', 4, 5312)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((427, 8, 427, 37), 'archinfo.arch.Register', 'Register', ({(427, 17, 427, 25): '"""spr131"""', (427, 27, 427, 28): '(4)', (427, 30, 427, 36): '(5316)'}, {}), "('spr131', 4, 5316)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((428, 8, 428, 37), 'archinfo.arch.Register', 'Register', ({(428, 17, 428, 25): '"""spr132"""', (428, 27, 428, 28): '(4)', (428, 30, 428, 36): '(5320)'}, {}), "('spr132', 4, 5320)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((429, 8, 429, 37), 'archinfo.arch.Register', 'Register', ({(429, 17, 429, 25): '"""spr133"""', (429, 27, 429, 28): '(4)', (429, 30, 429, 36): '(5324)'}, {}), "('spr133', 4, 5324)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((430, 8, 430, 37), 'archinfo.arch.Register', 'Register', ({(430, 17, 430, 25): '"""spr134"""', (430, 27, 430, 28): '(4)', (430, 30, 430, 36): '(5328)'}, {}), "('spr134', 4, 5328)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((431, 8, 431, 37), 'archinfo.arch.Register', 'Register', ({(431, 17, 431, 25): '"""spr135"""', (431, 27, 431, 28): '(4)', (431, 30, 431, 36): '(5332)'}, {}), "('spr135', 4, 5332)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((432, 8, 432, 37), 'archinfo.arch.Register', 'Register', ({(432, 17, 432, 25): '"""spr136"""', (432, 27, 432, 28): '(4)', (432, 30, 432, 36): '(5336)'}, {}), "('spr136', 4, 5336)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((433, 8, 433, 37), 'archinfo.arch.Register', 'Register', ({(433, 17, 433, 25): '"""spr137"""', (433, 27, 433, 28): '(4)', (433, 30, 433, 36): '(5340)'}, {}), "('spr137', 4, 5340)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((434, 8, 434, 37), 'archinfo.arch.Register', 'Register', ({(434, 17, 434, 25): '"""spr138"""', (434, 27, 434, 28): '(4)', (434, 30, 434, 36): '(5344)'}, {}), "('spr138', 4, 5344)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((435, 8, 435, 37), 'archinfo.arch.Register', 'Register', ({(435, 17, 435, 25): '"""spr139"""', (435, 27, 435, 28): '(4)', (435, 30, 435, 36): '(5348)'}, {}), "('spr139', 4, 5348)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((436, 8, 436, 37), 'archinfo.arch.Register', 'Register', ({(436, 17, 436, 25): '"""spr13a"""', (436, 27, 436, 28): '(4)', (436, 30, 436, 36): '(5352)'}, {}), "('spr13a', 4, 5352)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((437, 8, 437, 37), 'archinfo.arch.Register', 'Register', ({(437, 17, 437, 25): '"""spr13b"""', (437, 27, 437, 28): '(4)', (437, 30, 437, 36): '(5356)'}, {}), "('spr13b', 4, 5356)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((438, 8, 438, 37), 'archinfo.arch.Register', 'Register', ({(438, 17, 438, 25): '"""spr13c"""', (438, 27, 438, 28): '(4)', (438, 30, 438, 36): '(5360)'}, {}), "('spr13c', 4, 5360)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((439, 8, 439, 37), 'archinfo.arch.Register', 'Register', ({(439, 17, 439, 25): '"""spr13d"""', (439, 27, 439, 28): '(4)', (439, 30, 439, 36): '(5364)'}, {}), "('spr13d', 4, 5364)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((440, 8, 440, 37), 'archinfo.arch.Register', 'Register', ({(440, 17, 440, 25): '"""spr13e"""', (440, 27, 440, 28): '(4)', (440, 30, 440, 36): '(5368)'}, {}), "('spr13e', 4, 5368)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((441, 8, 441, 37), 'archinfo.arch.Register', 'Register', ({(441, 17, 441, 25): '"""spr13f"""', (441, 27, 441, 28): '(4)', (441, 30, 441, 36): '(5372)'}, {}), "('spr13f', 4, 5372)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((442, 8, 442, 37), 'archinfo.arch.Register', 'Register', ({(442, 17, 442, 25): '"""spr140"""', (442, 27, 442, 28): '(4)', (442, 30, 442, 36): '(5376)'}, {}), "('spr140', 4, 5376)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((443, 8, 443, 37), 'archinfo.arch.Register', 'Register', ({(443, 17, 443, 25): '"""spr141"""', (443, 27, 443, 28): '(4)', (443, 30, 443, 36): '(5380)'}, {}), "('spr141', 4, 5380)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((444, 8, 444, 37), 'archinfo.arch.Register', 'Register', ({(444, 17, 444, 25): '"""spr142"""', (444, 27, 444, 28): '(4)', (444, 30, 444, 36): '(5384)'}, {}), "('spr142', 4, 5384)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((445, 8, 445, 37), 'archinfo.arch.Register', 'Register', ({(445, 17, 445, 25): '"""spr143"""', (445, 27, 445, 28): '(4)', (445, 30, 445, 36): '(5388)'}, {}), "('spr143', 4, 5388)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((446, 8, 446, 37), 'archinfo.arch.Register', 'Register', ({(446, 17, 446, 25): '"""spr144"""', (446, 27, 446, 28): '(4)', (446, 30, 446, 36): '(5392)'}, {}), "('spr144', 4, 5392)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((447, 8, 447, 37), 'archinfo.arch.Register', 'Register', ({(447, 17, 447, 25): '"""spr145"""', (447, 27, 447, 28): '(4)', (447, 30, 447, 36): '(5396)'}, {}), "('spr145', 4, 5396)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((448, 8, 448, 37), 'archinfo.arch.Register', 'Register', ({(448, 17, 448, 25): '"""spr146"""', (448, 27, 448, 28): '(4)', (448, 30, 448, 36): '(5400)'}, {}), "('spr146', 4, 5400)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((449, 8, 449, 37), 'archinfo.arch.Register', 'Register', ({(449, 17, 449, 25): '"""spr147"""', (449, 27, 449, 28): '(4)', (449, 30, 449, 36): '(5404)'}, {}), "('spr147', 4, 5404)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((450, 8, 450, 37), 'archinfo.arch.Register', 'Register', ({(450, 17, 450, 25): '"""spr148"""', (450, 27, 450, 28): '(4)', (450, 30, 450, 36): '(5408)'}, {}), "('spr148', 4, 5408)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((451, 8, 451, 37), 'archinfo.arch.Register', 'Register', ({(451, 17, 451, 25): '"""spr149"""', (451, 27, 451, 28): '(4)', (451, 30, 451, 36): '(5412)'}, {}), "('spr149', 4, 5412)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((452, 8, 452, 37), 'archinfo.arch.Register', 'Register', ({(452, 17, 452, 25): '"""spr14a"""', (452, 27, 452, 28): '(4)', (452, 30, 452, 36): '(5416)'}, {}), "('spr14a', 4, 5416)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((453, 8, 453, 37), 'archinfo.arch.Register', 'Register', ({(453, 17, 453, 25): '"""spr14b"""', (453, 27, 453, 28): '(4)', (453, 30, 453, 36): '(5420)'}, {}), "('spr14b', 4, 5420)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((454, 8, 454, 37), 'archinfo.arch.Register', 'Register', ({(454, 17, 454, 25): '"""spr14c"""', (454, 27, 454, 28): '(4)', (454, 30, 454, 36): '(5424)'}, {}), "('spr14c', 4, 5424)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((455, 8, 455, 37), 'archinfo.arch.Register', 'Register', ({(455, 17, 455, 25): '"""spr14d"""', (455, 27, 455, 28): '(4)', (455, 30, 455, 36): '(5428)'}, {}), "('spr14d', 4, 5428)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((456, 8, 456, 37), 'archinfo.arch.Register', 'Register', ({(456, 17, 456, 25): '"""spr14e"""', (456, 27, 456, 28): '(4)', (456, 30, 456, 36): '(5432)'}, {}), "('spr14e', 4, 5432)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((457, 8, 457, 37), 'archinfo.arch.Register', 'Register', ({(457, 17, 457, 25): '"""spr14f"""', (457, 27, 457, 28): '(4)', (457, 30, 457, 36): '(5436)'}, {}), "('spr14f', 4, 5436)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((458, 8, 458, 37), 'archinfo.arch.Register', 'Register', ({(458, 17, 458, 25): '"""spr150"""', (458, 27, 458, 28): '(4)', (458, 30, 458, 36): '(5440)'}, {}), "('spr150', 4, 5440)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((459, 8, 459, 37), 'archinfo.arch.Register', 'Register', ({(459, 17, 459, 25): '"""spr151"""', (459, 27, 459, 28): '(4)', (459, 30, 459, 36): '(5444)'}, {}), "('spr151', 4, 5444)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((460, 8, 460, 37), 'archinfo.arch.Register', 'Register', ({(460, 17, 460, 25): '"""spr152"""', (460, 27, 460, 28): '(4)', (460, 30, 460, 36): '(5448)'}, {}), "('spr152', 4, 5448)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((461, 8, 461, 37), 'archinfo.arch.Register', 'Register', ({(461, 17, 461, 25): '"""spr153"""', (461, 27, 461, 28): '(4)', (461, 30, 461, 36): '(5452)'}, {}), "('spr153', 4, 5452)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((462, 8, 462, 37), 'archinfo.arch.Register', 'Register', ({(462, 17, 462, 25): '"""spr154"""', (462, 27, 462, 28): '(4)', (462, 30, 462, 36): '(5456)'}, {}), "('spr154', 4, 5456)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((463, 8, 463, 37), 'archinfo.arch.Register', 'Register', ({(463, 17, 463, 25): '"""spr155"""', (463, 27, 463, 28): '(4)', (463, 30, 463, 36): '(5460)'}, {}), "('spr155', 4, 5460)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((464, 8, 464, 37), 'archinfo.arch.Register', 'Register', ({(464, 17, 464, 25): '"""spr156"""', (464, 27, 464, 28): '(4)', (464, 30, 464, 36): '(5464)'}, {}), "('spr156', 4, 5464)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((465, 8, 465, 37), 'archinfo.arch.Register', 'Register', ({(465, 17, 465, 25): '"""spr157"""', (465, 27, 465, 28): '(4)', (465, 30, 465, 36): '(5468)'}, {}), "('spr157', 4, 5468)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((466, 8, 466, 37), 'archinfo.arch.Register', 'Register', ({(466, 17, 466, 25): '"""spr158"""', (466, 27, 466, 28): '(4)', (466, 30, 466, 36): '(5472)'}, {}), "('spr158', 4, 5472)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((467, 8, 467, 37), 'archinfo.arch.Register', 'Register', ({(467, 17, 467, 25): '"""spr159"""', (467, 27, 467, 28): '(4)', (467, 30, 467, 36): '(5476)'}, {}), "('spr159', 4, 5476)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((468, 8, 468, 37), 'archinfo.arch.Register', 'Register', ({(468, 17, 468, 25): '"""spr15a"""', (468, 27, 468, 28): '(4)', (468, 30, 468, 36): '(5480)'}, {}), "('spr15a', 4, 5480)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((469, 8, 469, 37), 'archinfo.arch.Register', 'Register', ({(469, 17, 469, 25): '"""spr15b"""', (469, 27, 469, 28): '(4)', (469, 30, 469, 36): '(5484)'}, {}), "('spr15b', 4, 5484)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((470, 8, 470, 37), 'archinfo.arch.Register', 'Register', ({(470, 17, 470, 25): '"""spr15c"""', (470, 27, 470, 28): '(4)', (470, 30, 470, 36): '(5488)'}, {}), "('spr15c', 4, 5488)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((471, 8, 471, 37), 'archinfo.arch.Register', 'Register', ({(471, 17, 471, 25): '"""spr15d"""', (471, 27, 471, 28): '(4)', (471, 30, 471, 36): '(5492)'}, {}), "('spr15d', 4, 5492)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((472, 8, 472, 37), 'archinfo.arch.Register', 'Register', ({(472, 17, 472, 25): '"""spr15e"""', (472, 27, 472, 28): '(4)', (472, 30, 472, 36): '(5496)'}, {}), "('spr15e', 4, 5496)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((473, 8, 473, 37), 'archinfo.arch.Register', 'Register', ({(473, 17, 473, 25): '"""spr15f"""', (473, 27, 473, 28): '(4)', (473, 30, 473, 36): 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481, 28): '(4)', (481, 30, 481, 36): '(5532)'}, {}), "('spr167', 4, 5532)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((482, 8, 482, 37), 'archinfo.arch.Register', 'Register', ({(482, 17, 482, 25): '"""spr168"""', (482, 27, 482, 28): '(4)', (482, 30, 482, 36): '(5536)'}, {}), "('spr168', 4, 5536)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((483, 8, 483, 37), 'archinfo.arch.Register', 'Register', ({(483, 17, 483, 25): '"""spr169"""', (483, 27, 483, 28): '(4)', (483, 30, 483, 36): '(5540)'}, {}), "('spr169', 4, 5540)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((484, 8, 484, 37), 'archinfo.arch.Register', 'Register', ({(484, 17, 484, 25): '"""spr16a"""', (484, 27, 484, 28): '(4)', (484, 30, 484, 36): '(5544)'}, {}), "('spr16a', 4, 5544)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((485, 8, 485, 37), 'archinfo.arch.Register', 'Register', ({(485, 17, 485, 25): '"""spr16b"""', (485, 27, 485, 28): '(4)', (485, 30, 485, 36): '(5548)'}, {}), "('spr16b', 4, 5548)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((486, 8, 486, 37), 'archinfo.arch.Register', 'Register', ({(486, 17, 486, 25): '"""spr16c"""', (486, 27, 486, 28): '(4)', (486, 30, 486, 36): '(5552)'}, {}), "('spr16c', 4, 5552)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((487, 8, 487, 37), 'archinfo.arch.Register', 'Register', ({(487, 17, 487, 25): '"""spr16d"""', (487, 27, 487, 28): '(4)', (487, 30, 487, 36): '(5556)'}, {}), "('spr16d', 4, 5556)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((488, 8, 488, 37), 'archinfo.arch.Register', 'Register', ({(488, 17, 488, 25): '"""spr16e"""', (488, 27, 488, 28): '(4)', (488, 30, 488, 36): '(5560)'}, {}), "('spr16e', 4, 5560)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((489, 8, 489, 37), 'archinfo.arch.Register', 'Register', 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((497, 8, 497, 37), 'archinfo.arch.Register', 'Register', ({(497, 17, 497, 25): '"""spr177"""', (497, 27, 497, 28): '(4)', (497, 30, 497, 36): '(5596)'}, {}), "('spr177', 4, 5596)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((498, 8, 498, 37), 'archinfo.arch.Register', 'Register', ({(498, 17, 498, 25): '"""spr178"""', (498, 27, 498, 28): '(4)', (498, 30, 498, 36): '(5600)'}, {}), "('spr178', 4, 5600)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((499, 8, 499, 37), 'archinfo.arch.Register', 'Register', ({(499, 17, 499, 25): '"""spr179"""', (499, 27, 499, 28): '(4)', (499, 30, 499, 36): '(5604)'}, {}), "('spr179', 4, 5604)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((500, 8, 500, 37), 'archinfo.arch.Register', 'Register', ({(500, 17, 500, 25): '"""spr17a"""', (500, 27, 500, 28): '(4)', (500, 30, 500, 36): '(5608)'}, {}), "('spr17a', 4, 5608)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((501, 8, 501, 37), 'archinfo.arch.Register', 'Register', ({(501, 17, 501, 25): '"""spr17b"""', (501, 27, 501, 28): '(4)', (501, 30, 501, 36): '(5612)'}, {}), "('spr17b', 4, 5612)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((502, 8, 502, 37), 'archinfo.arch.Register', 'Register', ({(502, 17, 502, 25): '"""spr17c"""', (502, 27, 502, 28): '(4)', (502, 30, 502, 36): '(5616)'}, {}), "('spr17c', 4, 5616)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((503, 8, 503, 37), 'archinfo.arch.Register', 'Register', ({(503, 17, 503, 25): '"""spr17d"""', (503, 27, 503, 28): '(4)', (503, 30, 503, 36): '(5620)'}, {}), "('spr17d', 4, 5620)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((504, 8, 504, 37), 'archinfo.arch.Register', 'Register', ({(504, 17, 504, 25): '"""spr17e"""', (504, 27, 504, 28): '(4)', (504, 30, 504, 36): '(5624)'}, {}), "('spr17e', 4, 5624)", False, 'from archinfo.arch import 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"('spr18a', 4, 5672)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((517, 8, 517, 37), 'archinfo.arch.Register', 'Register', ({(517, 17, 517, 25): '"""spr18b"""', (517, 27, 517, 28): '(4)', (517, 30, 517, 36): '(5676)'}, {}), "('spr18b', 4, 5676)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((518, 8, 518, 37), 'archinfo.arch.Register', 'Register', ({(518, 17, 518, 25): '"""spr18c"""', (518, 27, 518, 28): '(4)', (518, 30, 518, 36): '(5680)'}, {}), "('spr18c', 4, 5680)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((519, 8, 519, 37), 'archinfo.arch.Register', 'Register', ({(519, 17, 519, 25): '"""spr18d"""', (519, 27, 519, 28): '(4)', (519, 30, 519, 36): '(5684)'}, {}), "('spr18d', 4, 5684)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((520, 8, 520, 37), 'archinfo.arch.Register', 'Register', ({(520, 17, 520, 25): '"""spr18e"""', (520, 27, 520, 28): '(4)', (520, 30, 520, 36): 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(524, 30, 524, 36): '(5704)'}, {}), "('spr192', 4, 5704)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((525, 8, 525, 37), 'archinfo.arch.Register', 'Register', ({(525, 17, 525, 25): '"""spr193"""', (525, 27, 525, 28): '(4)', (525, 30, 525, 36): '(5708)'}, {}), "('spr193', 4, 5708)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((526, 8, 526, 37), 'archinfo.arch.Register', 'Register', ({(526, 17, 526, 25): '"""spr194"""', (526, 27, 526, 28): '(4)', (526, 30, 526, 36): '(5712)'}, {}), "('spr194', 4, 5712)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((527, 8, 527, 37), 'archinfo.arch.Register', 'Register', ({(527, 17, 527, 25): '"""spr195"""', (527, 27, 527, 28): '(4)', (527, 30, 527, 36): '(5716)'}, {}), "('spr195', 4, 5716)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((528, 8, 528, 37), 'archinfo.arch.Register', 'Register', ({(528, 17, 528, 25): '"""spr196"""', (528, 27, 528, 28): '(4)', (528, 30, 528, 36): '(5720)'}, {}), "('spr196', 4, 5720)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((529, 8, 529, 37), 'archinfo.arch.Register', 'Register', ({(529, 17, 529, 25): '"""spr197"""', (529, 27, 529, 28): '(4)', (529, 30, 529, 36): '(5724)'}, {}), "('spr197', 4, 5724)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((530, 8, 530, 37), 'archinfo.arch.Register', 'Register', ({(530, 17, 530, 25): '"""spr198"""', (530, 27, 530, 28): '(4)', (530, 30, 530, 36): '(5728)'}, {}), "('spr198', 4, 5728)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((531, 8, 531, 37), 'archinfo.arch.Register', 'Register', ({(531, 17, 531, 25): '"""spr199"""', (531, 27, 531, 28): '(4)', (531, 30, 531, 36): '(5732)'}, {}), "('spr199', 4, 5732)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((532, 8, 532, 37), 'archinfo.arch.Register', 'Register', ({(532, 17, 532, 25): '"""spr19a"""', (532, 27, 532, 28): '(4)', (532, 30, 532, 36): '(5736)'}, {}), "('spr19a', 4, 5736)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((533, 8, 533, 37), 'archinfo.arch.Register', 'Register', ({(533, 17, 533, 25): '"""spr19b"""', (533, 27, 533, 28): '(4)', (533, 30, 533, 36): '(5740)'}, {}), "('spr19b', 4, 5740)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((534, 8, 534, 37), 'archinfo.arch.Register', 'Register', ({(534, 17, 534, 25): '"""spr19c"""', (534, 27, 534, 28): '(4)', (534, 30, 534, 36): '(5744)'}, {}), "('spr19c', 4, 5744)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((535, 8, 535, 37), 'archinfo.arch.Register', 'Register', ({(535, 17, 535, 25): '"""spr19d"""', (535, 27, 535, 28): '(4)', (535, 30, 535, 36): '(5748)'}, {}), "('spr19d', 4, 5748)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((536, 8, 536, 37), 'archinfo.arch.Register', 'Register', ({(536, 17, 536, 25): '"""spr19e"""', (536, 27, 536, 28): '(4)', (536, 30, 536, 36): '(5752)'}, {}), "('spr19e', 4, 5752)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((537, 8, 537, 37), 'archinfo.arch.Register', 'Register', ({(537, 17, 537, 25): '"""spr19f"""', (537, 27, 537, 28): '(4)', (537, 30, 537, 36): '(5756)'}, {}), "('spr19f', 4, 5756)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((538, 8, 538, 37), 'archinfo.arch.Register', 'Register', ({(538, 17, 538, 25): '"""spr1a0"""', (538, 27, 538, 28): '(4)', (538, 30, 538, 36): '(5760)'}, {}), "('spr1a0', 4, 5760)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((539, 8, 539, 37), 'archinfo.arch.Register', 'Register', ({(539, 17, 539, 25): '"""spr1a1"""', (539, 27, 539, 28): '(4)', (539, 30, 539, 36): '(5764)'}, {}), "('spr1a1', 4, 5764)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((540, 8, 540, 37), 'archinfo.arch.Register', 'Register', ({(540, 17, 540, 25): '"""spr1a2"""', (540, 27, 540, 28): '(4)', (540, 30, 540, 36): '(5768)'}, {}), "('spr1a2', 4, 5768)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((541, 8, 541, 37), 'archinfo.arch.Register', 'Register', ({(541, 17, 541, 25): '"""spr1a3"""', (541, 27, 541, 28): '(4)', (541, 30, 541, 36): '(5772)'}, {}), "('spr1a3', 4, 5772)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((542, 8, 542, 37), 'archinfo.arch.Register', 'Register', ({(542, 17, 542, 25): '"""spr1a4"""', (542, 27, 542, 28): '(4)', (542, 30, 542, 36): '(5776)'}, {}), "('spr1a4', 4, 5776)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((543, 8, 543, 37), 'archinfo.arch.Register', 'Register', ({(543, 17, 543, 25): '"""spr1a5"""', (543, 27, 543, 28): '(4)', (543, 30, 543, 36): '(5780)'}, {}), "('spr1a5', 4, 5780)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((544, 8, 544, 37), 'archinfo.arch.Register', 'Register', ({(544, 17, 544, 25): '"""spr1a6"""', (544, 27, 544, 28): '(4)', (544, 30, 544, 36): '(5784)'}, {}), "('spr1a6', 4, 5784)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((545, 8, 545, 37), 'archinfo.arch.Register', 'Register', ({(545, 17, 545, 25): '"""spr1a7"""', (545, 27, 545, 28): '(4)', (545, 30, 545, 36): '(5788)'}, {}), "('spr1a7', 4, 5788)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((546, 8, 546, 37), 'archinfo.arch.Register', 'Register', ({(546, 17, 546, 25): '"""spr1a8"""', (546, 27, 546, 28): '(4)', (546, 30, 546, 36): '(5792)'}, {}), "('spr1a8', 4, 5792)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((547, 8, 547, 37), 'archinfo.arch.Register', 'Register', ({(547, 17, 547, 25): '"""spr1a9"""', (547, 27, 547, 28): '(4)', (547, 30, 547, 36): '(5796)'}, {}), "('spr1a9', 4, 5796)", False, 'from archinfo.arch import register_arch, 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"('spr1b9', 4, 5860)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((564, 8, 564, 37), 'archinfo.arch.Register', 'Register', ({(564, 17, 564, 25): '"""spr1ba"""', (564, 27, 564, 28): '(4)', (564, 30, 564, 36): '(5864)'}, {}), "('spr1ba', 4, 5864)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((565, 8, 565, 37), 'archinfo.arch.Register', 'Register', ({(565, 17, 565, 25): '"""spr1bb"""', (565, 27, 565, 28): '(4)', (565, 30, 565, 36): '(5868)'}, {}), "('spr1bb', 4, 5868)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((566, 8, 566, 37), 'archinfo.arch.Register', 'Register', ({(566, 17, 566, 25): '"""spr1bc"""', (566, 27, 566, 28): '(4)', (566, 30, 566, 36): '(5872)'}, {}), "('spr1bc', 4, 5872)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((567, 8, 567, 37), 'archinfo.arch.Register', 'Register', ({(567, 17, 567, 25): '"""spr1bd"""', (567, 27, 567, 28): '(4)', (567, 30, 567, 36): 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6032)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((607, 8, 607, 37), 'archinfo.arch.Register', 'Register', ({(607, 17, 607, 25): '"""spr1e5"""', (607, 27, 607, 28): '(4)', (607, 30, 607, 36): '(6036)'}, {}), "('spr1e5', 4, 6036)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((608, 8, 608, 37), 'archinfo.arch.Register', 'Register', ({(608, 17, 608, 25): '"""spr1e6"""', (608, 27, 608, 28): '(4)', (608, 30, 608, 36): '(6040)'}, {}), "('spr1e6', 4, 6040)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((609, 8, 609, 37), 'archinfo.arch.Register', 'Register', ({(609, 17, 609, 25): '"""spr1e7"""', (609, 27, 609, 28): '(4)', (609, 30, 609, 36): '(6044)'}, {}), "('spr1e7', 4, 6044)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((610, 8, 610, 37), 'archinfo.arch.Register', 'Register', ({(610, 17, 610, 25): '"""spr1e8"""', (610, 27, 610, 28): '(4)', (610, 30, 610, 36): '(6048)'}, {}), "('spr1e8', 4, 6048)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((611, 8, 611, 37), 'archinfo.arch.Register', 'Register', ({(611, 17, 611, 25): '"""spr1e9"""', (611, 27, 611, 28): '(4)', (611, 30, 611, 36): '(6052)'}, {}), "('spr1e9', 4, 6052)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((612, 8, 612, 37), 'archinfo.arch.Register', 'Register', ({(612, 17, 612, 25): '"""spr1ea"""', (612, 27, 612, 28): '(4)', (612, 30, 612, 36): '(6056)'}, {}), "('spr1ea', 4, 6056)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((613, 8, 613, 37), 'archinfo.arch.Register', 'Register', ({(613, 17, 613, 25): '"""spr1eb"""', (613, 27, 613, 28): '(4)', (613, 30, 613, 36): '(6060)'}, {}), "('spr1eb', 4, 6060)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((614, 8, 614, 37), 'archinfo.arch.Register', 'Register', ({(614, 17, 614, 25): '"""spr1ec"""', (614, 27, 614, 28): '(4)', (614, 30, 614, 36): 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622, 28): '(4)', (622, 30, 622, 36): '(6096)'}, {}), "('spr1f4', 4, 6096)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((623, 8, 623, 37), 'archinfo.arch.Register', 'Register', ({(623, 17, 623, 25): '"""spr1f5"""', (623, 27, 623, 28): '(4)', (623, 30, 623, 36): '(6100)'}, {}), "('spr1f5', 4, 6100)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((624, 8, 624, 37), 'archinfo.arch.Register', 'Register', ({(624, 17, 624, 25): '"""spr1f6"""', (624, 27, 624, 28): '(4)', (624, 30, 624, 36): '(6104)'}, {}), "('spr1f6', 4, 6104)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((625, 8, 625, 37), 'archinfo.arch.Register', 'Register', ({(625, 17, 625, 25): '"""spr1f7"""', (625, 27, 625, 28): '(4)', (625, 30, 625, 36): '(6108)'}, {}), "('spr1f7', 4, 6108)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((626, 8, 626, 37), 'archinfo.arch.Register', 'Register', ({(626, 17, 626, 25): '"""spr1f8"""', (626, 27, 626, 28): '(4)', (626, 30, 626, 36): '(6112)'}, {}), "('spr1f8', 4, 6112)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((627, 8, 627, 37), 'archinfo.arch.Register', 'Register', ({(627, 17, 627, 25): '"""spr1f9"""', (627, 27, 627, 28): '(4)', (627, 30, 627, 36): '(6116)'}, {}), "('spr1f9', 4, 6116)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((628, 8, 628, 37), 'archinfo.arch.Register', 'Register', ({(628, 17, 628, 25): '"""spr1fa"""', (628, 27, 628, 28): '(4)', (628, 30, 628, 36): '(6120)'}, {}), "('spr1fa', 4, 6120)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((629, 8, 629, 37), 'archinfo.arch.Register', 'Register', ({(629, 17, 629, 25): '"""spr1fb"""', (629, 27, 629, 28): '(4)', (629, 30, 629, 36): '(6124)'}, {}), "('spr1fb', 4, 6124)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((630, 8, 630, 37), 'archinfo.arch.Register', 'Register', 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((638, 8, 638, 37), 'archinfo.arch.Register', 'Register', ({(638, 17, 638, 25): '"""spr204"""', (638, 27, 638, 28): '(4)', (638, 30, 638, 36): '(6160)'}, {}), "('spr204', 4, 6160)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((639, 8, 639, 37), 'archinfo.arch.Register', 'Register', ({(639, 17, 639, 25): '"""spr205"""', (639, 27, 639, 28): '(4)', (639, 30, 639, 36): '(6164)'}, {}), "('spr205', 4, 6164)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((640, 8, 640, 37), 'archinfo.arch.Register', 'Register', ({(640, 17, 640, 25): '"""spr206"""', (640, 27, 640, 28): '(4)', (640, 30, 640, 36): '(6168)'}, {}), "('spr206', 4, 6168)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((641, 8, 641, 37), 'archinfo.arch.Register', 'Register', ({(641, 17, 641, 25): '"""spr207"""', (641, 27, 641, 28): '(4)', (641, 30, 641, 36): '(6172)'}, {}), "('spr207', 4, 6172)", False, 'from archinfo.arch import register_arch, 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(665, 30, 665, 36): '(6268)'}, {}), "('spr21f', 4, 6268)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((666, 8, 666, 37), 'archinfo.arch.Register', 'Register', ({(666, 17, 666, 25): '"""spr220"""', (666, 27, 666, 28): '(4)', (666, 30, 666, 36): '(6272)'}, {}), "('spr220', 4, 6272)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((667, 8, 667, 37), 'archinfo.arch.Register', 'Register', ({(667, 17, 667, 25): '"""spr221"""', (667, 27, 667, 28): '(4)', (667, 30, 667, 36): '(6276)'}, {}), "('spr221', 4, 6276)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((668, 8, 668, 37), 'archinfo.arch.Register', 'Register', ({(668, 17, 668, 25): '"""spr222"""', (668, 27, 668, 28): '(4)', (668, 30, 668, 36): '(6280)'}, {}), "('spr222', 4, 6280)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((669, 8, 669, 37), 'archinfo.arch.Register', 'Register', ({(669, 17, 669, 25): '"""spr223"""', (669, 27, 669, 28): '(4)', (669, 30, 669, 36): '(6284)'}, {}), "('spr223', 4, 6284)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((670, 8, 670, 37), 'archinfo.arch.Register', 'Register', ({(670, 17, 670, 25): '"""spr224"""', (670, 27, 670, 28): '(4)', (670, 30, 670, 36): '(6288)'}, {}), "('spr224', 4, 6288)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((671, 8, 671, 37), 'archinfo.arch.Register', 'Register', ({(671, 17, 671, 25): '"""spr225"""', (671, 27, 671, 28): '(4)', (671, 30, 671, 36): '(6292)'}, {}), "('spr225', 4, 6292)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((672, 8, 672, 37), 'archinfo.arch.Register', 'Register', ({(672, 17, 672, 25): '"""spr226"""', (672, 27, 672, 28): '(4)', (672, 30, 672, 36): '(6296)'}, {}), "('spr226', 4, 6296)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((673, 8, 673, 37), 'archinfo.arch.Register', 'Register', ({(673, 17, 673, 25): '"""spr227"""', (673, 27, 673, 28): '(4)', (673, 30, 673, 36): '(6300)'}, {}), "('spr227', 4, 6300)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((674, 8, 674, 37), 'archinfo.arch.Register', 'Register', ({(674, 17, 674, 25): '"""spr228"""', (674, 27, 674, 28): '(4)', (674, 30, 674, 36): '(6304)'}, {}), "('spr228', 4, 6304)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((675, 8, 675, 37), 'archinfo.arch.Register', 'Register', ({(675, 17, 675, 25): '"""spr229"""', (675, 27, 675, 28): '(4)', (675, 30, 675, 36): '(6308)'}, {}), "('spr229', 4, 6308)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((676, 8, 676, 37), 'archinfo.arch.Register', 'Register', ({(676, 17, 676, 25): '"""spr22a"""', (676, 27, 676, 28): '(4)', (676, 30, 676, 36): '(6312)'}, {}), "('spr22a', 4, 6312)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((677, 8, 677, 37), 'archinfo.arch.Register', 'Register', ({(677, 17, 677, 25): '"""spr22b"""', (677, 27, 677, 28): '(4)', (677, 30, 677, 36): '(6316)'}, {}), "('spr22b', 4, 6316)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((678, 8, 678, 37), 'archinfo.arch.Register', 'Register', ({(678, 17, 678, 25): '"""spr22c"""', (678, 27, 678, 28): '(4)', (678, 30, 678, 36): '(6320)'}, {}), "('spr22c', 4, 6320)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((679, 8, 679, 37), 'archinfo.arch.Register', 'Register', ({(679, 17, 679, 25): '"""spr22d"""', (679, 27, 679, 28): '(4)', (679, 30, 679, 36): '(6324)'}, {}), "('spr22d', 4, 6324)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((680, 8, 680, 37), 'archinfo.arch.Register', 'Register', ({(680, 17, 680, 25): '"""spr22e"""', (680, 27, 680, 28): '(4)', (680, 30, 680, 36): '(6328)'}, {}), "('spr22e', 4, 6328)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((681, 8, 681, 37), 'archinfo.arch.Register', 'Register', ({(681, 17, 681, 25): '"""spr22f"""', (681, 27, 681, 28): '(4)', (681, 30, 681, 36): '(6332)'}, {}), "('spr22f', 4, 6332)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((682, 8, 682, 37), 'archinfo.arch.Register', 'Register', ({(682, 17, 682, 25): '"""spr230"""', (682, 27, 682, 28): '(4)', (682, 30, 682, 36): '(6336)'}, {}), "('spr230', 4, 6336)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((683, 8, 683, 37), 'archinfo.arch.Register', 'Register', ({(683, 17, 683, 25): '"""spr231"""', (683, 27, 683, 28): '(4)', (683, 30, 683, 36): '(6340)'}, {}), "('spr231', 4, 6340)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((684, 8, 684, 37), 'archinfo.arch.Register', 'Register', ({(684, 17, 684, 25): '"""spr232"""', (684, 27, 684, 28): '(4)', (684, 30, 684, 36): '(6344)'}, {}), "('spr232', 4, 6344)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((685, 8, 685, 37), 'archinfo.arch.Register', 'Register', ({(685, 17, 685, 25): '"""spr233"""', (685, 27, 685, 28): '(4)', (685, 30, 685, 36): '(6348)'}, {}), "('spr233', 4, 6348)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((686, 8, 686, 37), 'archinfo.arch.Register', 'Register', ({(686, 17, 686, 25): '"""spr234"""', (686, 27, 686, 28): '(4)', (686, 30, 686, 36): '(6352)'}, {}), "('spr234', 4, 6352)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((687, 8, 687, 37), 'archinfo.arch.Register', 'Register', ({(687, 17, 687, 25): '"""spr235"""', (687, 27, 687, 28): '(4)', (687, 30, 687, 36): '(6356)'}, {}), "('spr235', 4, 6356)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((688, 8, 688, 37), 'archinfo.arch.Register', 'Register', ({(688, 17, 688, 25): '"""spr236"""', (688, 27, 688, 28): '(4)', (688, 30, 688, 36): '(6360)'}, {}), "('spr236', 4, 6360)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((689, 8, 689, 37), 'archinfo.arch.Register', 'Register', ({(689, 17, 689, 25): '"""spr237"""', (689, 27, 689, 28): '(4)', (689, 30, 689, 36): '(6364)'}, {}), "('spr237', 4, 6364)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((690, 8, 690, 37), 'archinfo.arch.Register', 'Register', ({(690, 17, 690, 25): '"""spr238"""', (690, 27, 690, 28): '(4)', (690, 30, 690, 36): '(6368)'}, {}), "('spr238', 4, 6368)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((691, 8, 691, 37), 'archinfo.arch.Register', 'Register', ({(691, 17, 691, 25): '"""spr239"""', (691, 27, 691, 28): '(4)', (691, 30, 691, 36): '(6372)'}, {}), "('spr239', 4, 6372)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((692, 8, 692, 37), 'archinfo.arch.Register', 'Register', ({(692, 17, 692, 25): '"""spr23a"""', (692, 27, 692, 28): '(4)', (692, 30, 692, 36): '(6376)'}, {}), "('spr23a', 4, 6376)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((693, 8, 693, 37), 'archinfo.arch.Register', 'Register', ({(693, 17, 693, 25): '"""spr23b"""', (693, 27, 693, 28): '(4)', (693, 30, 693, 36): '(6380)'}, {}), "('spr23b', 4, 6380)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((694, 8, 694, 37), 'archinfo.arch.Register', 'Register', ({(694, 17, 694, 25): '"""spr23c"""', (694, 27, 694, 28): '(4)', (694, 30, 694, 36): '(6384)'}, {}), "('spr23c', 4, 6384)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((695, 8, 695, 37), 'archinfo.arch.Register', 'Register', ({(695, 17, 695, 25): '"""spr23d"""', (695, 27, 695, 28): '(4)', (695, 30, 695, 36): '(6388)'}, {}), "('spr23d', 4, 6388)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((696, 8, 696, 37), 'archinfo.arch.Register', 'Register', ({(696, 17, 696, 25): '"""spr23e"""', (696, 27, 696, 28): '(4)', (696, 30, 696, 36): '(6392)'}, {}), "('spr23e', 4, 6392)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((697, 8, 697, 37), 'archinfo.arch.Register', 'Register', ({(697, 17, 697, 25): '"""spr23f"""', (697, 27, 697, 28): '(4)', (697, 30, 697, 36): '(6396)'}, {}), "('spr23f', 4, 6396)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((698, 8, 698, 37), 'archinfo.arch.Register', 'Register', ({(698, 17, 698, 25): '"""spr240"""', (698, 27, 698, 28): '(4)', (698, 30, 698, 36): '(6400)'}, {}), "('spr240', 4, 6400)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((699, 8, 699, 37), 'archinfo.arch.Register', 'Register', ({(699, 17, 699, 25): '"""spr241"""', (699, 27, 699, 28): '(4)', (699, 30, 699, 36): '(6404)'}, {}), "('spr241', 4, 6404)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((700, 8, 700, 37), 'archinfo.arch.Register', 'Register', ({(700, 17, 700, 25): '"""spr242"""', (700, 27, 700, 28): '(4)', (700, 30, 700, 36): '(6408)'}, {}), "('spr242', 4, 6408)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((701, 8, 701, 37), 'archinfo.arch.Register', 'Register', ({(701, 17, 701, 25): '"""spr243"""', (701, 27, 701, 28): '(4)', (701, 30, 701, 36): '(6412)'}, {}), "('spr243', 4, 6412)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((702, 8, 702, 37), 'archinfo.arch.Register', 'Register', ({(702, 17, 702, 25): '"""spr244"""', (702, 27, 702, 28): '(4)', (702, 30, 702, 36): '(6416)'}, {}), "('spr244', 4, 6416)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((703, 8, 703, 37), 'archinfo.arch.Register', 'Register', ({(703, 17, 703, 25): '"""spr245"""', (703, 27, 703, 28): '(4)', (703, 30, 703, 36): '(6420)'}, {}), "('spr245', 4, 6420)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((704, 8, 704, 37), 'archinfo.arch.Register', 'Register', ({(704, 17, 704, 25): '"""spr246"""', (704, 27, 704, 28): '(4)', (704, 30, 704, 36): '(6424)'}, {}), "('spr246', 4, 6424)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((705, 8, 705, 37), 'archinfo.arch.Register', 'Register', ({(705, 17, 705, 25): '"""spr247"""', (705, 27, 705, 28): '(4)', (705, 30, 705, 36): '(6428)'}, {}), "('spr247', 4, 6428)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((706, 8, 706, 37), 'archinfo.arch.Register', 'Register', ({(706, 17, 706, 25): '"""spr248"""', (706, 27, 706, 28): '(4)', (706, 30, 706, 36): '(6432)'}, {}), "('spr248', 4, 6432)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((707, 8, 707, 37), 'archinfo.arch.Register', 'Register', ({(707, 17, 707, 25): '"""spr249"""', (707, 27, 707, 28): '(4)', (707, 30, 707, 36): '(6436)'}, {}), "('spr249', 4, 6436)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((708, 8, 708, 37), 'archinfo.arch.Register', 'Register', ({(708, 17, 708, 25): '"""spr24a"""', (708, 27, 708, 28): '(4)', (708, 30, 708, 36): '(6440)'}, {}), "('spr24a', 4, 6440)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((709, 8, 709, 37), 'archinfo.arch.Register', 'Register', ({(709, 17, 709, 25): '"""spr24b"""', (709, 27, 709, 28): '(4)', (709, 30, 709, 36): '(6444)'}, {}), "('spr24b', 4, 6444)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((710, 8, 710, 37), 'archinfo.arch.Register', 'Register', ({(710, 17, 710, 25): '"""spr24c"""', (710, 27, 710, 28): '(4)', (710, 30, 710, 36): '(6448)'}, {}), "('spr24c', 4, 6448)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((711, 8, 711, 37), 'archinfo.arch.Register', 'Register', ({(711, 17, 711, 25): '"""spr24d"""', (711, 27, 711, 28): '(4)', (711, 30, 711, 36): '(6452)'}, {}), "('spr24d', 4, 6452)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((712, 8, 712, 37), 'archinfo.arch.Register', 'Register', ({(712, 17, 712, 25): '"""spr24e"""', (712, 27, 712, 28): '(4)', (712, 30, 712, 36): '(6456)'}, {}), "('spr24e', 4, 6456)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((713, 8, 713, 37), 'archinfo.arch.Register', 'Register', ({(713, 17, 713, 25): '"""spr24f"""', (713, 27, 713, 28): '(4)', (713, 30, 713, 36): '(6460)'}, {}), "('spr24f', 4, 6460)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((714, 8, 714, 37), 'archinfo.arch.Register', 'Register', ({(714, 17, 714, 25): '"""spr250"""', (714, 27, 714, 28): '(4)', (714, 30, 714, 36): '(6464)'}, {}), "('spr250', 4, 6464)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((715, 8, 715, 37), 'archinfo.arch.Register', 'Register', ({(715, 17, 715, 25): '"""spr251"""', (715, 27, 715, 28): '(4)', (715, 30, 715, 36): '(6468)'}, {}), "('spr251', 4, 6468)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((716, 8, 716, 37), 'archinfo.arch.Register', 'Register', ({(716, 17, 716, 25): '"""spr252"""', (716, 27, 716, 28): '(4)', (716, 30, 716, 36): '(6472)'}, {}), "('spr252', 4, 6472)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((717, 8, 717, 37), 'archinfo.arch.Register', 'Register', ({(717, 17, 717, 25): '"""spr253"""', (717, 27, 717, 28): '(4)', (717, 30, 717, 36): '(6476)'}, {}), "('spr253', 4, 6476)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((718, 8, 718, 37), 'archinfo.arch.Register', 'Register', ({(718, 17, 718, 25): '"""spr254"""', (718, 27, 718, 28): '(4)', (718, 30, 718, 36): '(6480)'}, {}), "('spr254', 4, 6480)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((719, 8, 719, 37), 'archinfo.arch.Register', 'Register', ({(719, 17, 719, 25): '"""spr255"""', (719, 27, 719, 28): '(4)', (719, 30, 719, 36): '(6484)'}, {}), "('spr255', 4, 6484)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((720, 8, 720, 37), 'archinfo.arch.Register', 'Register', ({(720, 17, 720, 25): '"""spr256"""', (720, 27, 720, 28): '(4)', (720, 30, 720, 36): '(6488)'}, {}), "('spr256', 4, 6488)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((721, 8, 721, 37), 'archinfo.arch.Register', 'Register', ({(721, 17, 721, 25): '"""spr257"""', (721, 27, 721, 28): '(4)', (721, 30, 721, 36): '(6492)'}, {}), "('spr257', 4, 6492)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((722, 8, 722, 37), 'archinfo.arch.Register', 'Register', ({(722, 17, 722, 25): '"""spr258"""', (722, 27, 722, 28): '(4)', (722, 30, 722, 36): '(6496)'}, {}), "('spr258', 4, 6496)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((723, 8, 723, 37), 'archinfo.arch.Register', 'Register', ({(723, 17, 723, 25): '"""spr259"""', (723, 27, 723, 28): '(4)', (723, 30, 723, 36): '(6500)'}, {}), "('spr259', 4, 6500)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((724, 8, 724, 37), 'archinfo.arch.Register', 'Register', ({(724, 17, 724, 25): '"""spr25a"""', (724, 27, 724, 28): '(4)', (724, 30, 724, 36): '(6504)'}, {}), "('spr25a', 4, 6504)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((725, 8, 725, 37), 'archinfo.arch.Register', 'Register', ({(725, 17, 725, 25): '"""spr25b"""', (725, 27, 725, 28): '(4)', (725, 30, 725, 36): '(6508)'}, {}), "('spr25b', 4, 6508)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((726, 8, 726, 37), 'archinfo.arch.Register', 'Register', ({(726, 17, 726, 25): '"""spr25c"""', (726, 27, 726, 28): '(4)', (726, 30, 726, 36): '(6512)'}, {}), "('spr25c', 4, 6512)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((727, 8, 727, 37), 'archinfo.arch.Register', 'Register', ({(727, 17, 727, 25): '"""spr25d"""', (727, 27, 727, 28): '(4)', (727, 30, 727, 36): '(6516)'}, {}), "('spr25d', 4, 6516)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((728, 8, 728, 37), 'archinfo.arch.Register', 'Register', ({(728, 17, 728, 25): '"""spr25e"""', (728, 27, 728, 28): '(4)', (728, 30, 728, 36): '(6520)'}, {}), "('spr25e', 4, 6520)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((729, 8, 729, 37), 'archinfo.arch.Register', 'Register', ({(729, 17, 729, 25): '"""spr25f"""', (729, 27, 729, 28): '(4)', (729, 30, 729, 36): '(6524)'}, {}), "('spr25f', 4, 6524)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((730, 8, 730, 37), 'archinfo.arch.Register', 'Register', ({(730, 17, 730, 25): '"""spr260"""', (730, 27, 730, 28): '(4)', (730, 30, 730, 36): '(6528)'}, {}), "('spr260', 4, 6528)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((731, 8, 731, 37), 'archinfo.arch.Register', 'Register', ({(731, 17, 731, 25): '"""spr261"""', (731, 27, 731, 28): '(4)', (731, 30, 731, 36): '(6532)'}, {}), "('spr261', 4, 6532)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((732, 8, 732, 37), 'archinfo.arch.Register', 'Register', ({(732, 17, 732, 25): '"""spr262"""', (732, 27, 732, 28): '(4)', (732, 30, 732, 36): '(6536)'}, {}), "('spr262', 4, 6536)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((733, 8, 733, 37), 'archinfo.arch.Register', 'Register', ({(733, 17, 733, 25): '"""spr263"""', (733, 27, 733, 28): '(4)', (733, 30, 733, 36): '(6540)'}, {}), "('spr263', 4, 6540)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((734, 8, 734, 37), 'archinfo.arch.Register', 'Register', ({(734, 17, 734, 25): '"""spr264"""', (734, 27, 734, 28): '(4)', (734, 30, 734, 36): '(6544)'}, {}), "('spr264', 4, 6544)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((735, 8, 735, 37), 'archinfo.arch.Register', 'Register', ({(735, 17, 735, 25): '"""spr265"""', (735, 27, 735, 28): '(4)', (735, 30, 735, 36): '(6548)'}, {}), "('spr265', 4, 6548)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((736, 8, 736, 37), 'archinfo.arch.Register', 'Register', ({(736, 17, 736, 25): '"""spr266"""', (736, 27, 736, 28): '(4)', (736, 30, 736, 36): '(6552)'}, {}), "('spr266', 4, 6552)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((737, 8, 737, 37), 'archinfo.arch.Register', 'Register', ({(737, 17, 737, 25): '"""spr267"""', (737, 27, 737, 28): '(4)', (737, 30, 737, 36): '(6556)'}, {}), "('spr267', 4, 6556)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((738, 8, 738, 37), 'archinfo.arch.Register', 'Register', ({(738, 17, 738, 25): '"""spr268"""', (738, 27, 738, 28): '(4)', (738, 30, 738, 36): '(6560)'}, {}), "('spr268', 4, 6560)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((739, 8, 739, 37), 'archinfo.arch.Register', 'Register', ({(739, 17, 739, 25): '"""spr269"""', (739, 27, 739, 28): '(4)', (739, 30, 739, 36): '(6564)'}, {}), "('spr269', 4, 6564)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((740, 8, 740, 37), 'archinfo.arch.Register', 'Register', ({(740, 17, 740, 25): '"""spr26a"""', (740, 27, 740, 28): '(4)', (740, 30, 740, 36): '(6568)'}, {}), "('spr26a', 4, 6568)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((741, 8, 741, 37), 'archinfo.arch.Register', 'Register', ({(741, 17, 741, 25): '"""spr26b"""', (741, 27, 741, 28): '(4)', (741, 30, 741, 36): '(6572)'}, {}), "('spr26b', 4, 6572)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((742, 8, 742, 37), 'archinfo.arch.Register', 'Register', ({(742, 17, 742, 25): '"""spr26c"""', (742, 27, 742, 28): '(4)', (742, 30, 742, 36): '(6576)'}, {}), "('spr26c', 4, 6576)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((743, 8, 743, 37), 'archinfo.arch.Register', 'Register', ({(743, 17, 743, 25): '"""spr26d"""', (743, 27, 743, 28): '(4)', (743, 30, 743, 36): '(6580)'}, {}), "('spr26d', 4, 6580)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((744, 8, 744, 37), 'archinfo.arch.Register', 'Register', ({(744, 17, 744, 25): '"""spr26e"""', (744, 27, 744, 28): '(4)', (744, 30, 744, 36): '(6584)'}, {}), "('spr26e', 4, 6584)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((745, 8, 745, 37), 'archinfo.arch.Register', 'Register', ({(745, 17, 745, 25): '"""spr26f"""', (745, 27, 745, 28): '(4)', (745, 30, 745, 36): '(6588)'}, {}), "('spr26f', 4, 6588)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((746, 8, 746, 37), 'archinfo.arch.Register', 'Register', ({(746, 17, 746, 25): '"""spr270"""', (746, 27, 746, 28): '(4)', (746, 30, 746, 36): '(6592)'}, {}), "('spr270', 4, 6592)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((747, 8, 747, 37), 'archinfo.arch.Register', 'Register', ({(747, 17, 747, 25): '"""spr271"""', (747, 27, 747, 28): '(4)', (747, 30, 747, 36): '(6596)'}, {}), "('spr271', 4, 6596)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((748, 8, 748, 37), 'archinfo.arch.Register', 'Register', ({(748, 17, 748, 25): '"""spr272"""', (748, 27, 748, 28): '(4)', (748, 30, 748, 36): '(6600)'}, {}), "('spr272', 4, 6600)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((749, 8, 749, 37), 'archinfo.arch.Register', 'Register', ({(749, 17, 749, 25): '"""spr273"""', (749, 27, 749, 28): '(4)', (749, 30, 749, 36): '(6604)'}, {}), "('spr273', 4, 6604)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((750, 8, 750, 37), 'archinfo.arch.Register', 'Register', ({(750, 17, 750, 25): '"""spr274"""', (750, 27, 750, 28): '(4)', (750, 30, 750, 36): '(6608)'}, {}), "('spr274', 4, 6608)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((751, 8, 751, 37), 'archinfo.arch.Register', 'Register', ({(751, 17, 751, 25): '"""spr275"""', (751, 27, 751, 28): '(4)', (751, 30, 751, 36): '(6612)'}, {}), "('spr275', 4, 6612)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((752, 8, 752, 37), 'archinfo.arch.Register', 'Register', ({(752, 17, 752, 25): '"""spr276"""', (752, 27, 752, 28): '(4)', (752, 30, 752, 36): '(6616)'}, {}), "('spr276', 4, 6616)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((753, 8, 753, 37), 'archinfo.arch.Register', 'Register', ({(753, 17, 753, 25): '"""spr277"""', (753, 27, 753, 28): '(4)', (753, 30, 753, 36): '(6620)'}, {}), "('spr277', 4, 6620)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((754, 8, 754, 37), 'archinfo.arch.Register', 'Register', ({(754, 17, 754, 25): '"""spr278"""', (754, 27, 754, 28): '(4)', (754, 30, 754, 36): '(6624)'}, {}), "('spr278', 4, 6624)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((755, 8, 755, 37), 'archinfo.arch.Register', 'Register', ({(755, 17, 755, 25): '"""spr279"""', (755, 27, 755, 28): '(4)', (755, 30, 755, 36): '(6628)'}, {}), "('spr279', 4, 6628)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((756, 8, 756, 37), 'archinfo.arch.Register', 'Register', ({(756, 17, 756, 25): '"""spr27a"""', (756, 27, 756, 28): '(4)', (756, 30, 756, 36): '(6632)'}, {}), "('spr27a', 4, 6632)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((757, 8, 757, 37), 'archinfo.arch.Register', 'Register', ({(757, 17, 757, 25): '"""spr27b"""', (757, 27, 757, 28): '(4)', (757, 30, 757, 36): '(6636)'}, {}), "('spr27b', 4, 6636)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((758, 8, 758, 37), 'archinfo.arch.Register', 'Register', ({(758, 17, 758, 25): '"""spr27c"""', (758, 27, 758, 28): '(4)', (758, 30, 758, 36): '(6640)'}, {}), "('spr27c', 4, 6640)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((759, 8, 759, 37), 'archinfo.arch.Register', 'Register', ({(759, 17, 759, 25): '"""spr27d"""', (759, 27, 759, 28): '(4)', (759, 30, 759, 36): '(6644)'}, {}), "('spr27d', 4, 6644)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((760, 8, 760, 37), 'archinfo.arch.Register', 'Register', ({(760, 17, 760, 25): '"""spr27e"""', (760, 27, 760, 28): '(4)', (760, 30, 760, 36): '(6648)'}, {}), "('spr27e', 4, 6648)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((761, 8, 761, 37), 'archinfo.arch.Register', 'Register', ({(761, 17, 761, 25): '"""spr27f"""', (761, 27, 761, 28): '(4)', (761, 30, 761, 36): '(6652)'}, {}), "('spr27f', 4, 6652)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((762, 8, 762, 37), 'archinfo.arch.Register', 'Register', ({(762, 17, 762, 25): '"""spr280"""', (762, 27, 762, 28): '(4)', (762, 30, 762, 36): '(6656)'}, {}), "('spr280', 4, 6656)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((763, 8, 763, 37), 'archinfo.arch.Register', 'Register', ({(763, 17, 763, 25): '"""spr281"""', (763, 27, 763, 28): '(4)', (763, 30, 763, 36): '(6660)'}, {}), "('spr281', 4, 6660)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((764, 8, 764, 37), 'archinfo.arch.Register', 'Register', ({(764, 17, 764, 25): '"""spr282"""', (764, 27, 764, 28): '(4)', (764, 30, 764, 36): '(6664)'}, {}), "('spr282', 4, 6664)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((765, 8, 765, 37), 'archinfo.arch.Register', 'Register', ({(765, 17, 765, 25): '"""spr283"""', (765, 27, 765, 28): '(4)', (765, 30, 765, 36): '(6668)'}, {}), "('spr283', 4, 6668)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((766, 8, 766, 37), 'archinfo.arch.Register', 'Register', ({(766, 17, 766, 25): '"""spr284"""', (766, 27, 766, 28): '(4)', (766, 30, 766, 36): '(6672)'}, {}), "('spr284', 4, 6672)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((767, 8, 767, 37), 'archinfo.arch.Register', 'Register', ({(767, 17, 767, 25): '"""spr285"""', (767, 27, 767, 28): '(4)', (767, 30, 767, 36): '(6676)'}, {}), "('spr285', 4, 6676)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((768, 8, 768, 37), 'archinfo.arch.Register', 'Register', ({(768, 17, 768, 25): '"""spr286"""', (768, 27, 768, 28): '(4)', (768, 30, 768, 36): '(6680)'}, {}), "('spr286', 4, 6680)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((769, 8, 769, 37), 'archinfo.arch.Register', 'Register', ({(769, 17, 769, 25): '"""spr287"""', (769, 27, 769, 28): '(4)', (769, 30, 769, 36): '(6684)'}, {}), "('spr287', 4, 6684)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((770, 8, 770, 37), 'archinfo.arch.Register', 'Register', ({(770, 17, 770, 25): '"""spr288"""', (770, 27, 770, 28): '(4)', (770, 30, 770, 36): '(6688)'}, {}), "('spr288', 4, 6688)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((771, 8, 771, 37), 'archinfo.arch.Register', 'Register', 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'archinfo.arch.Register', 'Register', ({(775, 17, 775, 25): '"""spr28d"""', (775, 27, 775, 28): '(4)', (775, 30, 775, 36): '(6708)'}, {}), "('spr28d', 4, 6708)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((776, 8, 776, 37), 'archinfo.arch.Register', 'Register', ({(776, 17, 776, 25): '"""spr28e"""', (776, 27, 776, 28): '(4)', (776, 30, 776, 36): '(6712)'}, {}), "('spr28e', 4, 6712)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((777, 8, 777, 37), 'archinfo.arch.Register', 'Register', ({(777, 17, 777, 25): '"""spr28f"""', (777, 27, 777, 28): '(4)', (777, 30, 777, 36): '(6716)'}, {}), "('spr28f', 4, 6716)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((778, 8, 778, 37), 'archinfo.arch.Register', 'Register', ({(778, 17, 778, 25): '"""spr290"""', (778, 27, 778, 28): '(4)', (778, 30, 778, 36): '(6720)'}, {}), "('spr290', 4, 6720)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((779, 8, 779, 37), 'archinfo.arch.Register', 'Register', ({(779, 17, 779, 25): '"""spr291"""', (779, 27, 779, 28): '(4)', (779, 30, 779, 36): '(6724)'}, {}), "('spr291', 4, 6724)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((780, 8, 780, 37), 'archinfo.arch.Register', 'Register', ({(780, 17, 780, 25): '"""spr292"""', (780, 27, 780, 28): '(4)', (780, 30, 780, 36): '(6728)'}, {}), "('spr292', 4, 6728)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((781, 8, 781, 37), 'archinfo.arch.Register', 'Register', ({(781, 17, 781, 25): '"""spr293"""', (781, 27, 781, 28): '(4)', (781, 30, 781, 36): '(6732)'}, {}), "('spr293', 4, 6732)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((782, 8, 782, 37), 'archinfo.arch.Register', 'Register', ({(782, 17, 782, 25): '"""spr294"""', (782, 27, 782, 28): '(4)', (782, 30, 782, 36): '(6736)'}, {}), "('spr294', 4, 6736)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((783, 8, 783, 37), 'archinfo.arch.Register', 'Register', ({(783, 17, 783, 25): '"""spr295"""', (783, 27, 783, 28): '(4)', (783, 30, 783, 36): '(6740)'}, {}), "('spr295', 4, 6740)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((784, 8, 784, 37), 'archinfo.arch.Register', 'Register', ({(784, 17, 784, 25): '"""spr296"""', (784, 27, 784, 28): '(4)', (784, 30, 784, 36): '(6744)'}, {}), "('spr296', 4, 6744)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((785, 8, 785, 37), 'archinfo.arch.Register', 'Register', ({(785, 17, 785, 25): '"""spr297"""', (785, 27, 785, 28): '(4)', (785, 30, 785, 36): '(6748)'}, {}), "('spr297', 4, 6748)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((786, 8, 786, 37), 'archinfo.arch.Register', 'Register', ({(786, 17, 786, 25): '"""spr298"""', (786, 27, 786, 28): '(4)', (786, 30, 786, 36): '(6752)'}, {}), "('spr298', 4, 6752)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((787, 8, 787, 37), 'archinfo.arch.Register', 'Register', ({(787, 17, 787, 25): '"""spr299"""', (787, 27, 787, 28): '(4)', (787, 30, 787, 36): '(6756)'}, {}), "('spr299', 4, 6756)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((788, 8, 788, 37), 'archinfo.arch.Register', 'Register', ({(788, 17, 788, 25): '"""spr29a"""', (788, 27, 788, 28): '(4)', (788, 30, 788, 36): '(6760)'}, {}), "('spr29a', 4, 6760)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((789, 8, 789, 37), 'archinfo.arch.Register', 'Register', ({(789, 17, 789, 25): '"""spr29b"""', (789, 27, 789, 28): '(4)', (789, 30, 789, 36): '(6764)'}, {}), "('spr29b', 4, 6764)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((790, 8, 790, 37), 'archinfo.arch.Register', 'Register', ({(790, 17, 790, 25): '"""spr29c"""', (790, 27, 790, 28): '(4)', (790, 30, 790, 36): '(6768)'}, {}), "('spr29c', 4, 6768)", False, 'from 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"('spr2a4', 4, 6800)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((799, 8, 799, 37), 'archinfo.arch.Register', 'Register', ({(799, 17, 799, 25): '"""spr2a5"""', (799, 27, 799, 28): '(4)', (799, 30, 799, 36): '(6804)'}, {}), "('spr2a5', 4, 6804)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((800, 8, 800, 37), 'archinfo.arch.Register', 'Register', ({(800, 17, 800, 25): '"""spr2a6"""', (800, 27, 800, 28): '(4)', (800, 30, 800, 36): '(6808)'}, {}), "('spr2a6', 4, 6808)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((801, 8, 801, 37), 'archinfo.arch.Register', 'Register', ({(801, 17, 801, 25): '"""spr2a7"""', (801, 27, 801, 28): '(4)', (801, 30, 801, 36): '(6812)'}, {}), "('spr2a7', 4, 6812)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((802, 8, 802, 37), 'archinfo.arch.Register', 'Register', ({(802, 17, 802, 25): '"""spr2a8"""', (802, 27, 802, 28): '(4)', (802, 30, 802, 36): '(6816)'}, {}), "('spr2a8', 4, 6816)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((803, 8, 803, 37), 'archinfo.arch.Register', 'Register', ({(803, 17, 803, 25): '"""spr2a9"""', (803, 27, 803, 28): '(4)', (803, 30, 803, 36): '(6820)'}, {}), "('spr2a9', 4, 6820)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((804, 8, 804, 37), 'archinfo.arch.Register', 'Register', ({(804, 17, 804, 25): '"""spr2aa"""', (804, 27, 804, 28): '(4)', (804, 30, 804, 36): '(6824)'}, {}), "('spr2aa', 4, 6824)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((805, 8, 805, 37), 'archinfo.arch.Register', 'Register', ({(805, 17, 805, 25): '"""spr2ab"""', (805, 27, 805, 28): '(4)', (805, 30, 805, 36): '(6828)'}, {}), "('spr2ab', 4, 6828)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((806, 8, 806, 37), 'archinfo.arch.Register', 'Register', ({(806, 17, 806, 25): '"""spr2ac"""', (806, 27, 806, 28): '(4)', (806, 30, 806, 36): '(6832)'}, {}), "('spr2ac', 4, 6832)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((807, 8, 807, 37), 'archinfo.arch.Register', 'Register', ({(807, 17, 807, 25): '"""spr2ad"""', (807, 27, 807, 28): '(4)', (807, 30, 807, 36): '(6836)'}, {}), "('spr2ad', 4, 6836)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((808, 8, 808, 37), 'archinfo.arch.Register', 'Register', ({(808, 17, 808, 25): '"""spr2ae"""', (808, 27, 808, 28): '(4)', (808, 30, 808, 36): '(6840)'}, {}), "('spr2ae', 4, 6840)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((809, 8, 809, 37), 'archinfo.arch.Register', 'Register', ({(809, 17, 809, 25): '"""spr2af"""', (809, 27, 809, 28): '(4)', (809, 30, 809, 36): '(6844)'}, {}), "('spr2af', 4, 6844)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((810, 8, 810, 37), 'archinfo.arch.Register', 'Register', ({(810, 17, 810, 25): '"""spr2b0"""', (810, 27, 810, 28): '(4)', (810, 30, 810, 36): '(6848)'}, {}), "('spr2b0', 4, 6848)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((811, 8, 811, 37), 'archinfo.arch.Register', 'Register', ({(811, 17, 811, 25): '"""spr2b1"""', (811, 27, 811, 28): '(4)', (811, 30, 811, 36): '(6852)'}, {}), "('spr2b1', 4, 6852)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((812, 8, 812, 37), 'archinfo.arch.Register', 'Register', ({(812, 17, 812, 25): '"""spr2b2"""', (812, 27, 812, 28): '(4)', (812, 30, 812, 36): '(6856)'}, {}), "('spr2b2', 4, 6856)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((813, 8, 813, 37), 'archinfo.arch.Register', 'Register', ({(813, 17, 813, 25): '"""spr2b3"""', (813, 27, 813, 28): '(4)', (813, 30, 813, 36): '(6860)'}, {}), "('spr2b3', 4, 6860)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((814, 8, 814, 37), 'archinfo.arch.Register', 'Register', ({(814, 17, 814, 25): '"""spr2b4"""', (814, 27, 814, 28): '(4)', (814, 30, 814, 36): '(6864)'}, {}), "('spr2b4', 4, 6864)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((815, 8, 815, 37), 'archinfo.arch.Register', 'Register', ({(815, 17, 815, 25): '"""spr2b5"""', (815, 27, 815, 28): '(4)', (815, 30, 815, 36): '(6868)'}, {}), "('spr2b5', 4, 6868)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((816, 8, 816, 37), 'archinfo.arch.Register', 'Register', ({(816, 17, 816, 25): '"""spr2b6"""', (816, 27, 816, 28): '(4)', (816, 30, 816, 36): '(6872)'}, {}), "('spr2b6', 4, 6872)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((817, 8, 817, 37), 'archinfo.arch.Register', 'Register', ({(817, 17, 817, 25): '"""spr2b7"""', (817, 27, 817, 28): '(4)', (817, 30, 817, 36): '(6876)'}, {}), "('spr2b7', 4, 6876)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((818, 8, 818, 37), 'archinfo.arch.Register', 'Register', ({(818, 17, 818, 25): '"""spr2b8"""', (818, 27, 818, 28): '(4)', (818, 30, 818, 36): '(6880)'}, {}), "('spr2b8', 4, 6880)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((819, 8, 819, 37), 'archinfo.arch.Register', 'Register', ({(819, 17, 819, 25): '"""spr2b9"""', (819, 27, 819, 28): '(4)', (819, 30, 819, 36): '(6884)'}, {}), "('spr2b9', 4, 6884)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((820, 8, 820, 37), 'archinfo.arch.Register', 'Register', ({(820, 17, 820, 25): '"""spr2ba"""', (820, 27, 820, 28): '(4)', (820, 30, 820, 36): '(6888)'}, {}), "('spr2ba', 4, 6888)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((821, 8, 821, 37), 'archinfo.arch.Register', 'Register', ({(821, 17, 821, 25): '"""spr2bb"""', (821, 27, 821, 28): '(4)', (821, 30, 821, 36): '(6892)'}, {}), "('spr2bb', 4, 6892)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((822, 8, 822, 37), 'archinfo.arch.Register', 'Register', ({(822, 17, 822, 25): '"""spr2bc"""', (822, 27, 822, 28): '(4)', (822, 30, 822, 36): '(6896)'}, {}), "('spr2bc', 4, 6896)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((823, 8, 823, 37), 'archinfo.arch.Register', 'Register', ({(823, 17, 823, 25): '"""spr2bd"""', (823, 27, 823, 28): '(4)', (823, 30, 823, 36): '(6900)'}, {}), "('spr2bd', 4, 6900)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((824, 8, 824, 37), 'archinfo.arch.Register', 'Register', ({(824, 17, 824, 25): '"""spr2be"""', (824, 27, 824, 28): '(4)', (824, 30, 824, 36): '(6904)'}, {}), "('spr2be', 4, 6904)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((825, 8, 825, 37), 'archinfo.arch.Register', 'Register', ({(825, 17, 825, 25): '"""spr2bf"""', (825, 27, 825, 28): '(4)', (825, 30, 825, 36): '(6908)'}, {}), "('spr2bf', 4, 6908)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((826, 8, 826, 37), 'archinfo.arch.Register', 'Register', ({(826, 17, 826, 25): '"""spr2c0"""', (826, 27, 826, 28): '(4)', (826, 30, 826, 36): '(6912)'}, {}), "('spr2c0', 4, 6912)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((827, 8, 827, 37), 'archinfo.arch.Register', 'Register', ({(827, 17, 827, 25): '"""spr2c1"""', (827, 27, 827, 28): '(4)', (827, 30, 827, 36): '(6916)'}, {}), "('spr2c1', 4, 6916)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((828, 8, 828, 37), 'archinfo.arch.Register', 'Register', ({(828, 17, 828, 25): '"""spr2c2"""', (828, 27, 828, 28): '(4)', (828, 30, 828, 36): '(6920)'}, {}), "('spr2c2', 4, 6920)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((829, 8, 829, 37), 'archinfo.arch.Register', 'Register', ({(829, 17, 829, 25): '"""spr2c3"""', (829, 27, 829, 28): '(4)', (829, 30, 829, 36): '(6924)'}, {}), "('spr2c3', 4, 6924)", False, 'from archinfo.arch import register_arch, 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'(7004)'}, {}), "('spr2d7', 4, 7004)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((850, 8, 850, 37), 'archinfo.arch.Register', 'Register', ({(850, 17, 850, 25): '"""spr2d8"""', (850, 27, 850, 28): '(4)', (850, 30, 850, 36): '(7008)'}, {}), "('spr2d8', 4, 7008)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((851, 8, 851, 37), 'archinfo.arch.Register', 'Register', ({(851, 17, 851, 25): '"""spr2d9"""', (851, 27, 851, 28): '(4)', (851, 30, 851, 36): '(7012)'}, {}), "('spr2d9', 4, 7012)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((852, 8, 852, 37), 'archinfo.arch.Register', 'Register', ({(852, 17, 852, 25): '"""spr2da"""', (852, 27, 852, 28): '(4)', (852, 30, 852, 36): '(7016)'}, {}), "('spr2da', 4, 7016)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((853, 8, 853, 37), 'archinfo.arch.Register', 'Register', ({(853, 17, 853, 25): '"""spr2db"""', (853, 27, 853, 28): '(4)', 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(900, 30, 900, 36): '(7208)'}, {}), "('spr30a', 4, 7208)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((901, 8, 901, 37), 'archinfo.arch.Register', 'Register', ({(901, 17, 901, 25): '"""spr30b"""', (901, 27, 901, 28): '(4)', (901, 30, 901, 36): '(7212)'}, {}), "('spr30b', 4, 7212)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((902, 8, 902, 37), 'archinfo.arch.Register', 'Register', ({(902, 17, 902, 25): '"""spr30c"""', (902, 27, 902, 28): '(4)', (902, 30, 902, 36): '(7216)'}, {}), "('spr30c', 4, 7216)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((903, 8, 903, 37), 'archinfo.arch.Register', 'Register', ({(903, 17, 903, 25): '"""spr30d"""', (903, 27, 903, 28): '(4)', (903, 30, 903, 36): '(7220)'}, {}), "('spr30d', 4, 7220)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((904, 8, 904, 37), 'archinfo.arch.Register', 'Register', ({(904, 17, 904, 25): '"""spr30e"""', (904, 27, 904, 28): '(4)', (904, 30, 904, 36): '(7224)'}, {}), "('spr30e', 4, 7224)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((905, 8, 905, 37), 'archinfo.arch.Register', 'Register', ({(905, 17, 905, 25): '"""spr30f"""', (905, 27, 905, 28): '(4)', (905, 30, 905, 36): '(7228)'}, {}), "('spr30f', 4, 7228)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((906, 8, 906, 37), 'archinfo.arch.Register', 'Register', ({(906, 17, 906, 25): '"""spr310"""', (906, 27, 906, 28): '(4)', (906, 30, 906, 36): '(7232)'}, {}), "('spr310', 4, 7232)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((907, 8, 907, 37), 'archinfo.arch.Register', 'Register', ({(907, 17, 907, 25): '"""spr311"""', (907, 27, 907, 28): '(4)', (907, 30, 907, 36): '(7236)'}, {}), "('spr311', 4, 7236)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((908, 8, 908, 37), 'archinfo.arch.Register', 'Register', ({(908, 17, 908, 25): '"""spr312"""', (908, 27, 908, 28): '(4)', (908, 30, 908, 36): '(7240)'}, {}), "('spr312', 4, 7240)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((909, 8, 909, 37), 'archinfo.arch.Register', 'Register', ({(909, 17, 909, 25): '"""spr313"""', (909, 27, 909, 28): '(4)', (909, 30, 909, 36): '(7244)'}, {}), "('spr313', 4, 7244)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((910, 8, 910, 37), 'archinfo.arch.Register', 'Register', ({(910, 17, 910, 25): '"""spr314"""', (910, 27, 910, 28): '(4)', (910, 30, 910, 36): '(7248)'}, {}), "('spr314', 4, 7248)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((911, 8, 911, 37), 'archinfo.arch.Register', 'Register', ({(911, 17, 911, 25): '"""spr315"""', (911, 27, 911, 28): '(4)', (911, 30, 911, 36): '(7252)'}, {}), "('spr315', 4, 7252)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((912, 8, 912, 37), 'archinfo.arch.Register', 'Register', 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Endness, Register\n'), ((924, 8, 924, 37), 'archinfo.arch.Register', 'Register', ({(924, 17, 924, 25): '"""spr322"""', (924, 27, 924, 28): '(4)', (924, 30, 924, 36): '(7304)'}, {}), "('spr322', 4, 7304)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((925, 8, 925, 37), 'archinfo.arch.Register', 'Register', ({(925, 17, 925, 25): '"""spr323"""', (925, 27, 925, 28): '(4)', (925, 30, 925, 36): '(7308)'}, {}), "('spr323', 4, 7308)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((926, 8, 926, 37), 'archinfo.arch.Register', 'Register', ({(926, 17, 926, 25): '"""spr324"""', (926, 27, 926, 28): '(4)', (926, 30, 926, 36): '(7312)'}, {}), "('spr324', 4, 7312)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((927, 8, 927, 37), 'archinfo.arch.Register', 'Register', ({(927, 17, 927, 25): '"""spr325"""', (927, 27, 927, 28): '(4)', (927, 30, 927, 36): '(7316)'}, {}), "('spr325', 4, 7316)", False, 'from archinfo.arch import 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"('spr331', 4, 7364)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((940, 8, 940, 37), 'archinfo.arch.Register', 'Register', ({(940, 17, 940, 25): '"""spr332"""', (940, 27, 940, 28): '(4)', (940, 30, 940, 36): '(7368)'}, {}), "('spr332', 4, 7368)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((941, 8, 941, 37), 'archinfo.arch.Register', 'Register', ({(941, 17, 941, 25): '"""spr333"""', (941, 27, 941, 28): '(4)', (941, 30, 941, 36): '(7372)'}, {}), "('spr333', 4, 7372)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((942, 8, 942, 37), 'archinfo.arch.Register', 'Register', ({(942, 17, 942, 25): '"""spr334"""', (942, 27, 942, 28): '(4)', (942, 30, 942, 36): '(7376)'}, {}), "('spr334', 4, 7376)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((943, 8, 943, 37), 'archinfo.arch.Register', 'Register', ({(943, 17, 943, 25): '"""spr335"""', (943, 27, 943, 28): '(4)', (943, 30, 943, 36): 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(947, 30, 947, 36): '(7396)'}, {}), "('spr339', 4, 7396)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((948, 8, 948, 37), 'archinfo.arch.Register', 'Register', ({(948, 17, 948, 25): '"""spr33a"""', (948, 27, 948, 28): '(4)', (948, 30, 948, 36): '(7400)'}, {}), "('spr33a', 4, 7400)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((949, 8, 949, 37), 'archinfo.arch.Register', 'Register', ({(949, 17, 949, 25): '"""spr33b"""', (949, 27, 949, 28): '(4)', (949, 30, 949, 36): '(7404)'}, {}), "('spr33b', 4, 7404)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((950, 8, 950, 37), 'archinfo.arch.Register', 'Register', ({(950, 17, 950, 25): '"""spr33c"""', (950, 27, 950, 28): '(4)', (950, 30, 950, 36): '(7408)'}, {}), "('spr33c', 4, 7408)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((951, 8, 951, 37), 'archinfo.arch.Register', 'Register', ({(951, 17, 951, 25): '"""spr33d"""', (951, 27, 951, 28): '(4)', (951, 30, 951, 36): '(7412)'}, {}), "('spr33d', 4, 7412)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((952, 8, 952, 37), 'archinfo.arch.Register', 'Register', ({(952, 17, 952, 25): '"""spr33e"""', (952, 27, 952, 28): '(4)', (952, 30, 952, 36): '(7416)'}, {}), "('spr33e', 4, 7416)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((953, 8, 953, 37), 'archinfo.arch.Register', 'Register', ({(953, 17, 953, 25): '"""spr33f"""', (953, 27, 953, 28): '(4)', (953, 30, 953, 36): '(7420)'}, {}), "('spr33f', 4, 7420)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((954, 8, 954, 37), 'archinfo.arch.Register', 'Register', ({(954, 17, 954, 25): '"""spr340"""', (954, 27, 954, 28): '(4)', (954, 30, 954, 36): '(7424)'}, {}), "('spr340', 4, 7424)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((955, 8, 955, 37), 'archinfo.arch.Register', 'Register', ({(955, 17, 955, 25): '"""spr341"""', (955, 27, 955, 28): '(4)', (955, 30, 955, 36): '(7428)'}, {}), "('spr341', 4, 7428)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((956, 8, 956, 37), 'archinfo.arch.Register', 'Register', ({(956, 17, 956, 25): '"""spr342"""', (956, 27, 956, 28): '(4)', (956, 30, 956, 36): '(7432)'}, {}), "('spr342', 4, 7432)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((957, 8, 957, 37), 'archinfo.arch.Register', 'Register', ({(957, 17, 957, 25): '"""spr343"""', (957, 27, 957, 28): '(4)', (957, 30, 957, 36): '(7436)'}, {}), "('spr343', 4, 7436)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((958, 8, 958, 37), 'archinfo.arch.Register', 'Register', ({(958, 17, 958, 25): '"""spr344"""', (958, 27, 958, 28): '(4)', (958, 30, 958, 36): '(7440)'}, {}), "('spr344', 4, 7440)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((959, 8, 959, 37), 'archinfo.arch.Register', 'Register', ({(959, 17, 959, 25): '"""spr345"""', (959, 27, 959, 28): '(4)', (959, 30, 959, 36): '(7444)'}, {}), "('spr345', 4, 7444)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((960, 8, 960, 37), 'archinfo.arch.Register', 'Register', ({(960, 17, 960, 25): '"""spr346"""', (960, 27, 960, 28): '(4)', (960, 30, 960, 36): '(7448)'}, {}), "('spr346', 4, 7448)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((961, 8, 961, 37), 'archinfo.arch.Register', 'Register', ({(961, 17, 961, 25): '"""spr347"""', (961, 27, 961, 28): '(4)', (961, 30, 961, 36): '(7452)'}, {}), "('spr347', 4, 7452)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((962, 8, 962, 37), 'archinfo.arch.Register', 'Register', ({(962, 17, 962, 25): '"""spr348"""', (962, 27, 962, 28): '(4)', (962, 30, 962, 36): '(7456)'}, {}), "('spr348', 4, 7456)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((963, 8, 963, 37), 'archinfo.arch.Register', 'Register', ({(963, 17, 963, 25): '"""spr349"""', (963, 27, 963, 28): '(4)', (963, 30, 963, 36): '(7460)'}, {}), "('spr349', 4, 7460)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((964, 8, 964, 37), 'archinfo.arch.Register', 'Register', ({(964, 17, 964, 25): '"""spr34a"""', (964, 27, 964, 28): '(4)', (964, 30, 964, 36): '(7464)'}, {}), "('spr34a', 4, 7464)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((965, 8, 965, 37), 'archinfo.arch.Register', 'Register', ({(965, 17, 965, 25): '"""spr34b"""', (965, 27, 965, 28): '(4)', (965, 30, 965, 36): '(7468)'}, {}), "('spr34b', 4, 7468)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((966, 8, 966, 37), 'archinfo.arch.Register', 'Register', ({(966, 17, 966, 25): '"""spr34c"""', (966, 27, 966, 28): '(4)', (966, 30, 966, 36): '(7472)'}, {}), "('spr34c', 4, 7472)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((967, 8, 967, 37), 'archinfo.arch.Register', 'Register', ({(967, 17, 967, 25): '"""spr34d"""', (967, 27, 967, 28): '(4)', (967, 30, 967, 36): '(7476)'}, {}), "('spr34d', 4, 7476)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((968, 8, 968, 37), 'archinfo.arch.Register', 'Register', ({(968, 17, 968, 25): '"""spr34e"""', (968, 27, 968, 28): '(4)', (968, 30, 968, 36): '(7480)'}, {}), "('spr34e', 4, 7480)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((969, 8, 969, 37), 'archinfo.arch.Register', 'Register', ({(969, 17, 969, 25): '"""spr34f"""', (969, 27, 969, 28): '(4)', (969, 30, 969, 36): '(7484)'}, {}), "('spr34f', 4, 7484)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((970, 8, 970, 37), 'archinfo.arch.Register', 'Register', ({(970, 17, 970, 25): '"""spr350"""', (970, 27, 970, 28): '(4)', (970, 30, 970, 36): '(7488)'}, {}), "('spr350', 4, 7488)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((971, 8, 971, 37), 'archinfo.arch.Register', 'Register', ({(971, 17, 971, 25): '"""spr351"""', (971, 27, 971, 28): '(4)', (971, 30, 971, 36): '(7492)'}, {}), "('spr351', 4, 7492)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((972, 8, 972, 37), 'archinfo.arch.Register', 'Register', ({(972, 17, 972, 25): '"""spr352"""', (972, 27, 972, 28): '(4)', (972, 30, 972, 36): '(7496)'}, {}), "('spr352', 4, 7496)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((973, 8, 973, 37), 'archinfo.arch.Register', 'Register', ({(973, 17, 973, 25): '"""spr353"""', (973, 27, 973, 28): '(4)', (973, 30, 973, 36): '(7500)'}, {}), "('spr353', 4, 7500)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((974, 8, 974, 37), 'archinfo.arch.Register', 'Register', ({(974, 17, 974, 25): '"""spr354"""', (974, 27, 974, 28): '(4)', (974, 30, 974, 36): '(7504)'}, {}), "('spr354', 4, 7504)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((975, 8, 975, 37), 'archinfo.arch.Register', 'Register', ({(975, 17, 975, 25): '"""spr355"""', (975, 27, 975, 28): '(4)', (975, 30, 975, 36): '(7508)'}, {}), "('spr355', 4, 7508)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((976, 8, 976, 37), 'archinfo.arch.Register', 'Register', ({(976, 17, 976, 25): '"""spr356"""', (976, 27, 976, 28): '(4)', (976, 30, 976, 36): '(7512)'}, {}), "('spr356', 4, 7512)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((977, 8, 977, 37), 'archinfo.arch.Register', 'Register', ({(977, 17, 977, 25): '"""spr357"""', (977, 27, 977, 28): '(4)', (977, 30, 977, 36): '(7516)'}, {}), "('spr357', 4, 7516)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((978, 8, 978, 37), 'archinfo.arch.Register', 'Register', ({(978, 17, 978, 25): '"""spr358"""', (978, 27, 978, 28): '(4)', (978, 30, 978, 36): '(7520)'}, {}), "('spr358', 4, 7520)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((979, 8, 979, 37), 'archinfo.arch.Register', 'Register', ({(979, 17, 979, 25): '"""spr359"""', (979, 27, 979, 28): '(4)', (979, 30, 979, 36): '(7524)'}, {}), "('spr359', 4, 7524)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((980, 8, 980, 37), 'archinfo.arch.Register', 'Register', ({(980, 17, 980, 25): '"""spr35a"""', (980, 27, 980, 28): '(4)', (980, 30, 980, 36): '(7528)'}, {}), "('spr35a', 4, 7528)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((981, 8, 981, 37), 'archinfo.arch.Register', 'Register', ({(981, 17, 981, 25): '"""spr35b"""', (981, 27, 981, 28): '(4)', (981, 30, 981, 36): '(7532)'}, {}), "('spr35b', 4, 7532)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((982, 8, 982, 37), 'archinfo.arch.Register', 'Register', ({(982, 17, 982, 25): '"""spr35c"""', (982, 27, 982, 28): '(4)', (982, 30, 982, 36): '(7536)'}, {}), "('spr35c', 4, 7536)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((983, 8, 983, 37), 'archinfo.arch.Register', 'Register', ({(983, 17, 983, 25): '"""spr35d"""', (983, 27, 983, 28): '(4)', (983, 30, 983, 36): '(7540)'}, {}), "('spr35d', 4, 7540)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((984, 8, 984, 37), 'archinfo.arch.Register', 'Register', ({(984, 17, 984, 25): '"""spr35e"""', (984, 27, 984, 28): '(4)', (984, 30, 984, 36): '(7544)'}, {}), "('spr35e', 4, 7544)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((985, 8, 985, 37), 'archinfo.arch.Register', 'Register', ({(985, 17, 985, 25): '"""spr35f"""', (985, 27, 985, 28): '(4)', (985, 30, 985, 36): '(7548)'}, {}), "('spr35f', 4, 7548)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((986, 8, 986, 37), 'archinfo.arch.Register', 'Register', ({(986, 17, 986, 25): '"""spr360"""', (986, 27, 986, 28): '(4)', (986, 30, 986, 36): '(7552)'}, {}), "('spr360', 4, 7552)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((987, 8, 987, 37), 'archinfo.arch.Register', 'Register', ({(987, 17, 987, 25): '"""spr361"""', (987, 27, 987, 28): '(4)', (987, 30, 987, 36): '(7556)'}, {}), "('spr361', 4, 7556)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((988, 8, 988, 37), 'archinfo.arch.Register', 'Register', ({(988, 17, 988, 25): '"""spr362"""', (988, 27, 988, 28): '(4)', (988, 30, 988, 36): '(7560)'}, {}), "('spr362', 4, 7560)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((989, 8, 989, 37), 'archinfo.arch.Register', 'Register', ({(989, 17, 989, 25): '"""spr363"""', (989, 27, 989, 28): '(4)', (989, 30, 989, 36): '(7564)'}, {}), "('spr363', 4, 7564)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((990, 8, 990, 37), 'archinfo.arch.Register', 'Register', ({(990, 17, 990, 25): '"""spr364"""', (990, 27, 990, 28): '(4)', (990, 30, 990, 36): '(7568)'}, {}), "('spr364', 4, 7568)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((991, 8, 991, 37), 'archinfo.arch.Register', 'Register', ({(991, 17, 991, 25): '"""spr365"""', (991, 27, 991, 28): '(4)', (991, 30, 991, 36): '(7572)'}, {}), "('spr365', 4, 7572)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((992, 8, 992, 37), 'archinfo.arch.Register', 'Register', ({(992, 17, 992, 25): '"""spr366"""', (992, 27, 992, 28): '(4)', (992, 30, 992, 36): '(7576)'}, {}), "('spr366', 4, 7576)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((993, 8, 993, 37), 'archinfo.arch.Register', 'Register', ({(993, 17, 993, 25): '"""spr367"""', (993, 27, 993, 28): '(4)', (993, 30, 993, 36): '(7580)'}, {}), "('spr367', 4, 7580)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((994, 8, 994, 37), 'archinfo.arch.Register', 'Register', ({(994, 17, 994, 25): '"""spr368"""', (994, 27, 994, 28): '(4)', (994, 30, 994, 36): '(7584)'}, {}), "('spr368', 4, 7584)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((995, 8, 995, 37), 'archinfo.arch.Register', 'Register', ({(995, 17, 995, 25): '"""spr369"""', (995, 27, 995, 28): '(4)', (995, 30, 995, 36): '(7588)'}, {}), "('spr369', 4, 7588)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((996, 8, 996, 37), 'archinfo.arch.Register', 'Register', ({(996, 17, 996, 25): '"""spr36a"""', (996, 27, 996, 28): '(4)', (996, 30, 996, 36): '(7592)'}, {}), "('spr36a', 4, 7592)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((997, 8, 997, 37), 'archinfo.arch.Register', 'Register', ({(997, 17, 997, 25): '"""spr36b"""', (997, 27, 997, 28): '(4)', (997, 30, 997, 36): '(7596)'}, {}), "('spr36b', 4, 7596)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((998, 8, 998, 37), 'archinfo.arch.Register', 'Register', ({(998, 17, 998, 25): '"""spr36c"""', (998, 27, 998, 28): '(4)', (998, 30, 998, 36): '(7600)'}, {}), "('spr36c', 4, 7600)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((999, 8, 999, 37), 'archinfo.arch.Register', 'Register', ({(999, 17, 999, 25): '"""spr36d"""', (999, 27, 999, 28): '(4)', (999, 30, 999, 36): '(7604)'}, {}), "('spr36d', 4, 7604)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1000, 8, 1000, 37), 'archinfo.arch.Register', 'Register', ({(1000, 17, 1000, 25): '"""spr36e"""', (1000, 27, 1000, 28): '(4)', (1000, 30, 1000, 36): '(7608)'}, {}), "('spr36e', 4, 7608)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1001, 8, 1001, 37), 'archinfo.arch.Register', 'Register', ({(1001, 17, 1001, 25): '"""spr36f"""', (1001, 27, 1001, 28): '(4)', (1001, 30, 1001, 36): '(7612)'}, {}), "('spr36f', 4, 7612)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1002, 8, 1002, 37), 'archinfo.arch.Register', 'Register', ({(1002, 17, 1002, 25): '"""spr370"""', (1002, 27, 1002, 28): '(4)', (1002, 30, 1002, 36): '(7616)'}, {}), "('spr370', 4, 7616)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1003, 8, 1003, 37), 'archinfo.arch.Register', 'Register', ({(1003, 17, 1003, 25): '"""spr371"""', (1003, 27, 1003, 28): '(4)', (1003, 30, 1003, 36): '(7620)'}, {}), "('spr371', 4, 7620)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1004, 8, 1004, 37), 'archinfo.arch.Register', 'Register', ({(1004, 17, 1004, 25): '"""spr372"""', (1004, 27, 1004, 28): '(4)', (1004, 30, 1004, 36): '(7624)'}, {}), "('spr372', 4, 7624)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1005, 8, 1005, 37), 'archinfo.arch.Register', 'Register', ({(1005, 17, 1005, 25): '"""spr373"""', (1005, 27, 1005, 28): '(4)', (1005, 30, 1005, 36): '(7628)'}, {}), "('spr373', 4, 7628)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1006, 8, 1006, 37), 'archinfo.arch.Register', 'Register', ({(1006, 17, 1006, 25): '"""spr374"""', (1006, 27, 1006, 28): '(4)', (1006, 30, 1006, 36): '(7632)'}, {}), "('spr374', 4, 7632)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1007, 8, 1007, 37), 'archinfo.arch.Register', 'Register', ({(1007, 17, 1007, 25): '"""spr375"""', (1007, 27, 1007, 28): '(4)', (1007, 30, 1007, 36): '(7636)'}, {}), "('spr375', 4, 7636)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1008, 8, 1008, 37), 'archinfo.arch.Register', 'Register', ({(1008, 17, 1008, 25): '"""spr376"""', (1008, 27, 1008, 28): '(4)', (1008, 30, 1008, 36): '(7640)'}, {}), "('spr376', 4, 7640)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1009, 8, 1009, 37), 'archinfo.arch.Register', 'Register', ({(1009, 17, 1009, 25): '"""spr377"""', (1009, 27, 1009, 28): '(4)', (1009, 30, 1009, 36): '(7644)'}, {}), "('spr377', 4, 7644)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1010, 8, 1010, 37), 'archinfo.arch.Register', 'Register', ({(1010, 17, 1010, 25): '"""spr378"""', (1010, 27, 1010, 28): '(4)', (1010, 30, 1010, 36): '(7648)'}, {}), "('spr378', 4, 7648)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1011, 8, 1011, 37), 'archinfo.arch.Register', 'Register', ({(1011, 17, 1011, 25): '"""spr379"""', (1011, 27, 1011, 28): '(4)', (1011, 30, 1011, 36): '(7652)'}, {}), "('spr379', 4, 7652)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1012, 8, 1012, 37), 'archinfo.arch.Register', 'Register', ({(1012, 17, 1012, 25): '"""spr37a"""', (1012, 27, 1012, 28): '(4)', (1012, 30, 1012, 36): '(7656)'}, {}), "('spr37a', 4, 7656)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1013, 8, 1013, 37), 'archinfo.arch.Register', 'Register', ({(1013, 17, 1013, 25): '"""spr37b"""', (1013, 27, 1013, 28): '(4)', (1013, 30, 1013, 36): '(7660)'}, {}), "('spr37b', 4, 7660)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1014, 8, 1014, 37), 'archinfo.arch.Register', 'Register', ({(1014, 17, 1014, 25): '"""spr37c"""', (1014, 27, 1014, 28): '(4)', (1014, 30, 1014, 36): '(7664)'}, {}), "('spr37c', 4, 7664)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1015, 8, 1015, 37), 'archinfo.arch.Register', 'Register', ({(1015, 17, 1015, 25): '"""spr37d"""', (1015, 27, 1015, 28): '(4)', (1015, 30, 1015, 36): '(7668)'}, {}), "('spr37d', 4, 7668)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1016, 8, 1016, 37), 'archinfo.arch.Register', 'Register', ({(1016, 17, 1016, 25): '"""spr37e"""', (1016, 27, 1016, 28): '(4)', (1016, 30, 1016, 36): '(7672)'}, {}), "('spr37e', 4, 7672)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1017, 8, 1017, 37), 'archinfo.arch.Register', 'Register', ({(1017, 17, 1017, 25): '"""spr37f"""', (1017, 27, 1017, 28): '(4)', (1017, 30, 1017, 36): '(7676)'}, {}), "('spr37f', 4, 7676)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1018, 8, 1018, 37), 'archinfo.arch.Register', 'Register', ({(1018, 17, 1018, 25): '"""spr380"""', (1018, 27, 1018, 28): '(4)', (1018, 30, 1018, 36): '(7680)'}, {}), "('spr380', 4, 7680)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1019, 8, 1019, 37), 'archinfo.arch.Register', 'Register', ({(1019, 17, 1019, 25): '"""spr381"""', (1019, 27, 1019, 28): '(4)', (1019, 30, 1019, 36): '(7684)'}, {}), "('spr381', 4, 7684)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1020, 8, 1020, 37), 'archinfo.arch.Register', 'Register', ({(1020, 17, 1020, 25): '"""spr382"""', (1020, 27, 1020, 28): '(4)', (1020, 30, 1020, 36): '(7688)'}, {}), "('spr382', 4, 7688)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1021, 8, 1021, 37), 'archinfo.arch.Register', 'Register', ({(1021, 17, 1021, 25): '"""spr383"""', (1021, 27, 1021, 28): '(4)', (1021, 30, 1021, 36): '(7692)'}, {}), "('spr383', 4, 7692)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1022, 8, 1022, 37), 'archinfo.arch.Register', 'Register', ({(1022, 17, 1022, 25): '"""spr384"""', (1022, 27, 1022, 28): '(4)', (1022, 30, 1022, 36): '(7696)'}, {}), "('spr384', 4, 7696)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1023, 8, 1023, 37), 'archinfo.arch.Register', 'Register', ({(1023, 17, 1023, 25): '"""spr385"""', (1023, 27, 1023, 28): '(4)', (1023, 30, 1023, 36): '(7700)'}, {}), "('spr385', 4, 7700)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1024, 8, 1024, 37), 'archinfo.arch.Register', 'Register', ({(1024, 17, 1024, 25): '"""spr386"""', (1024, 27, 1024, 28): '(4)', (1024, 30, 1024, 36): '(7704)'}, {}), "('spr386', 4, 7704)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1025, 8, 1025, 37), 'archinfo.arch.Register', 'Register', ({(1025, 17, 1025, 25): '"""spr387"""', (1025, 27, 1025, 28): '(4)', (1025, 30, 1025, 36): '(7708)'}, {}), "('spr387', 4, 7708)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1026, 8, 1026, 37), 'archinfo.arch.Register', 'Register', ({(1026, 17, 1026, 25): '"""spr388"""', (1026, 27, 1026, 28): '(4)', (1026, 30, 1026, 36): '(7712)'}, {}), "('spr388', 4, 7712)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1027, 8, 1027, 37), 'archinfo.arch.Register', 'Register', ({(1027, 17, 1027, 25): '"""spr389"""', (1027, 27, 1027, 28): '(4)', (1027, 30, 1027, 36): '(7716)'}, {}), "('spr389', 4, 7716)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1028, 8, 1028, 37), 'archinfo.arch.Register', 'Register', ({(1028, 17, 1028, 25): '"""spr38a"""', (1028, 27, 1028, 28): '(4)', (1028, 30, 1028, 36): '(7720)'}, {}), "('spr38a', 4, 7720)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1029, 8, 1029, 37), 'archinfo.arch.Register', 'Register', ({(1029, 17, 1029, 25): '"""spr38b"""', (1029, 27, 1029, 28): '(4)', (1029, 30, 1029, 36): '(7724)'}, {}), "('spr38b', 4, 7724)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1030, 8, 1030, 37), 'archinfo.arch.Register', 'Register', ({(1030, 17, 1030, 25): '"""spr38c"""', (1030, 27, 1030, 28): '(4)', (1030, 30, 1030, 36): '(7728)'}, {}), "('spr38c', 4, 7728)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1031, 8, 1031, 37), 'archinfo.arch.Register', 'Register', ({(1031, 17, 1031, 25): '"""spr38d"""', (1031, 27, 1031, 28): '(4)', (1031, 30, 1031, 36): '(7732)'}, {}), "('spr38d', 4, 7732)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1032, 8, 1032, 37), 'archinfo.arch.Register', 'Register', ({(1032, 17, 1032, 25): '"""spr38e"""', (1032, 27, 1032, 28): '(4)', (1032, 30, 1032, 36): '(7736)'}, {}), "('spr38e', 4, 7736)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1033, 8, 1033, 37), 'archinfo.arch.Register', 'Register', ({(1033, 17, 1033, 25): '"""spr38f"""', (1033, 27, 1033, 28): '(4)', (1033, 30, 1033, 36): '(7740)'}, {}), "('spr38f', 4, 7740)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1034, 8, 1034, 37), 'archinfo.arch.Register', 'Register', ({(1034, 17, 1034, 25): '"""spr390"""', (1034, 27, 1034, 28): '(4)', (1034, 30, 1034, 36): '(7744)'}, {}), "('spr390', 4, 7744)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1035, 8, 1035, 37), 'archinfo.arch.Register', 'Register', ({(1035, 17, 1035, 25): '"""spr391"""', (1035, 27, 1035, 28): '(4)', (1035, 30, 1035, 36): '(7748)'}, {}), "('spr391', 4, 7748)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1036, 8, 1036, 37), 'archinfo.arch.Register', 'Register', ({(1036, 17, 1036, 25): '"""spr392"""', (1036, 27, 1036, 28): '(4)', (1036, 30, 1036, 36): '(7752)'}, {}), "('spr392', 4, 7752)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1037, 8, 1037, 37), 'archinfo.arch.Register', 'Register', ({(1037, 17, 1037, 25): '"""spr393"""', (1037, 27, 1037, 28): '(4)', (1037, 30, 1037, 36): '(7756)'}, {}), "('spr393', 4, 7756)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1038, 8, 1038, 37), 'archinfo.arch.Register', 'Register', ({(1038, 17, 1038, 25): '"""spr394"""', (1038, 27, 1038, 28): '(4)', (1038, 30, 1038, 36): '(7760)'}, {}), "('spr394', 4, 7760)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1039, 8, 1039, 37), 'archinfo.arch.Register', 'Register', ({(1039, 17, 1039, 25): '"""spr395"""', (1039, 27, 1039, 28): '(4)', (1039, 30, 1039, 36): '(7764)'}, {}), "('spr395', 4, 7764)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1040, 8, 1040, 37), 'archinfo.arch.Register', 'Register', ({(1040, 17, 1040, 25): '"""spr396"""', (1040, 27, 1040, 28): '(4)', (1040, 30, 1040, 36): '(7768)'}, {}), "('spr396', 4, 7768)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1041, 8, 1041, 37), 'archinfo.arch.Register', 'Register', ({(1041, 17, 1041, 25): '"""spr397"""', (1041, 27, 1041, 28): '(4)', (1041, 30, 1041, 36): '(7772)'}, {}), "('spr397', 4, 7772)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1042, 8, 1042, 37), 'archinfo.arch.Register', 'Register', ({(1042, 17, 1042, 25): '"""spr398"""', (1042, 27, 1042, 28): '(4)', (1042, 30, 1042, 36): '(7776)'}, {}), "('spr398', 4, 7776)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1043, 8, 1043, 37), 'archinfo.arch.Register', 'Register', ({(1043, 17, 1043, 25): '"""spr399"""', (1043, 27, 1043, 28): '(4)', (1043, 30, 1043, 36): '(7780)'}, {}), "('spr399', 4, 7780)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1044, 8, 1044, 37), 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28): '(4)', (1055, 30, 1055, 36): '(7828)'}, {}), "('spr3a5', 4, 7828)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1056, 8, 1056, 37), 'archinfo.arch.Register', 'Register', ({(1056, 17, 1056, 25): '"""spr3a6"""', (1056, 27, 1056, 28): '(4)', (1056, 30, 1056, 36): '(7832)'}, {}), "('spr3a6', 4, 7832)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1057, 8, 1057, 37), 'archinfo.arch.Register', 'Register', ({(1057, 17, 1057, 25): '"""spr3a7"""', (1057, 27, 1057, 28): '(4)', (1057, 30, 1057, 36): '(7836)'}, {}), "('spr3a7', 4, 7836)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1058, 8, 1058, 37), 'archinfo.arch.Register', 'Register', ({(1058, 17, 1058, 25): '"""spr3a8"""', (1058, 27, 1058, 28): '(4)', (1058, 30, 1058, 36): '(7840)'}, {}), "('spr3a8', 4, 7840)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1059, 8, 1059, 37), 'archinfo.arch.Register', 'Register', ({(1059, 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28): '(4)', (1074, 30, 1074, 36): '(7904)'}, {}), "('spr3b8', 4, 7904)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1075, 8, 1075, 37), 'archinfo.arch.Register', 'Register', ({(1075, 17, 1075, 25): '"""spr3b9"""', (1075, 27, 1075, 28): '(4)', (1075, 30, 1075, 36): '(7908)'}, {}), "('spr3b9', 4, 7908)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1076, 8, 1076, 37), 'archinfo.arch.Register', 'Register', ({(1076, 17, 1076, 25): '"""spr3ba"""', (1076, 27, 1076, 28): '(4)', (1076, 30, 1076, 36): '(7912)'}, {}), "('spr3ba', 4, 7912)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1077, 8, 1077, 37), 'archinfo.arch.Register', 'Register', ({(1077, 17, 1077, 25): '"""spr3bb"""', (1077, 27, 1077, 28): '(4)', (1077, 30, 1077, 36): '(7916)'}, {}), "('spr3bb', 4, 7916)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1078, 8, 1078, 37), 'archinfo.arch.Register', 'Register', ({(1078, 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"('spr3c7', 4, 7964)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1090, 8, 1090, 37), 'archinfo.arch.Register', 'Register', ({(1090, 17, 1090, 25): '"""spr3c8"""', (1090, 27, 1090, 28): '(4)', (1090, 30, 1090, 36): '(7968)'}, {}), "('spr3c8', 4, 7968)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1091, 8, 1091, 37), 'archinfo.arch.Register', 'Register', ({(1091, 17, 1091, 25): '"""spr3c9"""', (1091, 27, 1091, 28): '(4)', (1091, 30, 1091, 36): '(7972)'}, {}), "('spr3c9', 4, 7972)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1092, 8, 1092, 37), 'archinfo.arch.Register', 'Register', ({(1092, 17, 1092, 25): '"""spr3ca"""', (1092, 27, 1092, 28): '(4)', (1092, 30, 1092, 36): '(7976)'}, {}), "('spr3ca', 4, 7976)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1093, 8, 1093, 37), 'archinfo.arch.Register', 'Register', ({(1093, 17, 1093, 25): '"""spr3cb"""', (1093, 27, 1093, 28): '(4)', (1093, 30, 1093, 36): '(7980)'}, {}), "('spr3cb', 4, 7980)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1094, 8, 1094, 37), 'archinfo.arch.Register', 'Register', ({(1094, 17, 1094, 25): '"""spr3cc"""', (1094, 27, 1094, 28): '(4)', (1094, 30, 1094, 36): '(7984)'}, {}), "('spr3cc', 4, 7984)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1095, 8, 1095, 37), 'archinfo.arch.Register', 'Register', ({(1095, 17, 1095, 25): '"""spr3cd"""', (1095, 27, 1095, 28): '(4)', (1095, 30, 1095, 36): '(7988)'}, {}), "('spr3cd', 4, 7988)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1096, 8, 1096, 37), 'archinfo.arch.Register', 'Register', ({(1096, 17, 1096, 25): '"""spr3ce"""', (1096, 27, 1096, 28): '(4)', (1096, 30, 1096, 36): '(7992)'}, {}), "('spr3ce', 4, 7992)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1097, 8, 1097, 37), 'archinfo.arch.Register', 'Register', ({(1097, 17, 1097, 25): '"""spr3cf"""', (1097, 27, 1097, 28): '(4)', (1097, 30, 1097, 36): '(7996)'}, {}), "('spr3cf', 4, 7996)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1098, 8, 1098, 37), 'archinfo.arch.Register', 'Register', ({(1098, 17, 1098, 25): '"""spr3d0"""', (1098, 27, 1098, 28): '(4)', (1098, 30, 1098, 36): '(8000)'}, {}), "('spr3d0', 4, 8000)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1099, 8, 1099, 37), 'archinfo.arch.Register', 'Register', ({(1099, 17, 1099, 25): '"""spr3d1"""', (1099, 27, 1099, 28): '(4)', (1099, 30, 1099, 36): '(8004)'}, {}), "('spr3d1', 4, 8004)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1100, 8, 1100, 37), 'archinfo.arch.Register', 'Register', ({(1100, 17, 1100, 25): '"""spr3d2"""', (1100, 27, 1100, 28): '(4)', (1100, 30, 1100, 36): '(8008)'}, {}), "('spr3d2', 4, 8008)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1101, 8, 1101, 37), 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17, 1234, 27): '"""vr0_32_0"""', (1234, 29, 1234, 30): '(4)', (1234, 32, 1234, 38): '(16908)'}, {}), "('vr0_32_0', 4, 16908)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1235, 8, 1235, 39), 'archinfo.arch.Register', 'Register', ({(1235, 17, 1235, 27): '"""vr0_16_1"""', (1235, 29, 1235, 30): '(2)', (1235, 32, 1235, 38): '(16908)'}, {}), "('vr0_16_1', 2, 16908)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1236, 8, 1236, 38), 'archinfo.arch.Register', 'Register', ({(1236, 17, 1236, 26): '"""vr0_8_3"""', (1236, 28, 1236, 29): '(1)', (1236, 31, 1236, 37): '(16908)'}, {}), "('vr0_8_3', 1, 16908)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1237, 8, 1237, 38), 'archinfo.arch.Register', 'Register', ({(1237, 17, 1237, 26): '"""vr0_8_2"""', (1237, 28, 1237, 29): '(1)', (1237, 31, 1237, 37): '(16909)'}, {}), "('vr0_8_2', 1, 16909)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), 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({(1290, 17, 1290, 27): '"""vr2_16_3"""', (1290, 29, 1290, 30): '(2)', (1290, 32, 1290, 38): '(16936)'}, {}), "('vr2_16_3', 2, 16936)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1291, 8, 1291, 38), 'archinfo.arch.Register', 'Register', ({(1291, 17, 1291, 26): '"""vr2_8_7"""', (1291, 28, 1291, 29): '(1)', (1291, 31, 1291, 37): '(16936)'}, {}), "('vr2_8_7', 1, 16936)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1292, 8, 1292, 38), 'archinfo.arch.Register', 'Register', ({(1292, 17, 1292, 26): '"""vr2_8_6"""', (1292, 28, 1292, 29): '(1)', (1292, 31, 1292, 37): '(16937)'}, {}), "('vr2_8_6', 1, 16937)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1293, 8, 1293, 39), 'archinfo.arch.Register', 'Register', ({(1293, 17, 1293, 27): '"""vr2_16_2"""', (1293, 29, 1293, 30): '(2)', (1293, 32, 1293, 38): '(16938)'}, {}), "('vr2_16_2', 2, 16938)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1294, 8, 1294, 38), 'archinfo.arch.Register', 'Register', ({(1294, 17, 1294, 26): '"""vr2_8_5"""', (1294, 28, 1294, 29): '(1)', (1294, 31, 1294, 37): '(16938)'}, {}), "('vr2_8_5', 1, 16938)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1295, 8, 1295, 38), 'archinfo.arch.Register', 'Register', ({(1295, 17, 1295, 26): '"""vr2_8_4"""', (1295, 28, 1295, 29): '(1)', (1295, 31, 1295, 37): '(16939)'}, {}), "('vr2_8_4', 1, 16939)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1296, 8, 1296, 39), 'archinfo.arch.Register', 'Register', ({(1296, 17, 1296, 27): '"""vr2_32_0"""', (1296, 29, 1296, 30): '(4)', (1296, 32, 1296, 38): '(16940)'}, {}), "('vr2_32_0', 4, 16940)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1297, 8, 1297, 39), 'archinfo.arch.Register', 'Register', ({(1297, 17, 1297, 27): '"""vr2_16_1"""', (1297, 29, 1297, 30): '(2)', (1297, 32, 1297, 38): '(16940)'}, {}), "('vr2_16_1', 2, 16940)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1298, 8, 1298, 38), 'archinfo.arch.Register', 'Register', ({(1298, 17, 1298, 26): '"""vr2_8_3"""', (1298, 28, 1298, 29): '(1)', (1298, 31, 1298, 37): '(16940)'}, {}), "('vr2_8_3', 1, 16940)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1299, 8, 1299, 38), 'archinfo.arch.Register', 'Register', ({(1299, 17, 1299, 26): '"""vr2_8_2"""', (1299, 28, 1299, 29): '(1)', (1299, 31, 1299, 37): '(16941)'}, {}), "('vr2_8_2', 1, 16941)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1300, 8, 1300, 39), 'archinfo.arch.Register', 'Register', ({(1300, 17, 1300, 27): '"""vr2_16_0"""', (1300, 29, 1300, 30): '(2)', (1300, 32, 1300, 38): '(16942)'}, {}), "('vr2_16_0', 2, 16942)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1301, 8, 1301, 38), 'archinfo.arch.Register', 'Register', ({(1301, 17, 1301, 26): '"""vr2_8_1"""', (1301, 28, 1301, 29): '(1)', (1301, 31, 1301, 37): '(16942)'}, {}), "('vr2_8_1', 1, 16942)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1302, 8, 1302, 38), 'archinfo.arch.Register', 'Register', ({(1302, 17, 1302, 26): '"""vr2_8_0"""', (1302, 28, 1302, 29): '(1)', (1302, 31, 1302, 37): '(16943)'}, {}), "('vr2_8_0', 1, 16943)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1303, 8, 1303, 36), 'archinfo.arch.Register', 'Register', ({(1303, 17, 1303, 23): '"""vs35"""', (1303, 25, 1303, 27): '(16)', (1303, 29, 1303, 35): '(16944)'}, {}), "('vs35', 16, 16944)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1304, 8, 1304, 39), 'archinfo.arch.Register', 'Register', ({(1304, 17, 1304, 27): '"""vr3_64_1"""', (1304, 29, 1304, 30): '(8)', (1304, 32, 1304, 38): '(16944)'}, {}), "('vr3_64_1', 8, 16944)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1305, 8, 1305, 39), 'archinfo.arch.Register', 'Register', ({(1305, 17, 1305, 27): '"""vr3_32_3"""', (1305, 29, 1305, 30): '(4)', (1305, 32, 1305, 38): '(16944)'}, {}), "('vr3_32_3', 4, 16944)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1306, 8, 1306, 39), 'archinfo.arch.Register', 'Register', ({(1306, 17, 1306, 27): '"""vr3_16_7"""', (1306, 29, 1306, 30): '(2)', (1306, 32, 1306, 38): '(16944)'}, {}), "('vr3_16_7', 2, 16944)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1307, 8, 1307, 39), 'archinfo.arch.Register', 'Register', ({(1307, 17, 1307, 27): '"""vr3_8_15"""', (1307, 29, 1307, 30): '(1)', (1307, 32, 1307, 38): '(16944)'}, {}), "('vr3_8_15', 1, 16944)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1308, 8, 1308, 39), 'archinfo.arch.Register', 'Register', ({(1308, 17, 1308, 27): '"""vr3_8_14"""', (1308, 29, 1308, 30): '(1)', (1308, 32, 1308, 38): '(16945)'}, {}), "('vr3_8_14', 1, 16945)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1309, 8, 1309, 39), 'archinfo.arch.Register', 'Register', ({(1309, 17, 1309, 27): '"""vr3_16_6"""', (1309, 29, 1309, 30): '(2)', (1309, 32, 1309, 38): '(16946)'}, {}), "('vr3_16_6', 2, 16946)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1310, 8, 1310, 39), 'archinfo.arch.Register', 'Register', ({(1310, 17, 1310, 27): '"""vr3_8_13"""', (1310, 29, 1310, 30): '(1)', (1310, 32, 1310, 38): '(16946)'}, {}), "('vr3_8_13', 1, 16946)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1311, 8, 1311, 39), 'archinfo.arch.Register', 'Register', ({(1311, 17, 1311, 27): '"""vr3_8_12"""', (1311, 29, 1311, 30): '(1)', (1311, 32, 1311, 38): '(16947)'}, {}), "('vr3_8_12', 1, 16947)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1312, 8, 1312, 39), 'archinfo.arch.Register', 'Register', ({(1312, 17, 1312, 27): '"""vr3_32_2"""', (1312, 29, 1312, 30): '(4)', (1312, 32, 1312, 38): '(16948)'}, {}), "('vr3_32_2', 4, 16948)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1313, 8, 1313, 39), 'archinfo.arch.Register', 'Register', ({(1313, 17, 1313, 27): '"""vr3_16_5"""', (1313, 29, 1313, 30): '(2)', (1313, 32, 1313, 38): '(16948)'}, {}), "('vr3_16_5', 2, 16948)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1314, 8, 1314, 39), 'archinfo.arch.Register', 'Register', ({(1314, 17, 1314, 27): '"""vr3_8_11"""', (1314, 29, 1314, 30): '(1)', (1314, 32, 1314, 38): '(16948)'}, {}), "('vr3_8_11', 1, 16948)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1315, 8, 1315, 39), 'archinfo.arch.Register', 'Register', ({(1315, 17, 1315, 27): '"""vr3_8_10"""', (1315, 29, 1315, 30): '(1)', (1315, 32, 1315, 38): '(16949)'}, {}), "('vr3_8_10', 1, 16949)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1316, 8, 1316, 39), 'archinfo.arch.Register', 'Register', ({(1316, 17, 1316, 27): '"""vr3_16_4"""', (1316, 29, 1316, 30): '(2)', (1316, 32, 1316, 38): '(16950)'}, {}), "('vr3_16_4', 2, 16950)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1317, 8, 1317, 38), 'archinfo.arch.Register', 'Register', ({(1317, 17, 1317, 26): '"""vr3_8_9"""', (1317, 28, 1317, 29): '(1)', (1317, 31, 1317, 37): '(16950)'}, {}), "('vr3_8_9', 1, 16950)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1318, 8, 1318, 38), 'archinfo.arch.Register', 'Register', ({(1318, 17, 1318, 26): '"""vr3_8_8"""', (1318, 28, 1318, 29): '(1)', (1318, 31, 1318, 37): '(16951)'}, {}), "('vr3_8_8', 1, 16951)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1319, 8, 1319, 39), 'archinfo.arch.Register', 'Register', ({(1319, 17, 1319, 27): '"""vr3_64_0"""', (1319, 29, 1319, 30): '(8)', (1319, 32, 1319, 38): '(16952)'}, {}), "('vr3_64_0', 8, 16952)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1320, 8, 1320, 39), 'archinfo.arch.Register', 'Register', ({(1320, 17, 1320, 27): '"""vr3_32_1"""', (1320, 29, 1320, 30): '(4)', (1320, 32, 1320, 38): '(16952)'}, {}), "('vr3_32_1', 4, 16952)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1321, 8, 1321, 39), 'archinfo.arch.Register', 'Register', ({(1321, 17, 1321, 27): '"""vr3_16_3"""', (1321, 29, 1321, 30): '(2)', (1321, 32, 1321, 38): '(16952)'}, {}), "('vr3_16_3', 2, 16952)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1322, 8, 1322, 38), 'archinfo.arch.Register', 'Register', ({(1322, 17, 1322, 26): '"""vr3_8_7"""', (1322, 28, 1322, 29): '(1)', (1322, 31, 1322, 37): '(16952)'}, {}), "('vr3_8_7', 1, 16952)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1323, 8, 1323, 38), 'archinfo.arch.Register', 'Register', ({(1323, 17, 1323, 26): '"""vr3_8_6"""', (1323, 28, 1323, 29): '(1)', (1323, 31, 1323, 37): '(16953)'}, {}), "('vr3_8_6', 1, 16953)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1324, 8, 1324, 39), 'archinfo.arch.Register', 'Register', ({(1324, 17, 1324, 27): '"""vr3_16_2"""', (1324, 29, 1324, 30): '(2)', (1324, 32, 1324, 38): '(16954)'}, {}), "('vr3_16_2', 2, 16954)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1325, 8, 1325, 38), 'archinfo.arch.Register', 'Register', ({(1325, 17, 1325, 26): '"""vr3_8_5"""', (1325, 28, 1325, 29): '(1)', (1325, 31, 1325, 37): '(16954)'}, {}), "('vr3_8_5', 1, 16954)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1326, 8, 1326, 38), 'archinfo.arch.Register', 'Register', ({(1326, 17, 1326, 26): '"""vr3_8_4"""', (1326, 28, 1326, 29): '(1)', (1326, 31, 1326, 37): '(16955)'}, {}), "('vr3_8_4', 1, 16955)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1327, 8, 1327, 39), 'archinfo.arch.Register', 'Register', ({(1327, 17, 1327, 27): '"""vr3_32_0"""', (1327, 29, 1327, 30): '(4)', (1327, 32, 1327, 38): '(16956)'}, {}), "('vr3_32_0', 4, 16956)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1328, 8, 1328, 39), 'archinfo.arch.Register', 'Register', ({(1328, 17, 1328, 27): '"""vr3_16_1"""', (1328, 29, 1328, 30): '(2)', (1328, 32, 1328, 38): '(16956)'}, {}), "('vr3_16_1', 2, 16956)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1329, 8, 1329, 38), 'archinfo.arch.Register', 'Register', ({(1329, 17, 1329, 26): '"""vr3_8_3"""', (1329, 28, 1329, 29): '(1)', (1329, 31, 1329, 37): '(16956)'}, {}), "('vr3_8_3', 1, 16956)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1330, 8, 1330, 38), 'archinfo.arch.Register', 'Register', ({(1330, 17, 1330, 26): '"""vr3_8_2"""', (1330, 28, 1330, 29): '(1)', (1330, 31, 1330, 37): '(16957)'}, {}), "('vr3_8_2', 1, 16957)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1331, 8, 1331, 39), 'archinfo.arch.Register', 'Register', ({(1331, 17, 1331, 27): '"""vr3_16_0"""', (1331, 29, 1331, 30): '(2)', (1331, 32, 1331, 38): '(16958)'}, {}), "('vr3_16_0', 2, 16958)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1332, 8, 1332, 38), 'archinfo.arch.Register', 'Register', ({(1332, 17, 1332, 26): '"""vr3_8_1"""', (1332, 28, 1332, 29): '(1)', (1332, 31, 1332, 37): '(16958)'}, {}), "('vr3_8_1', 1, 16958)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1333, 8, 1333, 38), 'archinfo.arch.Register', 'Register', ({(1333, 17, 1333, 26): '"""vr3_8_0"""', (1333, 28, 1333, 29): '(1)', (1333, 31, 1333, 37): '(16959)'}, {}), "('vr3_8_0', 1, 16959)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1334, 8, 1334, 36), 'archinfo.arch.Register', 'Register', ({(1334, 17, 1334, 23): '"""vs36"""', (1334, 25, 1334, 27): '(16)', (1334, 29, 1334, 35): '(16960)'}, {}), "('vs36', 16, 16960)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1335, 8, 1335, 39), 'archinfo.arch.Register', 'Register', ({(1335, 17, 1335, 27): '"""vr4_64_1"""', (1335, 29, 1335, 30): '(8)', (1335, 32, 1335, 38): '(16960)'}, {}), "('vr4_64_1', 8, 16960)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1336, 8, 1336, 39), 'archinfo.arch.Register', 'Register', ({(1336, 17, 1336, 27): '"""vr4_32_3"""', (1336, 29, 1336, 30): '(4)', (1336, 32, 1336, 38): '(16960)'}, {}), "('vr4_32_3', 4, 16960)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1337, 8, 1337, 39), 'archinfo.arch.Register', 'Register', ({(1337, 17, 1337, 27): '"""vr4_16_7"""', (1337, 29, 1337, 30): '(2)', (1337, 32, 1337, 38): '(16960)'}, {}), "('vr4_16_7', 2, 16960)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1338, 8, 1338, 39), 'archinfo.arch.Register', 'Register', ({(1338, 17, 1338, 27): '"""vr4_8_15"""', (1338, 29, 1338, 30): '(1)', (1338, 32, 1338, 38): '(16960)'}, {}), "('vr4_8_15', 1, 16960)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1339, 8, 1339, 39), 'archinfo.arch.Register', 'Register', ({(1339, 17, 1339, 27): '"""vr4_8_14"""', (1339, 29, 1339, 30): '(1)', (1339, 32, 1339, 38): '(16961)'}, {}), "('vr4_8_14', 1, 16961)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1340, 8, 1340, 39), 'archinfo.arch.Register', 'Register', ({(1340, 17, 1340, 27): '"""vr4_16_6"""', (1340, 29, 1340, 30): '(2)', (1340, 32, 1340, 38): '(16962)'}, {}), "('vr4_16_6', 2, 16962)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1341, 8, 1341, 39), 'archinfo.arch.Register', 'Register', ({(1341, 17, 1341, 27): '"""vr4_8_13"""', (1341, 29, 1341, 30): '(1)', (1341, 32, 1341, 38): '(16962)'}, {}), "('vr4_8_13', 1, 16962)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1342, 8, 1342, 39), 'archinfo.arch.Register', 'Register', ({(1342, 17, 1342, 27): '"""vr4_8_12"""', (1342, 29, 1342, 30): '(1)', (1342, 32, 1342, 38): '(16963)'}, {}), "('vr4_8_12', 1, 16963)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1343, 8, 1343, 39), 'archinfo.arch.Register', 'Register', ({(1343, 17, 1343, 27): '"""vr4_32_2"""', (1343, 29, 1343, 30): '(4)', (1343, 32, 1343, 38): '(16964)'}, {}), "('vr4_32_2', 4, 16964)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1344, 8, 1344, 39), 'archinfo.arch.Register', 'Register', ({(1344, 17, 1344, 27): '"""vr4_16_5"""', (1344, 29, 1344, 30): '(2)', (1344, 32, 1344, 38): '(16964)'}, {}), "('vr4_16_5', 2, 16964)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1345, 8, 1345, 39), 'archinfo.arch.Register', 'Register', ({(1345, 17, 1345, 27): '"""vr4_8_11"""', (1345, 29, 1345, 30): '(1)', (1345, 32, 1345, 38): '(16964)'}, {}), "('vr4_8_11', 1, 16964)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1346, 8, 1346, 39), 'archinfo.arch.Register', 'Register', ({(1346, 17, 1346, 27): '"""vr4_8_10"""', (1346, 29, 1346, 30): '(1)', (1346, 32, 1346, 38): '(16965)'}, {}), "('vr4_8_10', 1, 16965)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1347, 8, 1347, 39), 'archinfo.arch.Register', 'Register', ({(1347, 17, 1347, 27): '"""vr4_16_4"""', (1347, 29, 1347, 30): '(2)', (1347, 32, 1347, 38): '(16966)'}, {}), "('vr4_16_4', 2, 16966)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1348, 8, 1348, 38), 'archinfo.arch.Register', 'Register', ({(1348, 17, 1348, 26): '"""vr4_8_9"""', (1348, 28, 1348, 29): '(1)', (1348, 31, 1348, 37): '(16966)'}, {}), "('vr4_8_9', 1, 16966)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1349, 8, 1349, 38), 'archinfo.arch.Register', 'Register', ({(1349, 17, 1349, 26): '"""vr4_8_8"""', (1349, 28, 1349, 29): '(1)', (1349, 31, 1349, 37): '(16967)'}, {}), "('vr4_8_8', 1, 16967)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1350, 8, 1350, 39), 'archinfo.arch.Register', 'Register', ({(1350, 17, 1350, 27): '"""vr4_64_0"""', (1350, 29, 1350, 30): '(8)', (1350, 32, 1350, 38): '(16968)'}, {}), "('vr4_64_0', 8, 16968)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1351, 8, 1351, 39), 'archinfo.arch.Register', 'Register', ({(1351, 17, 1351, 27): '"""vr4_32_1"""', (1351, 29, 1351, 30): '(4)', (1351, 32, 1351, 38): '(16968)'}, {}), "('vr4_32_1', 4, 16968)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1352, 8, 1352, 39), 'archinfo.arch.Register', 'Register', ({(1352, 17, 1352, 27): '"""vr4_16_3"""', (1352, 29, 1352, 30): '(2)', (1352, 32, 1352, 38): '(16968)'}, {}), "('vr4_16_3', 2, 16968)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1353, 8, 1353, 38), 'archinfo.arch.Register', 'Register', ({(1353, 17, 1353, 26): '"""vr4_8_7"""', (1353, 28, 1353, 29): '(1)', (1353, 31, 1353, 37): '(16968)'}, {}), "('vr4_8_7', 1, 16968)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1354, 8, 1354, 38), 'archinfo.arch.Register', 'Register', ({(1354, 17, 1354, 26): '"""vr4_8_6"""', (1354, 28, 1354, 29): '(1)', (1354, 31, 1354, 37): '(16969)'}, {}), "('vr4_8_6', 1, 16969)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1355, 8, 1355, 39), 'archinfo.arch.Register', 'Register', ({(1355, 17, 1355, 27): '"""vr4_16_2"""', (1355, 29, 1355, 30): '(2)', (1355, 32, 1355, 38): '(16970)'}, {}), "('vr4_16_2', 2, 16970)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1356, 8, 1356, 38), 'archinfo.arch.Register', 'Register', ({(1356, 17, 1356, 26): '"""vr4_8_5"""', (1356, 28, 1356, 29): '(1)', (1356, 31, 1356, 37): '(16970)'}, {}), "('vr4_8_5', 1, 16970)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1357, 8, 1357, 38), 'archinfo.arch.Register', 'Register', ({(1357, 17, 1357, 26): '"""vr4_8_4"""', (1357, 28, 1357, 29): '(1)', (1357, 31, 1357, 37): '(16971)'}, {}), "('vr4_8_4', 1, 16971)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1358, 8, 1358, 39), 'archinfo.arch.Register', 'Register', ({(1358, 17, 1358, 27): '"""vr4_32_0"""', (1358, 29, 1358, 30): '(4)', (1358, 32, 1358, 38): '(16972)'}, {}), "('vr4_32_0', 4, 16972)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1359, 8, 1359, 39), 'archinfo.arch.Register', 'Register', ({(1359, 17, 1359, 27): '"""vr4_16_1"""', (1359, 29, 1359, 30): '(2)', (1359, 32, 1359, 38): '(16972)'}, {}), "('vr4_16_1', 2, 16972)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1360, 8, 1360, 38), 'archinfo.arch.Register', 'Register', ({(1360, 17, 1360, 26): '"""vr4_8_3"""', (1360, 28, 1360, 29): '(1)', (1360, 31, 1360, 37): '(16972)'}, {}), "('vr4_8_3', 1, 16972)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1361, 8, 1361, 38), 'archinfo.arch.Register', 'Register', ({(1361, 17, 1361, 26): '"""vr4_8_2"""', (1361, 28, 1361, 29): '(1)', (1361, 31, 1361, 37): '(16973)'}, {}), "('vr4_8_2', 1, 16973)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1362, 8, 1362, 39), 'archinfo.arch.Register', 'Register', ({(1362, 17, 1362, 27): '"""vr4_16_0"""', (1362, 29, 1362, 30): '(2)', (1362, 32, 1362, 38): '(16974)'}, {}), "('vr4_16_0', 2, 16974)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1363, 8, 1363, 38), 'archinfo.arch.Register', 'Register', ({(1363, 17, 1363, 26): '"""vr4_8_1"""', (1363, 28, 1363, 29): '(1)', (1363, 31, 1363, 37): '(16974)'}, {}), "('vr4_8_1', 1, 16974)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1364, 8, 1364, 38), 'archinfo.arch.Register', 'Register', ({(1364, 17, 1364, 26): '"""vr4_8_0"""', (1364, 28, 1364, 29): '(1)', (1364, 31, 1364, 37): '(16975)'}, {}), "('vr4_8_0', 1, 16975)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1365, 8, 1365, 36), 'archinfo.arch.Register', 'Register', ({(1365, 17, 1365, 23): '"""vs37"""', (1365, 25, 1365, 27): '(16)', (1365, 29, 1365, 35): '(16976)'}, {}), "('vs37', 16, 16976)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1366, 8, 1366, 39), 'archinfo.arch.Register', 'Register', ({(1366, 17, 1366, 27): '"""vr5_64_1"""', (1366, 29, 1366, 30): '(8)', (1366, 32, 1366, 38): '(16976)'}, {}), "('vr5_64_1', 8, 16976)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1367, 8, 1367, 39), 'archinfo.arch.Register', 'Register', ({(1367, 17, 1367, 27): '"""vr5_32_3"""', (1367, 29, 1367, 30): '(4)', (1367, 32, 1367, 38): '(16976)'}, {}), "('vr5_32_3', 4, 16976)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1368, 8, 1368, 39), 'archinfo.arch.Register', 'Register', ({(1368, 17, 1368, 27): '"""vr5_16_7"""', (1368, 29, 1368, 30): '(2)', (1368, 32, 1368, 38): '(16976)'}, {}), "('vr5_16_7', 2, 16976)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1369, 8, 1369, 39), 'archinfo.arch.Register', 'Register', ({(1369, 17, 1369, 27): '"""vr5_8_15"""', (1369, 29, 1369, 30): '(1)', (1369, 32, 1369, 38): '(16976)'}, {}), "('vr5_8_15', 1, 16976)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1370, 8, 1370, 39), 'archinfo.arch.Register', 'Register', ({(1370, 17, 1370, 27): '"""vr5_8_14"""', (1370, 29, 1370, 30): '(1)', (1370, 32, 1370, 38): '(16977)'}, {}), "('vr5_8_14', 1, 16977)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1371, 8, 1371, 39), 'archinfo.arch.Register', 'Register', ({(1371, 17, 1371, 27): '"""vr5_16_6"""', (1371, 29, 1371, 30): '(2)', (1371, 32, 1371, 38): '(16978)'}, {}), "('vr5_16_6', 2, 16978)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1372, 8, 1372, 39), 'archinfo.arch.Register', 'Register', ({(1372, 17, 1372, 27): '"""vr5_8_13"""', (1372, 29, 1372, 30): '(1)', (1372, 32, 1372, 38): '(16978)'}, {}), "('vr5_8_13', 1, 16978)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1373, 8, 1373, 39), 'archinfo.arch.Register', 'Register', ({(1373, 17, 1373, 27): '"""vr5_8_12"""', (1373, 29, 1373, 30): '(1)', (1373, 32, 1373, 38): '(16979)'}, {}), "('vr5_8_12', 1, 16979)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1374, 8, 1374, 39), 'archinfo.arch.Register', 'Register', ({(1374, 17, 1374, 27): '"""vr5_32_2"""', (1374, 29, 1374, 30): '(4)', (1374, 32, 1374, 38): '(16980)'}, {}), "('vr5_32_2', 4, 16980)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1375, 8, 1375, 39), 'archinfo.arch.Register', 'Register', ({(1375, 17, 1375, 27): '"""vr5_16_5"""', (1375, 29, 1375, 30): '(2)', (1375, 32, 1375, 38): '(16980)'}, {}), "('vr5_16_5', 2, 16980)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1376, 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Register\n'), ((1391, 8, 1391, 38), 'archinfo.arch.Register', 'Register', ({(1391, 17, 1391, 26): '"""vr5_8_3"""', (1391, 28, 1391, 29): '(1)', (1391, 31, 1391, 37): '(16988)'}, {}), "('vr5_8_3', 1, 16988)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1392, 8, 1392, 38), 'archinfo.arch.Register', 'Register', ({(1392, 17, 1392, 26): '"""vr5_8_2"""', (1392, 28, 1392, 29): '(1)', (1392, 31, 1392, 37): '(16989)'}, {}), "('vr5_8_2', 1, 16989)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1393, 8, 1393, 39), 'archinfo.arch.Register', 'Register', ({(1393, 17, 1393, 27): '"""vr5_16_0"""', (1393, 29, 1393, 30): '(2)', (1393, 32, 1393, 38): '(16990)'}, {}), "('vr5_16_0', 2, 16990)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1394, 8, 1394, 38), 'archinfo.arch.Register', 'Register', ({(1394, 17, 1394, 26): '"""vr5_8_1"""', (1394, 28, 1394, 29): '(1)', (1394, 31, 1394, 37): '(16990)'}, {}), "('vr5_8_1', 1, 16990)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1395, 8, 1395, 38), 'archinfo.arch.Register', 'Register', ({(1395, 17, 1395, 26): '"""vr5_8_0"""', (1395, 28, 1395, 29): '(1)', (1395, 31, 1395, 37): '(16991)'}, {}), "('vr5_8_0', 1, 16991)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1396, 8, 1396, 36), 'archinfo.arch.Register', 'Register', ({(1396, 17, 1396, 23): '"""vs38"""', (1396, 25, 1396, 27): '(16)', (1396, 29, 1396, 35): '(16992)'}, {}), "('vs38', 16, 16992)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1397, 8, 1397, 39), 'archinfo.arch.Register', 'Register', ({(1397, 17, 1397, 27): '"""vr6_64_1"""', (1397, 29, 1397, 30): '(8)', (1397, 32, 1397, 38): '(16992)'}, {}), "('vr6_64_1', 8, 16992)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1398, 8, 1398, 39), 'archinfo.arch.Register', 'Register', ({(1398, 17, 1398, 27): '"""vr6_32_3"""', (1398, 29, 1398, 30): '(4)', (1398, 32, 1398, 38): '(16992)'}, {}), "('vr6_32_3', 4, 16992)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1399, 8, 1399, 39), 'archinfo.arch.Register', 'Register', ({(1399, 17, 1399, 27): '"""vr6_16_7"""', (1399, 29, 1399, 30): '(2)', (1399, 32, 1399, 38): '(16992)'}, {}), "('vr6_16_7', 2, 16992)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1400, 8, 1400, 39), 'archinfo.arch.Register', 'Register', ({(1400, 17, 1400, 27): '"""vr6_8_15"""', (1400, 29, 1400, 30): '(1)', (1400, 32, 1400, 38): '(16992)'}, {}), "('vr6_8_15', 1, 16992)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1401, 8, 1401, 39), 'archinfo.arch.Register', 'Register', ({(1401, 17, 1401, 27): '"""vr6_8_14"""', (1401, 29, 1401, 30): '(1)', (1401, 32, 1401, 38): '(16993)'}, {}), "('vr6_8_14', 1, 16993)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1402, 8, 1402, 39), 'archinfo.arch.Register', 'Register', ({(1402, 17, 1402, 27): '"""vr6_16_6"""', (1402, 29, 1402, 30): '(2)', (1402, 32, 1402, 38): '(16994)'}, {}), "('vr6_16_6', 2, 16994)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1403, 8, 1403, 39), 'archinfo.arch.Register', 'Register', ({(1403, 17, 1403, 27): '"""vr6_8_13"""', (1403, 29, 1403, 30): '(1)', (1403, 32, 1403, 38): '(16994)'}, {}), "('vr6_8_13', 1, 16994)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1404, 8, 1404, 39), 'archinfo.arch.Register', 'Register', ({(1404, 17, 1404, 27): '"""vr6_8_12"""', (1404, 29, 1404, 30): '(1)', (1404, 32, 1404, 38): '(16995)'}, {}), "('vr6_8_12', 1, 16995)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1405, 8, 1405, 39), 'archinfo.arch.Register', 'Register', ({(1405, 17, 1405, 27): '"""vr6_32_2"""', (1405, 29, 1405, 30): '(4)', (1405, 32, 1405, 38): '(16996)'}, {}), "('vr6_32_2', 4, 16996)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1406, 8, 1406, 39), 'archinfo.arch.Register', 'Register', ({(1406, 17, 1406, 27): '"""vr6_16_5"""', (1406, 29, 1406, 30): '(2)', (1406, 32, 1406, 38): '(16996)'}, {}), "('vr6_16_5', 2, 16996)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1407, 8, 1407, 39), 'archinfo.arch.Register', 'Register', ({(1407, 17, 1407, 27): '"""vr6_8_11"""', (1407, 29, 1407, 30): '(1)', (1407, 32, 1407, 38): '(16996)'}, {}), "('vr6_8_11', 1, 16996)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1408, 8, 1408, 39), 'archinfo.arch.Register', 'Register', ({(1408, 17, 1408, 27): '"""vr6_8_10"""', (1408, 29, 1408, 30): '(1)', (1408, 32, 1408, 38): '(16997)'}, {}), "('vr6_8_10', 1, 16997)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1409, 8, 1409, 39), 'archinfo.arch.Register', 'Register', ({(1409, 17, 1409, 27): '"""vr6_16_4"""', (1409, 29, 1409, 30): '(2)', (1409, 32, 1409, 38): '(16998)'}, {}), "('vr6_16_4', 2, 16998)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1410, 8, 1410, 38), 'archinfo.arch.Register', 'Register', ({(1410, 17, 1410, 26): '"""vr6_8_9"""', (1410, 28, 1410, 29): '(1)', (1410, 31, 1410, 37): '(16998)'}, {}), "('vr6_8_9', 1, 16998)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1411, 8, 1411, 38), 'archinfo.arch.Register', 'Register', ({(1411, 17, 1411, 26): '"""vr6_8_8"""', (1411, 28, 1411, 29): '(1)', (1411, 31, 1411, 37): '(16999)'}, {}), "('vr6_8_8', 1, 16999)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1412, 8, 1412, 39), 'archinfo.arch.Register', 'Register', ({(1412, 17, 1412, 27): '"""vr6_64_0"""', (1412, 29, 1412, 30): '(8)', (1412, 32, 1412, 38): '(17000)'}, {}), "('vr6_64_0', 8, 17000)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1413, 8, 1413, 39), 'archinfo.arch.Register', 'Register', ({(1413, 17, 1413, 27): '"""vr6_32_1"""', (1413, 29, 1413, 30): '(4)', (1413, 32, 1413, 38): '(17000)'}, {}), "('vr6_32_1', 4, 17000)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1414, 8, 1414, 39), 'archinfo.arch.Register', 'Register', ({(1414, 17, 1414, 27): '"""vr6_16_3"""', (1414, 29, 1414, 30): '(2)', (1414, 32, 1414, 38): '(17000)'}, {}), "('vr6_16_3', 2, 17000)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1415, 8, 1415, 38), 'archinfo.arch.Register', 'Register', ({(1415, 17, 1415, 26): '"""vr6_8_7"""', (1415, 28, 1415, 29): '(1)', (1415, 31, 1415, 37): '(17000)'}, {}), "('vr6_8_7', 1, 17000)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1416, 8, 1416, 38), 'archinfo.arch.Register', 'Register', ({(1416, 17, 1416, 26): '"""vr6_8_6"""', (1416, 28, 1416, 29): '(1)', (1416, 31, 1416, 37): '(17001)'}, {}), "('vr6_8_6', 1, 17001)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1417, 8, 1417, 39), 'archinfo.arch.Register', 'Register', ({(1417, 17, 1417, 27): '"""vr6_16_2"""', (1417, 29, 1417, 30): '(2)', (1417, 32, 1417, 38): '(17002)'}, {}), "('vr6_16_2', 2, 17002)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1418, 8, 1418, 38), 'archinfo.arch.Register', 'Register', ({(1418, 17, 1418, 26): '"""vr6_8_5"""', (1418, 28, 1418, 29): '(1)', (1418, 31, 1418, 37): '(17002)'}, {}), "('vr6_8_5', 1, 17002)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1419, 8, 1419, 38), 'archinfo.arch.Register', 'Register', ({(1419, 17, 1419, 26): '"""vr6_8_4"""', (1419, 28, 1419, 29): '(1)', (1419, 31, 1419, 37): '(17003)'}, {}), "('vr6_8_4', 1, 17003)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1420, 8, 1420, 39), 'archinfo.arch.Register', 'Register', ({(1420, 17, 1420, 27): '"""vr6_32_0"""', (1420, 29, 1420, 30): '(4)', (1420, 32, 1420, 38): '(17004)'}, {}), "('vr6_32_0', 4, 17004)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1421, 8, 1421, 39), 'archinfo.arch.Register', 'Register', ({(1421, 17, 1421, 27): '"""vr6_16_1"""', (1421, 29, 1421, 30): '(2)', (1421, 32, 1421, 38): '(17004)'}, {}), "('vr6_16_1', 2, 17004)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1422, 8, 1422, 38), 'archinfo.arch.Register', 'Register', ({(1422, 17, 1422, 26): '"""vr6_8_3"""', (1422, 28, 1422, 29): '(1)', (1422, 31, 1422, 37): '(17004)'}, {}), "('vr6_8_3', 1, 17004)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1423, 8, 1423, 38), 'archinfo.arch.Register', 'Register', ({(1423, 17, 1423, 26): '"""vr6_8_2"""', (1423, 28, 1423, 29): '(1)', (1423, 31, 1423, 37): '(17005)'}, {}), "('vr6_8_2', 1, 17005)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1424, 8, 1424, 39), 'archinfo.arch.Register', 'Register', ({(1424, 17, 1424, 27): '"""vr6_16_0"""', (1424, 29, 1424, 30): '(2)', (1424, 32, 1424, 38): '(17006)'}, {}), "('vr6_16_0', 2, 17006)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1425, 8, 1425, 38), 'archinfo.arch.Register', 'Register', ({(1425, 17, 1425, 26): '"""vr6_8_1"""', (1425, 28, 1425, 29): '(1)', (1425, 31, 1425, 37): '(17006)'}, {}), "('vr6_8_1', 1, 17006)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1426, 8, 1426, 38), 'archinfo.arch.Register', 'Register', ({(1426, 17, 1426, 26): '"""vr6_8_0"""', (1426, 28, 1426, 29): '(1)', (1426, 31, 1426, 37): '(17007)'}, {}), "('vr6_8_0', 1, 17007)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1427, 8, 1427, 36), 'archinfo.arch.Register', 'Register', ({(1427, 17, 1427, 23): '"""vs39"""', (1427, 25, 1427, 27): '(16)', (1427, 29, 1427, 35): '(17008)'}, {}), "('vs39', 16, 17008)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1428, 8, 1428, 39), 'archinfo.arch.Register', 'Register', ({(1428, 17, 1428, 27): '"""vr7_64_1"""', (1428, 29, 1428, 30): '(8)', (1428, 32, 1428, 38): '(17008)'}, {}), "('vr7_64_1', 8, 17008)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1429, 8, 1429, 39), 'archinfo.arch.Register', 'Register', ({(1429, 17, 1429, 27): '"""vr7_32_3"""', (1429, 29, 1429, 30): '(4)', (1429, 32, 1429, 38): '(17008)'}, {}), "('vr7_32_3', 4, 17008)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1430, 8, 1430, 39), 'archinfo.arch.Register', 'Register', ({(1430, 17, 1430, 27): '"""vr7_16_7"""', (1430, 29, 1430, 30): '(2)', (1430, 32, 1430, 38): '(17008)'}, {}), "('vr7_16_7', 2, 17008)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1431, 8, 1431, 39), 'archinfo.arch.Register', 'Register', ({(1431, 17, 1431, 27): '"""vr7_8_15"""', (1431, 29, 1431, 30): '(1)', (1431, 32, 1431, 38): '(17008)'}, {}), "('vr7_8_15', 1, 17008)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1432, 8, 1432, 39), 'archinfo.arch.Register', 'Register', ({(1432, 17, 1432, 27): '"""vr7_8_14"""', (1432, 29, 1432, 30): '(1)', (1432, 32, 1432, 38): '(17009)'}, {}), "('vr7_8_14', 1, 17009)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1433, 8, 1433, 39), 'archinfo.arch.Register', 'Register', ({(1433, 17, 1433, 27): '"""vr7_16_6"""', (1433, 29, 1433, 30): '(2)', (1433, 32, 1433, 38): '(17010)'}, {}), "('vr7_16_6', 2, 17010)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1434, 8, 1434, 39), 'archinfo.arch.Register', 'Register', ({(1434, 17, 1434, 27): '"""vr7_8_13"""', (1434, 29, 1434, 30): '(1)', (1434, 32, 1434, 38): '(17010)'}, {}), "('vr7_8_13', 1, 17010)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1435, 8, 1435, 39), 'archinfo.arch.Register', 'Register', ({(1435, 17, 1435, 27): '"""vr7_8_12"""', (1435, 29, 1435, 30): '(1)', (1435, 32, 1435, 38): '(17011)'}, {}), "('vr7_8_12', 1, 17011)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1436, 8, 1436, 39), 'archinfo.arch.Register', 'Register', ({(1436, 17, 1436, 27): '"""vr7_32_2"""', (1436, 29, 1436, 30): '(4)', (1436, 32, 1436, 38): '(17012)'}, {}), "('vr7_32_2', 4, 17012)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1437, 8, 1437, 39), 'archinfo.arch.Register', 'Register', ({(1437, 17, 1437, 27): '"""vr7_16_5"""', (1437, 29, 1437, 30): '(2)', (1437, 32, 1437, 38): '(17012)'}, {}), "('vr7_16_5', 2, 17012)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1438, 8, 1438, 39), 'archinfo.arch.Register', 'Register', ({(1438, 17, 1438, 27): '"""vr7_8_11"""', (1438, 29, 1438, 30): '(1)', (1438, 32, 1438, 38): '(17012)'}, {}), "('vr7_8_11', 1, 17012)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1439, 8, 1439, 39), 'archinfo.arch.Register', 'Register', ({(1439, 17, 1439, 27): '"""vr7_8_10"""', (1439, 29, 1439, 30): '(1)', (1439, 32, 1439, 38): '(17013)'}, {}), "('vr7_8_10', 1, 17013)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1440, 8, 1440, 39), 'archinfo.arch.Register', 'Register', ({(1440, 17, 1440, 27): '"""vr7_16_4"""', (1440, 29, 1440, 30): '(2)', (1440, 32, 1440, 38): '(17014)'}, {}), "('vr7_16_4', 2, 17014)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1441, 8, 1441, 38), 'archinfo.arch.Register', 'Register', ({(1441, 17, 1441, 26): '"""vr7_8_9"""', (1441, 28, 1441, 29): '(1)', (1441, 31, 1441, 37): '(17014)'}, {}), "('vr7_8_9', 1, 17014)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1442, 8, 1442, 38), 'archinfo.arch.Register', 'Register', ({(1442, 17, 1442, 26): '"""vr7_8_8"""', (1442, 28, 1442, 29): '(1)', (1442, 31, 1442, 37): '(17015)'}, {}), "('vr7_8_8', 1, 17015)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1443, 8, 1443, 39), 'archinfo.arch.Register', 'Register', ({(1443, 17, 1443, 27): '"""vr7_64_0"""', (1443, 29, 1443, 30): '(8)', (1443, 32, 1443, 38): '(17016)'}, {}), "('vr7_64_0', 8, 17016)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1444, 8, 1444, 39), 'archinfo.arch.Register', 'Register', ({(1444, 17, 1444, 27): '"""vr7_32_1"""', (1444, 29, 1444, 30): '(4)', (1444, 32, 1444, 38): '(17016)'}, {}), "('vr7_32_1', 4, 17016)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1445, 8, 1445, 39), 'archinfo.arch.Register', 'Register', ({(1445, 17, 1445, 27): '"""vr7_16_3"""', (1445, 29, 1445, 30): '(2)', (1445, 32, 1445, 38): '(17016)'}, {}), "('vr7_16_3', 2, 17016)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1446, 8, 1446, 38), 'archinfo.arch.Register', 'Register', ({(1446, 17, 1446, 26): '"""vr7_8_7"""', (1446, 28, 1446, 29): '(1)', (1446, 31, 1446, 37): '(17016)'}, {}), "('vr7_8_7', 1, 17016)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1447, 8, 1447, 38), 'archinfo.arch.Register', 'Register', ({(1447, 17, 1447, 26): '"""vr7_8_6"""', (1447, 28, 1447, 29): '(1)', (1447, 31, 1447, 37): '(17017)'}, {}), "('vr7_8_6', 1, 17017)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1448, 8, 1448, 39), 'archinfo.arch.Register', 'Register', ({(1448, 17, 1448, 27): '"""vr7_16_2"""', (1448, 29, 1448, 30): '(2)', (1448, 32, 1448, 38): '(17018)'}, {}), "('vr7_16_2', 2, 17018)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1449, 8, 1449, 38), 'archinfo.arch.Register', 'Register', ({(1449, 17, 1449, 26): '"""vr7_8_5"""', (1449, 28, 1449, 29): '(1)', (1449, 31, 1449, 37): '(17018)'}, {}), "('vr7_8_5', 1, 17018)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1450, 8, 1450, 38), 'archinfo.arch.Register', 'Register', ({(1450, 17, 1450, 26): '"""vr7_8_4"""', (1450, 28, 1450, 29): '(1)', (1450, 31, 1450, 37): '(17019)'}, {}), "('vr7_8_4', 1, 17019)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1451, 8, 1451, 39), 'archinfo.arch.Register', 'Register', ({(1451, 17, 1451, 27): '"""vr7_32_0"""', (1451, 29, 1451, 30): '(4)', (1451, 32, 1451, 38): '(17020)'}, {}), "('vr7_32_0', 4, 17020)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1452, 8, 1452, 39), 'archinfo.arch.Register', 'Register', ({(1452, 17, 1452, 27): '"""vr7_16_1"""', (1452, 29, 1452, 30): '(2)', (1452, 32, 1452, 38): '(17020)'}, {}), "('vr7_16_1', 2, 17020)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1453, 8, 1453, 38), 'archinfo.arch.Register', 'Register', ({(1453, 17, 1453, 26): '"""vr7_8_3"""', (1453, 28, 1453, 29): '(1)', (1453, 31, 1453, 37): '(17020)'}, {}), "('vr7_8_3', 1, 17020)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1454, 8, 1454, 38), 'archinfo.arch.Register', 'Register', ({(1454, 17, 1454, 26): '"""vr7_8_2"""', (1454, 28, 1454, 29): '(1)', (1454, 31, 1454, 37): '(17021)'}, {}), "('vr7_8_2', 1, 17021)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1455, 8, 1455, 39), 'archinfo.arch.Register', 'Register', ({(1455, 17, 1455, 27): '"""vr7_16_0"""', (1455, 29, 1455, 30): '(2)', (1455, 32, 1455, 38): '(17022)'}, {}), "('vr7_16_0', 2, 17022)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1456, 8, 1456, 38), 'archinfo.arch.Register', 'Register', ({(1456, 17, 1456, 26): '"""vr7_8_1"""', (1456, 28, 1456, 29): '(1)', (1456, 31, 1456, 37): '(17022)'}, {}), "('vr7_8_1', 1, 17022)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1457, 8, 1457, 38), 'archinfo.arch.Register', 'Register', ({(1457, 17, 1457, 26): '"""vr7_8_0"""', (1457, 28, 1457, 29): '(1)', (1457, 31, 1457, 37): '(17023)'}, {}), "('vr7_8_0', 1, 17023)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1458, 8, 1458, 36), 'archinfo.arch.Register', 'Register', ({(1458, 17, 1458, 23): '"""vs40"""', (1458, 25, 1458, 27): '(16)', (1458, 29, 1458, 35): '(17024)'}, {}), "('vs40', 16, 17024)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1459, 8, 1459, 39), 'archinfo.arch.Register', 'Register', ({(1459, 17, 1459, 27): '"""vr8_64_1"""', (1459, 29, 1459, 30): '(8)', (1459, 32, 1459, 38): '(17024)'}, {}), "('vr8_64_1', 8, 17024)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1460, 8, 1460, 39), 'archinfo.arch.Register', 'Register', ({(1460, 17, 1460, 27): '"""vr8_32_3"""', (1460, 29, 1460, 30): '(4)', (1460, 32, 1460, 38): '(17024)'}, {}), "('vr8_32_3', 4, 17024)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1461, 8, 1461, 39), 'archinfo.arch.Register', 'Register', ({(1461, 17, 1461, 27): '"""vr8_16_7"""', (1461, 29, 1461, 30): '(2)', (1461, 32, 1461, 38): '(17024)'}, {}), "('vr8_16_7', 2, 17024)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1462, 8, 1462, 39), 'archinfo.arch.Register', 'Register', ({(1462, 17, 1462, 27): '"""vr8_8_15"""', (1462, 29, 1462, 30): '(1)', (1462, 32, 1462, 38): '(17024)'}, {}), "('vr8_8_15', 1, 17024)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1463, 8, 1463, 39), 'archinfo.arch.Register', 'Register', ({(1463, 17, 1463, 27): '"""vr8_8_14"""', (1463, 29, 1463, 30): '(1)', (1463, 32, 1463, 38): '(17025)'}, {}), "('vr8_8_14', 1, 17025)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1464, 8, 1464, 39), 'archinfo.arch.Register', 'Register', ({(1464, 17, 1464, 27): '"""vr8_16_6"""', (1464, 29, 1464, 30): '(2)', (1464, 32, 1464, 38): '(17026)'}, {}), "('vr8_16_6', 2, 17026)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1465, 8, 1465, 39), 'archinfo.arch.Register', 'Register', ({(1465, 17, 1465, 27): '"""vr8_8_13"""', (1465, 29, 1465, 30): '(1)', (1465, 32, 1465, 38): '(17026)'}, {}), "('vr8_8_13', 1, 17026)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1466, 8, 1466, 39), 'archinfo.arch.Register', 'Register', ({(1466, 17, 1466, 27): '"""vr8_8_12"""', (1466, 29, 1466, 30): '(1)', (1466, 32, 1466, 38): '(17027)'}, {}), "('vr8_8_12', 1, 17027)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1467, 8, 1467, 39), 'archinfo.arch.Register', 'Register', ({(1467, 17, 1467, 27): '"""vr8_32_2"""', (1467, 29, 1467, 30): '(4)', (1467, 32, 1467, 38): '(17028)'}, {}), "('vr8_32_2', 4, 17028)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1468, 8, 1468, 39), 'archinfo.arch.Register', 'Register', ({(1468, 17, 1468, 27): '"""vr8_16_5"""', (1468, 29, 1468, 30): '(2)', (1468, 32, 1468, 38): '(17028)'}, {}), "('vr8_16_5', 2, 17028)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1469, 8, 1469, 39), 'archinfo.arch.Register', 'Register', ({(1469, 17, 1469, 27): '"""vr8_8_11"""', (1469, 29, 1469, 30): '(1)', (1469, 32, 1469, 38): '(17028)'}, {}), "('vr8_8_11', 1, 17028)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1470, 8, 1470, 39), 'archinfo.arch.Register', 'Register', ({(1470, 17, 1470, 27): '"""vr8_8_10"""', (1470, 29, 1470, 30): '(1)', (1470, 32, 1470, 38): '(17029)'}, {}), "('vr8_8_10', 1, 17029)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1471, 8, 1471, 39), 'archinfo.arch.Register', 'Register', ({(1471, 17, 1471, 27): '"""vr8_16_4"""', (1471, 29, 1471, 30): '(2)', (1471, 32, 1471, 38): '(17030)'}, {}), "('vr8_16_4', 2, 17030)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1472, 8, 1472, 38), 'archinfo.arch.Register', 'Register', ({(1472, 17, 1472, 26): '"""vr8_8_9"""', (1472, 28, 1472, 29): '(1)', (1472, 31, 1472, 37): '(17030)'}, {}), "('vr8_8_9', 1, 17030)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1473, 8, 1473, 38), 'archinfo.arch.Register', 'Register', ({(1473, 17, 1473, 26): '"""vr8_8_8"""', (1473, 28, 1473, 29): '(1)', (1473, 31, 1473, 37): '(17031)'}, {}), "('vr8_8_8', 1, 17031)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1474, 8, 1474, 39), 'archinfo.arch.Register', 'Register', ({(1474, 17, 1474, 27): '"""vr8_64_0"""', (1474, 29, 1474, 30): '(8)', (1474, 32, 1474, 38): '(17032)'}, {}), "('vr8_64_0', 8, 17032)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1475, 8, 1475, 39), 'archinfo.arch.Register', 'Register', ({(1475, 17, 1475, 27): '"""vr8_32_1"""', (1475, 29, 1475, 30): '(4)', (1475, 32, 1475, 38): '(17032)'}, {}), "('vr8_32_1', 4, 17032)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1476, 8, 1476, 39), 'archinfo.arch.Register', 'Register', ({(1476, 17, 1476, 27): '"""vr8_16_3"""', (1476, 29, 1476, 30): '(2)', (1476, 32, 1476, 38): '(17032)'}, {}), "('vr8_16_3', 2, 17032)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1477, 8, 1477, 38), 'archinfo.arch.Register', 'Register', ({(1477, 17, 1477, 26): '"""vr8_8_7"""', (1477, 28, 1477, 29): '(1)', (1477, 31, 1477, 37): '(17032)'}, {}), "('vr8_8_7', 1, 17032)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1478, 8, 1478, 38), 'archinfo.arch.Register', 'Register', ({(1478, 17, 1478, 26): '"""vr8_8_6"""', (1478, 28, 1478, 29): '(1)', (1478, 31, 1478, 37): '(17033)'}, {}), "('vr8_8_6', 1, 17033)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1479, 8, 1479, 39), 'archinfo.arch.Register', 'Register', ({(1479, 17, 1479, 27): '"""vr8_16_2"""', (1479, 29, 1479, 30): '(2)', (1479, 32, 1479, 38): '(17034)'}, {}), "('vr8_16_2', 2, 17034)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1480, 8, 1480, 38), 'archinfo.arch.Register', 'Register', ({(1480, 17, 1480, 26): '"""vr8_8_5"""', (1480, 28, 1480, 29): '(1)', (1480, 31, 1480, 37): '(17034)'}, {}), "('vr8_8_5', 1, 17034)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1481, 8, 1481, 38), 'archinfo.arch.Register', 'Register', ({(1481, 17, 1481, 26): '"""vr8_8_4"""', (1481, 28, 1481, 29): '(1)', (1481, 31, 1481, 37): '(17035)'}, {}), "('vr8_8_4', 1, 17035)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1482, 8, 1482, 39), 'archinfo.arch.Register', 'Register', ({(1482, 17, 1482, 27): '"""vr8_32_0"""', (1482, 29, 1482, 30): '(4)', (1482, 32, 1482, 38): '(17036)'}, {}), "('vr8_32_0', 4, 17036)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1483, 8, 1483, 39), 'archinfo.arch.Register', 'Register', ({(1483, 17, 1483, 27): '"""vr8_16_1"""', (1483, 29, 1483, 30): '(2)', (1483, 32, 1483, 38): '(17036)'}, {}), "('vr8_16_1', 2, 17036)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1484, 8, 1484, 38), 'archinfo.arch.Register', 'Register', ({(1484, 17, 1484, 26): '"""vr8_8_3"""', (1484, 28, 1484, 29): '(1)', (1484, 31, 1484, 37): '(17036)'}, {}), "('vr8_8_3', 1, 17036)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1485, 8, 1485, 38), 'archinfo.arch.Register', 'Register', ({(1485, 17, 1485, 26): '"""vr8_8_2"""', (1485, 28, 1485, 29): '(1)', (1485, 31, 1485, 37): '(17037)'}, {}), "('vr8_8_2', 1, 17037)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1486, 8, 1486, 39), 'archinfo.arch.Register', 'Register', ({(1486, 17, 1486, 27): '"""vr8_16_0"""', (1486, 29, 1486, 30): '(2)', (1486, 32, 1486, 38): '(17038)'}, {}), "('vr8_16_0', 2, 17038)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1487, 8, 1487, 38), 'archinfo.arch.Register', 'Register', ({(1487, 17, 1487, 26): '"""vr8_8_1"""', (1487, 28, 1487, 29): '(1)', (1487, 31, 1487, 37): '(17038)'}, {}), "('vr8_8_1', 1, 17038)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1488, 8, 1488, 38), 'archinfo.arch.Register', 'Register', ({(1488, 17, 1488, 26): '"""vr8_8_0"""', (1488, 28, 1488, 29): '(1)', (1488, 31, 1488, 37): '(17039)'}, {}), "('vr8_8_0', 1, 17039)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1489, 8, 1489, 36), 'archinfo.arch.Register', 'Register', ({(1489, 17, 1489, 23): '"""vs41"""', (1489, 25, 1489, 27): '(16)', (1489, 29, 1489, 35): '(17040)'}, {}), "('vs41', 16, 17040)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1490, 8, 1490, 39), 'archinfo.arch.Register', 'Register', ({(1490, 17, 1490, 27): '"""vr9_64_1"""', (1490, 29, 1490, 30): '(8)', (1490, 32, 1490, 38): '(17040)'}, {}), "('vr9_64_1', 8, 17040)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1491, 8, 1491, 39), 'archinfo.arch.Register', 'Register', ({(1491, 17, 1491, 27): '"""vr9_32_3"""', (1491, 29, 1491, 30): '(4)', (1491, 32, 1491, 38): '(17040)'}, {}), "('vr9_32_3', 4, 17040)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1492, 8, 1492, 39), 'archinfo.arch.Register', 'Register', ({(1492, 17, 1492, 27): '"""vr9_16_7"""', (1492, 29, 1492, 30): '(2)', (1492, 32, 1492, 38): '(17040)'}, {}), "('vr9_16_7', 2, 17040)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1493, 8, 1493, 39), 'archinfo.arch.Register', 'Register', ({(1493, 17, 1493, 27): '"""vr9_8_15"""', (1493, 29, 1493, 30): '(1)', (1493, 32, 1493, 38): '(17040)'}, {}), "('vr9_8_15', 1, 17040)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1494, 8, 1494, 39), 'archinfo.arch.Register', 'Register', ({(1494, 17, 1494, 27): '"""vr9_8_14"""', (1494, 29, 1494, 30): '(1)', (1494, 32, 1494, 38): '(17041)'}, {}), "('vr9_8_14', 1, 17041)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1495, 8, 1495, 39), 'archinfo.arch.Register', 'Register', ({(1495, 17, 1495, 27): '"""vr9_16_6"""', (1495, 29, 1495, 30): '(2)', (1495, 32, 1495, 38): '(17042)'}, {}), "('vr9_16_6', 2, 17042)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1496, 8, 1496, 39), 'archinfo.arch.Register', 'Register', ({(1496, 17, 1496, 27): '"""vr9_8_13"""', (1496, 29, 1496, 30): '(1)', (1496, 32, 1496, 38): '(17042)'}, {}), "('vr9_8_13', 1, 17042)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1497, 8, 1497, 39), 'archinfo.arch.Register', 'Register', ({(1497, 17, 1497, 27): '"""vr9_8_12"""', (1497, 29, 1497, 30): '(1)', (1497, 32, 1497, 38): '(17043)'}, {}), "('vr9_8_12', 1, 17043)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1498, 8, 1498, 39), 'archinfo.arch.Register', 'Register', ({(1498, 17, 1498, 27): '"""vr9_32_2"""', (1498, 29, 1498, 30): '(4)', (1498, 32, 1498, 38): '(17044)'}, {}), "('vr9_32_2', 4, 17044)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1499, 8, 1499, 39), 'archinfo.arch.Register', 'Register', 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Register\n'), ((1503, 8, 1503, 38), 'archinfo.arch.Register', 'Register', ({(1503, 17, 1503, 26): '"""vr9_8_9"""', (1503, 28, 1503, 29): '(1)', (1503, 31, 1503, 37): '(17046)'}, {}), "('vr9_8_9', 1, 17046)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1504, 8, 1504, 38), 'archinfo.arch.Register', 'Register', ({(1504, 17, 1504, 26): '"""vr9_8_8"""', (1504, 28, 1504, 29): '(1)', (1504, 31, 1504, 37): '(17047)'}, {}), "('vr9_8_8', 1, 17047)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1505, 8, 1505, 39), 'archinfo.arch.Register', 'Register', ({(1505, 17, 1505, 27): '"""vr9_64_0"""', (1505, 29, 1505, 30): '(8)', (1505, 32, 1505, 38): '(17048)'}, {}), "('vr9_64_0', 8, 17048)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1506, 8, 1506, 39), 'archinfo.arch.Register', 'Register', ({(1506, 17, 1506, 27): '"""vr9_32_1"""', (1506, 29, 1506, 30): '(4)', (1506, 32, 1506, 38): '(17048)'}, {}), "('vr9_32_1', 4, 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30): '(2)', (1510, 32, 1510, 38): '(17050)'}, {}), "('vr9_16_2', 2, 17050)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1511, 8, 1511, 38), 'archinfo.arch.Register', 'Register', ({(1511, 17, 1511, 26): '"""vr9_8_5"""', (1511, 28, 1511, 29): '(1)', (1511, 31, 1511, 37): '(17050)'}, {}), "('vr9_8_5', 1, 17050)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1512, 8, 1512, 38), 'archinfo.arch.Register', 'Register', ({(1512, 17, 1512, 26): '"""vr9_8_4"""', (1512, 28, 1512, 29): '(1)', (1512, 31, 1512, 37): '(17051)'}, {}), "('vr9_8_4', 1, 17051)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1513, 8, 1513, 39), 'archinfo.arch.Register', 'Register', ({(1513, 17, 1513, 27): '"""vr9_32_0"""', (1513, 29, 1513, 30): '(4)', (1513, 32, 1513, 38): '(17052)'}, {}), "('vr9_32_0', 4, 17052)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1514, 8, 1514, 39), 'archinfo.arch.Register', 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Endness, Register\n'), ((1518, 8, 1518, 38), 'archinfo.arch.Register', 'Register', ({(1518, 17, 1518, 26): '"""vr9_8_1"""', (1518, 28, 1518, 29): '(1)', (1518, 31, 1518, 37): '(17054)'}, {}), "('vr9_8_1', 1, 17054)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1519, 8, 1519, 38), 'archinfo.arch.Register', 'Register', ({(1519, 17, 1519, 26): '"""vr9_8_0"""', (1519, 28, 1519, 29): '(1)', (1519, 31, 1519, 37): '(17055)'}, {}), "('vr9_8_0', 1, 17055)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1520, 8, 1520, 36), 'archinfo.arch.Register', 'Register', ({(1520, 17, 1520, 23): '"""vs42"""', (1520, 25, 1520, 27): '(16)', (1520, 29, 1520, 35): '(17056)'}, {}), "('vs42', 16, 17056)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1521, 8, 1521, 40), 'archinfo.arch.Register', 'Register', ({(1521, 17, 1521, 28): '"""vr10_64_1"""', (1521, 30, 1521, 31): '(8)', (1521, 33, 1521, 39): '(17056)'}, {}), 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((1529, 8, 1529, 40), 'archinfo.arch.Register', 'Register', ({(1529, 17, 1529, 28): '"""vr10_32_2"""', (1529, 30, 1529, 31): '(4)', (1529, 33, 1529, 39): '(17060)'}, {}), "('vr10_32_2', 4, 17060)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1530, 8, 1530, 40), 'archinfo.arch.Register', 'Register', ({(1530, 17, 1530, 28): '"""vr10_16_5"""', (1530, 30, 1530, 31): '(2)', (1530, 33, 1530, 39): '(17060)'}, {}), "('vr10_16_5', 2, 17060)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1531, 8, 1531, 40), 'archinfo.arch.Register', 'Register', ({(1531, 17, 1531, 28): '"""vr10_8_11"""', (1531, 30, 1531, 31): '(1)', (1531, 33, 1531, 39): '(17060)'}, {}), "('vr10_8_11', 1, 17060)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1532, 8, 1532, 40), 'archinfo.arch.Register', 'Register', ({(1532, 17, 1532, 28): '"""vr10_8_10"""', (1532, 30, 1532, 31): '(1)', (1532, 33, 1532, 39): '(17061)'}, {}), "('vr10_8_10', 1, 17061)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1533, 8, 1533, 40), 'archinfo.arch.Register', 'Register', ({(1533, 17, 1533, 28): '"""vr10_16_4"""', (1533, 30, 1533, 31): '(2)', (1533, 33, 1533, 39): '(17062)'}, {}), "('vr10_16_4', 2, 17062)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1534, 8, 1534, 39), 'archinfo.arch.Register', 'Register', ({(1534, 17, 1534, 27): '"""vr10_8_9"""', (1534, 29, 1534, 30): '(1)', (1534, 32, 1534, 38): '(17062)'}, {}), "('vr10_8_9', 1, 17062)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1535, 8, 1535, 39), 'archinfo.arch.Register', 'Register', ({(1535, 17, 1535, 27): '"""vr10_8_8"""', (1535, 29, 1535, 30): '(1)', (1535, 32, 1535, 38): '(17063)'}, {}), "('vr10_8_8', 1, 17063)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1536, 8, 1536, 40), 'archinfo.arch.Register', 'Register', ({(1536, 17, 1536, 28): '"""vr10_64_0"""', (1536, 30, 1536, 31): '(8)', (1536, 33, 1536, 39): '(17064)'}, {}), "('vr10_64_0', 8, 17064)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1537, 8, 1537, 40), 'archinfo.arch.Register', 'Register', ({(1537, 17, 1537, 28): '"""vr10_32_1"""', (1537, 30, 1537, 31): '(4)', (1537, 33, 1537, 39): '(17064)'}, {}), "('vr10_32_1', 4, 17064)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1538, 8, 1538, 40), 'archinfo.arch.Register', 'Register', ({(1538, 17, 1538, 28): '"""vr10_16_3"""', (1538, 30, 1538, 31): '(2)', (1538, 33, 1538, 39): '(17064)'}, {}), "('vr10_16_3', 2, 17064)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1539, 8, 1539, 39), 'archinfo.arch.Register', 'Register', ({(1539, 17, 1539, 27): '"""vr10_8_7"""', (1539, 29, 1539, 30): '(1)', (1539, 32, 1539, 38): '(17064)'}, {}), "('vr10_8_7', 1, 17064)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1540, 8, 1540, 39), 'archinfo.arch.Register', 'Register', ({(1540, 17, 1540, 27): '"""vr10_8_6"""', (1540, 29, 1540, 30): '(1)', (1540, 32, 1540, 38): '(17065)'}, {}), "('vr10_8_6', 1, 17065)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1541, 8, 1541, 40), 'archinfo.arch.Register', 'Register', ({(1541, 17, 1541, 28): '"""vr10_16_2"""', (1541, 30, 1541, 31): '(2)', (1541, 33, 1541, 39): '(17066)'}, {}), "('vr10_16_2', 2, 17066)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1542, 8, 1542, 39), 'archinfo.arch.Register', 'Register', ({(1542, 17, 1542, 27): '"""vr10_8_5"""', (1542, 29, 1542, 30): '(1)', (1542, 32, 1542, 38): '(17066)'}, {}), "('vr10_8_5', 1, 17066)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1543, 8, 1543, 39), 'archinfo.arch.Register', 'Register', ({(1543, 17, 1543, 27): '"""vr10_8_4"""', (1543, 29, 1543, 30): '(1)', (1543, 32, 1543, 38): '(17067)'}, {}), "('vr10_8_4', 1, 17067)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1544, 8, 1544, 40), 'archinfo.arch.Register', 'Register', ({(1544, 17, 1544, 28): '"""vr10_32_0"""', (1544, 30, 1544, 31): '(4)', (1544, 33, 1544, 39): '(17068)'}, {}), "('vr10_32_0', 4, 17068)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1545, 8, 1545, 40), 'archinfo.arch.Register', 'Register', ({(1545, 17, 1545, 28): '"""vr10_16_1"""', (1545, 30, 1545, 31): '(2)', (1545, 33, 1545, 39): '(17068)'}, {}), "('vr10_16_1', 2, 17068)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1546, 8, 1546, 39), 'archinfo.arch.Register', 'Register', ({(1546, 17, 1546, 27): '"""vr10_8_3"""', (1546, 29, 1546, 30): '(1)', (1546, 32, 1546, 38): '(17068)'}, {}), "('vr10_8_3', 1, 17068)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1547, 8, 1547, 39), 'archinfo.arch.Register', 'Register', ({(1547, 17, 1547, 27): '"""vr10_8_2"""', (1547, 29, 1547, 30): '(1)', (1547, 32, 1547, 38): '(17069)'}, {}), "('vr10_8_2', 1, 17069)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1548, 8, 1548, 40), 'archinfo.arch.Register', 'Register', ({(1548, 17, 1548, 28): '"""vr10_16_0"""', (1548, 30, 1548, 31): '(2)', (1548, 33, 1548, 39): '(17070)'}, {}), "('vr10_16_0', 2, 17070)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1549, 8, 1549, 39), 'archinfo.arch.Register', 'Register', ({(1549, 17, 1549, 27): '"""vr10_8_1"""', (1549, 29, 1549, 30): '(1)', (1549, 32, 1549, 38): '(17070)'}, {}), "('vr10_8_1', 1, 17070)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1550, 8, 1550, 39), 'archinfo.arch.Register', 'Register', ({(1550, 17, 1550, 27): '"""vr10_8_0"""', (1550, 29, 1550, 30): '(1)', (1550, 32, 1550, 38): '(17071)'}, {}), "('vr10_8_0', 1, 17071)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1551, 8, 1551, 36), 'archinfo.arch.Register', 'Register', ({(1551, 17, 1551, 23): '"""vs43"""', (1551, 25, 1551, 27): '(16)', (1551, 29, 1551, 35): '(17072)'}, {}), "('vs43', 16, 17072)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1552, 8, 1552, 40), 'archinfo.arch.Register', 'Register', ({(1552, 17, 1552, 28): '"""vr11_64_1"""', (1552, 30, 1552, 31): '(8)', (1552, 33, 1552, 39): '(17072)'}, {}), "('vr11_64_1', 8, 17072)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1553, 8, 1553, 40), 'archinfo.arch.Register', 'Register', ({(1553, 17, 1553, 28): '"""vr11_32_3"""', (1553, 30, 1553, 31): '(4)', (1553, 33, 1553, 39): '(17072)'}, {}), "('vr11_32_3', 4, 17072)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1554, 8, 1554, 40), 'archinfo.arch.Register', 'Register', ({(1554, 17, 1554, 28): '"""vr11_16_7"""', (1554, 30, 1554, 31): '(2)', (1554, 33, 1554, 39): '(17072)'}, {}), "('vr11_16_7', 2, 17072)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1555, 8, 1555, 40), 'archinfo.arch.Register', 'Register', ({(1555, 17, 1555, 28): '"""vr11_8_15"""', (1555, 30, 1555, 31): '(1)', (1555, 33, 1555, 39): '(17072)'}, {}), "('vr11_8_15', 1, 17072)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1556, 8, 1556, 40), 'archinfo.arch.Register', 'Register', ({(1556, 17, 1556, 28): '"""vr11_8_14"""', (1556, 30, 1556, 31): '(1)', (1556, 33, 1556, 39): '(17073)'}, {}), "('vr11_8_14', 1, 17073)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1557, 8, 1557, 40), 'archinfo.arch.Register', 'Register', ({(1557, 17, 1557, 28): '"""vr11_16_6"""', (1557, 30, 1557, 31): '(2)', (1557, 33, 1557, 39): '(17074)'}, {}), "('vr11_16_6', 2, 17074)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1558, 8, 1558, 40), 'archinfo.arch.Register', 'Register', ({(1558, 17, 1558, 28): '"""vr11_8_13"""', (1558, 30, 1558, 31): '(1)', (1558, 33, 1558, 39): '(17074)'}, {}), "('vr11_8_13', 1, 17074)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1559, 8, 1559, 40), 'archinfo.arch.Register', 'Register', ({(1559, 17, 1559, 28): '"""vr11_8_12"""', (1559, 30, 1559, 31): '(1)', (1559, 33, 1559, 39): '(17075)'}, {}), "('vr11_8_12', 1, 17075)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1560, 8, 1560, 40), 'archinfo.arch.Register', 'Register', ({(1560, 17, 1560, 28): '"""vr11_32_2"""', (1560, 30, 1560, 31): '(4)', (1560, 33, 1560, 39): '(17076)'}, {}), "('vr11_32_2', 4, 17076)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1561, 8, 1561, 40), 'archinfo.arch.Register', 'Register', ({(1561, 17, 1561, 28): '"""vr11_16_5"""', (1561, 30, 1561, 31): '(2)', (1561, 33, 1561, 39): '(17076)'}, {}), "('vr11_16_5', 2, 17076)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1562, 8, 1562, 40), 'archinfo.arch.Register', 'Register', ({(1562, 17, 1562, 28): '"""vr11_8_11"""', (1562, 30, 1562, 31): '(1)', (1562, 33, 1562, 39): '(17076)'}, {}), "('vr11_8_11', 1, 17076)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1563, 8, 1563, 40), 'archinfo.arch.Register', 'Register', ({(1563, 17, 1563, 28): '"""vr11_8_10"""', (1563, 30, 1563, 31): '(1)', (1563, 33, 1563, 39): '(17077)'}, {}), "('vr11_8_10', 1, 17077)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1564, 8, 1564, 40), 'archinfo.arch.Register', 'Register', ({(1564, 17, 1564, 28): '"""vr11_16_4"""', (1564, 30, 1564, 31): '(2)', (1564, 33, 1564, 39): '(17078)'}, {}), "('vr11_16_4', 2, 17078)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1565, 8, 1565, 39), 'archinfo.arch.Register', 'Register', ({(1565, 17, 1565, 27): '"""vr11_8_9"""', (1565, 29, 1565, 30): '(1)', (1565, 32, 1565, 38): '(17078)'}, {}), "('vr11_8_9', 1, 17078)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1566, 8, 1566, 39), 'archinfo.arch.Register', 'Register', ({(1566, 17, 1566, 27): '"""vr11_8_8"""', (1566, 29, 1566, 30): '(1)', (1566, 32, 1566, 38): '(17079)'}, {}), "('vr11_8_8', 1, 17079)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1567, 8, 1567, 40), 'archinfo.arch.Register', 'Register', ({(1567, 17, 1567, 28): '"""vr11_64_0"""', (1567, 30, 1567, 31): '(8)', (1567, 33, 1567, 39): '(17080)'}, {}), "('vr11_64_0', 8, 17080)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1568, 8, 1568, 40), 'archinfo.arch.Register', 'Register', ({(1568, 17, 1568, 28): '"""vr11_32_1"""', (1568, 30, 1568, 31): '(4)', (1568, 33, 1568, 39): '(17080)'}, {}), "('vr11_32_1', 4, 17080)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1569, 8, 1569, 40), 'archinfo.arch.Register', 'Register', ({(1569, 17, 1569, 28): '"""vr11_16_3"""', (1569, 30, 1569, 31): '(2)', (1569, 33, 1569, 39): '(17080)'}, {}), "('vr11_16_3', 2, 17080)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1570, 8, 1570, 39), 'archinfo.arch.Register', 'Register', ({(1570, 17, 1570, 27): '"""vr11_8_7"""', (1570, 29, 1570, 30): '(1)', (1570, 32, 1570, 38): '(17080)'}, {}), "('vr11_8_7', 1, 17080)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1571, 8, 1571, 39), 'archinfo.arch.Register', 'Register', ({(1571, 17, 1571, 27): '"""vr11_8_6"""', (1571, 29, 1571, 30): '(1)', (1571, 32, 1571, 38): '(17081)'}, {}), "('vr11_8_6', 1, 17081)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1572, 8, 1572, 40), 'archinfo.arch.Register', 'Register', ({(1572, 17, 1572, 28): '"""vr11_16_2"""', (1572, 30, 1572, 31): '(2)', (1572, 33, 1572, 39): '(17082)'}, {}), "('vr11_16_2', 2, 17082)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1573, 8, 1573, 39), 'archinfo.arch.Register', 'Register', ({(1573, 17, 1573, 27): '"""vr11_8_5"""', (1573, 29, 1573, 30): '(1)', (1573, 32, 1573, 38): '(17082)'}, {}), "('vr11_8_5', 1, 17082)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1574, 8, 1574, 39), 'archinfo.arch.Register', 'Register', ({(1574, 17, 1574, 27): '"""vr11_8_4"""', (1574, 29, 1574, 30): '(1)', (1574, 32, 1574, 38): '(17083)'}, {}), "('vr11_8_4', 1, 17083)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1575, 8, 1575, 40), 'archinfo.arch.Register', 'Register', ({(1575, 17, 1575, 28): '"""vr11_32_0"""', (1575, 30, 1575, 31): '(4)', (1575, 33, 1575, 39): '(17084)'}, {}), "('vr11_32_0', 4, 17084)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1576, 8, 1576, 40), 'archinfo.arch.Register', 'Register', ({(1576, 17, 1576, 28): '"""vr11_16_1"""', (1576, 30, 1576, 31): '(2)', (1576, 33, 1576, 39): '(17084)'}, {}), "('vr11_16_1', 2, 17084)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1577, 8, 1577, 39), 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archinfo.arch import register_arch, Endness, Register\n'), ((1581, 8, 1581, 39), 'archinfo.arch.Register', 'Register', ({(1581, 17, 1581, 27): '"""vr11_8_0"""', (1581, 29, 1581, 30): '(1)', (1581, 32, 1581, 38): '(17087)'}, {}), "('vr11_8_0', 1, 17087)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1582, 8, 1582, 36), 'archinfo.arch.Register', 'Register', ({(1582, 17, 1582, 23): '"""vs44"""', (1582, 25, 1582, 27): '(16)', (1582, 29, 1582, 35): '(17088)'}, {}), "('vs44', 16, 17088)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1583, 8, 1583, 40), 'archinfo.arch.Register', 'Register', ({(1583, 17, 1583, 28): '"""vr12_64_1"""', (1583, 30, 1583, 31): '(8)', (1583, 33, 1583, 39): '(17088)'}, {}), "('vr12_64_1', 8, 17088)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1584, 8, 1584, 40), 'archinfo.arch.Register', 'Register', ({(1584, 17, 1584, 28): '"""vr12_32_3"""', (1584, 30, 1584, 31): '(4)', (1584, 33, 1584, 39): '(17088)'}, {}), "('vr12_32_3', 4, 17088)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1585, 8, 1585, 40), 'archinfo.arch.Register', 'Register', ({(1585, 17, 1585, 28): '"""vr12_16_7"""', (1585, 30, 1585, 31): '(2)', (1585, 33, 1585, 39): '(17088)'}, {}), "('vr12_16_7', 2, 17088)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1586, 8, 1586, 40), 'archinfo.arch.Register', 'Register', ({(1586, 17, 1586, 28): '"""vr12_8_15"""', (1586, 30, 1586, 31): '(1)', (1586, 33, 1586, 39): '(17088)'}, {}), "('vr12_8_15', 1, 17088)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1587, 8, 1587, 40), 'archinfo.arch.Register', 'Register', ({(1587, 17, 1587, 28): '"""vr12_8_14"""', (1587, 30, 1587, 31): '(1)', (1587, 33, 1587, 39): '(17089)'}, {}), "('vr12_8_14', 1, 17089)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1588, 8, 1588, 40), 'archinfo.arch.Register', 'Register', ({(1588, 17, 1588, 28): '"""vr12_16_6"""', (1588, 30, 1588, 31): '(2)', (1588, 33, 1588, 39): '(17090)'}, {}), "('vr12_16_6', 2, 17090)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1589, 8, 1589, 40), 'archinfo.arch.Register', 'Register', ({(1589, 17, 1589, 28): '"""vr12_8_13"""', (1589, 30, 1589, 31): '(1)', (1589, 33, 1589, 39): '(17090)'}, {}), "('vr12_8_13', 1, 17090)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1590, 8, 1590, 40), 'archinfo.arch.Register', 'Register', ({(1590, 17, 1590, 28): '"""vr12_8_12"""', (1590, 30, 1590, 31): '(1)', (1590, 33, 1590, 39): '(17091)'}, {}), "('vr12_8_12', 1, 17091)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1591, 8, 1591, 40), 'archinfo.arch.Register', 'Register', ({(1591, 17, 1591, 28): '"""vr12_32_2"""', (1591, 30, 1591, 31): '(4)', (1591, 33, 1591, 39): '(17092)'}, {}), "('vr12_32_2', 4, 17092)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1592, 8, 1592, 40), 'archinfo.arch.Register', 'Register', ({(1592, 17, 1592, 28): '"""vr12_16_5"""', (1592, 30, 1592, 31): '(2)', (1592, 33, 1592, 39): '(17092)'}, {}), "('vr12_16_5', 2, 17092)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1593, 8, 1593, 40), 'archinfo.arch.Register', 'Register', ({(1593, 17, 1593, 28): '"""vr12_8_11"""', (1593, 30, 1593, 31): '(1)', (1593, 33, 1593, 39): '(17092)'}, {}), "('vr12_8_11', 1, 17092)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1594, 8, 1594, 40), 'archinfo.arch.Register', 'Register', ({(1594, 17, 1594, 28): '"""vr12_8_10"""', (1594, 30, 1594, 31): '(1)', (1594, 33, 1594, 39): '(17093)'}, {}), "('vr12_8_10', 1, 17093)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1595, 8, 1595, 40), 'archinfo.arch.Register', 'Register', ({(1595, 17, 1595, 28): '"""vr12_16_4"""', (1595, 30, 1595, 31): '(2)', (1595, 33, 1595, 39): '(17094)'}, {}), "('vr12_16_4', 2, 17094)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1596, 8, 1596, 39), 'archinfo.arch.Register', 'Register', ({(1596, 17, 1596, 27): '"""vr12_8_9"""', (1596, 29, 1596, 30): '(1)', (1596, 32, 1596, 38): '(17094)'}, {}), "('vr12_8_9', 1, 17094)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1597, 8, 1597, 39), 'archinfo.arch.Register', 'Register', ({(1597, 17, 1597, 27): '"""vr12_8_8"""', (1597, 29, 1597, 30): '(1)', (1597, 32, 1597, 38): '(17095)'}, {}), "('vr12_8_8', 1, 17095)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1598, 8, 1598, 40), 'archinfo.arch.Register', 'Register', ({(1598, 17, 1598, 28): '"""vr12_64_0"""', (1598, 30, 1598, 31): '(8)', (1598, 33, 1598, 39): '(17096)'}, {}), "('vr12_64_0', 8, 17096)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1599, 8, 1599, 40), 'archinfo.arch.Register', 'Register', ({(1599, 17, 1599, 28): '"""vr12_32_1"""', (1599, 30, 1599, 31): '(4)', (1599, 33, 1599, 39): '(17096)'}, {}), "('vr12_32_1', 4, 17096)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1600, 8, 1600, 40), 'archinfo.arch.Register', 'Register', ({(1600, 17, 1600, 28): '"""vr12_16_3"""', (1600, 30, 1600, 31): '(2)', (1600, 33, 1600, 39): '(17096)'}, {}), "('vr12_16_3', 2, 17096)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1601, 8, 1601, 39), 'archinfo.arch.Register', 'Register', ({(1601, 17, 1601, 27): '"""vr12_8_7"""', (1601, 29, 1601, 30): '(1)', (1601, 32, 1601, 38): '(17096)'}, {}), "('vr12_8_7', 1, 17096)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1602, 8, 1602, 39), 'archinfo.arch.Register', 'Register', ({(1602, 17, 1602, 27): '"""vr12_8_6"""', (1602, 29, 1602, 30): '(1)', (1602, 32, 1602, 38): '(17097)'}, {}), "('vr12_8_6', 1, 17097)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1603, 8, 1603, 40), 'archinfo.arch.Register', 'Register', ({(1603, 17, 1603, 28): '"""vr12_16_2"""', (1603, 30, 1603, 31): '(2)', (1603, 33, 1603, 39): '(17098)'}, {}), "('vr12_16_2', 2, 17098)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1604, 8, 1604, 39), 'archinfo.arch.Register', 'Register', ({(1604, 17, 1604, 27): '"""vr12_8_5"""', (1604, 29, 1604, 30): '(1)', (1604, 32, 1604, 38): '(17098)'}, {}), "('vr12_8_5', 1, 17098)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1605, 8, 1605, 39), 'archinfo.arch.Register', 'Register', ({(1605, 17, 1605, 27): '"""vr12_8_4"""', (1605, 29, 1605, 30): '(1)', (1605, 32, 1605, 38): '(17099)'}, {}), "('vr12_8_4', 1, 17099)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1606, 8, 1606, 40), 'archinfo.arch.Register', 'Register', ({(1606, 17, 1606, 28): '"""vr12_32_0"""', (1606, 30, 1606, 31): '(4)', (1606, 33, 1606, 39): '(17100)'}, {}), "('vr12_32_0', 4, 17100)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1607, 8, 1607, 40), 'archinfo.arch.Register', 'Register', ({(1607, 17, 1607, 28): '"""vr12_16_1"""', (1607, 30, 1607, 31): '(2)', (1607, 33, 1607, 39): '(17100)'}, {}), "('vr12_16_1', 2, 17100)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1608, 8, 1608, 39), 'archinfo.arch.Register', 'Register', ({(1608, 17, 1608, 27): '"""vr12_8_3"""', (1608, 29, 1608, 30): '(1)', (1608, 32, 1608, 38): '(17100)'}, {}), "('vr12_8_3', 1, 17100)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1609, 8, 1609, 39), 'archinfo.arch.Register', 'Register', ({(1609, 17, 1609, 27): '"""vr12_8_2"""', (1609, 29, 1609, 30): '(1)', (1609, 32, 1609, 38): '(17101)'}, {}), "('vr12_8_2', 1, 17101)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1610, 8, 1610, 40), 'archinfo.arch.Register', 'Register', ({(1610, 17, 1610, 28): '"""vr12_16_0"""', (1610, 30, 1610, 31): '(2)', (1610, 33, 1610, 39): '(17102)'}, {}), "('vr12_16_0', 2, 17102)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1611, 8, 1611, 39), 'archinfo.arch.Register', 'Register', ({(1611, 17, 1611, 27): '"""vr12_8_1"""', (1611, 29, 1611, 30): '(1)', (1611, 32, 1611, 38): '(17102)'}, {}), "('vr12_8_1', 1, 17102)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1612, 8, 1612, 39), 'archinfo.arch.Register', 'Register', ({(1612, 17, 1612, 27): '"""vr12_8_0"""', (1612, 29, 1612, 30): '(1)', (1612, 32, 1612, 38): '(17103)'}, {}), "('vr12_8_0', 1, 17103)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1613, 8, 1613, 36), 'archinfo.arch.Register', 'Register', ({(1613, 17, 1613, 23): '"""vs45"""', (1613, 25, 1613, 27): '(16)', (1613, 29, 1613, 35): '(17104)'}, {}), "('vs45', 16, 17104)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1614, 8, 1614, 40), 'archinfo.arch.Register', 'Register', ({(1614, 17, 1614, 28): '"""vr13_64_1"""', (1614, 30, 1614, 31): '(8)', (1614, 33, 1614, 39): '(17104)'}, {}), "('vr13_64_1', 8, 17104)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1615, 8, 1615, 40), 'archinfo.arch.Register', 'Register', ({(1615, 17, 1615, 28): '"""vr13_32_3"""', (1615, 30, 1615, 31): '(4)', (1615, 33, 1615, 39): '(17104)'}, {}), "('vr13_32_3', 4, 17104)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1616, 8, 1616, 40), 'archinfo.arch.Register', 'Register', ({(1616, 17, 1616, 28): '"""vr13_16_7"""', (1616, 30, 1616, 31): '(2)', (1616, 33, 1616, 39): '(17104)'}, {}), "('vr13_16_7', 2, 17104)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1617, 8, 1617, 40), 'archinfo.arch.Register', 'Register', ({(1617, 17, 1617, 28): '"""vr13_8_15"""', (1617, 30, 1617, 31): '(1)', (1617, 33, 1617, 39): '(17104)'}, {}), "('vr13_8_15', 1, 17104)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1618, 8, 1618, 40), 'archinfo.arch.Register', 'Register', ({(1618, 17, 1618, 28): '"""vr13_8_14"""', (1618, 30, 1618, 31): '(1)', (1618, 33, 1618, 39): '(17105)'}, {}), "('vr13_8_14', 1, 17105)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1619, 8, 1619, 40), 'archinfo.arch.Register', 'Register', ({(1619, 17, 1619, 28): '"""vr13_16_6"""', (1619, 30, 1619, 31): '(2)', (1619, 33, 1619, 39): '(17106)'}, {}), "('vr13_16_6', 2, 17106)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1620, 8, 1620, 40), 'archinfo.arch.Register', 'Register', ({(1620, 17, 1620, 28): '"""vr13_8_13"""', (1620, 30, 1620, 31): '(1)', (1620, 33, 1620, 39): '(17106)'}, {}), "('vr13_8_13', 1, 17106)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1621, 8, 1621, 40), 'archinfo.arch.Register', 'Register', ({(1621, 17, 1621, 28): '"""vr13_8_12"""', (1621, 30, 1621, 31): '(1)', (1621, 33, 1621, 39): '(17107)'}, {}), "('vr13_8_12', 1, 17107)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1622, 8, 1622, 40), 'archinfo.arch.Register', 'Register', ({(1622, 17, 1622, 28): '"""vr13_32_2"""', (1622, 30, 1622, 31): '(4)', (1622, 33, 1622, 39): '(17108)'}, {}), "('vr13_32_2', 4, 17108)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1623, 8, 1623, 40), 'archinfo.arch.Register', 'Register', ({(1623, 17, 1623, 28): '"""vr13_16_5"""', (1623, 30, 1623, 31): '(2)', (1623, 33, 1623, 39): '(17108)'}, {}), "('vr13_16_5', 2, 17108)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1624, 8, 1624, 40), 'archinfo.arch.Register', 'Register', ({(1624, 17, 1624, 28): '"""vr13_8_11"""', (1624, 30, 1624, 31): '(1)', (1624, 33, 1624, 39): '(17108)'}, {}), "('vr13_8_11', 1, 17108)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1625, 8, 1625, 40), 'archinfo.arch.Register', 'Register', ({(1625, 17, 1625, 28): '"""vr13_8_10"""', (1625, 30, 1625, 31): '(1)', (1625, 33, 1625, 39): '(17109)'}, {}), "('vr13_8_10', 1, 17109)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1626, 8, 1626, 40), 'archinfo.arch.Register', 'Register', ({(1626, 17, 1626, 28): '"""vr13_16_4"""', (1626, 30, 1626, 31): '(2)', (1626, 33, 1626, 39): '(17110)'}, {}), "('vr13_16_4', 2, 17110)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1627, 8, 1627, 39), 'archinfo.arch.Register', 'Register', ({(1627, 17, 1627, 27): '"""vr13_8_9"""', (1627, 29, 1627, 30): '(1)', (1627, 32, 1627, 38): '(17110)'}, {}), "('vr13_8_9', 1, 17110)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1628, 8, 1628, 39), 'archinfo.arch.Register', 'Register', ({(1628, 17, 1628, 27): '"""vr13_8_8"""', (1628, 29, 1628, 30): '(1)', (1628, 32, 1628, 38): '(17111)'}, {}), "('vr13_8_8', 1, 17111)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1629, 8, 1629, 40), 'archinfo.arch.Register', 'Register', ({(1629, 17, 1629, 28): '"""vr13_64_0"""', (1629, 30, 1629, 31): '(8)', (1629, 33, 1629, 39): '(17112)'}, {}), "('vr13_64_0', 8, 17112)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1630, 8, 1630, 40), 'archinfo.arch.Register', 'Register', ({(1630, 17, 1630, 28): '"""vr13_32_1"""', (1630, 30, 1630, 31): '(4)', (1630, 33, 1630, 39): '(17112)'}, {}), "('vr13_32_1', 4, 17112)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1631, 8, 1631, 40), 'archinfo.arch.Register', 'Register', ({(1631, 17, 1631, 28): '"""vr13_16_3"""', (1631, 30, 1631, 31): '(2)', (1631, 33, 1631, 39): '(17112)'}, {}), "('vr13_16_3', 2, 17112)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1632, 8, 1632, 39), 'archinfo.arch.Register', 'Register', ({(1632, 17, 1632, 27): '"""vr13_8_7"""', (1632, 29, 1632, 30): '(1)', (1632, 32, 1632, 38): '(17112)'}, {}), "('vr13_8_7', 1, 17112)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1633, 8, 1633, 39), 'archinfo.arch.Register', 'Register', ({(1633, 17, 1633, 27): '"""vr13_8_6"""', (1633, 29, 1633, 30): '(1)', (1633, 32, 1633, 38): '(17113)'}, {}), "('vr13_8_6', 1, 17113)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1634, 8, 1634, 40), 'archinfo.arch.Register', 'Register', ({(1634, 17, 1634, 28): '"""vr13_16_2"""', (1634, 30, 1634, 31): '(2)', (1634, 33, 1634, 39): '(17114)'}, {}), "('vr13_16_2', 2, 17114)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1635, 8, 1635, 39), 'archinfo.arch.Register', 'Register', ({(1635, 17, 1635, 27): '"""vr13_8_5"""', (1635, 29, 1635, 30): '(1)', (1635, 32, 1635, 38): '(17114)'}, {}), "('vr13_8_5', 1, 17114)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1636, 8, 1636, 39), 'archinfo.arch.Register', 'Register', ({(1636, 17, 1636, 27): '"""vr13_8_4"""', (1636, 29, 1636, 30): '(1)', (1636, 32, 1636, 38): '(17115)'}, {}), "('vr13_8_4', 1, 17115)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1637, 8, 1637, 40), 'archinfo.arch.Register', 'Register', ({(1637, 17, 1637, 28): '"""vr13_32_0"""', (1637, 30, 1637, 31): '(4)', (1637, 33, 1637, 39): '(17116)'}, {}), "('vr13_32_0', 4, 17116)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1638, 8, 1638, 40), 'archinfo.arch.Register', 'Register', ({(1638, 17, 1638, 28): '"""vr13_16_1"""', (1638, 30, 1638, 31): '(2)', (1638, 33, 1638, 39): '(17116)'}, {}), "('vr13_16_1', 2, 17116)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1639, 8, 1639, 39), 'archinfo.arch.Register', 'Register', ({(1639, 17, 1639, 27): '"""vr13_8_3"""', (1639, 29, 1639, 30): '(1)', (1639, 32, 1639, 38): '(17116)'}, {}), "('vr13_8_3', 1, 17116)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1640, 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'from archinfo.arch import register_arch, Endness, Register\n'), ((1644, 8, 1644, 36), 'archinfo.arch.Register', 'Register', ({(1644, 17, 1644, 23): '"""vs46"""', (1644, 25, 1644, 27): '(16)', (1644, 29, 1644, 35): '(17120)'}, {}), "('vs46', 16, 17120)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1645, 8, 1645, 40), 'archinfo.arch.Register', 'Register', ({(1645, 17, 1645, 28): '"""vr14_64_1"""', (1645, 30, 1645, 31): '(8)', (1645, 33, 1645, 39): '(17120)'}, {}), "('vr14_64_1', 8, 17120)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1646, 8, 1646, 40), 'archinfo.arch.Register', 'Register', ({(1646, 17, 1646, 28): '"""vr14_32_3"""', (1646, 30, 1646, 31): '(4)', (1646, 33, 1646, 39): '(17120)'}, {}), "('vr14_32_3', 4, 17120)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1647, 8, 1647, 40), 'archinfo.arch.Register', 'Register', ({(1647, 17, 1647, 28): '"""vr14_16_7"""', (1647, 30, 1647, 31): '(2)', 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'Register', ({(1651, 17, 1651, 28): '"""vr14_8_13"""', (1651, 30, 1651, 31): '(1)', (1651, 33, 1651, 39): '(17122)'}, {}), "('vr14_8_13', 1, 17122)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1652, 8, 1652, 40), 'archinfo.arch.Register', 'Register', ({(1652, 17, 1652, 28): '"""vr14_8_12"""', (1652, 30, 1652, 31): '(1)', (1652, 33, 1652, 39): '(17123)'}, {}), "('vr14_8_12', 1, 17123)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1653, 8, 1653, 40), 'archinfo.arch.Register', 'Register', ({(1653, 17, 1653, 28): '"""vr14_32_2"""', (1653, 30, 1653, 31): '(4)', (1653, 33, 1653, 39): '(17124)'}, {}), "('vr14_32_2', 4, 17124)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1654, 8, 1654, 40), 'archinfo.arch.Register', 'Register', ({(1654, 17, 1654, 28): '"""vr14_16_5"""', (1654, 30, 1654, 31): '(2)', (1654, 33, 1654, 39): '(17124)'}, {}), "('vr14_16_5', 2, 17124)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1655, 8, 1655, 40), 'archinfo.arch.Register', 'Register', ({(1655, 17, 1655, 28): '"""vr14_8_11"""', (1655, 30, 1655, 31): '(1)', (1655, 33, 1655, 39): '(17124)'}, {}), "('vr14_8_11', 1, 17124)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1656, 8, 1656, 40), 'archinfo.arch.Register', 'Register', ({(1656, 17, 1656, 28): '"""vr14_8_10"""', (1656, 30, 1656, 31): '(1)', (1656, 33, 1656, 39): '(17125)'}, {}), "('vr14_8_10', 1, 17125)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1657, 8, 1657, 40), 'archinfo.arch.Register', 'Register', ({(1657, 17, 1657, 28): '"""vr14_16_4"""', (1657, 30, 1657, 31): '(2)', (1657, 33, 1657, 39): '(17126)'}, {}), "('vr14_16_4', 2, 17126)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1658, 8, 1658, 39), 'archinfo.arch.Register', 'Register', ({(1658, 17, 1658, 27): '"""vr14_8_9"""', (1658, 29, 1658, 30): '(1)', (1658, 32, 1658, 38): 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1662, 28): '"""vr14_16_3"""', (1662, 30, 1662, 31): '(2)', (1662, 33, 1662, 39): '(17128)'}, {}), "('vr14_16_3', 2, 17128)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1663, 8, 1663, 39), 'archinfo.arch.Register', 'Register', ({(1663, 17, 1663, 27): '"""vr14_8_7"""', (1663, 29, 1663, 30): '(1)', (1663, 32, 1663, 38): '(17128)'}, {}), "('vr14_8_7', 1, 17128)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1664, 8, 1664, 39), 'archinfo.arch.Register', 'Register', ({(1664, 17, 1664, 27): '"""vr14_8_6"""', (1664, 29, 1664, 30): '(1)', (1664, 32, 1664, 38): '(17129)'}, {}), "('vr14_8_6', 1, 17129)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1665, 8, 1665, 40), 'archinfo.arch.Register', 'Register', ({(1665, 17, 1665, 28): '"""vr14_16_2"""', (1665, 30, 1665, 31): '(2)', (1665, 33, 1665, 39): '(17130)'}, {}), "('vr14_16_2', 2, 17130)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1666, 8, 1666, 39), 'archinfo.arch.Register', 'Register', ({(1666, 17, 1666, 27): '"""vr14_8_5"""', (1666, 29, 1666, 30): '(1)', (1666, 32, 1666, 38): '(17130)'}, {}), "('vr14_8_5', 1, 17130)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1667, 8, 1667, 39), 'archinfo.arch.Register', 'Register', ({(1667, 17, 1667, 27): '"""vr14_8_4"""', (1667, 29, 1667, 30): '(1)', (1667, 32, 1667, 38): '(17131)'}, {}), "('vr14_8_4', 1, 17131)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1668, 8, 1668, 40), 'archinfo.arch.Register', 'Register', ({(1668, 17, 1668, 28): '"""vr14_32_0"""', (1668, 30, 1668, 31): '(4)', (1668, 33, 1668, 39): '(17132)'}, {}), "('vr14_32_0', 4, 17132)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1669, 8, 1669, 40), 'archinfo.arch.Register', 'Register', ({(1669, 17, 1669, 28): '"""vr14_16_1"""', (1669, 30, 1669, 31): '(2)', (1669, 33, 1669, 39): '(17132)'}, {}), "('vr14_16_1', 2, 17132)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1670, 8, 1670, 39), 'archinfo.arch.Register', 'Register', ({(1670, 17, 1670, 27): '"""vr14_8_3"""', (1670, 29, 1670, 30): '(1)', (1670, 32, 1670, 38): '(17132)'}, {}), "('vr14_8_3', 1, 17132)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1671, 8, 1671, 39), 'archinfo.arch.Register', 'Register', ({(1671, 17, 1671, 27): '"""vr14_8_2"""', (1671, 29, 1671, 30): '(1)', (1671, 32, 1671, 38): '(17133)'}, {}), "('vr14_8_2', 1, 17133)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1672, 8, 1672, 40), 'archinfo.arch.Register', 'Register', ({(1672, 17, 1672, 28): '"""vr14_16_0"""', (1672, 30, 1672, 31): '(2)', (1672, 33, 1672, 39): '(17134)'}, {}), "('vr14_16_0', 2, 17134)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1673, 8, 1673, 39), 'archinfo.arch.Register', 'Register', ({(1673, 17, 1673, 27): '"""vr14_8_1"""', (1673, 29, 1673, 30): '(1)', (1673, 32, 1673, 38): '(17134)'}, {}), "('vr14_8_1', 1, 17134)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1674, 8, 1674, 39), 'archinfo.arch.Register', 'Register', ({(1674, 17, 1674, 27): '"""vr14_8_0"""', (1674, 29, 1674, 30): '(1)', (1674, 32, 1674, 38): '(17135)'}, {}), "('vr14_8_0', 1, 17135)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1675, 8, 1675, 36), 'archinfo.arch.Register', 'Register', ({(1675, 17, 1675, 23): '"""vs47"""', (1675, 25, 1675, 27): '(16)', (1675, 29, 1675, 35): '(17136)'}, {}), "('vs47', 16, 17136)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1676, 8, 1676, 40), 'archinfo.arch.Register', 'Register', ({(1676, 17, 1676, 28): '"""vr15_64_1"""', (1676, 30, 1676, 31): '(8)', (1676, 33, 1676, 39): '(17136)'}, {}), "('vr15_64_1', 8, 17136)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1677, 8, 1677, 40), 'archinfo.arch.Register', 'Register', ({(1677, 17, 1677, 28): '"""vr15_32_3"""', (1677, 30, 1677, 31): '(4)', (1677, 33, 1677, 39): '(17136)'}, {}), "('vr15_32_3', 4, 17136)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1678, 8, 1678, 40), 'archinfo.arch.Register', 'Register', ({(1678, 17, 1678, 28): '"""vr15_16_7"""', (1678, 30, 1678, 31): '(2)', (1678, 33, 1678, 39): '(17136)'}, {}), "('vr15_16_7', 2, 17136)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1679, 8, 1679, 40), 'archinfo.arch.Register', 'Register', ({(1679, 17, 1679, 28): '"""vr15_8_15"""', (1679, 30, 1679, 31): '(1)', (1679, 33, 1679, 39): '(17136)'}, {}), "('vr15_8_15', 1, 17136)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1680, 8, 1680, 40), 'archinfo.arch.Register', 'Register', ({(1680, 17, 1680, 28): '"""vr15_8_14"""', (1680, 30, 1680, 31): '(1)', (1680, 33, 1680, 39): '(17137)'}, {}), "('vr15_8_14', 1, 17137)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1681, 8, 1681, 40), 'archinfo.arch.Register', 'Register', ({(1681, 17, 1681, 28): '"""vr15_16_6"""', (1681, 30, 1681, 31): '(2)', (1681, 33, 1681, 39): '(17138)'}, {}), "('vr15_16_6', 2, 17138)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1682, 8, 1682, 40), 'archinfo.arch.Register', 'Register', ({(1682, 17, 1682, 28): '"""vr15_8_13"""', (1682, 30, 1682, 31): '(1)', (1682, 33, 1682, 39): '(17138)'}, {}), "('vr15_8_13', 1, 17138)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1683, 8, 1683, 40), 'archinfo.arch.Register', 'Register', ({(1683, 17, 1683, 28): '"""vr15_8_12"""', (1683, 30, 1683, 31): '(1)', (1683, 33, 1683, 39): '(17139)'}, {}), "('vr15_8_12', 1, 17139)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1684, 8, 1684, 40), 'archinfo.arch.Register', 'Register', ({(1684, 17, 1684, 28): '"""vr15_32_2"""', (1684, 30, 1684, 31): '(4)', (1684, 33, 1684, 39): '(17140)'}, {}), "('vr15_32_2', 4, 17140)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1685, 8, 1685, 40), 'archinfo.arch.Register', 'Register', ({(1685, 17, 1685, 28): '"""vr15_16_5"""', (1685, 30, 1685, 31): '(2)', (1685, 33, 1685, 39): '(17140)'}, {}), "('vr15_16_5', 2, 17140)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1686, 8, 1686, 40), 'archinfo.arch.Register', 'Register', ({(1686, 17, 1686, 28): '"""vr15_8_11"""', (1686, 30, 1686, 31): '(1)', (1686, 33, 1686, 39): '(17140)'}, {}), "('vr15_8_11', 1, 17140)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1687, 8, 1687, 40), 'archinfo.arch.Register', 'Register', ({(1687, 17, 1687, 28): '"""vr15_8_10"""', (1687, 30, 1687, 31): '(1)', (1687, 33, 1687, 39): '(17141)'}, {}), "('vr15_8_10', 1, 17141)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1688, 8, 1688, 40), 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register_arch, Endness, Register\n'), ((1703, 8, 1703, 40), 'archinfo.arch.Register', 'Register', ({(1703, 17, 1703, 28): '"""vr15_16_0"""', (1703, 30, 1703, 31): '(2)', (1703, 33, 1703, 39): '(17150)'}, {}), "('vr15_16_0', 2, 17150)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1704, 8, 1704, 39), 'archinfo.arch.Register', 'Register', ({(1704, 17, 1704, 27): '"""vr15_8_1"""', (1704, 29, 1704, 30): '(1)', (1704, 32, 1704, 38): '(17150)'}, {}), "('vr15_8_1', 1, 17150)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1705, 8, 1705, 39), 'archinfo.arch.Register', 'Register', ({(1705, 17, 1705, 27): '"""vr15_8_0"""', (1705, 29, 1705, 30): '(1)', (1705, 32, 1705, 38): '(17151)'}, {}), "('vr15_8_0', 1, 17151)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1706, 8, 1706, 36), 'archinfo.arch.Register', 'Register', ({(1706, 17, 1706, 23): '"""vs48"""', (1706, 25, 1706, 27): '(16)', (1706, 29, 1706, 35): '(17152)'}, {}), "('vs48', 16, 17152)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1707, 8, 1707, 40), 'archinfo.arch.Register', 'Register', ({(1707, 17, 1707, 28): '"""vr16_64_1"""', (1707, 30, 1707, 31): '(8)', (1707, 33, 1707, 39): '(17152)'}, {}), "('vr16_64_1', 8, 17152)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1708, 8, 1708, 40), 'archinfo.arch.Register', 'Register', ({(1708, 17, 1708, 28): '"""vr16_32_3"""', (1708, 30, 1708, 31): '(4)', (1708, 33, 1708, 39): '(17152)'}, {}), "('vr16_32_3', 4, 17152)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1709, 8, 1709, 40), 'archinfo.arch.Register', 'Register', ({(1709, 17, 1709, 28): '"""vr16_16_7"""', (1709, 30, 1709, 31): '(2)', (1709, 33, 1709, 39): '(17152)'}, {}), "('vr16_16_7', 2, 17152)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1710, 8, 1710, 40), 'archinfo.arch.Register', 'Register', ({(1710, 17, 1710, 28): '"""vr16_8_15"""', (1710, 30, 1710, 31): '(1)', (1710, 33, 1710, 39): '(17152)'}, {}), "('vr16_8_15', 1, 17152)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1711, 8, 1711, 40), 'archinfo.arch.Register', 'Register', ({(1711, 17, 1711, 28): '"""vr16_8_14"""', (1711, 30, 1711, 31): '(1)', (1711, 33, 1711, 39): '(17153)'}, {}), "('vr16_8_14', 1, 17153)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1712, 8, 1712, 40), 'archinfo.arch.Register', 'Register', ({(1712, 17, 1712, 28): '"""vr16_16_6"""', (1712, 30, 1712, 31): '(2)', (1712, 33, 1712, 39): '(17154)'}, {}), "('vr16_16_6', 2, 17154)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1713, 8, 1713, 40), 'archinfo.arch.Register', 'Register', ({(1713, 17, 1713, 28): '"""vr16_8_13"""', (1713, 30, 1713, 31): '(1)', (1713, 33, 1713, 39): '(17154)'}, {}), "('vr16_8_13', 1, 17154)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1714, 8, 1714, 40), 'archinfo.arch.Register', 'Register', ({(1714, 17, 1714, 28): '"""vr16_8_12"""', (1714, 30, 1714, 31): '(1)', (1714, 33, 1714, 39): '(17155)'}, {}), "('vr16_8_12', 1, 17155)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1715, 8, 1715, 40), 'archinfo.arch.Register', 'Register', ({(1715, 17, 1715, 28): '"""vr16_32_2"""', (1715, 30, 1715, 31): '(4)', (1715, 33, 1715, 39): '(17156)'}, {}), "('vr16_32_2', 4, 17156)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1716, 8, 1716, 40), 'archinfo.arch.Register', 'Register', ({(1716, 17, 1716, 28): '"""vr16_16_5"""', (1716, 30, 1716, 31): '(2)', (1716, 33, 1716, 39): '(17156)'}, {}), "('vr16_16_5', 2, 17156)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1717, 8, 1717, 40), 'archinfo.arch.Register', 'Register', ({(1717, 17, 1717, 28): '"""vr16_8_11"""', (1717, 30, 1717, 31): '(1)', (1717, 33, 1717, 39): '(17156)'}, {}), "('vr16_8_11', 1, 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29, 1721, 30): '(1)', (1721, 32, 1721, 38): '(17159)'}, {}), "('vr16_8_8', 1, 17159)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1722, 8, 1722, 40), 'archinfo.arch.Register', 'Register', ({(1722, 17, 1722, 28): '"""vr16_64_0"""', (1722, 30, 1722, 31): '(8)', (1722, 33, 1722, 39): '(17160)'}, {}), "('vr16_64_0', 8, 17160)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1723, 8, 1723, 40), 'archinfo.arch.Register', 'Register', ({(1723, 17, 1723, 28): '"""vr16_32_1"""', (1723, 30, 1723, 31): '(4)', (1723, 33, 1723, 39): '(17160)'}, {}), "('vr16_32_1', 4, 17160)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1724, 8, 1724, 40), 'archinfo.arch.Register', 'Register', ({(1724, 17, 1724, 28): '"""vr16_16_3"""', (1724, 30, 1724, 31): '(2)', (1724, 33, 1724, 39): '(17160)'}, {}), "('vr16_16_3', 2, 17160)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1725, 8, 1725, 39), 'archinfo.arch.Register', 'Register', ({(1725, 17, 1725, 27): '"""vr16_8_7"""', (1725, 29, 1725, 30): '(1)', (1725, 32, 1725, 38): '(17160)'}, {}), "('vr16_8_7', 1, 17160)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1726, 8, 1726, 39), 'archinfo.arch.Register', 'Register', ({(1726, 17, 1726, 27): '"""vr16_8_6"""', (1726, 29, 1726, 30): '(1)', (1726, 32, 1726, 38): '(17161)'}, {}), "('vr16_8_6', 1, 17161)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1727, 8, 1727, 40), 'archinfo.arch.Register', 'Register', ({(1727, 17, 1727, 28): '"""vr16_16_2"""', (1727, 30, 1727, 31): '(2)', (1727, 33, 1727, 39): '(17162)'}, {}), "('vr16_16_2', 2, 17162)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1728, 8, 1728, 39), 'archinfo.arch.Register', 'Register', ({(1728, 17, 1728, 27): '"""vr16_8_5"""', (1728, 29, 1728, 30): '(1)', (1728, 32, 1728, 38): '(17162)'}, {}), "('vr16_8_5', 1, 17162)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1729, 8, 1729, 39), 'archinfo.arch.Register', 'Register', ({(1729, 17, 1729, 27): '"""vr16_8_4"""', (1729, 29, 1729, 30): '(1)', (1729, 32, 1729, 38): '(17163)'}, {}), "('vr16_8_4', 1, 17163)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1730, 8, 1730, 40), 'archinfo.arch.Register', 'Register', ({(1730, 17, 1730, 28): '"""vr16_32_0"""', (1730, 30, 1730, 31): '(4)', (1730, 33, 1730, 39): '(17164)'}, {}), "('vr16_32_0', 4, 17164)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1731, 8, 1731, 40), 'archinfo.arch.Register', 'Register', ({(1731, 17, 1731, 28): '"""vr16_16_1"""', (1731, 30, 1731, 31): '(2)', (1731, 33, 1731, 39): '(17164)'}, {}), "('vr16_16_1', 2, 17164)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1732, 8, 1732, 39), 'archinfo.arch.Register', 'Register', ({(1732, 17, 1732, 27): '"""vr16_8_3"""', (1732, 29, 1732, 30): '(1)', (1732, 32, 1732, 38): '(17164)'}, {}), "('vr16_8_3', 1, 17164)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1733, 8, 1733, 39), 'archinfo.arch.Register', 'Register', ({(1733, 17, 1733, 27): '"""vr16_8_2"""', (1733, 29, 1733, 30): '(1)', (1733, 32, 1733, 38): '(17165)'}, {}), "('vr16_8_2', 1, 17165)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1734, 8, 1734, 40), 'archinfo.arch.Register', 'Register', ({(1734, 17, 1734, 28): '"""vr16_16_0"""', (1734, 30, 1734, 31): '(2)', (1734, 33, 1734, 39): '(17166)'}, {}), "('vr16_16_0', 2, 17166)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1735, 8, 1735, 39), 'archinfo.arch.Register', 'Register', ({(1735, 17, 1735, 27): '"""vr16_8_1"""', (1735, 29, 1735, 30): '(1)', (1735, 32, 1735, 38): '(17166)'}, {}), "('vr16_8_1', 1, 17166)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1736, 8, 1736, 39), 'archinfo.arch.Register', 'Register', ({(1736, 17, 1736, 27): '"""vr16_8_0"""', (1736, 29, 1736, 30): '(1)', (1736, 32, 1736, 38): '(17167)'}, {}), "('vr16_8_0', 1, 17167)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1737, 8, 1737, 36), 'archinfo.arch.Register', 'Register', ({(1737, 17, 1737, 23): '"""vs49"""', (1737, 25, 1737, 27): '(16)', (1737, 29, 1737, 35): '(17168)'}, {}), "('vs49', 16, 17168)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1738, 8, 1738, 40), 'archinfo.arch.Register', 'Register', ({(1738, 17, 1738, 28): '"""vr17_64_1"""', (1738, 30, 1738, 31): '(8)', (1738, 33, 1738, 39): '(17168)'}, {}), "('vr17_64_1', 8, 17168)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1739, 8, 1739, 40), 'archinfo.arch.Register', 'Register', ({(1739, 17, 1739, 28): '"""vr17_32_3"""', (1739, 30, 1739, 31): '(4)', (1739, 33, 1739, 39): '(17168)'}, {}), "('vr17_32_3', 4, 17168)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1740, 8, 1740, 40), 'archinfo.arch.Register', 'Register', ({(1740, 17, 1740, 28): '"""vr17_16_7"""', (1740, 30, 1740, 31): '(2)', (1740, 33, 1740, 39): '(17168)'}, {}), "('vr17_16_7', 2, 17168)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1741, 8, 1741, 40), 'archinfo.arch.Register', 'Register', ({(1741, 17, 1741, 28): '"""vr17_8_15"""', (1741, 30, 1741, 31): '(1)', (1741, 33, 1741, 39): '(17168)'}, {}), "('vr17_8_15', 1, 17168)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1742, 8, 1742, 40), 'archinfo.arch.Register', 'Register', ({(1742, 17, 1742, 28): '"""vr17_8_14"""', (1742, 30, 1742, 31): '(1)', (1742, 33, 1742, 39): '(17169)'}, {}), "('vr17_8_14', 1, 17169)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1743, 8, 1743, 40), 'archinfo.arch.Register', 'Register', ({(1743, 17, 1743, 28): '"""vr17_16_6"""', (1743, 30, 1743, 31): '(2)', (1743, 33, 1743, 39): '(17170)'}, {}), "('vr17_16_6', 2, 17170)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1744, 8, 1744, 40), 'archinfo.arch.Register', 'Register', ({(1744, 17, 1744, 28): '"""vr17_8_13"""', (1744, 30, 1744, 31): '(1)', (1744, 33, 1744, 39): '(17170)'}, {}), "('vr17_8_13', 1, 17170)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1745, 8, 1745, 40), 'archinfo.arch.Register', 'Register', ({(1745, 17, 1745, 28): '"""vr17_8_12"""', (1745, 30, 1745, 31): '(1)', (1745, 33, 1745, 39): '(17171)'}, {}), "('vr17_8_12', 1, 17171)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1746, 8, 1746, 40), 'archinfo.arch.Register', 'Register', ({(1746, 17, 1746, 28): '"""vr17_32_2"""', (1746, 30, 1746, 31): '(4)', (1746, 33, 1746, 39): '(17172)'}, {}), "('vr17_32_2', 4, 17172)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1747, 8, 1747, 40), 'archinfo.arch.Register', 'Register', ({(1747, 17, 1747, 28): '"""vr17_16_5"""', (1747, 30, 1747, 31): '(2)', (1747, 33, 1747, 39): '(17172)'}, {}), "('vr17_16_5', 2, 17172)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1748, 8, 1748, 40), 'archinfo.arch.Register', 'Register', ({(1748, 17, 1748, 28): '"""vr17_8_11"""', (1748, 30, 1748, 31): '(1)', (1748, 33, 1748, 39): '(17172)'}, {}), "('vr17_8_11', 1, 17172)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1749, 8, 1749, 40), 'archinfo.arch.Register', 'Register', ({(1749, 17, 1749, 28): '"""vr17_8_10"""', (1749, 30, 1749, 31): '(1)', (1749, 33, 1749, 39): '(17173)'}, {}), "('vr17_8_10', 1, 17173)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1750, 8, 1750, 40), 'archinfo.arch.Register', 'Register', ({(1750, 17, 1750, 28): '"""vr17_16_4"""', (1750, 30, 1750, 31): '(2)', (1750, 33, 1750, 39): '(17174)'}, {}), "('vr17_16_4', 2, 17174)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), 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1758, 31): '(2)', (1758, 33, 1758, 39): '(17178)'}, {}), "('vr17_16_2', 2, 17178)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1759, 8, 1759, 39), 'archinfo.arch.Register', 'Register', ({(1759, 17, 1759, 27): '"""vr17_8_5"""', (1759, 29, 1759, 30): '(1)', (1759, 32, 1759, 38): '(17178)'}, {}), "('vr17_8_5', 1, 17178)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1760, 8, 1760, 39), 'archinfo.arch.Register', 'Register', ({(1760, 17, 1760, 27): '"""vr17_8_4"""', (1760, 29, 1760, 30): '(1)', (1760, 32, 1760, 38): '(17179)'}, {}), "('vr17_8_4', 1, 17179)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1761, 8, 1761, 40), 'archinfo.arch.Register', 'Register', ({(1761, 17, 1761, 28): '"""vr17_32_0"""', (1761, 30, 1761, 31): '(4)', (1761, 33, 1761, 39): '(17180)'}, {}), "('vr17_32_0', 4, 17180)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1762, 8, 1762, 40), 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1769, 39): '(17184)'}, {}), "('vr18_64_1', 8, 17184)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1770, 8, 1770, 40), 'archinfo.arch.Register', 'Register', ({(1770, 17, 1770, 28): '"""vr18_32_3"""', (1770, 30, 1770, 31): '(4)', (1770, 33, 1770, 39): '(17184)'}, {}), "('vr18_32_3', 4, 17184)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1771, 8, 1771, 40), 'archinfo.arch.Register', 'Register', ({(1771, 17, 1771, 28): '"""vr18_16_7"""', (1771, 30, 1771, 31): '(2)', (1771, 33, 1771, 39): '(17184)'}, {}), "('vr18_16_7', 2, 17184)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1772, 8, 1772, 40), 'archinfo.arch.Register', 'Register', ({(1772, 17, 1772, 28): '"""vr18_8_15"""', (1772, 30, 1772, 31): '(1)', (1772, 33, 1772, 39): '(17184)'}, {}), "('vr18_8_15', 1, 17184)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1773, 8, 1773, 40), 'archinfo.arch.Register', 'Register', ({(1773, 17, 1773, 28): '"""vr18_8_14"""', (1773, 30, 1773, 31): '(1)', (1773, 33, 1773, 39): '(17185)'}, {}), "('vr18_8_14', 1, 17185)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1774, 8, 1774, 40), 'archinfo.arch.Register', 'Register', ({(1774, 17, 1774, 28): '"""vr18_16_6"""', (1774, 30, 1774, 31): '(2)', (1774, 33, 1774, 39): '(17186)'}, {}), "('vr18_16_6', 2, 17186)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1775, 8, 1775, 40), 'archinfo.arch.Register', 'Register', ({(1775, 17, 1775, 28): '"""vr18_8_13"""', (1775, 30, 1775, 31): '(1)', (1775, 33, 1775, 39): '(17186)'}, {}), "('vr18_8_13', 1, 17186)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1776, 8, 1776, 40), 'archinfo.arch.Register', 'Register', ({(1776, 17, 1776, 28): '"""vr18_8_12"""', (1776, 30, 1776, 31): '(1)', (1776, 33, 1776, 39): '(17187)'}, {}), "('vr18_8_12', 1, 17187)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1777, 8, 1777, 40), 'archinfo.arch.Register', 'Register', ({(1777, 17, 1777, 28): '"""vr18_32_2"""', (1777, 30, 1777, 31): '(4)', (1777, 33, 1777, 39): '(17188)'}, {}), "('vr18_32_2', 4, 17188)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1778, 8, 1778, 40), 'archinfo.arch.Register', 'Register', ({(1778, 17, 1778, 28): '"""vr18_16_5"""', (1778, 30, 1778, 31): '(2)', (1778, 33, 1778, 39): '(17188)'}, {}), "('vr18_16_5', 2, 17188)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1779, 8, 1779, 40), 'archinfo.arch.Register', 'Register', ({(1779, 17, 1779, 28): '"""vr18_8_11"""', (1779, 30, 1779, 31): '(1)', (1779, 33, 1779, 39): '(17188)'}, {}), "('vr18_8_11', 1, 17188)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1780, 8, 1780, 40), 'archinfo.arch.Register', 'Register', ({(1780, 17, 1780, 28): '"""vr18_8_10"""', (1780, 30, 1780, 31): '(1)', (1780, 33, 1780, 39): '(17189)'}, {}), "('vr18_8_10', 1, 17189)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1781, 8, 1781, 40), 'archinfo.arch.Register', 'Register', ({(1781, 17, 1781, 28): '"""vr18_16_4"""', (1781, 30, 1781, 31): '(2)', (1781, 33, 1781, 39): '(17190)'}, {}), "('vr18_16_4', 2, 17190)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1782, 8, 1782, 39), 'archinfo.arch.Register', 'Register', ({(1782, 17, 1782, 27): '"""vr18_8_9"""', (1782, 29, 1782, 30): '(1)', (1782, 32, 1782, 38): '(17190)'}, {}), "('vr18_8_9', 1, 17190)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1783, 8, 1783, 39), 'archinfo.arch.Register', 'Register', ({(1783, 17, 1783, 27): '"""vr18_8_8"""', (1783, 29, 1783, 30): '(1)', (1783, 32, 1783, 38): '(17191)'}, {}), "('vr18_8_8', 1, 17191)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1784, 8, 1784, 40), 'archinfo.arch.Register', 'Register', ({(1784, 17, 1784, 28): '"""vr18_64_0"""', (1784, 30, 1784, 31): '(8)', (1784, 33, 1784, 39): '(17192)'}, {}), "('vr18_64_0', 8, 17192)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1785, 8, 1785, 40), 'archinfo.arch.Register', 'Register', ({(1785, 17, 1785, 28): '"""vr18_32_1"""', (1785, 30, 1785, 31): '(4)', (1785, 33, 1785, 39): '(17192)'}, {}), "('vr18_32_1', 4, 17192)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1786, 8, 1786, 40), 'archinfo.arch.Register', 'Register', ({(1786, 17, 1786, 28): '"""vr18_16_3"""', (1786, 30, 1786, 31): '(2)', (1786, 33, 1786, 39): '(17192)'}, {}), "('vr18_16_3', 2, 17192)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1787, 8, 1787, 39), 'archinfo.arch.Register', 'Register', ({(1787, 17, 1787, 27): '"""vr18_8_7"""', (1787, 29, 1787, 30): '(1)', (1787, 32, 1787, 38): '(17192)'}, {}), "('vr18_8_7', 1, 17192)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1788, 8, 1788, 39), 'archinfo.arch.Register', 'Register', ({(1788, 17, 1788, 27): '"""vr18_8_6"""', (1788, 29, 1788, 30): '(1)', (1788, 32, 1788, 38): '(17193)'}, {}), "('vr18_8_6', 1, 17193)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1789, 8, 1789, 40), 'archinfo.arch.Register', 'Register', ({(1789, 17, 1789, 28): '"""vr18_16_2"""', (1789, 30, 1789, 31): '(2)', (1789, 33, 1789, 39): '(17194)'}, {}), "('vr18_16_2', 2, 17194)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1790, 8, 1790, 39), 'archinfo.arch.Register', 'Register', ({(1790, 17, 1790, 27): '"""vr18_8_5"""', (1790, 29, 1790, 30): '(1)', (1790, 32, 1790, 38): '(17194)'}, {}), "('vr18_8_5', 1, 17194)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1791, 8, 1791, 39), 'archinfo.arch.Register', 'Register', ({(1791, 17, 1791, 27): '"""vr18_8_4"""', (1791, 29, 1791, 30): '(1)', (1791, 32, 1791, 38): '(17195)'}, {}), "('vr18_8_4', 1, 17195)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1792, 8, 1792, 40), 'archinfo.arch.Register', 'Register', ({(1792, 17, 1792, 28): '"""vr18_32_0"""', (1792, 30, 1792, 31): '(4)', (1792, 33, 1792, 39): '(17196)'}, {}), "('vr18_32_0', 4, 17196)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1793, 8, 1793, 40), 'archinfo.arch.Register', 'Register', ({(1793, 17, 1793, 28): '"""vr18_16_1"""', (1793, 30, 1793, 31): '(2)', (1793, 33, 1793, 39): '(17196)'}, {}), "('vr18_16_1', 2, 17196)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1794, 8, 1794, 39), 'archinfo.arch.Register', 'Register', ({(1794, 17, 1794, 27): '"""vr18_8_3"""', (1794, 29, 1794, 30): '(1)', (1794, 32, 1794, 38): '(17196)'}, {}), "('vr18_8_3', 1, 17196)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1795, 8, 1795, 39), 'archinfo.arch.Register', 'Register', ({(1795, 17, 1795, 27): '"""vr18_8_2"""', (1795, 29, 1795, 30): '(1)', (1795, 32, 1795, 38): '(17197)'}, {}), "('vr18_8_2', 1, 17197)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1796, 8, 1796, 40), 'archinfo.arch.Register', 'Register', ({(1796, 17, 1796, 28): '"""vr18_16_0"""', (1796, 30, 1796, 31): '(2)', (1796, 33, 1796, 39): '(17198)'}, {}), "('vr18_16_0', 2, 17198)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1797, 8, 1797, 39), 'archinfo.arch.Register', 'Register', ({(1797, 17, 1797, 27): '"""vr18_8_1"""', (1797, 29, 1797, 30): '(1)', (1797, 32, 1797, 38): '(17198)'}, {}), "('vr18_8_1', 1, 17198)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1798, 8, 1798, 39), 'archinfo.arch.Register', 'Register', ({(1798, 17, 1798, 27): '"""vr18_8_0"""', (1798, 29, 1798, 30): '(1)', (1798, 32, 1798, 38): '(17199)'}, {}), "('vr18_8_0', 1, 17199)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1799, 8, 1799, 36), 'archinfo.arch.Register', 'Register', ({(1799, 17, 1799, 23): '"""vs51"""', (1799, 25, 1799, 27): '(16)', (1799, 29, 1799, 35): '(17200)'}, {}), "('vs51', 16, 17200)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1800, 8, 1800, 40), 'archinfo.arch.Register', 'Register', ({(1800, 17, 1800, 28): '"""vr19_64_1"""', (1800, 30, 1800, 31): '(8)', (1800, 33, 1800, 39): '(17200)'}, {}), "('vr19_64_1', 8, 17200)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1801, 8, 1801, 40), 'archinfo.arch.Register', 'Register', ({(1801, 17, 1801, 28): '"""vr19_32_3"""', (1801, 30, 1801, 31): '(4)', (1801, 33, 1801, 39): '(17200)'}, {}), "('vr19_32_3', 4, 17200)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1802, 8, 1802, 40), 'archinfo.arch.Register', 'Register', ({(1802, 17, 1802, 28): '"""vr19_16_7"""', (1802, 30, 1802, 31): '(2)', (1802, 33, 1802, 39): '(17200)'}, {}), "('vr19_16_7', 2, 17200)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1803, 8, 1803, 40), 'archinfo.arch.Register', 'Register', ({(1803, 17, 1803, 28): '"""vr19_8_15"""', (1803, 30, 1803, 31): '(1)', (1803, 33, 1803, 39): '(17200)'}, {}), "('vr19_8_15', 1, 17200)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1804, 8, 1804, 40), 'archinfo.arch.Register', 'Register', ({(1804, 17, 1804, 28): '"""vr19_8_14"""', (1804, 30, 1804, 31): '(1)', (1804, 33, 1804, 39): '(17201)'}, {}), "('vr19_8_14', 1, 17201)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1805, 8, 1805, 40), 'archinfo.arch.Register', 'Register', ({(1805, 17, 1805, 28): '"""vr19_16_6"""', (1805, 30, 1805, 31): '(2)', (1805, 33, 1805, 39): '(17202)'}, {}), "('vr19_16_6', 2, 17202)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1806, 8, 1806, 40), 'archinfo.arch.Register', 'Register', ({(1806, 17, 1806, 28): '"""vr19_8_13"""', (1806, 30, 1806, 31): '(1)', (1806, 33, 1806, 39): '(17202)'}, {}), "('vr19_8_13', 1, 17202)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1807, 8, 1807, 40), 'archinfo.arch.Register', 'Register', ({(1807, 17, 1807, 28): '"""vr19_8_12"""', (1807, 30, 1807, 31): '(1)', (1807, 33, 1807, 39): '(17203)'}, {}), "('vr19_8_12', 1, 17203)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1808, 8, 1808, 40), 'archinfo.arch.Register', 'Register', ({(1808, 17, 1808, 28): '"""vr19_32_2"""', (1808, 30, 1808, 31): '(4)', (1808, 33, 1808, 39): '(17204)'}, {}), "('vr19_32_2', 4, 17204)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1809, 8, 1809, 40), 'archinfo.arch.Register', 'Register', ({(1809, 17, 1809, 28): '"""vr19_16_5"""', (1809, 30, 1809, 31): '(2)', (1809, 33, 1809, 39): '(17204)'}, {}), "('vr19_16_5', 2, 17204)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1810, 8, 1810, 40), 'archinfo.arch.Register', 'Register', ({(1810, 17, 1810, 28): '"""vr19_8_11"""', (1810, 30, 1810, 31): '(1)', (1810, 33, 1810, 39): '(17204)'}, {}), "('vr19_8_11', 1, 17204)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1811, 8, 1811, 40), 'archinfo.arch.Register', 'Register', ({(1811, 17, 1811, 28): '"""vr19_8_10"""', (1811, 30, 1811, 31): '(1)', (1811, 33, 1811, 39): '(17205)'}, {}), "('vr19_8_10', 1, 17205)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1812, 8, 1812, 40), 'archinfo.arch.Register', 'Register', ({(1812, 17, 1812, 28): '"""vr19_16_4"""', (1812, 30, 1812, 31): '(2)', (1812, 33, 1812, 39): '(17206)'}, {}), "('vr19_16_4', 2, 17206)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1813, 8, 1813, 39), 'archinfo.arch.Register', 'Register', ({(1813, 17, 1813, 27): '"""vr19_8_9"""', (1813, 29, 1813, 30): '(1)', (1813, 32, 1813, 38): '(17206)'}, {}), "('vr19_8_9', 1, 17206)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1814, 8, 1814, 39), 'archinfo.arch.Register', 'Register', ({(1814, 17, 1814, 27): '"""vr19_8_8"""', (1814, 29, 1814, 30): '(1)', (1814, 32, 1814, 38): '(17207)'}, {}), "('vr19_8_8', 1, 17207)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1815, 8, 1815, 40), 'archinfo.arch.Register', 'Register', ({(1815, 17, 1815, 28): '"""vr19_64_0"""', (1815, 30, 1815, 31): '(8)', (1815, 33, 1815, 39): '(17208)'}, {}), "('vr19_64_0', 8, 17208)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1816, 8, 1816, 40), 'archinfo.arch.Register', 'Register', ({(1816, 17, 1816, 28): '"""vr19_32_1"""', (1816, 30, 1816, 31): '(4)', (1816, 33, 1816, 39): '(17208)'}, {}), "('vr19_32_1', 4, 17208)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1817, 8, 1817, 40), 'archinfo.arch.Register', 'Register', ({(1817, 17, 1817, 28): '"""vr19_16_3"""', (1817, 30, 1817, 31): '(2)', (1817, 33, 1817, 39): '(17208)'}, {}), "('vr19_16_3', 2, 17208)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1818, 8, 1818, 39), 'archinfo.arch.Register', 'Register', ({(1818, 17, 1818, 27): '"""vr19_8_7"""', (1818, 29, 1818, 30): '(1)', (1818, 32, 1818, 38): '(17208)'}, {}), "('vr19_8_7', 1, 17208)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1819, 8, 1819, 39), 'archinfo.arch.Register', 'Register', ({(1819, 17, 1819, 27): '"""vr19_8_6"""', (1819, 29, 1819, 30): '(1)', (1819, 32, 1819, 38): '(17209)'}, {}), "('vr19_8_6', 1, 17209)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1820, 8, 1820, 40), 'archinfo.arch.Register', 'Register', ({(1820, 17, 1820, 28): '"""vr19_16_2"""', (1820, 30, 1820, 31): '(2)', (1820, 33, 1820, 39): '(17210)'}, {}), "('vr19_16_2', 2, 17210)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1821, 8, 1821, 39), 'archinfo.arch.Register', 'Register', ({(1821, 17, 1821, 27): '"""vr19_8_5"""', (1821, 29, 1821, 30): '(1)', (1821, 32, 1821, 38): '(17210)'}, {}), "('vr19_8_5', 1, 17210)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1822, 8, 1822, 39), 'archinfo.arch.Register', 'Register', ({(1822, 17, 1822, 27): '"""vr19_8_4"""', (1822, 29, 1822, 30): '(1)', (1822, 32, 1822, 38): '(17211)'}, {}), "('vr19_8_4', 1, 17211)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1823, 8, 1823, 40), 'archinfo.arch.Register', 'Register', ({(1823, 17, 1823, 28): '"""vr19_32_0"""', (1823, 30, 1823, 31): '(4)', (1823, 33, 1823, 39): '(17212)'}, {}), "('vr19_32_0', 4, 17212)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1824, 8, 1824, 40), 'archinfo.arch.Register', 'Register', ({(1824, 17, 1824, 28): '"""vr19_16_1"""', (1824, 30, 1824, 31): '(2)', (1824, 33, 1824, 39): '(17212)'}, {}), "('vr19_16_1', 2, 17212)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1825, 8, 1825, 39), 'archinfo.arch.Register', 'Register', ({(1825, 17, 1825, 27): '"""vr19_8_3"""', (1825, 29, 1825, 30): '(1)', (1825, 32, 1825, 38): '(17212)'}, {}), "('vr19_8_3', 1, 17212)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1826, 8, 1826, 39), 'archinfo.arch.Register', 'Register', ({(1826, 17, 1826, 27): '"""vr19_8_2"""', (1826, 29, 1826, 30): '(1)', (1826, 32, 1826, 38): '(17213)'}, {}), "('vr19_8_2', 1, 17213)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1827, 8, 1827, 40), 'archinfo.arch.Register', 'Register', ({(1827, 17, 1827, 28): '"""vr19_16_0"""', (1827, 30, 1827, 31): '(2)', (1827, 33, 1827, 39): '(17214)'}, {}), "('vr19_16_0', 2, 17214)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1828, 8, 1828, 39), 'archinfo.arch.Register', 'Register', ({(1828, 17, 1828, 27): '"""vr19_8_1"""', (1828, 29, 1828, 30): '(1)', (1828, 32, 1828, 38): '(17214)'}, {}), "('vr19_8_1', 1, 17214)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1829, 8, 1829, 39), 'archinfo.arch.Register', 'Register', ({(1829, 17, 1829, 27): '"""vr19_8_0"""', (1829, 29, 1829, 30): '(1)', (1829, 32, 1829, 38): '(17215)'}, {}), "('vr19_8_0', 1, 17215)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1830, 8, 1830, 36), 'archinfo.arch.Register', 'Register', ({(1830, 17, 1830, 23): '"""vs52"""', (1830, 25, 1830, 27): '(16)', (1830, 29, 1830, 35): '(17216)'}, {}), "('vs52', 16, 17216)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1831, 8, 1831, 40), 'archinfo.arch.Register', 'Register', ({(1831, 17, 1831, 28): '"""vr20_64_1"""', (1831, 30, 1831, 31): '(8)', (1831, 33, 1831, 39): '(17216)'}, {}), "('vr20_64_1', 8, 17216)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1832, 8, 1832, 40), 'archinfo.arch.Register', 'Register', ({(1832, 17, 1832, 28): '"""vr20_32_3"""', (1832, 30, 1832, 31): '(4)', (1832, 33, 1832, 39): '(17216)'}, {}), "('vr20_32_3', 4, 17216)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1833, 8, 1833, 40), 'archinfo.arch.Register', 'Register', ({(1833, 17, 1833, 28): '"""vr20_16_7"""', (1833, 30, 1833, 31): '(2)', (1833, 33, 1833, 39): '(17216)'}, {}), "('vr20_16_7', 2, 17216)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1834, 8, 1834, 40), 'archinfo.arch.Register', 'Register', ({(1834, 17, 1834, 28): '"""vr20_8_15"""', (1834, 30, 1834, 31): '(1)', (1834, 33, 1834, 39): '(17216)'}, {}), "('vr20_8_15', 1, 17216)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1835, 8, 1835, 40), 'archinfo.arch.Register', 'Register', ({(1835, 17, 1835, 28): '"""vr20_8_14"""', (1835, 30, 1835, 31): '(1)', (1835, 33, 1835, 39): '(17217)'}, {}), "('vr20_8_14', 1, 17217)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1836, 8, 1836, 40), 'archinfo.arch.Register', 'Register', ({(1836, 17, 1836, 28): '"""vr20_16_6"""', (1836, 30, 1836, 31): '(2)', (1836, 33, 1836, 39): '(17218)'}, {}), "('vr20_16_6', 2, 17218)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1837, 8, 1837, 40), 'archinfo.arch.Register', 'Register', ({(1837, 17, 1837, 28): '"""vr20_8_13"""', (1837, 30, 1837, 31): '(1)', (1837, 33, 1837, 39): '(17218)'}, {}), "('vr20_8_13', 1, 17218)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1838, 8, 1838, 40), 'archinfo.arch.Register', 'Register', ({(1838, 17, 1838, 28): '"""vr20_8_12"""', (1838, 30, 1838, 31): '(1)', (1838, 33, 1838, 39): '(17219)'}, {}), "('vr20_8_12', 1, 17219)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1839, 8, 1839, 40), 'archinfo.arch.Register', 'Register', ({(1839, 17, 1839, 28): '"""vr20_32_2"""', (1839, 30, 1839, 31): '(4)', (1839, 33, 1839, 39): '(17220)'}, {}), "('vr20_32_2', 4, 17220)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1840, 8, 1840, 40), 'archinfo.arch.Register', 'Register', ({(1840, 17, 1840, 28): '"""vr20_16_5"""', (1840, 30, 1840, 31): '(2)', (1840, 33, 1840, 39): '(17220)'}, {}), "('vr20_16_5', 2, 17220)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1841, 8, 1841, 40), 'archinfo.arch.Register', 'Register', ({(1841, 17, 1841, 28): '"""vr20_8_11"""', (1841, 30, 1841, 31): '(1)', (1841, 33, 1841, 39): '(17220)'}, {}), "('vr20_8_11', 1, 17220)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1842, 8, 1842, 40), 'archinfo.arch.Register', 'Register', ({(1842, 17, 1842, 28): '"""vr20_8_10"""', (1842, 30, 1842, 31): '(1)', (1842, 33, 1842, 39): '(17221)'}, {}), "('vr20_8_10', 1, 17221)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1843, 8, 1843, 40), 'archinfo.arch.Register', 'Register', ({(1843, 17, 1843, 28): '"""vr20_16_4"""', (1843, 30, 1843, 31): '(2)', (1843, 33, 1843, 39): '(17222)'}, {}), "('vr20_16_4', 2, 17222)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1844, 8, 1844, 39), 'archinfo.arch.Register', 'Register', ({(1844, 17, 1844, 27): '"""vr20_8_9"""', (1844, 29, 1844, 30): '(1)', (1844, 32, 1844, 38): '(17222)'}, {}), "('vr20_8_9', 1, 17222)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1845, 8, 1845, 39), 'archinfo.arch.Register', 'Register', ({(1845, 17, 1845, 27): '"""vr20_8_8"""', (1845, 29, 1845, 30): '(1)', (1845, 32, 1845, 38): '(17223)'}, {}), "('vr20_8_8', 1, 17223)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1846, 8, 1846, 40), 'archinfo.arch.Register', 'Register', ({(1846, 17, 1846, 28): '"""vr20_64_0"""', (1846, 30, 1846, 31): '(8)', (1846, 33, 1846, 39): '(17224)'}, {}), "('vr20_64_0', 8, 17224)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1847, 8, 1847, 40), 'archinfo.arch.Register', 'Register', ({(1847, 17, 1847, 28): '"""vr20_32_1"""', (1847, 30, 1847, 31): '(4)', (1847, 33, 1847, 39): '(17224)'}, {}), "('vr20_32_1', 4, 17224)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1848, 8, 1848, 40), 'archinfo.arch.Register', 'Register', ({(1848, 17, 1848, 28): '"""vr20_16_3"""', (1848, 30, 1848, 31): '(2)', (1848, 33, 1848, 39): '(17224)'}, {}), "('vr20_16_3', 2, 17224)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1849, 8, 1849, 39), 'archinfo.arch.Register', 'Register', ({(1849, 17, 1849, 27): '"""vr20_8_7"""', (1849, 29, 1849, 30): '(1)', (1849, 32, 1849, 38): '(17224)'}, {}), "('vr20_8_7', 1, 17224)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1850, 8, 1850, 39), 'archinfo.arch.Register', 'Register', ({(1850, 17, 1850, 27): '"""vr20_8_6"""', (1850, 29, 1850, 30): '(1)', (1850, 32, 1850, 38): '(17225)'}, {}), "('vr20_8_6', 1, 17225)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1851, 8, 1851, 40), 'archinfo.arch.Register', 'Register', ({(1851, 17, 1851, 28): '"""vr20_16_2"""', (1851, 30, 1851, 31): '(2)', (1851, 33, 1851, 39): '(17226)'}, {}), "('vr20_16_2', 2, 17226)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1852, 8, 1852, 39), 'archinfo.arch.Register', 'Register', ({(1852, 17, 1852, 27): '"""vr20_8_5"""', (1852, 29, 1852, 30): '(1)', (1852, 32, 1852, 38): '(17226)'}, {}), "('vr20_8_5', 1, 17226)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1853, 8, 1853, 39), 'archinfo.arch.Register', 'Register', ({(1853, 17, 1853, 27): '"""vr20_8_4"""', (1853, 29, 1853, 30): '(1)', (1853, 32, 1853, 38): '(17227)'}, {}), "('vr20_8_4', 1, 17227)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1854, 8, 1854, 40), 'archinfo.arch.Register', 'Register', ({(1854, 17, 1854, 28): '"""vr20_32_0"""', (1854, 30, 1854, 31): '(4)', (1854, 33, 1854, 39): '(17228)'}, {}), "('vr20_32_0', 4, 17228)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1855, 8, 1855, 40), 'archinfo.arch.Register', 'Register', ({(1855, 17, 1855, 28): '"""vr20_16_1"""', (1855, 30, 1855, 31): '(2)', (1855, 33, 1855, 39): '(17228)'}, {}), "('vr20_16_1', 2, 17228)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1856, 8, 1856, 39), 'archinfo.arch.Register', 'Register', ({(1856, 17, 1856, 27): '"""vr20_8_3"""', (1856, 29, 1856, 30): '(1)', (1856, 32, 1856, 38): '(17228)'}, {}), "('vr20_8_3', 1, 17228)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1857, 8, 1857, 39), 'archinfo.arch.Register', 'Register', ({(1857, 17, 1857, 27): '"""vr20_8_2"""', (1857, 29, 1857, 30): '(1)', (1857, 32, 1857, 38): '(17229)'}, {}), "('vr20_8_2', 1, 17229)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1858, 8, 1858, 40), 'archinfo.arch.Register', 'Register', ({(1858, 17, 1858, 28): '"""vr20_16_0"""', (1858, 30, 1858, 31): '(2)', (1858, 33, 1858, 39): '(17230)'}, {}), "('vr20_16_0', 2, 17230)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1859, 8, 1859, 39), 'archinfo.arch.Register', 'Register', ({(1859, 17, 1859, 27): '"""vr20_8_1"""', (1859, 29, 1859, 30): '(1)', (1859, 32, 1859, 38): '(17230)'}, {}), "('vr20_8_1', 1, 17230)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1860, 8, 1860, 39), 'archinfo.arch.Register', 'Register', ({(1860, 17, 1860, 27): '"""vr20_8_0"""', (1860, 29, 1860, 30): '(1)', (1860, 32, 1860, 38): '(17231)'}, {}), "('vr20_8_0', 1, 17231)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1861, 8, 1861, 36), 'archinfo.arch.Register', 'Register', ({(1861, 17, 1861, 23): '"""vs53"""', (1861, 25, 1861, 27): '(16)', (1861, 29, 1861, 35): '(17232)'}, {}), "('vs53', 16, 17232)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1862, 8, 1862, 40), 'archinfo.arch.Register', 'Register', ({(1862, 17, 1862, 28): '"""vr21_64_1"""', (1862, 30, 1862, 31): '(8)', (1862, 33, 1862, 39): '(17232)'}, {}), "('vr21_64_1', 8, 17232)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1863, 8, 1863, 40), 'archinfo.arch.Register', 'Register', ({(1863, 17, 1863, 28): '"""vr21_32_3"""', (1863, 30, 1863, 31): '(4)', (1863, 33, 1863, 39): '(17232)'}, {}), "('vr21_32_3', 4, 17232)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1864, 8, 1864, 40), 'archinfo.arch.Register', 'Register', ({(1864, 17, 1864, 28): '"""vr21_16_7"""', (1864, 30, 1864, 31): '(2)', (1864, 33, 1864, 39): '(17232)'}, {}), "('vr21_16_7', 2, 17232)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1865, 8, 1865, 40), 'archinfo.arch.Register', 'Register', ({(1865, 17, 1865, 28): '"""vr21_8_15"""', (1865, 30, 1865, 31): '(1)', (1865, 33, 1865, 39): '(17232)'}, {}), "('vr21_8_15', 1, 17232)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1866, 8, 1866, 40), 'archinfo.arch.Register', 'Register', ({(1866, 17, 1866, 28): '"""vr21_8_14"""', (1866, 30, 1866, 31): '(1)', (1866, 33, 1866, 39): '(17233)'}, {}), "('vr21_8_14', 1, 17233)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1867, 8, 1867, 40), 'archinfo.arch.Register', 'Register', ({(1867, 17, 1867, 28): '"""vr21_16_6"""', (1867, 30, 1867, 31): '(2)', (1867, 33, 1867, 39): '(17234)'}, {}), "('vr21_16_6', 2, 17234)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1868, 8, 1868, 40), 'archinfo.arch.Register', 'Register', ({(1868, 17, 1868, 28): '"""vr21_8_13"""', (1868, 30, 1868, 31): '(1)', (1868, 33, 1868, 39): '(17234)'}, {}), "('vr21_8_13', 1, 17234)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1869, 8, 1869, 40), 'archinfo.arch.Register', 'Register', ({(1869, 17, 1869, 28): '"""vr21_8_12"""', (1869, 30, 1869, 31): '(1)', (1869, 33, 1869, 39): '(17235)'}, {}), "('vr21_8_12', 1, 17235)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1870, 8, 1870, 40), 'archinfo.arch.Register', 'Register', ({(1870, 17, 1870, 28): '"""vr21_32_2"""', (1870, 30, 1870, 31): '(4)', (1870, 33, 1870, 39): '(17236)'}, {}), "('vr21_32_2', 4, 17236)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1871, 8, 1871, 40), 'archinfo.arch.Register', 'Register', ({(1871, 17, 1871, 28): '"""vr21_16_5"""', (1871, 30, 1871, 31): '(2)', (1871, 33, 1871, 39): '(17236)'}, {}), "('vr21_16_5', 2, 17236)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1872, 8, 1872, 40), 'archinfo.arch.Register', 'Register', ({(1872, 17, 1872, 28): '"""vr21_8_11"""', (1872, 30, 1872, 31): '(1)', (1872, 33, 1872, 39): '(17236)'}, {}), "('vr21_8_11', 1, 17236)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1873, 8, 1873, 40), 'archinfo.arch.Register', 'Register', ({(1873, 17, 1873, 28): '"""vr21_8_10"""', (1873, 30, 1873, 31): '(1)', (1873, 33, 1873, 39): '(17237)'}, {}), "('vr21_8_10', 1, 17237)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1874, 8, 1874, 40), 'archinfo.arch.Register', 'Register', ({(1874, 17, 1874, 28): '"""vr21_16_4"""', (1874, 30, 1874, 31): '(2)', (1874, 33, 1874, 39): '(17238)'}, {}), "('vr21_16_4', 2, 17238)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1875, 8, 1875, 39), 'archinfo.arch.Register', 'Register', ({(1875, 17, 1875, 27): '"""vr21_8_9"""', (1875, 29, 1875, 30): '(1)', (1875, 32, 1875, 38): '(17238)'}, {}), "('vr21_8_9', 1, 17238)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1876, 8, 1876, 39), 'archinfo.arch.Register', 'Register', ({(1876, 17, 1876, 27): '"""vr21_8_8"""', (1876, 29, 1876, 30): '(1)', (1876, 32, 1876, 38): '(17239)'}, {}), "('vr21_8_8', 1, 17239)", False, 'from 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'Register', ({(1884, 17, 1884, 27): '"""vr21_8_4"""', (1884, 29, 1884, 30): '(1)', (1884, 32, 1884, 38): '(17243)'}, {}), "('vr21_8_4', 1, 17243)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1885, 8, 1885, 40), 'archinfo.arch.Register', 'Register', ({(1885, 17, 1885, 28): '"""vr21_32_0"""', (1885, 30, 1885, 31): '(4)', (1885, 33, 1885, 39): '(17244)'}, {}), "('vr21_32_0', 4, 17244)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1886, 8, 1886, 40), 'archinfo.arch.Register', 'Register', ({(1886, 17, 1886, 28): '"""vr21_16_1"""', (1886, 30, 1886, 31): '(2)', (1886, 33, 1886, 39): '(17244)'}, {}), "('vr21_16_1', 2, 17244)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1887, 8, 1887, 39), 'archinfo.arch.Register', 'Register', ({(1887, 17, 1887, 27): '"""vr21_8_3"""', (1887, 29, 1887, 30): '(1)', (1887, 32, 1887, 38): '(17244)'}, {}), "('vr21_8_3', 1, 17244)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1888, 8, 1888, 39), 'archinfo.arch.Register', 'Register', ({(1888, 17, 1888, 27): '"""vr21_8_2"""', (1888, 29, 1888, 30): '(1)', (1888, 32, 1888, 38): '(17245)'}, {}), "('vr21_8_2', 1, 17245)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1889, 8, 1889, 40), 'archinfo.arch.Register', 'Register', ({(1889, 17, 1889, 28): '"""vr21_16_0"""', (1889, 30, 1889, 31): '(2)', (1889, 33, 1889, 39): '(17246)'}, {}), "('vr21_16_0', 2, 17246)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1890, 8, 1890, 39), 'archinfo.arch.Register', 'Register', ({(1890, 17, 1890, 27): '"""vr21_8_1"""', (1890, 29, 1890, 30): '(1)', (1890, 32, 1890, 38): '(17246)'}, {}), "('vr21_8_1', 1, 17246)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1891, 8, 1891, 39), 'archinfo.arch.Register', 'Register', ({(1891, 17, 1891, 27): '"""vr21_8_0"""', (1891, 29, 1891, 30): '(1)', (1891, 32, 1891, 38): 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'"""vr22_16_7"""', (1895, 30, 1895, 31): '(2)', (1895, 33, 1895, 39): '(17248)'}, {}), "('vr22_16_7', 2, 17248)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1896, 8, 1896, 40), 'archinfo.arch.Register', 'Register', ({(1896, 17, 1896, 28): '"""vr22_8_15"""', (1896, 30, 1896, 31): '(1)', (1896, 33, 1896, 39): '(17248)'}, {}), "('vr22_8_15', 1, 17248)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1897, 8, 1897, 40), 'archinfo.arch.Register', 'Register', ({(1897, 17, 1897, 28): '"""vr22_8_14"""', (1897, 30, 1897, 31): '(1)', (1897, 33, 1897, 39): '(17249)'}, {}), "('vr22_8_14', 1, 17249)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1898, 8, 1898, 40), 'archinfo.arch.Register', 'Register', ({(1898, 17, 1898, 28): '"""vr22_16_6"""', (1898, 30, 1898, 31): '(2)', (1898, 33, 1898, 39): '(17250)'}, {}), "('vr22_16_6', 2, 17250)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1899, 8, 1899, 40), 'archinfo.arch.Register', 'Register', ({(1899, 17, 1899, 28): '"""vr22_8_13"""', (1899, 30, 1899, 31): '(1)', (1899, 33, 1899, 39): '(17250)'}, {}), "('vr22_8_13', 1, 17250)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1900, 8, 1900, 40), 'archinfo.arch.Register', 'Register', ({(1900, 17, 1900, 28): '"""vr22_8_12"""', (1900, 30, 1900, 31): '(1)', (1900, 33, 1900, 39): '(17251)'}, {}), "('vr22_8_12', 1, 17251)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1901, 8, 1901, 40), 'archinfo.arch.Register', 'Register', ({(1901, 17, 1901, 28): '"""vr22_32_2"""', (1901, 30, 1901, 31): '(4)', (1901, 33, 1901, 39): '(17252)'}, {}), "('vr22_32_2', 4, 17252)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1902, 8, 1902, 40), 'archinfo.arch.Register', 'Register', ({(1902, 17, 1902, 28): '"""vr22_16_5"""', (1902, 30, 1902, 31): '(2)', (1902, 33, 1902, 39): '(17252)'}, {}), "('vr22_16_5', 2, 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29, 1906, 30): '(1)', (1906, 32, 1906, 38): '(17254)'}, {}), "('vr22_8_9', 1, 17254)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1907, 8, 1907, 39), 'archinfo.arch.Register', 'Register', ({(1907, 17, 1907, 27): '"""vr22_8_8"""', (1907, 29, 1907, 30): '(1)', (1907, 32, 1907, 38): '(17255)'}, {}), "('vr22_8_8', 1, 17255)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1908, 8, 1908, 40), 'archinfo.arch.Register', 'Register', ({(1908, 17, 1908, 28): '"""vr22_64_0"""', (1908, 30, 1908, 31): '(8)', (1908, 33, 1908, 39): '(17256)'}, {}), "('vr22_64_0', 8, 17256)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1909, 8, 1909, 40), 'archinfo.arch.Register', 'Register', ({(1909, 17, 1909, 28): '"""vr22_32_1"""', (1909, 30, 1909, 31): '(4)', (1909, 33, 1909, 39): '(17256)'}, {}), "('vr22_32_1', 4, 17256)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1910, 8, 1910, 40), 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archinfo.arch import register_arch, Endness, Register\n'), ((1914, 8, 1914, 39), 'archinfo.arch.Register', 'Register', ({(1914, 17, 1914, 27): '"""vr22_8_5"""', (1914, 29, 1914, 30): '(1)', (1914, 32, 1914, 38): '(17258)'}, {}), "('vr22_8_5', 1, 17258)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1915, 8, 1915, 39), 'archinfo.arch.Register', 'Register', ({(1915, 17, 1915, 27): '"""vr22_8_4"""', (1915, 29, 1915, 30): '(1)', (1915, 32, 1915, 38): '(17259)'}, {}), "('vr22_8_4', 1, 17259)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1916, 8, 1916, 40), 'archinfo.arch.Register', 'Register', ({(1916, 17, 1916, 28): '"""vr22_32_0"""', (1916, 30, 1916, 31): '(4)', (1916, 33, 1916, 39): '(17260)'}, {}), "('vr22_32_0', 4, 17260)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1917, 8, 1917, 40), 'archinfo.arch.Register', 'Register', ({(1917, 17, 1917, 28): '"""vr22_16_1"""', (1917, 30, 1917, 31): '(2)', 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'Register', ({(1921, 17, 1921, 27): '"""vr22_8_1"""', (1921, 29, 1921, 30): '(1)', (1921, 32, 1921, 38): '(17262)'}, {}), "('vr22_8_1', 1, 17262)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1922, 8, 1922, 39), 'archinfo.arch.Register', 'Register', ({(1922, 17, 1922, 27): '"""vr22_8_0"""', (1922, 29, 1922, 30): '(1)', (1922, 32, 1922, 38): '(17263)'}, {}), "('vr22_8_0', 1, 17263)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1923, 8, 1923, 36), 'archinfo.arch.Register', 'Register', ({(1923, 17, 1923, 23): '"""vs55"""', (1923, 25, 1923, 27): '(16)', (1923, 29, 1923, 35): '(17264)'}, {}), "('vs55', 16, 17264)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1924, 8, 1924, 40), 'archinfo.arch.Register', 'Register', ({(1924, 17, 1924, 28): '"""vr23_64_1"""', (1924, 30, 1924, 31): '(8)', (1924, 33, 1924, 39): '(17264)'}, {}), "('vr23_64_1', 8, 17264)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1925, 8, 1925, 40), 'archinfo.arch.Register', 'Register', ({(1925, 17, 1925, 28): '"""vr23_32_3"""', (1925, 30, 1925, 31): '(4)', (1925, 33, 1925, 39): '(17264)'}, {}), "('vr23_32_3', 4, 17264)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1926, 8, 1926, 40), 'archinfo.arch.Register', 'Register', ({(1926, 17, 1926, 28): '"""vr23_16_7"""', (1926, 30, 1926, 31): '(2)', (1926, 33, 1926, 39): '(17264)'}, {}), "('vr23_16_7', 2, 17264)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1927, 8, 1927, 40), 'archinfo.arch.Register', 'Register', ({(1927, 17, 1927, 28): '"""vr23_8_15"""', (1927, 30, 1927, 31): '(1)', (1927, 33, 1927, 39): '(17264)'}, {}), "('vr23_8_15', 1, 17264)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1928, 8, 1928, 40), 'archinfo.arch.Register', 'Register', ({(1928, 17, 1928, 28): '"""vr23_8_14"""', (1928, 30, 1928, 31): '(1)', (1928, 33, 1928, 39): '(17265)'}, {}), "('vr23_8_14', 1, 17265)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1929, 8, 1929, 40), 'archinfo.arch.Register', 'Register', ({(1929, 17, 1929, 28): '"""vr23_16_6"""', (1929, 30, 1929, 31): '(2)', (1929, 33, 1929, 39): '(17266)'}, {}), "('vr23_16_6', 2, 17266)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1930, 8, 1930, 40), 'archinfo.arch.Register', 'Register', ({(1930, 17, 1930, 28): '"""vr23_8_13"""', (1930, 30, 1930, 31): '(1)', (1930, 33, 1930, 39): '(17266)'}, {}), "('vr23_8_13', 1, 17266)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1931, 8, 1931, 40), 'archinfo.arch.Register', 'Register', ({(1931, 17, 1931, 28): '"""vr23_8_12"""', (1931, 30, 1931, 31): '(1)', (1931, 33, 1931, 39): '(17267)'}, {}), "('vr23_8_12', 1, 17267)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1932, 8, 1932, 40), 'archinfo.arch.Register', 'Register', ({(1932, 17, 1932, 28): '"""vr23_32_2"""', (1932, 30, 1932, 31): '(4)', (1932, 33, 1932, 39): '(17268)'}, {}), "('vr23_32_2', 4, 17268)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1933, 8, 1933, 40), 'archinfo.arch.Register', 'Register', ({(1933, 17, 1933, 28): '"""vr23_16_5"""', (1933, 30, 1933, 31): '(2)', (1933, 33, 1933, 39): '(17268)'}, {}), "('vr23_16_5', 2, 17268)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1934, 8, 1934, 40), 'archinfo.arch.Register', 'Register', ({(1934, 17, 1934, 28): '"""vr23_8_11"""', (1934, 30, 1934, 31): '(1)', (1934, 33, 1934, 39): '(17268)'}, {}), "('vr23_8_11', 1, 17268)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1935, 8, 1935, 40), 'archinfo.arch.Register', 'Register', ({(1935, 17, 1935, 28): '"""vr23_8_10"""', (1935, 30, 1935, 31): '(1)', (1935, 33, 1935, 39): '(17269)'}, {}), "('vr23_8_10', 1, 17269)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1936, 8, 1936, 40), 'archinfo.arch.Register', 'Register', ({(1936, 17, 1936, 28): '"""vr23_16_4"""', (1936, 30, 1936, 31): '(2)', (1936, 33, 1936, 39): '(17270)'}, {}), "('vr23_16_4', 2, 17270)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1937, 8, 1937, 39), 'archinfo.arch.Register', 'Register', ({(1937, 17, 1937, 27): '"""vr23_8_9"""', (1937, 29, 1937, 30): '(1)', (1937, 32, 1937, 38): '(17270)'}, {}), "('vr23_8_9', 1, 17270)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1938, 8, 1938, 39), 'archinfo.arch.Register', 'Register', ({(1938, 17, 1938, 27): '"""vr23_8_8"""', (1938, 29, 1938, 30): '(1)', (1938, 32, 1938, 38): '(17271)'}, {}), "('vr23_8_8', 1, 17271)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1939, 8, 1939, 40), 'archinfo.arch.Register', 'Register', ({(1939, 17, 1939, 28): '"""vr23_64_0"""', (1939, 30, 1939, 31): '(8)', (1939, 33, 1939, 39): '(17272)'}, {}), "('vr23_64_0', 8, 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'archinfo.arch.Register', 'Register', ({(1984, 17, 1984, 27): '"""vr24_8_0"""', (1984, 29, 1984, 30): '(1)', (1984, 32, 1984, 38): '(17295)'}, {}), "('vr24_8_0', 1, 17295)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1985, 8, 1985, 36), 'archinfo.arch.Register', 'Register', ({(1985, 17, 1985, 23): '"""vs57"""', (1985, 25, 1985, 27): '(16)', (1985, 29, 1985, 35): '(17296)'}, {}), "('vs57', 16, 17296)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1986, 8, 1986, 40), 'archinfo.arch.Register', 'Register', ({(1986, 17, 1986, 28): '"""vr25_64_1"""', (1986, 30, 1986, 31): '(8)', (1986, 33, 1986, 39): '(17296)'}, {}), "('vr25_64_1', 8, 17296)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1987, 8, 1987, 40), 'archinfo.arch.Register', 'Register', ({(1987, 17, 1987, 28): '"""vr25_32_3"""', (1987, 30, 1987, 31): '(4)', (1987, 33, 1987, 39): '(17296)'}, {}), "('vr25_32_3', 4, 17296)", False, 'from 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'Register', ({(1995, 17, 1995, 28): '"""vr25_16_5"""', (1995, 30, 1995, 31): '(2)', (1995, 33, 1995, 39): '(17300)'}, {}), "('vr25_16_5', 2, 17300)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1996, 8, 1996, 40), 'archinfo.arch.Register', 'Register', ({(1996, 17, 1996, 28): '"""vr25_8_11"""', (1996, 30, 1996, 31): '(1)', (1996, 33, 1996, 39): '(17300)'}, {}), "('vr25_8_11', 1, 17300)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1997, 8, 1997, 40), 'archinfo.arch.Register', 'Register', ({(1997, 17, 1997, 28): '"""vr25_8_10"""', (1997, 30, 1997, 31): '(1)', (1997, 33, 1997, 39): '(17301)'}, {}), "('vr25_8_10', 1, 17301)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1998, 8, 1998, 40), 'archinfo.arch.Register', 'Register', ({(1998, 17, 1998, 28): '"""vr25_16_4"""', (1998, 30, 1998, 31): '(2)', (1998, 33, 1998, 39): '(17302)'}, {}), "('vr25_16_4', 2, 17302)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((1999, 8, 1999, 39), 'archinfo.arch.Register', 'Register', ({(1999, 17, 1999, 27): '"""vr25_8_9"""', (1999, 29, 1999, 30): '(1)', (1999, 32, 1999, 38): '(17302)'}, {}), "('vr25_8_9', 1, 17302)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2000, 8, 2000, 39), 'archinfo.arch.Register', 'Register', ({(2000, 17, 2000, 27): '"""vr25_8_8"""', (2000, 29, 2000, 30): '(1)', (2000, 32, 2000, 38): '(17303)'}, {}), "('vr25_8_8', 1, 17303)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2001, 8, 2001, 40), 'archinfo.arch.Register', 'Register', ({(2001, 17, 2001, 28): '"""vr25_64_0"""', (2001, 30, 2001, 31): '(8)', (2001, 33, 2001, 39): '(17304)'}, {}), "('vr25_64_0', 8, 17304)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2002, 8, 2002, 40), 'archinfo.arch.Register', 'Register', ({(2002, 17, 2002, 28): '"""vr25_32_1"""', (2002, 30, 2002, 31): '(4)', (2002, 33, 2002, 39): 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28): '"""vr25_16_2"""', (2006, 30, 2006, 31): '(2)', (2006, 33, 2006, 39): '(17306)'}, {}), "('vr25_16_2', 2, 17306)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2007, 8, 2007, 39), 'archinfo.arch.Register', 'Register', ({(2007, 17, 2007, 27): '"""vr25_8_5"""', (2007, 29, 2007, 30): '(1)', (2007, 32, 2007, 38): '(17306)'}, {}), "('vr25_8_5', 1, 17306)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2008, 8, 2008, 39), 'archinfo.arch.Register', 'Register', ({(2008, 17, 2008, 27): '"""vr25_8_4"""', (2008, 29, 2008, 30): '(1)', (2008, 32, 2008, 38): '(17307)'}, {}), "('vr25_8_4', 1, 17307)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2009, 8, 2009, 40), 'archinfo.arch.Register', 'Register', ({(2009, 17, 2009, 28): '"""vr25_32_0"""', (2009, 30, 2009, 31): '(4)', (2009, 33, 2009, 39): '(17308)'}, {}), "('vr25_32_0', 4, 17308)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2010, 8, 2010, 40), 'archinfo.arch.Register', 'Register', ({(2010, 17, 2010, 28): '"""vr25_16_1"""', (2010, 30, 2010, 31): '(2)', (2010, 33, 2010, 39): '(17308)'}, {}), "('vr25_16_1', 2, 17308)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2011, 8, 2011, 39), 'archinfo.arch.Register', 'Register', ({(2011, 17, 2011, 27): '"""vr25_8_3"""', (2011, 29, 2011, 30): '(1)', (2011, 32, 2011, 38): '(17308)'}, {}), "('vr25_8_3', 1, 17308)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2012, 8, 2012, 39), 'archinfo.arch.Register', 'Register', ({(2012, 17, 2012, 27): '"""vr25_8_2"""', (2012, 29, 2012, 30): '(1)', (2012, 32, 2012, 38): '(17309)'}, {}), "('vr25_8_2', 1, 17309)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2013, 8, 2013, 40), 'archinfo.arch.Register', 'Register', ({(2013, 17, 2013, 28): '"""vr25_16_0"""', (2013, 30, 2013, 31): '(2)', (2013, 33, 2013, 39): '(17310)'}, {}), "('vr25_16_0', 2, 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'Register', ({(2069, 17, 2069, 27): '"""vr27_8_5"""', (2069, 29, 2069, 30): '(1)', (2069, 32, 2069, 38): '(17338)'}, {}), "('vr27_8_5', 1, 17338)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2070, 8, 2070, 39), 'archinfo.arch.Register', 'Register', ({(2070, 17, 2070, 27): '"""vr27_8_4"""', (2070, 29, 2070, 30): '(1)', (2070, 32, 2070, 38): '(17339)'}, {}), "('vr27_8_4', 1, 17339)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2071, 8, 2071, 40), 'archinfo.arch.Register', 'Register', ({(2071, 17, 2071, 28): '"""vr27_32_0"""', (2071, 30, 2071, 31): '(4)', (2071, 33, 2071, 39): '(17340)'}, {}), "('vr27_32_0', 4, 17340)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2072, 8, 2072, 40), 'archinfo.arch.Register', 'Register', ({(2072, 17, 2072, 28): '"""vr27_16_1"""', (2072, 30, 2072, 31): '(2)', (2072, 33, 2072, 39): '(17340)'}, {}), "('vr27_16_1', 2, 17340)", False, 'from archinfo.arch import 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Endness, Register\n'), ((2110, 8, 2110, 40), 'archinfo.arch.Register', 'Register', ({(2110, 17, 2110, 28): '"""vr29_64_1"""', (2110, 30, 2110, 31): '(8)', (2110, 33, 2110, 39): '(17360)'}, {}), "('vr29_64_1', 8, 17360)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2111, 8, 2111, 40), 'archinfo.arch.Register', 'Register', ({(2111, 17, 2111, 28): '"""vr29_32_3"""', (2111, 30, 2111, 31): '(4)', (2111, 33, 2111, 39): '(17360)'}, {}), "('vr29_32_3', 4, 17360)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2112, 8, 2112, 40), 'archinfo.arch.Register', 'Register', ({(2112, 17, 2112, 28): '"""vr29_16_7"""', (2112, 30, 2112, 31): '(2)', (2112, 33, 2112, 39): '(17360)'}, {}), "('vr29_16_7', 2, 17360)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2113, 8, 2113, 40), 'archinfo.arch.Register', 'Register', ({(2113, 17, 2113, 28): '"""vr29_8_15"""', (2113, 30, 2113, 31): '(1)', (2113, 33, 2113, 39): '(17360)'}, {}), "('vr29_8_15', 1, 17360)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2114, 8, 2114, 40), 'archinfo.arch.Register', 'Register', ({(2114, 17, 2114, 28): '"""vr29_8_14"""', (2114, 30, 2114, 31): '(1)', (2114, 33, 2114, 39): '(17361)'}, {}), "('vr29_8_14', 1, 17361)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2115, 8, 2115, 40), 'archinfo.arch.Register', 'Register', ({(2115, 17, 2115, 28): '"""vr29_16_6"""', (2115, 30, 2115, 31): '(2)', (2115, 33, 2115, 39): '(17362)'}, {}), "('vr29_16_6', 2, 17362)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2116, 8, 2116, 40), 'archinfo.arch.Register', 'Register', ({(2116, 17, 2116, 28): '"""vr29_8_13"""', (2116, 30, 2116, 31): '(1)', (2116, 33, 2116, 39): '(17362)'}, {}), "('vr29_8_13', 1, 17362)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2117, 8, 2117, 40), 'archinfo.arch.Register', 'Register', ({(2117, 17, 2117, 28): '"""vr29_8_12"""', (2117, 30, 2117, 31): '(1)', (2117, 33, 2117, 39): '(17363)'}, {}), "('vr29_8_12', 1, 17363)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2118, 8, 2118, 40), 'archinfo.arch.Register', 'Register', ({(2118, 17, 2118, 28): '"""vr29_32_2"""', (2118, 30, 2118, 31): '(4)', (2118, 33, 2118, 39): '(17364)'}, {}), "('vr29_32_2', 4, 17364)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2119, 8, 2119, 40), 'archinfo.arch.Register', 'Register', ({(2119, 17, 2119, 28): '"""vr29_16_5"""', (2119, 30, 2119, 31): '(2)', (2119, 33, 2119, 39): '(17364)'}, {}), "('vr29_16_5', 2, 17364)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2120, 8, 2120, 40), 'archinfo.arch.Register', 'Register', ({(2120, 17, 2120, 28): '"""vr29_8_11"""', (2120, 30, 2120, 31): '(1)', (2120, 33, 2120, 39): '(17364)'}, {}), "('vr29_8_11', 1, 17364)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2121, 8, 2121, 40), 'archinfo.arch.Register', 'Register', ({(2121, 17, 2121, 28): '"""vr29_8_10"""', (2121, 30, 2121, 31): '(1)', (2121, 33, 2121, 39): '(17365)'}, {}), "('vr29_8_10', 1, 17365)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2122, 8, 2122, 40), 'archinfo.arch.Register', 'Register', ({(2122, 17, 2122, 28): '"""vr29_16_4"""', (2122, 30, 2122, 31): '(2)', (2122, 33, 2122, 39): '(17366)'}, {}), "('vr29_16_4', 2, 17366)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2123, 8, 2123, 39), 'archinfo.arch.Register', 'Register', ({(2123, 17, 2123, 27): '"""vr29_8_9"""', (2123, 29, 2123, 30): '(1)', (2123, 32, 2123, 38): '(17366)'}, {}), "('vr29_8_9', 1, 17366)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2124, 8, 2124, 39), 'archinfo.arch.Register', 'Register', ({(2124, 17, 2124, 27): '"""vr29_8_8"""', (2124, 29, 2124, 30): '(1)', (2124, 32, 2124, 38): '(17367)'}, {}), "('vr29_8_8', 1, 17367)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2125, 8, 2125, 40), 'archinfo.arch.Register', 'Register', ({(2125, 17, 2125, 28): '"""vr29_64_0"""', (2125, 30, 2125, 31): '(8)', (2125, 33, 2125, 39): '(17368)'}, {}), "('vr29_64_0', 8, 17368)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2126, 8, 2126, 40), 'archinfo.arch.Register', 'Register', ({(2126, 17, 2126, 28): '"""vr29_32_1"""', (2126, 30, 2126, 31): '(4)', (2126, 33, 2126, 39): '(17368)'}, {}), "('vr29_32_1', 4, 17368)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2127, 8, 2127, 40), 'archinfo.arch.Register', 'Register', ({(2127, 17, 2127, 28): '"""vr29_16_3"""', (2127, 30, 2127, 31): '(2)', (2127, 33, 2127, 39): '(17368)'}, {}), "('vr29_16_3', 2, 17368)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2128, 8, 2128, 39), 'archinfo.arch.Register', 'Register', ({(2128, 17, 2128, 27): '"""vr29_8_7"""', (2128, 29, 2128, 30): '(1)', (2128, 32, 2128, 38): '(17368)'}, {}), "('vr29_8_7', 1, 17368)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2129, 8, 2129, 39), 'archinfo.arch.Register', 'Register', ({(2129, 17, 2129, 27): '"""vr29_8_6"""', (2129, 29, 2129, 30): '(1)', (2129, 32, 2129, 38): '(17369)'}, {}), "('vr29_8_6', 1, 17369)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2130, 8, 2130, 40), 'archinfo.arch.Register', 'Register', ({(2130, 17, 2130, 28): '"""vr29_16_2"""', (2130, 30, 2130, 31): '(2)', (2130, 33, 2130, 39): '(17370)'}, {}), "('vr29_16_2', 2, 17370)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2131, 8, 2131, 39), 'archinfo.arch.Register', 'Register', ({(2131, 17, 2131, 27): '"""vr29_8_5"""', (2131, 29, 2131, 30): '(1)', (2131, 32, 2131, 38): '(17370)'}, {}), "('vr29_8_5', 1, 17370)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2132, 8, 2132, 39), 'archinfo.arch.Register', 'Register', ({(2132, 17, 2132, 27): '"""vr29_8_4"""', (2132, 29, 2132, 30): '(1)', (2132, 32, 2132, 38): '(17371)'}, {}), "('vr29_8_4', 1, 17371)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2133, 8, 2133, 40), 'archinfo.arch.Register', 'Register', ({(2133, 17, 2133, 28): '"""vr29_32_0"""', (2133, 30, 2133, 31): '(4)', (2133, 33, 2133, 39): '(17372)'}, {}), "('vr29_32_0', 4, 17372)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2134, 8, 2134, 40), 'archinfo.arch.Register', 'Register', ({(2134, 17, 2134, 28): '"""vr29_16_1"""', (2134, 30, 2134, 31): '(2)', (2134, 33, 2134, 39): '(17372)'}, {}), "('vr29_16_1', 2, 17372)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2135, 8, 2135, 39), 'archinfo.arch.Register', 'Register', ({(2135, 17, 2135, 27): '"""vr29_8_3"""', (2135, 29, 2135, 30): '(1)', (2135, 32, 2135, 38): '(17372)'}, {}), "('vr29_8_3', 1, 17372)", False, 'from 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Endness, Register\n'), ((2184, 8, 2184, 40), 'archinfo.arch.Register', 'Register', ({(2184, 17, 2184, 28): '"""vr31_16_4"""', (2184, 30, 2184, 31): '(2)', (2184, 33, 2184, 39): '(17398)'}, {}), "('vr31_16_4', 2, 17398)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2185, 8, 2185, 39), 'archinfo.arch.Register', 'Register', ({(2185, 17, 2185, 27): '"""vr31_8_9"""', (2185, 29, 2185, 30): '(1)', (2185, 32, 2185, 38): '(17398)'}, {}), "('vr31_8_9', 1, 17398)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2186, 8, 2186, 39), 'archinfo.arch.Register', 'Register', ({(2186, 17, 2186, 27): '"""vr31_8_8"""', (2186, 29, 2186, 30): '(1)', (2186, 32, 2186, 38): '(17399)'}, {}), "('vr31_8_8', 1, 17399)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2187, 8, 2187, 40), 'archinfo.arch.Register', 'Register', ({(2187, 17, 2187, 28): '"""vr31_64_0"""', (2187, 30, 2187, 31): '(8)', (2187, 33, 2187, 39): '(17400)'}, {}), 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'from archinfo.arch import register_arch, Endness, Register\n'), ((2199, 8, 2199, 40), 'archinfo.arch.Register', 'Register', ({(2199, 17, 2199, 28): '"""vr31_16_0"""', (2199, 30, 2199, 31): '(2)', (2199, 33, 2199, 39): '(17406)'}, {}), "('vr31_16_0', 2, 17406)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2200, 8, 2200, 39), 'archinfo.arch.Register', 'Register', ({(2200, 17, 2200, 27): '"""vr31_8_1"""', (2200, 29, 2200, 30): '(1)', (2200, 32, 2200, 38): '(17406)'}, {}), "('vr31_8_1', 1, 17406)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2201, 8, 2201, 39), 'archinfo.arch.Register', 'Register', ({(2201, 17, 2201, 27): '"""vr31_8_0"""', (2201, 29, 2201, 30): '(1)', (2201, 32, 2201, 38): '(17407)'}, {}), "('vr31_8_0', 1, 17407)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2202, 8, 2202, 41), 'archinfo.arch.Register', 'Register', ({(2202, 17, 2202, 29): '"""contextreg"""', (2202, 31, 2202, 32): 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({(2206, 17, 2206, 25): '"""dcr003"""', (2206, 27, 2206, 28): '(4)', (2206, 30, 2206, 36): '(28684)'}, {}), "('dcr003', 4, 28684)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2207, 8, 2207, 37), 'archinfo.arch.Register', 'Register', ({(2207, 17, 2207, 25): '"""dcr004"""', (2207, 27, 2207, 28): '(4)', (2207, 30, 2207, 36): '(28688)'}, {}), "('dcr004', 4, 28688)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2208, 8, 2208, 37), 'archinfo.arch.Register', 'Register', ({(2208, 17, 2208, 25): '"""dcr005"""', (2208, 27, 2208, 28): '(4)', (2208, 30, 2208, 36): '(28692)'}, {}), "('dcr005', 4, 28692)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2209, 8, 2209, 37), 'archinfo.arch.Register', 'Register', ({(2209, 17, 2209, 25): '"""dcr006"""', (2209, 27, 2209, 28): '(4)', (2209, 30, 2209, 36): '(28696)'}, {}), "('dcr006', 4, 28696)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2210, 8, 2210, 37), 'archinfo.arch.Register', 'Register', ({(2210, 17, 2210, 25): '"""dcr007"""', (2210, 27, 2210, 28): '(4)', (2210, 30, 2210, 36): '(28700)'}, {}), "('dcr007', 4, 28700)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2211, 8, 2211, 37), 'archinfo.arch.Register', 'Register', ({(2211, 17, 2211, 25): '"""dcr008"""', (2211, 27, 2211, 28): '(4)', (2211, 30, 2211, 36): '(28704)'}, {}), "('dcr008', 4, 28704)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2212, 8, 2212, 37), 'archinfo.arch.Register', 'Register', ({(2212, 17, 2212, 25): '"""dcr009"""', (2212, 27, 2212, 28): '(4)', (2212, 30, 2212, 36): '(28708)'}, {}), "('dcr009', 4, 28708)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2213, 8, 2213, 37), 'archinfo.arch.Register', 'Register', ({(2213, 17, 2213, 25): '"""dcr00a"""', (2213, 27, 2213, 28): '(4)', (2213, 30, 2213, 36): '(28712)'}, {}), "('dcr00a', 4, 28712)", False, 'from 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36): '(28728)'}, {}), "('dcr00e', 4, 28728)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2218, 8, 2218, 37), 'archinfo.arch.Register', 'Register', ({(2218, 17, 2218, 25): '"""dcr00f"""', (2218, 27, 2218, 28): '(4)', (2218, 30, 2218, 36): '(28732)'}, {}), "('dcr00f', 4, 28732)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2219, 8, 2219, 37), 'archinfo.arch.Register', 'Register', ({(2219, 17, 2219, 25): '"""dcr010"""', (2219, 27, 2219, 28): '(4)', (2219, 30, 2219, 36): '(28736)'}, {}), "('dcr010', 4, 28736)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2220, 8, 2220, 37), 'archinfo.arch.Register', 'Register', ({(2220, 17, 2220, 25): '"""dcr011"""', (2220, 27, 2220, 28): '(4)', (2220, 30, 2220, 36): '(28740)'}, {}), "('dcr011', 4, 28740)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2221, 8, 2221, 37), 'archinfo.arch.Register', 'Register', ({(2221, 17, 2221, 25): '"""dcr012"""', (2221, 27, 2221, 28): '(4)', (2221, 30, 2221, 36): '(28744)'}, {}), "('dcr012', 4, 28744)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2222, 8, 2222, 37), 'archinfo.arch.Register', 'Register', ({(2222, 17, 2222, 25): '"""dcr013"""', (2222, 27, 2222, 28): '(4)', (2222, 30, 2222, 36): '(28748)'}, {}), "('dcr013', 4, 28748)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2223, 8, 2223, 37), 'archinfo.arch.Register', 'Register', ({(2223, 17, 2223, 25): '"""dcr014"""', (2223, 27, 2223, 28): '(4)', (2223, 30, 2223, 36): '(28752)'}, {}), "('dcr014', 4, 28752)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2224, 8, 2224, 37), 'archinfo.arch.Register', 'Register', ({(2224, 17, 2224, 25): '"""dcr015"""', (2224, 27, 2224, 28): '(4)', (2224, 30, 2224, 36): '(28756)'}, {}), "('dcr015', 4, 28756)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2225, 8, 2225, 37), 'archinfo.arch.Register', 'Register', ({(2225, 17, 2225, 25): '"""dcr016"""', (2225, 27, 2225, 28): '(4)', (2225, 30, 2225, 36): '(28760)'}, {}), "('dcr016', 4, 28760)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2226, 8, 2226, 37), 'archinfo.arch.Register', 'Register', ({(2226, 17, 2226, 25): '"""dcr017"""', (2226, 27, 2226, 28): '(4)', (2226, 30, 2226, 36): '(28764)'}, {}), "('dcr017', 4, 28764)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2227, 8, 2227, 37), 'archinfo.arch.Register', 'Register', ({(2227, 17, 2227, 25): '"""dcr018"""', (2227, 27, 2227, 28): '(4)', (2227, 30, 2227, 36): '(28768)'}, {}), "('dcr018', 4, 28768)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2228, 8, 2228, 37), 'archinfo.arch.Register', 'Register', ({(2228, 17, 2228, 25): '"""dcr019"""', (2228, 27, 2228, 28): '(4)', (2228, 30, 2228, 36): '(28772)'}, {}), "('dcr019', 4, 28772)", False, 'from archinfo.arch import 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"('dcr01d', 4, 28788)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2233, 8, 2233, 37), 'archinfo.arch.Register', 'Register', ({(2233, 17, 2233, 25): '"""dcr01e"""', (2233, 27, 2233, 28): '(4)', (2233, 30, 2233, 36): '(28792)'}, {}), "('dcr01e', 4, 28792)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2234, 8, 2234, 37), 'archinfo.arch.Register', 'Register', ({(2234, 17, 2234, 25): '"""dcr01f"""', (2234, 27, 2234, 28): '(4)', (2234, 30, 2234, 36): '(28796)'}, {}), "('dcr01f', 4, 28796)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2235, 8, 2235, 37), 'archinfo.arch.Register', 'Register', ({(2235, 17, 2235, 25): '"""dcr020"""', (2235, 27, 2235, 28): '(4)', (2235, 30, 2235, 36): '(28800)'}, {}), "('dcr020', 4, 28800)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2236, 8, 2236, 37), 'archinfo.arch.Register', 'Register', ({(2236, 17, 2236, 25): '"""dcr021"""', (2236, 27, 2236, 28): '(4)', (2236, 30, 2236, 36): '(28804)'}, {}), "('dcr021', 4, 28804)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2237, 8, 2237, 37), 'archinfo.arch.Register', 'Register', ({(2237, 17, 2237, 25): '"""dcr022"""', (2237, 27, 2237, 28): '(4)', (2237, 30, 2237, 36): '(28808)'}, {}), "('dcr022', 4, 28808)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2238, 8, 2238, 37), 'archinfo.arch.Register', 'Register', ({(2238, 17, 2238, 25): '"""dcr023"""', (2238, 27, 2238, 28): '(4)', (2238, 30, 2238, 36): '(28812)'}, {}), "('dcr023', 4, 28812)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2239, 8, 2239, 37), 'archinfo.arch.Register', 'Register', ({(2239, 17, 2239, 25): '"""dcr024"""', (2239, 27, 2239, 28): '(4)', (2239, 30, 2239, 36): '(28816)'}, {}), "('dcr024', 4, 28816)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2240, 8, 2240, 37), 'archinfo.arch.Register', 'Register', ({(2240, 17, 2240, 25): '"""dcr025"""', (2240, 27, 2240, 28): '(4)', (2240, 30, 2240, 36): '(28820)'}, {}), "('dcr025', 4, 28820)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2241, 8, 2241, 37), 'archinfo.arch.Register', 'Register', ({(2241, 17, 2241, 25): '"""dcr026"""', (2241, 27, 2241, 28): '(4)', (2241, 30, 2241, 36): '(28824)'}, {}), "('dcr026', 4, 28824)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2242, 8, 2242, 37), 'archinfo.arch.Register', 'Register', ({(2242, 17, 2242, 25): '"""dcr027"""', (2242, 27, 2242, 28): '(4)', (2242, 30, 2242, 36): '(28828)'}, {}), "('dcr027', 4, 28828)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2243, 8, 2243, 37), 'archinfo.arch.Register', 'Register', ({(2243, 17, 2243, 25): '"""dcr028"""', (2243, 27, 2243, 28): '(4)', (2243, 30, 2243, 36): '(28832)'}, {}), "('dcr028', 4, 28832)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2244, 8, 2244, 37), 'archinfo.arch.Register', 'Register', ({(2244, 17, 2244, 25): '"""dcr029"""', (2244, 27, 2244, 28): '(4)', (2244, 30, 2244, 36): '(28836)'}, {}), "('dcr029', 4, 28836)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2245, 8, 2245, 37), 'archinfo.arch.Register', 'Register', ({(2245, 17, 2245, 25): '"""dcr02a"""', (2245, 27, 2245, 28): '(4)', (2245, 30, 2245, 36): '(28840)'}, {}), "('dcr02a', 4, 28840)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2246, 8, 2246, 37), 'archinfo.arch.Register', 'Register', ({(2246, 17, 2246, 25): '"""dcr02b"""', (2246, 27, 2246, 28): '(4)', (2246, 30, 2246, 36): '(28844)'}, {}), "('dcr02b', 4, 28844)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2247, 8, 2247, 37), 'archinfo.arch.Register', 'Register', ({(2247, 17, 2247, 25): '"""dcr02c"""', (2247, 27, 2247, 28): '(4)', (2247, 30, 2247, 36): '(28848)'}, {}), "('dcr02c', 4, 28848)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2248, 8, 2248, 37), 'archinfo.arch.Register', 'Register', ({(2248, 17, 2248, 25): '"""dcr02d"""', (2248, 27, 2248, 28): '(4)', (2248, 30, 2248, 36): '(28852)'}, {}), "('dcr02d', 4, 28852)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2249, 8, 2249, 37), 'archinfo.arch.Register', 'Register', ({(2249, 17, 2249, 25): '"""dcr02e"""', (2249, 27, 2249, 28): '(4)', (2249, 30, 2249, 36): '(28856)'}, {}), "('dcr02e', 4, 28856)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2250, 8, 2250, 37), 'archinfo.arch.Register', 'Register', ({(2250, 17, 2250, 25): '"""dcr02f"""', (2250, 27, 2250, 28): '(4)', (2250, 30, 2250, 36): '(28860)'}, {}), "('dcr02f', 4, 28860)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2251, 8, 2251, 37), 'archinfo.arch.Register', 'Register', ({(2251, 17, 2251, 25): '"""dcr030"""', (2251, 27, 2251, 28): '(4)', (2251, 30, 2251, 36): '(28864)'}, {}), "('dcr030', 4, 28864)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2252, 8, 2252, 37), 'archinfo.arch.Register', 'Register', ({(2252, 17, 2252, 25): '"""dcr031"""', (2252, 27, 2252, 28): '(4)', (2252, 30, 2252, 36): '(28868)'}, {}), "('dcr031', 4, 28868)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2253, 8, 2253, 37), 'archinfo.arch.Register', 'Register', ({(2253, 17, 2253, 25): '"""dcr032"""', (2253, 27, 2253, 28): '(4)', (2253, 30, 2253, 36): '(28872)'}, {}), "('dcr032', 4, 28872)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2254, 8, 2254, 37), 'archinfo.arch.Register', 'Register', ({(2254, 17, 2254, 25): '"""dcr033"""', (2254, 27, 2254, 28): '(4)', (2254, 30, 2254, 36): '(28876)'}, {}), "('dcr033', 4, 28876)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2255, 8, 2255, 37), 'archinfo.arch.Register', 'Register', ({(2255, 17, 2255, 25): '"""dcr034"""', (2255, 27, 2255, 28): '(4)', (2255, 30, 2255, 36): '(28880)'}, {}), "('dcr034', 4, 28880)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2256, 8, 2256, 37), 'archinfo.arch.Register', 'Register', ({(2256, 17, 2256, 25): '"""dcr035"""', (2256, 27, 2256, 28): '(4)', (2256, 30, 2256, 36): '(28884)'}, {}), "('dcr035', 4, 28884)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2257, 8, 2257, 37), 'archinfo.arch.Register', 'Register', ({(2257, 17, 2257, 25): '"""dcr036"""', (2257, 27, 2257, 28): '(4)', (2257, 30, 2257, 36): '(28888)'}, {}), "('dcr036', 4, 28888)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2258, 8, 2258, 37), 'archinfo.arch.Register', 'Register', ({(2258, 17, 2258, 25): '"""dcr037"""', (2258, 27, 2258, 28): '(4)', (2258, 30, 2258, 36): '(28892)'}, {}), "('dcr037', 4, 28892)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2259, 8, 2259, 37), 'archinfo.arch.Register', 'Register', ({(2259, 17, 2259, 25): '"""dcr038"""', (2259, 27, 2259, 28): '(4)', (2259, 30, 2259, 36): '(28896)'}, {}), "('dcr038', 4, 28896)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2260, 8, 2260, 37), 'archinfo.arch.Register', 'Register', ({(2260, 17, 2260, 25): '"""dcr039"""', (2260, 27, 2260, 28): '(4)', (2260, 30, 2260, 36): '(28900)'}, {}), "('dcr039', 4, 28900)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2261, 8, 2261, 37), 'archinfo.arch.Register', 'Register', ({(2261, 17, 2261, 25): '"""dcr03a"""', (2261, 27, 2261, 28): '(4)', (2261, 30, 2261, 36): '(28904)'}, {}), "('dcr03a', 4, 28904)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2262, 8, 2262, 37), 'archinfo.arch.Register', 'Register', ({(2262, 17, 2262, 25): '"""dcr03b"""', (2262, 27, 2262, 28): '(4)', (2262, 30, 2262, 36): '(28908)'}, {}), "('dcr03b', 4, 28908)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2263, 8, 2263, 37), 'archinfo.arch.Register', 'Register', ({(2263, 17, 2263, 25): '"""dcr03c"""', (2263, 27, 2263, 28): '(4)', (2263, 30, 2263, 36): '(28912)'}, {}), "('dcr03c', 4, 28912)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2264, 8, 2264, 37), 'archinfo.arch.Register', 'Register', ({(2264, 17, 2264, 25): '"""dcr03d"""', (2264, 27, 2264, 28): '(4)', (2264, 30, 2264, 36): '(28916)'}, {}), "('dcr03d', 4, 28916)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2265, 8, 2265, 37), 'archinfo.arch.Register', 'Register', ({(2265, 17, 2265, 25): '"""dcr03e"""', (2265, 27, 2265, 28): '(4)', (2265, 30, 2265, 36): '(28920)'}, {}), "('dcr03e', 4, 28920)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2266, 8, 2266, 37), 'archinfo.arch.Register', 'Register', ({(2266, 17, 2266, 25): '"""dcr03f"""', (2266, 27, 2266, 28): '(4)', (2266, 30, 2266, 36): '(28924)'}, {}), "('dcr03f', 4, 28924)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2267, 8, 2267, 37), 'archinfo.arch.Register', 'Register', ({(2267, 17, 2267, 25): '"""dcr040"""', (2267, 27, 2267, 28): '(4)', (2267, 30, 2267, 36): '(28928)'}, {}), "('dcr040', 4, 28928)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2268, 8, 2268, 37), 'archinfo.arch.Register', 'Register', ({(2268, 17, 2268, 25): '"""dcr041"""', (2268, 27, 2268, 28): '(4)', (2268, 30, 2268, 36): '(28932)'}, {}), "('dcr041', 4, 28932)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2269, 8, 2269, 37), 'archinfo.arch.Register', 'Register', ({(2269, 17, 2269, 25): '"""dcr042"""', (2269, 27, 2269, 28): '(4)', (2269, 30, 2269, 36): '(28936)'}, {}), "('dcr042', 4, 28936)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2270, 8, 2270, 37), 'archinfo.arch.Register', 'Register', ({(2270, 17, 2270, 25): '"""dcr043"""', (2270, 27, 2270, 28): '(4)', (2270, 30, 2270, 36): '(28940)'}, {}), "('dcr043', 4, 28940)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2271, 8, 2271, 37), 'archinfo.arch.Register', 'Register', ({(2271, 17, 2271, 25): '"""dcr044"""', (2271, 27, 2271, 28): '(4)', (2271, 30, 2271, 36): '(28944)'}, {}), "('dcr044', 4, 28944)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2272, 8, 2272, 37), 'archinfo.arch.Register', 'Register', ({(2272, 17, 2272, 25): '"""dcr045"""', (2272, 27, 2272, 28): '(4)', (2272, 30, 2272, 36): '(28948)'}, {}), "('dcr045', 4, 28948)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2273, 8, 2273, 37), 'archinfo.arch.Register', 'Register', ({(2273, 17, 2273, 25): '"""dcr046"""', (2273, 27, 2273, 28): '(4)', (2273, 30, 2273, 36): '(28952)'}, {}), "('dcr046', 4, 28952)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2274, 8, 2274, 37), 'archinfo.arch.Register', 'Register', ({(2274, 17, 2274, 25): '"""dcr047"""', (2274, 27, 2274, 28): '(4)', (2274, 30, 2274, 36): '(28956)'}, {}), "('dcr047', 4, 28956)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2275, 8, 2275, 37), 'archinfo.arch.Register', 'Register', ({(2275, 17, 2275, 25): '"""dcr048"""', (2275, 27, 2275, 28): '(4)', (2275, 30, 2275, 36): '(28960)'}, {}), "('dcr048', 4, 28960)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2276, 8, 2276, 37), 'archinfo.arch.Register', 'Register', ({(2276, 17, 2276, 25): '"""dcr049"""', (2276, 27, 2276, 28): '(4)', (2276, 30, 2276, 36): '(28964)'}, {}), "('dcr049', 4, 28964)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2277, 8, 2277, 37), 'archinfo.arch.Register', 'Register', ({(2277, 17, 2277, 25): '"""dcr04a"""', (2277, 27, 2277, 28): '(4)', (2277, 30, 2277, 36): '(28968)'}, {}), "('dcr04a', 4, 28968)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2278, 8, 2278, 37), 'archinfo.arch.Register', 'Register', ({(2278, 17, 2278, 25): '"""dcr04b"""', (2278, 27, 2278, 28): '(4)', (2278, 30, 2278, 36): '(28972)'}, {}), "('dcr04b', 4, 28972)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2279, 8, 2279, 37), 'archinfo.arch.Register', 'Register', ({(2279, 17, 2279, 25): '"""dcr04c"""', (2279, 27, 2279, 28): '(4)', (2279, 30, 2279, 36): '(28976)'}, {}), "('dcr04c', 4, 28976)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2280, 8, 2280, 37), 'archinfo.arch.Register', 'Register', ({(2280, 17, 2280, 25): '"""dcr04d"""', (2280, 27, 2280, 28): '(4)', (2280, 30, 2280, 36): '(28980)'}, {}), "('dcr04d', 4, 28980)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2281, 8, 2281, 37), 'archinfo.arch.Register', 'Register', ({(2281, 17, 2281, 25): '"""dcr04e"""', (2281, 27, 2281, 28): '(4)', (2281, 30, 2281, 36): '(28984)'}, {}), "('dcr04e', 4, 28984)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2282, 8, 2282, 37), 'archinfo.arch.Register', 'Register', ({(2282, 17, 2282, 25): '"""dcr04f"""', (2282, 27, 2282, 28): '(4)', (2282, 30, 2282, 36): '(28988)'}, {}), "('dcr04f', 4, 28988)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2283, 8, 2283, 37), 'archinfo.arch.Register', 'Register', ({(2283, 17, 2283, 25): '"""dcr050"""', (2283, 27, 2283, 28): '(4)', (2283, 30, 2283, 36): '(28992)'}, {}), "('dcr050', 4, 28992)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2284, 8, 2284, 37), 'archinfo.arch.Register', 'Register', ({(2284, 17, 2284, 25): '"""dcr051"""', (2284, 27, 2284, 28): '(4)', (2284, 30, 2284, 36): '(28996)'}, {}), "('dcr051', 4, 28996)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2285, 8, 2285, 37), 'archinfo.arch.Register', 'Register', ({(2285, 17, 2285, 25): '"""dcr052"""', (2285, 27, 2285, 28): '(4)', (2285, 30, 2285, 36): '(29000)'}, {}), "('dcr052', 4, 29000)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2286, 8, 2286, 37), 'archinfo.arch.Register', 'Register', ({(2286, 17, 2286, 25): '"""dcr053"""', (2286, 27, 2286, 28): '(4)', (2286, 30, 2286, 36): '(29004)'}, {}), "('dcr053', 4, 29004)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2287, 8, 2287, 37), 'archinfo.arch.Register', 'Register', ({(2287, 17, 2287, 25): '"""dcr054"""', (2287, 27, 2287, 28): '(4)', (2287, 30, 2287, 36): '(29008)'}, {}), "('dcr054', 4, 29008)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2288, 8, 2288, 37), 'archinfo.arch.Register', 'Register', ({(2288, 17, 2288, 25): '"""dcr055"""', (2288, 27, 2288, 28): '(4)', (2288, 30, 2288, 36): '(29012)'}, {}), "('dcr055', 4, 29012)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2289, 8, 2289, 37), 'archinfo.arch.Register', 'Register', ({(2289, 17, 2289, 25): '"""dcr056"""', (2289, 27, 2289, 28): '(4)', (2289, 30, 2289, 36): '(29016)'}, {}), "('dcr056', 4, 29016)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2290, 8, 2290, 37), 'archinfo.arch.Register', 'Register', ({(2290, 17, 2290, 25): '"""dcr057"""', (2290, 27, 2290, 28): '(4)', (2290, 30, 2290, 36): '(29020)'}, {}), "('dcr057', 4, 29020)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2291, 8, 2291, 37), 'archinfo.arch.Register', 'Register', ({(2291, 17, 2291, 25): '"""dcr058"""', (2291, 27, 2291, 28): '(4)', (2291, 30, 2291, 36): '(29024)'}, {}), "('dcr058', 4, 29024)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2292, 8, 2292, 37), 'archinfo.arch.Register', 'Register', ({(2292, 17, 2292, 25): '"""dcr059"""', (2292, 27, 2292, 28): '(4)', (2292, 30, 2292, 36): '(29028)'}, {}), "('dcr059', 4, 29028)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2293, 8, 2293, 37), 'archinfo.arch.Register', 'Register', ({(2293, 17, 2293, 25): '"""dcr05a"""', (2293, 27, 2293, 28): '(4)', (2293, 30, 2293, 36): '(29032)'}, {}), "('dcr05a', 4, 29032)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2294, 8, 2294, 37), 'archinfo.arch.Register', 'Register', ({(2294, 17, 2294, 25): '"""dcr05b"""', (2294, 27, 2294, 28): '(4)', (2294, 30, 2294, 36): '(29036)'}, {}), "('dcr05b', 4, 29036)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2295, 8, 2295, 37), 'archinfo.arch.Register', 'Register', ({(2295, 17, 2295, 25): '"""dcr05c"""', (2295, 27, 2295, 28): '(4)', (2295, 30, 2295, 36): '(29040)'}, {}), "('dcr05c', 4, 29040)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2296, 8, 2296, 37), 'archinfo.arch.Register', 'Register', ({(2296, 17, 2296, 25): '"""dcr05d"""', (2296, 27, 2296, 28): '(4)', (2296, 30, 2296, 36): '(29044)'}, {}), "('dcr05d', 4, 29044)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2297, 8, 2297, 37), 'archinfo.arch.Register', 'Register', ({(2297, 17, 2297, 25): '"""dcr05e"""', (2297, 27, 2297, 28): '(4)', (2297, 30, 2297, 36): '(29048)'}, {}), "('dcr05e', 4, 29048)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2298, 8, 2298, 37), 'archinfo.arch.Register', 'Register', ({(2298, 17, 2298, 25): '"""dcr05f"""', (2298, 27, 2298, 28): '(4)', (2298, 30, 2298, 36): '(29052)'}, {}), "('dcr05f', 4, 29052)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2299, 8, 2299, 37), 'archinfo.arch.Register', 'Register', ({(2299, 17, 2299, 25): '"""dcr060"""', (2299, 27, 2299, 28): '(4)', (2299, 30, 2299, 36): '(29056)'}, {}), "('dcr060', 4, 29056)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2300, 8, 2300, 37), 'archinfo.arch.Register', 'Register', ({(2300, 17, 2300, 25): '"""dcr061"""', (2300, 27, 2300, 28): '(4)', (2300, 30, 2300, 36): '(29060)'}, {}), "('dcr061', 4, 29060)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2301, 8, 2301, 37), 'archinfo.arch.Register', 'Register', ({(2301, 17, 2301, 25): '"""dcr062"""', (2301, 27, 2301, 28): '(4)', (2301, 30, 2301, 36): '(29064)'}, {}), "('dcr062', 4, 29064)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2302, 8, 2302, 37), 'archinfo.arch.Register', 'Register', ({(2302, 17, 2302, 25): '"""dcr063"""', (2302, 27, 2302, 28): '(4)', (2302, 30, 2302, 36): '(29068)'}, {}), "('dcr063', 4, 29068)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2303, 8, 2303, 37), 'archinfo.arch.Register', 'Register', ({(2303, 17, 2303, 25): '"""dcr064"""', (2303, 27, 2303, 28): '(4)', (2303, 30, 2303, 36): '(29072)'}, {}), "('dcr064', 4, 29072)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2304, 8, 2304, 37), 'archinfo.arch.Register', 'Register', ({(2304, 17, 2304, 25): '"""dcr065"""', (2304, 27, 2304, 28): '(4)', (2304, 30, 2304, 36): '(29076)'}, {}), "('dcr065', 4, 29076)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2305, 8, 2305, 37), 'archinfo.arch.Register', 'Register', ({(2305, 17, 2305, 25): '"""dcr066"""', (2305, 27, 2305, 28): '(4)', (2305, 30, 2305, 36): '(29080)'}, {}), "('dcr066', 4, 29080)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2306, 8, 2306, 37), 'archinfo.arch.Register', 'Register', ({(2306, 17, 2306, 25): '"""dcr067"""', (2306, 27, 2306, 28): '(4)', (2306, 30, 2306, 36): '(29084)'}, {}), "('dcr067', 4, 29084)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2307, 8, 2307, 37), 'archinfo.arch.Register', 'Register', ({(2307, 17, 2307, 25): '"""dcr068"""', (2307, 27, 2307, 28): '(4)', (2307, 30, 2307, 36): '(29088)'}, {}), "('dcr068', 4, 29088)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2308, 8, 2308, 37), 'archinfo.arch.Register', 'Register', ({(2308, 17, 2308, 25): '"""dcr069"""', (2308, 27, 2308, 28): '(4)', (2308, 30, 2308, 36): '(29092)'}, {}), "('dcr069', 4, 29092)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2309, 8, 2309, 37), 'archinfo.arch.Register', 'Register', ({(2309, 17, 2309, 25): '"""dcr06a"""', (2309, 27, 2309, 28): '(4)', (2309, 30, 2309, 36): '(29096)'}, {}), "('dcr06a', 4, 29096)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2310, 8, 2310, 37), 'archinfo.arch.Register', 'Register', ({(2310, 17, 2310, 25): '"""dcr06b"""', (2310, 27, 2310, 28): '(4)', (2310, 30, 2310, 36): '(29100)'}, {}), "('dcr06b', 4, 29100)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2311, 8, 2311, 37), 'archinfo.arch.Register', 'Register', ({(2311, 17, 2311, 25): '"""dcr06c"""', (2311, 27, 2311, 28): '(4)', (2311, 30, 2311, 36): '(29104)'}, {}), "('dcr06c', 4, 29104)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2312, 8, 2312, 37), 'archinfo.arch.Register', 'Register', ({(2312, 17, 2312, 25): '"""dcr06d"""', (2312, 27, 2312, 28): '(4)', (2312, 30, 2312, 36): '(29108)'}, {}), "('dcr06d', 4, 29108)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2313, 8, 2313, 37), 'archinfo.arch.Register', 'Register', ({(2313, 17, 2313, 25): '"""dcr06e"""', (2313, 27, 2313, 28): '(4)', (2313, 30, 2313, 36): '(29112)'}, {}), "('dcr06e', 4, 29112)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2314, 8, 2314, 37), 'archinfo.arch.Register', 'Register', ({(2314, 17, 2314, 25): '"""dcr06f"""', (2314, 27, 2314, 28): '(4)', (2314, 30, 2314, 36): '(29116)'}, {}), "('dcr06f', 4, 29116)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2315, 8, 2315, 37), 'archinfo.arch.Register', 'Register', ({(2315, 17, 2315, 25): '"""dcr070"""', (2315, 27, 2315, 28): '(4)', (2315, 30, 2315, 36): '(29120)'}, {}), "('dcr070', 4, 29120)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2316, 8, 2316, 37), 'archinfo.arch.Register', 'Register', ({(2316, 17, 2316, 25): '"""dcr071"""', (2316, 27, 2316, 28): '(4)', (2316, 30, 2316, 36): '(29124)'}, {}), "('dcr071', 4, 29124)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2317, 8, 2317, 37), 'archinfo.arch.Register', 'Register', ({(2317, 17, 2317, 25): '"""dcr072"""', (2317, 27, 2317, 28): '(4)', (2317, 30, 2317, 36): '(29128)'}, {}), "('dcr072', 4, 29128)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2318, 8, 2318, 37), 'archinfo.arch.Register', 'Register', ({(2318, 17, 2318, 25): '"""dcr073"""', (2318, 27, 2318, 28): '(4)', (2318, 30, 2318, 36): '(29132)'}, {}), "('dcr073', 4, 29132)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2319, 8, 2319, 37), 'archinfo.arch.Register', 'Register', ({(2319, 17, 2319, 25): '"""dcr074"""', (2319, 27, 2319, 28): '(4)', (2319, 30, 2319, 36): '(29136)'}, {}), "('dcr074', 4, 29136)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2320, 8, 2320, 37), 'archinfo.arch.Register', 'Register', ({(2320, 17, 2320, 25): '"""dcr075"""', (2320, 27, 2320, 28): '(4)', (2320, 30, 2320, 36): '(29140)'}, {}), "('dcr075', 4, 29140)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2321, 8, 2321, 37), 'archinfo.arch.Register', 'Register', ({(2321, 17, 2321, 25): '"""dcr076"""', (2321, 27, 2321, 28): '(4)', (2321, 30, 2321, 36): '(29144)'}, {}), "('dcr076', 4, 29144)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2322, 8, 2322, 37), 'archinfo.arch.Register', 'Register', ({(2322, 17, 2322, 25): '"""dcr077"""', (2322, 27, 2322, 28): '(4)', (2322, 30, 2322, 36): '(29148)'}, {}), "('dcr077', 4, 29148)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2323, 8, 2323, 37), 'archinfo.arch.Register', 'Register', ({(2323, 17, 2323, 25): '"""dcr078"""', (2323, 27, 2323, 28): '(4)', (2323, 30, 2323, 36): '(29152)'}, {}), "('dcr078', 4, 29152)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2324, 8, 2324, 37), 'archinfo.arch.Register', 'Register', ({(2324, 17, 2324, 25): '"""dcr079"""', (2324, 27, 2324, 28): '(4)', (2324, 30, 2324, 36): '(29156)'}, {}), "('dcr079', 4, 29156)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2325, 8, 2325, 37), 'archinfo.arch.Register', 'Register', ({(2325, 17, 2325, 25): '"""dcr07a"""', (2325, 27, 2325, 28): '(4)', (2325, 30, 2325, 36): '(29160)'}, {}), "('dcr07a', 4, 29160)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2326, 8, 2326, 37), 'archinfo.arch.Register', 'Register', ({(2326, 17, 2326, 25): '"""dcr07b"""', (2326, 27, 2326, 28): '(4)', (2326, 30, 2326, 36): '(29164)'}, {}), "('dcr07b', 4, 29164)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2327, 8, 2327, 37), 'archinfo.arch.Register', 'Register', ({(2327, 17, 2327, 25): '"""dcr07c"""', (2327, 27, 2327, 28): '(4)', (2327, 30, 2327, 36): '(29168)'}, {}), "('dcr07c', 4, 29168)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2328, 8, 2328, 37), 'archinfo.arch.Register', 'Register', ({(2328, 17, 2328, 25): '"""dcr07d"""', (2328, 27, 2328, 28): '(4)', (2328, 30, 2328, 36): '(29172)'}, {}), "('dcr07d', 4, 29172)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2329, 8, 2329, 37), 'archinfo.arch.Register', 'Register', ({(2329, 17, 2329, 25): '"""dcr07e"""', (2329, 27, 2329, 28): '(4)', (2329, 30, 2329, 36): '(29176)'}, {}), "('dcr07e', 4, 29176)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2330, 8, 2330, 37), 'archinfo.arch.Register', 'Register', ({(2330, 17, 2330, 25): '"""dcr07f"""', (2330, 27, 2330, 28): '(4)', (2330, 30, 2330, 36): '(29180)'}, {}), "('dcr07f', 4, 29180)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2331, 8, 2331, 37), 'archinfo.arch.Register', 'Register', ({(2331, 17, 2331, 25): '"""dcr080"""', (2331, 27, 2331, 28): '(4)', (2331, 30, 2331, 36): '(29184)'}, {}), "('dcr080', 4, 29184)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2332, 8, 2332, 37), 'archinfo.arch.Register', 'Register', ({(2332, 17, 2332, 25): '"""dcr081"""', (2332, 27, 2332, 28): '(4)', (2332, 30, 2332, 36): '(29188)'}, {}), "('dcr081', 4, 29188)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2333, 8, 2333, 37), 'archinfo.arch.Register', 'Register', ({(2333, 17, 2333, 25): '"""dcr082"""', (2333, 27, 2333, 28): '(4)', (2333, 30, 2333, 36): '(29192)'}, {}), "('dcr082', 4, 29192)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2334, 8, 2334, 37), 'archinfo.arch.Register', 'Register', ({(2334, 17, 2334, 25): '"""dcr083"""', (2334, 27, 2334, 28): '(4)', (2334, 30, 2334, 36): '(29196)'}, {}), "('dcr083', 4, 29196)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2335, 8, 2335, 37), 'archinfo.arch.Register', 'Register', ({(2335, 17, 2335, 25): '"""dcr084"""', (2335, 27, 2335, 28): '(4)', (2335, 30, 2335, 36): '(29200)'}, {}), "('dcr084', 4, 29200)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2336, 8, 2336, 37), 'archinfo.arch.Register', 'Register', ({(2336, 17, 2336, 25): '"""dcr085"""', (2336, 27, 2336, 28): '(4)', (2336, 30, 2336, 36): '(29204)'}, {}), "('dcr085', 4, 29204)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2337, 8, 2337, 37), 'archinfo.arch.Register', 'Register', ({(2337, 17, 2337, 25): '"""dcr086"""', (2337, 27, 2337, 28): '(4)', (2337, 30, 2337, 36): '(29208)'}, {}), "('dcr086', 4, 29208)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2338, 8, 2338, 37), 'archinfo.arch.Register', 'Register', ({(2338, 17, 2338, 25): '"""dcr087"""', (2338, 27, 2338, 28): '(4)', (2338, 30, 2338, 36): '(29212)'}, {}), "('dcr087', 4, 29212)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2339, 8, 2339, 37), 'archinfo.arch.Register', 'Register', ({(2339, 17, 2339, 25): '"""dcr088"""', (2339, 27, 2339, 28): '(4)', (2339, 30, 2339, 36): '(29216)'}, {}), "('dcr088', 4, 29216)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2340, 8, 2340, 37), 'archinfo.arch.Register', 'Register', ({(2340, 17, 2340, 25): '"""dcr089"""', (2340, 27, 2340, 28): '(4)', (2340, 30, 2340, 36): '(29220)'}, {}), "('dcr089', 4, 29220)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2341, 8, 2341, 37), 'archinfo.arch.Register', 'Register', ({(2341, 17, 2341, 25): '"""dcr08a"""', (2341, 27, 2341, 28): '(4)', (2341, 30, 2341, 36): '(29224)'}, {}), "('dcr08a', 4, 29224)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2342, 8, 2342, 37), 'archinfo.arch.Register', 'Register', ({(2342, 17, 2342, 25): '"""dcr08b"""', (2342, 27, 2342, 28): '(4)', (2342, 30, 2342, 36): '(29228)'}, {}), "('dcr08b', 4, 29228)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2343, 8, 2343, 37), 'archinfo.arch.Register', 'Register', ({(2343, 17, 2343, 25): '"""dcr08c"""', (2343, 27, 2343, 28): '(4)', (2343, 30, 2343, 36): '(29232)'}, {}), "('dcr08c', 4, 29232)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2344, 8, 2344, 37), 'archinfo.arch.Register', 'Register', ({(2344, 17, 2344, 25): '"""dcr08d"""', (2344, 27, 2344, 28): '(4)', (2344, 30, 2344, 36): '(29236)'}, {}), "('dcr08d', 4, 29236)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2345, 8, 2345, 37), 'archinfo.arch.Register', 'Register', ({(2345, 17, 2345, 25): '"""dcr08e"""', (2345, 27, 2345, 28): '(4)', (2345, 30, 2345, 36): '(29240)'}, {}), "('dcr08e', 4, 29240)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2346, 8, 2346, 37), 'archinfo.arch.Register', 'Register', ({(2346, 17, 2346, 25): '"""dcr08f"""', (2346, 27, 2346, 28): '(4)', (2346, 30, 2346, 36): '(29244)'}, {}), "('dcr08f', 4, 29244)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2347, 8, 2347, 37), 'archinfo.arch.Register', 'Register', ({(2347, 17, 2347, 25): '"""dcr090"""', (2347, 27, 2347, 28): '(4)', (2347, 30, 2347, 36): '(29248)'}, {}), "('dcr090', 4, 29248)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2348, 8, 2348, 37), 'archinfo.arch.Register', 'Register', ({(2348, 17, 2348, 25): '"""dcr091"""', (2348, 27, 2348, 28): '(4)', (2348, 30, 2348, 36): '(29252)'}, {}), "('dcr091', 4, 29252)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2349, 8, 2349, 37), 'archinfo.arch.Register', 'Register', ({(2349, 17, 2349, 25): '"""dcr092"""', (2349, 27, 2349, 28): '(4)', (2349, 30, 2349, 36): '(29256)'}, {}), "('dcr092', 4, 29256)", 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25): '"""dcr09a"""', (2357, 27, 2357, 28): '(4)', (2357, 30, 2357, 36): '(29288)'}, {}), "('dcr09a', 4, 29288)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2358, 8, 2358, 37), 'archinfo.arch.Register', 'Register', ({(2358, 17, 2358, 25): '"""dcr09b"""', (2358, 27, 2358, 28): '(4)', (2358, 30, 2358, 36): '(29292)'}, {}), "('dcr09b', 4, 29292)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2359, 8, 2359, 37), 'archinfo.arch.Register', 'Register', ({(2359, 17, 2359, 25): '"""dcr09c"""', (2359, 27, 2359, 28): '(4)', (2359, 30, 2359, 36): '(29296)'}, {}), "('dcr09c', 4, 29296)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2360, 8, 2360, 37), 'archinfo.arch.Register', 'Register', ({(2360, 17, 2360, 25): '"""dcr09d"""', (2360, 27, 2360, 28): '(4)', (2360, 30, 2360, 36): '(29300)'}, {}), "('dcr09d', 4, 29300)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2361, 8, 2361, 37), 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register_arch, Endness, Register\n'), ((2365, 8, 2365, 37), 'archinfo.arch.Register', 'Register', ({(2365, 17, 2365, 25): '"""dcr0a2"""', (2365, 27, 2365, 28): '(4)', (2365, 30, 2365, 36): '(29320)'}, {}), "('dcr0a2', 4, 29320)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2366, 8, 2366, 37), 'archinfo.arch.Register', 'Register', ({(2366, 17, 2366, 25): '"""dcr0a3"""', (2366, 27, 2366, 28): '(4)', (2366, 30, 2366, 36): '(29324)'}, {}), "('dcr0a3', 4, 29324)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2367, 8, 2367, 37), 'archinfo.arch.Register', 'Register', ({(2367, 17, 2367, 25): '"""dcr0a4"""', (2367, 27, 2367, 28): '(4)', (2367, 30, 2367, 36): '(29328)'}, {}), "('dcr0a4', 4, 29328)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2368, 8, 2368, 37), 'archinfo.arch.Register', 'Register', ({(2368, 17, 2368, 25): '"""dcr0a5"""', (2368, 27, 2368, 28): '(4)', (2368, 30, 2368, 36): '(29332)'}, {}), "('dcr0a5', 4, 29332)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2369, 8, 2369, 37), 'archinfo.arch.Register', 'Register', ({(2369, 17, 2369, 25): '"""dcr0a6"""', (2369, 27, 2369, 28): '(4)', (2369, 30, 2369, 36): '(29336)'}, {}), "('dcr0a6', 4, 29336)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2370, 8, 2370, 37), 'archinfo.arch.Register', 'Register', ({(2370, 17, 2370, 25): '"""dcr0a7"""', (2370, 27, 2370, 28): '(4)', (2370, 30, 2370, 36): '(29340)'}, {}), "('dcr0a7', 4, 29340)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2371, 8, 2371, 37), 'archinfo.arch.Register', 'Register', ({(2371, 17, 2371, 25): '"""dcr0a8"""', (2371, 27, 2371, 28): '(4)', (2371, 30, 2371, 36): '(29344)'}, {}), "('dcr0a8', 4, 29344)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2372, 8, 2372, 37), 'archinfo.arch.Register', 'Register', ({(2372, 17, 2372, 25): '"""dcr0a9"""', (2372, 27, 2372, 28): '(4)', (2372, 30, 2372, 36): '(29348)'}, {}), "('dcr0a9', 4, 29348)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2373, 8, 2373, 37), 'archinfo.arch.Register', 'Register', ({(2373, 17, 2373, 25): '"""dcr0aa"""', (2373, 27, 2373, 28): '(4)', (2373, 30, 2373, 36): '(29352)'}, {}), "('dcr0aa', 4, 29352)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2374, 8, 2374, 37), 'archinfo.arch.Register', 'Register', ({(2374, 17, 2374, 25): '"""dcr0ab"""', (2374, 27, 2374, 28): '(4)', (2374, 30, 2374, 36): '(29356)'}, {}), "('dcr0ab', 4, 29356)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2375, 8, 2375, 37), 'archinfo.arch.Register', 'Register', ({(2375, 17, 2375, 25): '"""dcr0ac"""', (2375, 27, 2375, 28): '(4)', (2375, 30, 2375, 36): '(29360)'}, {}), "('dcr0ac', 4, 29360)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2376, 8, 2376, 37), 'archinfo.arch.Register', 'Register', ({(2376, 17, 2376, 25): '"""dcr0ad"""', (2376, 27, 2376, 28): '(4)', (2376, 30, 2376, 36): '(29364)'}, {}), "('dcr0ad', 4, 29364)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2377, 8, 2377, 37), 'archinfo.arch.Register', 'Register', ({(2377, 17, 2377, 25): '"""dcr0ae"""', (2377, 27, 2377, 28): '(4)', (2377, 30, 2377, 36): '(29368)'}, {}), "('dcr0ae', 4, 29368)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2378, 8, 2378, 37), 'archinfo.arch.Register', 'Register', ({(2378, 17, 2378, 25): '"""dcr0af"""', (2378, 27, 2378, 28): '(4)', (2378, 30, 2378, 36): '(29372)'}, {}), "('dcr0af', 4, 29372)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2379, 8, 2379, 37), 'archinfo.arch.Register', 'Register', ({(2379, 17, 2379, 25): '"""dcr0b0"""', (2379, 27, 2379, 28): '(4)', (2379, 30, 2379, 36): '(29376)'}, {}), "('dcr0b0', 4, 29376)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2380, 8, 2380, 37), 'archinfo.arch.Register', 'Register', ({(2380, 17, 2380, 25): '"""dcr0b1"""', (2380, 27, 2380, 28): '(4)', (2380, 30, 2380, 36): '(29380)'}, {}), "('dcr0b1', 4, 29380)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2381, 8, 2381, 37), 'archinfo.arch.Register', 'Register', ({(2381, 17, 2381, 25): '"""dcr0b2"""', (2381, 27, 2381, 28): '(4)', (2381, 30, 2381, 36): '(29384)'}, {}), "('dcr0b2', 4, 29384)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2382, 8, 2382, 37), 'archinfo.arch.Register', 'Register', ({(2382, 17, 2382, 25): '"""dcr0b3"""', (2382, 27, 2382, 28): '(4)', (2382, 30, 2382, 36): '(29388)'}, {}), "('dcr0b3', 4, 29388)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2383, 8, 2383, 37), 'archinfo.arch.Register', 'Register', ({(2383, 17, 2383, 25): '"""dcr0b4"""', (2383, 27, 2383, 28): '(4)', (2383, 30, 2383, 36): '(29392)'}, {}), "('dcr0b4', 4, 29392)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2384, 8, 2384, 37), 'archinfo.arch.Register', 'Register', ({(2384, 17, 2384, 25): '"""dcr0b5"""', (2384, 27, 2384, 28): '(4)', (2384, 30, 2384, 36): '(29396)'}, {}), "('dcr0b5', 4, 29396)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2385, 8, 2385, 37), 'archinfo.arch.Register', 'Register', ({(2385, 17, 2385, 25): '"""dcr0b6"""', (2385, 27, 2385, 28): '(4)', (2385, 30, 2385, 36): '(29400)'}, {}), "('dcr0b6', 4, 29400)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2386, 8, 2386, 37), 'archinfo.arch.Register', 'Register', ({(2386, 17, 2386, 25): '"""dcr0b7"""', (2386, 27, 2386, 28): '(4)', (2386, 30, 2386, 36): '(29404)'}, {}), "('dcr0b7', 4, 29404)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2387, 8, 2387, 37), 'archinfo.arch.Register', 'Register', ({(2387, 17, 2387, 25): '"""dcr0b8"""', (2387, 27, 2387, 28): '(4)', (2387, 30, 2387, 36): '(29408)'}, {}), "('dcr0b8', 4, 29408)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2388, 8, 2388, 37), 'archinfo.arch.Register', 'Register', ({(2388, 17, 2388, 25): '"""dcr0b9"""', (2388, 27, 2388, 28): '(4)', (2388, 30, 2388, 36): '(29412)'}, {}), "('dcr0b9', 4, 29412)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2389, 8, 2389, 37), 'archinfo.arch.Register', 'Register', ({(2389, 17, 2389, 25): '"""dcr0ba"""', (2389, 27, 2389, 28): '(4)', (2389, 30, 2389, 36): '(29416)'}, {}), "('dcr0ba', 4, 29416)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2390, 8, 2390, 37), 'archinfo.arch.Register', 'Register', ({(2390, 17, 2390, 25): '"""dcr0bb"""', (2390, 27, 2390, 28): '(4)', (2390, 30, 2390, 36): '(29420)'}, {}), "('dcr0bb', 4, 29420)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2391, 8, 2391, 37), 'archinfo.arch.Register', 'Register', ({(2391, 17, 2391, 25): '"""dcr0bc"""', (2391, 27, 2391, 28): '(4)', (2391, 30, 2391, 36): '(29424)'}, {}), "('dcr0bc', 4, 29424)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2392, 8, 2392, 37), 'archinfo.arch.Register', 'Register', ({(2392, 17, 2392, 25): '"""dcr0bd"""', (2392, 27, 2392, 28): '(4)', (2392, 30, 2392, 36): '(29428)'}, {}), "('dcr0bd', 4, 29428)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2393, 8, 2393, 37), 'archinfo.arch.Register', 'Register', ({(2393, 17, 2393, 25): '"""dcr0be"""', (2393, 27, 2393, 28): '(4)', (2393, 30, 2393, 36): '(29432)'}, {}), "('dcr0be', 4, 29432)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2394, 8, 2394, 37), 'archinfo.arch.Register', 'Register', ({(2394, 17, 2394, 25): '"""dcr0bf"""', (2394, 27, 2394, 28): '(4)', (2394, 30, 2394, 36): '(29436)'}, {}), "('dcr0bf', 4, 29436)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2395, 8, 2395, 37), 'archinfo.arch.Register', 'Register', ({(2395, 17, 2395, 25): '"""dcr0c0"""', (2395, 27, 2395, 28): '(4)', (2395, 30, 2395, 36): '(29440)'}, {}), "('dcr0c0', 4, 29440)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2396, 8, 2396, 37), 'archinfo.arch.Register', 'Register', ({(2396, 17, 2396, 25): '"""dcr0c1"""', (2396, 27, 2396, 28): '(4)', (2396, 30, 2396, 36): '(29444)'}, {}), "('dcr0c1', 4, 29444)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2397, 8, 2397, 37), 'archinfo.arch.Register', 'Register', ({(2397, 17, 2397, 25): '"""dcr0c2"""', (2397, 27, 2397, 28): '(4)', (2397, 30, 2397, 36): '(29448)'}, {}), "('dcr0c2', 4, 29448)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2398, 8, 2398, 37), 'archinfo.arch.Register', 'Register', ({(2398, 17, 2398, 25): '"""dcr0c3"""', (2398, 27, 2398, 28): '(4)', (2398, 30, 2398, 36): '(29452)'}, {}), "('dcr0c3', 4, 29452)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2399, 8, 2399, 37), 'archinfo.arch.Register', 'Register', ({(2399, 17, 2399, 25): '"""dcr0c4"""', (2399, 27, 2399, 28): '(4)', (2399, 30, 2399, 36): '(29456)'}, {}), "('dcr0c4', 4, 29456)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2400, 8, 2400, 37), 'archinfo.arch.Register', 'Register', ({(2400, 17, 2400, 25): '"""dcr0c5"""', (2400, 27, 2400, 28): '(4)', (2400, 30, 2400, 36): '(29460)'}, {}), "('dcr0c5', 4, 29460)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2401, 8, 2401, 37), 'archinfo.arch.Register', 'Register', ({(2401, 17, 2401, 25): '"""dcr0c6"""', (2401, 27, 2401, 28): '(4)', (2401, 30, 2401, 36): '(29464)'}, {}), "('dcr0c6', 4, 29464)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2402, 8, 2402, 37), 'archinfo.arch.Register', 'Register', ({(2402, 17, 2402, 25): '"""dcr0c7"""', (2402, 27, 2402, 28): '(4)', (2402, 30, 2402, 36): '(29468)'}, {}), "('dcr0c7', 4, 29468)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2403, 8, 2403, 37), 'archinfo.arch.Register', 'Register', ({(2403, 17, 2403, 25): '"""dcr0c8"""', (2403, 27, 2403, 28): '(4)', (2403, 30, 2403, 36): '(29472)'}, {}), "('dcr0c8', 4, 29472)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2404, 8, 2404, 37), 'archinfo.arch.Register', 'Register', ({(2404, 17, 2404, 25): '"""dcr0c9"""', (2404, 27, 2404, 28): '(4)', (2404, 30, 2404, 36): '(29476)'}, {}), "('dcr0c9', 4, 29476)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2405, 8, 2405, 37), 'archinfo.arch.Register', 'Register', ({(2405, 17, 2405, 25): '"""dcr0ca"""', (2405, 27, 2405, 28): '(4)', (2405, 30, 2405, 36): '(29480)'}, {}), "('dcr0ca', 4, 29480)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2406, 8, 2406, 37), 'archinfo.arch.Register', 'Register', ({(2406, 17, 2406, 25): '"""dcr0cb"""', (2406, 27, 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25): '"""dcr100"""', (2459, 27, 2459, 28): '(4)', (2459, 30, 2459, 36): '(29696)'}, {}), "('dcr100', 4, 29696)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2460, 8, 2460, 37), 'archinfo.arch.Register', 'Register', ({(2460, 17, 2460, 25): '"""dcr101"""', (2460, 27, 2460, 28): '(4)', (2460, 30, 2460, 36): '(29700)'}, {}), "('dcr101', 4, 29700)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2461, 8, 2461, 37), 'archinfo.arch.Register', 'Register', ({(2461, 17, 2461, 25): '"""dcr102"""', (2461, 27, 2461, 28): '(4)', (2461, 30, 2461, 36): '(29704)'}, {}), "('dcr102', 4, 29704)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2462, 8, 2462, 37), 'archinfo.arch.Register', 'Register', ({(2462, 17, 2462, 25): '"""dcr103"""', (2462, 27, 2462, 28): '(4)', (2462, 30, 2462, 36): '(29708)'}, {}), "('dcr103', 4, 29708)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2463, 8, 2463, 37), 'archinfo.arch.Register', 'Register', ({(2463, 17, 2463, 25): '"""dcr104"""', (2463, 27, 2463, 28): '(4)', (2463, 30, 2463, 36): '(29712)'}, {}), "('dcr104', 4, 29712)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2464, 8, 2464, 37), 'archinfo.arch.Register', 'Register', ({(2464, 17, 2464, 25): '"""dcr105"""', (2464, 27, 2464, 28): '(4)', (2464, 30, 2464, 36): '(29716)'}, {}), "('dcr105', 4, 29716)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2465, 8, 2465, 37), 'archinfo.arch.Register', 'Register', ({(2465, 17, 2465, 25): '"""dcr106"""', (2465, 27, 2465, 28): '(4)', (2465, 30, 2465, 36): '(29720)'}, {}), "('dcr106', 4, 29720)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2466, 8, 2466, 37), 'archinfo.arch.Register', 'Register', ({(2466, 17, 2466, 25): '"""dcr107"""', (2466, 27, 2466, 28): '(4)', (2466, 30, 2466, 36): '(29724)'}, {}), "('dcr107', 4, 29724)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2467, 8, 2467, 37), 'archinfo.arch.Register', 'Register', ({(2467, 17, 2467, 25): '"""dcr108"""', (2467, 27, 2467, 28): '(4)', (2467, 30, 2467, 36): '(29728)'}, {}), "('dcr108', 4, 29728)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2468, 8, 2468, 37), 'archinfo.arch.Register', 'Register', ({(2468, 17, 2468, 25): '"""dcr109"""', (2468, 27, 2468, 28): '(4)', (2468, 30, 2468, 36): '(29732)'}, {}), "('dcr109', 4, 29732)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2469, 8, 2469, 37), 'archinfo.arch.Register', 'Register', ({(2469, 17, 2469, 25): '"""dcr10a"""', (2469, 27, 2469, 28): '(4)', (2469, 30, 2469, 36): '(29736)'}, {}), "('dcr10a', 4, 29736)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2470, 8, 2470, 37), 'archinfo.arch.Register', 'Register', ({(2470, 17, 2470, 25): '"""dcr10b"""', (2470, 27, 2470, 28): '(4)', (2470, 30, 2470, 36): '(29740)'}, {}), "('dcr10b', 4, 29740)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2471, 8, 2471, 37), 'archinfo.arch.Register', 'Register', ({(2471, 17, 2471, 25): '"""dcr10c"""', (2471, 27, 2471, 28): '(4)', (2471, 30, 2471, 36): '(29744)'}, {}), "('dcr10c', 4, 29744)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2472, 8, 2472, 37), 'archinfo.arch.Register', 'Register', ({(2472, 17, 2472, 25): '"""dcr10d"""', (2472, 27, 2472, 28): '(4)', (2472, 30, 2472, 36): '(29748)'}, {}), "('dcr10d', 4, 29748)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2473, 8, 2473, 37), 'archinfo.arch.Register', 'Register', ({(2473, 17, 2473, 25): '"""dcr10e"""', (2473, 27, 2473, 28): '(4)', (2473, 30, 2473, 36): '(29752)'}, {}), "('dcr10e', 4, 29752)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2474, 8, 2474, 37), 'archinfo.arch.Register', 'Register', ({(2474, 17, 2474, 25): '"""dcr10f"""', (2474, 27, 2474, 28): '(4)', (2474, 30, 2474, 36): '(29756)'}, {}), "('dcr10f', 4, 29756)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2475, 8, 2475, 37), 'archinfo.arch.Register', 'Register', ({(2475, 17, 2475, 25): '"""dcr110"""', (2475, 27, 2475, 28): '(4)', (2475, 30, 2475, 36): '(29760)'}, {}), "('dcr110', 4, 29760)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2476, 8, 2476, 37), 'archinfo.arch.Register', 'Register', ({(2476, 17, 2476, 25): '"""dcr111"""', (2476, 27, 2476, 28): '(4)', (2476, 30, 2476, 36): '(29764)'}, {}), "('dcr111', 4, 29764)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2477, 8, 2477, 37), 'archinfo.arch.Register', 'Register', ({(2477, 17, 2477, 25): '"""dcr112"""', (2477, 27, 2477, 28): '(4)', (2477, 30, 2477, 36): '(29768)'}, {}), "('dcr112', 4, 29768)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2478, 8, 2478, 37), 'archinfo.arch.Register', 'Register', ({(2478, 17, 2478, 25): '"""dcr113"""', (2478, 27, 2478, 28): '(4)', (2478, 30, 2478, 36): '(29772)'}, {}), "('dcr113', 4, 29772)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2479, 8, 2479, 37), 'archinfo.arch.Register', 'Register', ({(2479, 17, 2479, 25): '"""dcr114"""', (2479, 27, 2479, 28): '(4)', (2479, 30, 2479, 36): '(29776)'}, {}), "('dcr114', 4, 29776)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2480, 8, 2480, 37), 'archinfo.arch.Register', 'Register', ({(2480, 17, 2480, 25): '"""dcr115"""', (2480, 27, 2480, 28): '(4)', (2480, 30, 2480, 36): '(29780)'}, {}), "('dcr115', 4, 29780)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2481, 8, 2481, 37), 'archinfo.arch.Register', 'Register', ({(2481, 17, 2481, 25): '"""dcr116"""', (2481, 27, 2481, 28): '(4)', (2481, 30, 2481, 36): '(29784)'}, {}), "('dcr116', 4, 29784)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2482, 8, 2482, 37), 'archinfo.arch.Register', 'Register', ({(2482, 17, 2482, 25): '"""dcr117"""', (2482, 27, 2482, 28): '(4)', (2482, 30, 2482, 36): '(29788)'}, {}), "('dcr117', 4, 29788)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2483, 8, 2483, 37), 'archinfo.arch.Register', 'Register', ({(2483, 17, 2483, 25): '"""dcr118"""', (2483, 27, 2483, 28): '(4)', (2483, 30, 2483, 36): '(29792)'}, {}), "('dcr118', 4, 29792)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2484, 8, 2484, 37), 'archinfo.arch.Register', 'Register', ({(2484, 17, 2484, 25): '"""dcr119"""', (2484, 27, 2484, 28): '(4)', (2484, 30, 2484, 36): '(29796)'}, {}), "('dcr119', 4, 29796)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2485, 8, 2485, 37), 'archinfo.arch.Register', 'Register', ({(2485, 17, 2485, 25): '"""dcr11a"""', (2485, 27, 2485, 28): '(4)', (2485, 30, 2485, 36): '(29800)'}, {}), "('dcr11a', 4, 29800)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2486, 8, 2486, 37), 'archinfo.arch.Register', 'Register', ({(2486, 17, 2486, 25): '"""dcr11b"""', (2486, 27, 2486, 28): '(4)', (2486, 30, 2486, 36): '(29804)'}, {}), "('dcr11b', 4, 29804)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2487, 8, 2487, 37), 'archinfo.arch.Register', 'Register', ({(2487, 17, 2487, 25): '"""dcr11c"""', (2487, 27, 2487, 28): '(4)', (2487, 30, 2487, 36): '(29808)'}, {}), "('dcr11c', 4, 29808)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2488, 8, 2488, 37), 'archinfo.arch.Register', 'Register', ({(2488, 17, 2488, 25): '"""dcr11d"""', (2488, 27, 2488, 28): '(4)', (2488, 30, 2488, 36): '(29812)'}, {}), "('dcr11d', 4, 29812)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2489, 8, 2489, 37), 'archinfo.arch.Register', 'Register', ({(2489, 17, 2489, 25): '"""dcr11e"""', (2489, 27, 2489, 28): '(4)', (2489, 30, 2489, 36): '(29816)'}, {}), "('dcr11e', 4, 29816)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2490, 8, 2490, 37), 'archinfo.arch.Register', 'Register', ({(2490, 17, 2490, 25): '"""dcr11f"""', (2490, 27, 2490, 28): '(4)', (2490, 30, 2490, 36): '(29820)'}, {}), "('dcr11f', 4, 29820)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2491, 8, 2491, 37), 'archinfo.arch.Register', 'Register', ({(2491, 17, 2491, 25): '"""dcr120"""', (2491, 27, 2491, 28): '(4)', (2491, 30, 2491, 36): '(29824)'}, {}), "('dcr120', 4, 29824)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2492, 8, 2492, 37), 'archinfo.arch.Register', 'Register', ({(2492, 17, 2492, 25): '"""dcr121"""', (2492, 27, 2492, 28): '(4)', (2492, 30, 2492, 36): '(29828)'}, {}), "('dcr121', 4, 29828)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2493, 8, 2493, 37), 'archinfo.arch.Register', 'Register', ({(2493, 17, 2493, 25): '"""dcr122"""', (2493, 27, 2493, 28): '(4)', (2493, 30, 2493, 36): '(29832)'}, {}), "('dcr122', 4, 29832)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2494, 8, 2494, 37), 'archinfo.arch.Register', 'Register', ({(2494, 17, 2494, 25): '"""dcr123"""', (2494, 27, 2494, 28): '(4)', (2494, 30, 2494, 36): '(29836)'}, {}), "('dcr123', 4, 29836)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2495, 8, 2495, 37), 'archinfo.arch.Register', 'Register', ({(2495, 17, 2495, 25): '"""dcr124"""', (2495, 27, 2495, 28): '(4)', (2495, 30, 2495, 36): '(29840)'}, {}), "('dcr124', 4, 29840)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2496, 8, 2496, 37), 'archinfo.arch.Register', 'Register', ({(2496, 17, 2496, 25): '"""dcr125"""', (2496, 27, 2496, 28): '(4)', (2496, 30, 2496, 36): '(29844)'}, {}), "('dcr125', 4, 29844)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2497, 8, 2497, 37), 'archinfo.arch.Register', 'Register', ({(2497, 17, 2497, 25): '"""dcr126"""', (2497, 27, 2497, 28): '(4)', (2497, 30, 2497, 36): '(29848)'}, {}), "('dcr126', 4, 29848)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2498, 8, 2498, 37), 'archinfo.arch.Register', 'Register', ({(2498, 17, 2498, 25): '"""dcr127"""', (2498, 27, 2498, 28): '(4)', (2498, 30, 2498, 36): '(29852)'}, {}), "('dcr127', 4, 29852)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2499, 8, 2499, 37), 'archinfo.arch.Register', 'Register', ({(2499, 17, 2499, 25): '"""dcr128"""', (2499, 27, 2499, 28): '(4)', (2499, 30, 2499, 36): '(29856)'}, {}), "('dcr128', 4, 29856)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2500, 8, 2500, 37), 'archinfo.arch.Register', 'Register', ({(2500, 17, 2500, 25): '"""dcr129"""', (2500, 27, 2500, 28): '(4)', (2500, 30, 2500, 36): '(29860)'}, {}), "('dcr129', 4, 29860)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2501, 8, 2501, 37), 'archinfo.arch.Register', 'Register', ({(2501, 17, 2501, 25): '"""dcr12a"""', (2501, 27, 2501, 28): '(4)', (2501, 30, 2501, 36): '(29864)'}, {}), "('dcr12a', 4, 29864)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2502, 8, 2502, 37), 'archinfo.arch.Register', 'Register', ({(2502, 17, 2502, 25): '"""dcr12b"""', (2502, 27, 2502, 28): '(4)', (2502, 30, 2502, 36): '(29868)'}, {}), "('dcr12b', 4, 29868)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2503, 8, 2503, 37), 'archinfo.arch.Register', 'Register', ({(2503, 17, 2503, 25): '"""dcr12c"""', (2503, 27, 2503, 28): '(4)', (2503, 30, 2503, 36): '(29872)'}, {}), "('dcr12c', 4, 29872)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2504, 8, 2504, 37), 'archinfo.arch.Register', 'Register', ({(2504, 17, 2504, 25): '"""dcr12d"""', (2504, 27, 2504, 28): '(4)', (2504, 30, 2504, 36): '(29876)'}, {}), "('dcr12d', 4, 29876)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2505, 8, 2505, 37), 'archinfo.arch.Register', 'Register', ({(2505, 17, 2505, 25): '"""dcr12e"""', (2505, 27, 2505, 28): '(4)', (2505, 30, 2505, 36): '(29880)'}, {}), "('dcr12e', 4, 29880)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2506, 8, 2506, 37), 'archinfo.arch.Register', 'Register', ({(2506, 17, 2506, 25): '"""dcr12f"""', (2506, 27, 2506, 28): '(4)', (2506, 30, 2506, 36): '(29884)'}, {}), "('dcr12f', 4, 29884)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2507, 8, 2507, 37), 'archinfo.arch.Register', 'Register', ({(2507, 17, 2507, 25): '"""dcr130"""', (2507, 27, 2507, 28): '(4)', (2507, 30, 2507, 36): '(29888)'}, {}), "('dcr130', 4, 29888)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2508, 8, 2508, 37), 'archinfo.arch.Register', 'Register', ({(2508, 17, 2508, 25): '"""dcr131"""', (2508, 27, 2508, 28): '(4)', (2508, 30, 2508, 36): '(29892)'}, {}), "('dcr131', 4, 29892)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2509, 8, 2509, 37), 'archinfo.arch.Register', 'Register', ({(2509, 17, 2509, 25): '"""dcr132"""', (2509, 27, 2509, 28): '(4)', (2509, 30, 2509, 36): '(29896)'}, {}), "('dcr132', 4, 29896)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2510, 8, 2510, 37), 'archinfo.arch.Register', 'Register', ({(2510, 17, 2510, 25): '"""dcr133"""', (2510, 27, 2510, 28): '(4)', (2510, 30, 2510, 36): '(29900)'}, {}), "('dcr133', 4, 29900)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2511, 8, 2511, 37), 'archinfo.arch.Register', 'Register', ({(2511, 17, 2511, 25): '"""dcr134"""', (2511, 27, 2511, 28): '(4)', (2511, 30, 2511, 36): '(29904)'}, {}), "('dcr134', 4, 29904)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2512, 8, 2512, 37), 'archinfo.arch.Register', 'Register', ({(2512, 17, 2512, 25): '"""dcr135"""', (2512, 27, 2512, 28): '(4)', (2512, 30, 2512, 36): '(29908)'}, {}), "('dcr135', 4, 29908)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2513, 8, 2513, 37), 'archinfo.arch.Register', 'Register', ({(2513, 17, 2513, 25): '"""dcr136"""', (2513, 27, 2513, 28): '(4)', (2513, 30, 2513, 36): '(29912)'}, {}), "('dcr136', 4, 29912)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2514, 8, 2514, 37), 'archinfo.arch.Register', 'Register', ({(2514, 17, 2514, 25): '"""dcr137"""', (2514, 27, 2514, 28): '(4)', (2514, 30, 2514, 36): '(29916)'}, {}), "('dcr137', 4, 29916)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2515, 8, 2515, 37), 'archinfo.arch.Register', 'Register', ({(2515, 17, 2515, 25): '"""dcr138"""', (2515, 27, 2515, 28): '(4)', (2515, 30, 2515, 36): '(29920)'}, {}), "('dcr138', 4, 29920)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2516, 8, 2516, 37), 'archinfo.arch.Register', 'Register', ({(2516, 17, 2516, 25): '"""dcr139"""', (2516, 27, 2516, 28): '(4)', (2516, 30, 2516, 36): '(29924)'}, {}), "('dcr139', 4, 29924)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2517, 8, 2517, 37), 'archinfo.arch.Register', 'Register', ({(2517, 17, 2517, 25): '"""dcr13a"""', (2517, 27, 2517, 28): '(4)', (2517, 30, 2517, 36): '(29928)'}, {}), "('dcr13a', 4, 29928)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2518, 8, 2518, 37), 'archinfo.arch.Register', 'Register', ({(2518, 17, 2518, 25): '"""dcr13b"""', (2518, 27, 2518, 28): '(4)', (2518, 30, 2518, 36): '(29932)'}, {}), "('dcr13b', 4, 29932)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2519, 8, 2519, 37), 'archinfo.arch.Register', 'Register', ({(2519, 17, 2519, 25): '"""dcr13c"""', (2519, 27, 2519, 28): '(4)', (2519, 30, 2519, 36): '(29936)'}, {}), "('dcr13c', 4, 29936)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2520, 8, 2520, 37), 'archinfo.arch.Register', 'Register', ({(2520, 17, 2520, 25): '"""dcr13d"""', (2520, 27, 2520, 28): '(4)', (2520, 30, 2520, 36): '(29940)'}, {}), "('dcr13d', 4, 29940)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2521, 8, 2521, 37), 'archinfo.arch.Register', 'Register', ({(2521, 17, 2521, 25): '"""dcr13e"""', (2521, 27, 2521, 28): '(4)', (2521, 30, 2521, 36): '(29944)'}, {}), "('dcr13e', 4, 29944)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2522, 8, 2522, 37), 'archinfo.arch.Register', 'Register', ({(2522, 17, 2522, 25): '"""dcr13f"""', (2522, 27, 2522, 28): '(4)', (2522, 30, 2522, 36): '(29948)'}, {}), "('dcr13f', 4, 29948)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2523, 8, 2523, 37), 'archinfo.arch.Register', 'Register', ({(2523, 17, 2523, 25): '"""dcr140"""', (2523, 27, 2523, 28): '(4)', (2523, 30, 2523, 36): '(29952)'}, {}), "('dcr140', 4, 29952)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2524, 8, 2524, 37), 'archinfo.arch.Register', 'Register', ({(2524, 17, 2524, 25): '"""dcr141"""', (2524, 27, 2524, 28): '(4)', (2524, 30, 2524, 36): '(29956)'}, {}), "('dcr141', 4, 29956)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2525, 8, 2525, 37), 'archinfo.arch.Register', 'Register', ({(2525, 17, 2525, 25): '"""dcr142"""', (2525, 27, 2525, 28): '(4)', (2525, 30, 2525, 36): '(29960)'}, {}), "('dcr142', 4, 29960)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2526, 8, 2526, 37), 'archinfo.arch.Register', 'Register', ({(2526, 17, 2526, 25): '"""dcr143"""', (2526, 27, 2526, 28): '(4)', (2526, 30, 2526, 36): '(29964)'}, {}), "('dcr143', 4, 29964)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2527, 8, 2527, 37), 'archinfo.arch.Register', 'Register', ({(2527, 17, 2527, 25): '"""dcr144"""', (2527, 27, 2527, 28): '(4)', (2527, 30, 2527, 36): '(29968)'}, {}), "('dcr144', 4, 29968)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2528, 8, 2528, 37), 'archinfo.arch.Register', 'Register', ({(2528, 17, 2528, 25): '"""dcr145"""', (2528, 27, 2528, 28): '(4)', (2528, 30, 2528, 36): '(29972)'}, {}), "('dcr145', 4, 29972)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2529, 8, 2529, 37), 'archinfo.arch.Register', 'Register', ({(2529, 17, 2529, 25): '"""dcr146"""', (2529, 27, 2529, 28): '(4)', (2529, 30, 2529, 36): '(29976)'}, {}), "('dcr146', 4, 29976)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2530, 8, 2530, 37), 'archinfo.arch.Register', 'Register', ({(2530, 17, 2530, 25): '"""dcr147"""', (2530, 27, 2530, 28): '(4)', (2530, 30, 2530, 36): '(29980)'}, {}), "('dcr147', 4, 29980)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2531, 8, 2531, 37), 'archinfo.arch.Register', 'Register', ({(2531, 17, 2531, 25): '"""dcr148"""', (2531, 27, 2531, 28): '(4)', (2531, 30, 2531, 36): '(29984)'}, {}), "('dcr148', 4, 29984)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2532, 8, 2532, 37), 'archinfo.arch.Register', 'Register', ({(2532, 17, 2532, 25): '"""dcr149"""', (2532, 27, 2532, 28): '(4)', (2532, 30, 2532, 36): '(29988)'}, {}), "('dcr149', 4, 29988)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2533, 8, 2533, 37), 'archinfo.arch.Register', 'Register', ({(2533, 17, 2533, 25): '"""dcr14a"""', (2533, 27, 2533, 28): '(4)', (2533, 30, 2533, 36): '(29992)'}, {}), "('dcr14a', 4, 29992)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2534, 8, 2534, 37), 'archinfo.arch.Register', 'Register', ({(2534, 17, 2534, 25): '"""dcr14b"""', (2534, 27, 2534, 28): '(4)', (2534, 30, 2534, 36): '(29996)'}, {}), "('dcr14b', 4, 29996)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2535, 8, 2535, 37), 'archinfo.arch.Register', 'Register', ({(2535, 17, 2535, 25): '"""dcr14c"""', (2535, 27, 2535, 28): '(4)', (2535, 30, 2535, 36): '(30000)'}, {}), "('dcr14c', 4, 30000)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2536, 8, 2536, 37), 'archinfo.arch.Register', 'Register', ({(2536, 17, 2536, 25): '"""dcr14d"""', (2536, 27, 2536, 28): '(4)', (2536, 30, 2536, 36): '(30004)'}, {}), "('dcr14d', 4, 30004)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2537, 8, 2537, 37), 'archinfo.arch.Register', 'Register', ({(2537, 17, 2537, 25): '"""dcr14e"""', (2537, 27, 2537, 28): '(4)', (2537, 30, 2537, 36): '(30008)'}, {}), "('dcr14e', 4, 30008)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2538, 8, 2538, 37), 'archinfo.arch.Register', 'Register', ({(2538, 17, 2538, 25): '"""dcr14f"""', (2538, 27, 2538, 28): '(4)', (2538, 30, 2538, 36): '(30012)'}, {}), "('dcr14f', 4, 30012)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2539, 8, 2539, 37), 'archinfo.arch.Register', 'Register', ({(2539, 17, 2539, 25): '"""dcr150"""', (2539, 27, 2539, 28): '(4)', (2539, 30, 2539, 36): '(30016)'}, {}), "('dcr150', 4, 30016)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2540, 8, 2540, 37), 'archinfo.arch.Register', 'Register', ({(2540, 17, 2540, 25): '"""dcr151"""', (2540, 27, 2540, 28): '(4)', (2540, 30, 2540, 36): '(30020)'}, {}), "('dcr151', 4, 30020)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2541, 8, 2541, 37), 'archinfo.arch.Register', 'Register', ({(2541, 17, 2541, 25): '"""dcr152"""', (2541, 27, 2541, 28): '(4)', (2541, 30, 2541, 36): '(30024)'}, {}), "('dcr152', 4, 30024)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2542, 8, 2542, 37), 'archinfo.arch.Register', 'Register', ({(2542, 17, 2542, 25): '"""dcr153"""', (2542, 27, 2542, 28): '(4)', (2542, 30, 2542, 36): '(30028)'}, {}), "('dcr153', 4, 30028)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2543, 8, 2543, 37), 'archinfo.arch.Register', 'Register', ({(2543, 17, 2543, 25): '"""dcr154"""', (2543, 27, 2543, 28): '(4)', (2543, 30, 2543, 36): '(30032)'}, {}), "('dcr154', 4, 30032)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2544, 8, 2544, 37), 'archinfo.arch.Register', 'Register', ({(2544, 17, 2544, 25): '"""dcr155"""', (2544, 27, 2544, 28): '(4)', (2544, 30, 2544, 36): '(30036)'}, {}), "('dcr155', 4, 30036)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2545, 8, 2545, 37), 'archinfo.arch.Register', 'Register', ({(2545, 17, 2545, 25): '"""dcr156"""', (2545, 27, 2545, 28): '(4)', (2545, 30, 2545, 36): '(30040)'}, {}), "('dcr156', 4, 30040)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2546, 8, 2546, 37), 'archinfo.arch.Register', 'Register', ({(2546, 17, 2546, 25): '"""dcr157"""', (2546, 27, 2546, 28): '(4)', (2546, 30, 2546, 36): '(30044)'}, {}), "('dcr157', 4, 30044)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2547, 8, 2547, 37), 'archinfo.arch.Register', 'Register', ({(2547, 17, 2547, 25): '"""dcr158"""', (2547, 27, 2547, 28): '(4)', (2547, 30, 2547, 36): '(30048)'}, {}), "('dcr158', 4, 30048)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2548, 8, 2548, 37), 'archinfo.arch.Register', 'Register', ({(2548, 17, 2548, 25): '"""dcr159"""', (2548, 27, 2548, 28): '(4)', (2548, 30, 2548, 36): '(30052)'}, {}), "('dcr159', 4, 30052)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2549, 8, 2549, 37), 'archinfo.arch.Register', 'Register', ({(2549, 17, 2549, 25): '"""dcr15a"""', (2549, 27, 2549, 28): '(4)', (2549, 30, 2549, 36): '(30056)'}, {}), "('dcr15a', 4, 30056)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2550, 8, 2550, 37), 'archinfo.arch.Register', 'Register', ({(2550, 17, 2550, 25): '"""dcr15b"""', (2550, 27, 2550, 28): '(4)', (2550, 30, 2550, 36): '(30060)'}, {}), "('dcr15b', 4, 30060)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2551, 8, 2551, 37), 'archinfo.arch.Register', 'Register', ({(2551, 17, 2551, 25): '"""dcr15c"""', (2551, 27, 2551, 28): '(4)', (2551, 30, 2551, 36): '(30064)'}, {}), "('dcr15c', 4, 30064)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2552, 8, 2552, 37), 'archinfo.arch.Register', 'Register', ({(2552, 17, 2552, 25): '"""dcr15d"""', (2552, 27, 2552, 28): '(4)', (2552, 30, 2552, 36): '(30068)'}, {}), "('dcr15d', 4, 30068)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2553, 8, 2553, 37), 'archinfo.arch.Register', 'Register', ({(2553, 17, 2553, 25): '"""dcr15e"""', (2553, 27, 2553, 28): '(4)', (2553, 30, 2553, 36): '(30072)'}, {}), "('dcr15e', 4, 30072)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2554, 8, 2554, 37), 'archinfo.arch.Register', 'Register', ({(2554, 17, 2554, 25): '"""dcr15f"""', (2554, 27, 2554, 28): '(4)', (2554, 30, 2554, 36): '(30076)'}, {}), "('dcr15f', 4, 30076)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2555, 8, 2555, 37), 'archinfo.arch.Register', 'Register', ({(2555, 17, 2555, 25): '"""dcr160"""', (2555, 27, 2555, 28): '(4)', (2555, 30, 2555, 36): '(30080)'}, {}), "('dcr160', 4, 30080)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2556, 8, 2556, 37), 'archinfo.arch.Register', 'Register', ({(2556, 17, 2556, 25): '"""dcr161"""', (2556, 27, 2556, 28): '(4)', (2556, 30, 2556, 36): '(30084)'}, {}), "('dcr161', 4, 30084)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2557, 8, 2557, 37), 'archinfo.arch.Register', 'Register', ({(2557, 17, 2557, 25): '"""dcr162"""', (2557, 27, 2557, 28): '(4)', (2557, 30, 2557, 36): '(30088)'}, {}), "('dcr162', 4, 30088)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2558, 8, 2558, 37), 'archinfo.arch.Register', 'Register', ({(2558, 17, 2558, 25): '"""dcr163"""', (2558, 27, 2558, 28): '(4)', (2558, 30, 2558, 36): '(30092)'}, {}), "('dcr163', 4, 30092)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2559, 8, 2559, 37), 'archinfo.arch.Register', 'Register', ({(2559, 17, 2559, 25): '"""dcr164"""', (2559, 27, 2559, 28): '(4)', (2559, 30, 2559, 36): '(30096)'}, {}), "('dcr164', 4, 30096)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2560, 8, 2560, 37), 'archinfo.arch.Register', 'Register', ({(2560, 17, 2560, 25): '"""dcr165"""', (2560, 27, 2560, 28): '(4)', (2560, 30, 2560, 36): '(30100)'}, {}), "('dcr165', 4, 30100)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2561, 8, 2561, 37), 'archinfo.arch.Register', 'Register', ({(2561, 17, 2561, 25): '"""dcr166"""', (2561, 27, 2561, 28): '(4)', (2561, 30, 2561, 36): '(30104)'}, {}), "('dcr166', 4, 30104)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2562, 8, 2562, 37), 'archinfo.arch.Register', 'Register', ({(2562, 17, 2562, 25): '"""dcr167"""', (2562, 27, 2562, 28): '(4)', (2562, 30, 2562, 36): '(30108)'}, {}), "('dcr167', 4, 30108)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2563, 8, 2563, 37), 'archinfo.arch.Register', 'Register', ({(2563, 17, 2563, 25): '"""dcr168"""', (2563, 27, 2563, 28): '(4)', (2563, 30, 2563, 36): '(30112)'}, {}), "('dcr168', 4, 30112)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2564, 8, 2564, 37), 'archinfo.arch.Register', 'Register', ({(2564, 17, 2564, 25): '"""dcr169"""', (2564, 27, 2564, 28): '(4)', (2564, 30, 2564, 36): '(30116)'}, {}), "('dcr169', 4, 30116)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2565, 8, 2565, 37), 'archinfo.arch.Register', 'Register', ({(2565, 17, 2565, 25): '"""dcr16a"""', (2565, 27, 2565, 28): '(4)', (2565, 30, 2565, 36): '(30120)'}, {}), "('dcr16a', 4, 30120)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2566, 8, 2566, 37), 'archinfo.arch.Register', 'Register', ({(2566, 17, 2566, 25): '"""dcr16b"""', (2566, 27, 2566, 28): '(4)', (2566, 30, 2566, 36): '(30124)'}, {}), "('dcr16b', 4, 30124)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2567, 8, 2567, 37), 'archinfo.arch.Register', 'Register', ({(2567, 17, 2567, 25): '"""dcr16c"""', (2567, 27, 2567, 28): '(4)', (2567, 30, 2567, 36): '(30128)'}, {}), "('dcr16c', 4, 30128)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2568, 8, 2568, 37), 'archinfo.arch.Register', 'Register', ({(2568, 17, 2568, 25): '"""dcr16d"""', (2568, 27, 2568, 28): '(4)', (2568, 30, 2568, 36): '(30132)'}, {}), "('dcr16d', 4, 30132)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2569, 8, 2569, 37), 'archinfo.arch.Register', 'Register', ({(2569, 17, 2569, 25): '"""dcr16e"""', (2569, 27, 2569, 28): '(4)', (2569, 30, 2569, 36): '(30136)'}, {}), "('dcr16e', 4, 30136)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2570, 8, 2570, 37), 'archinfo.arch.Register', 'Register', ({(2570, 17, 2570, 25): '"""dcr16f"""', (2570, 27, 2570, 28): '(4)', (2570, 30, 2570, 36): '(30140)'}, {}), "('dcr16f', 4, 30140)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2571, 8, 2571, 37), 'archinfo.arch.Register', 'Register', ({(2571, 17, 2571, 25): '"""dcr170"""', (2571, 27, 2571, 28): '(4)', (2571, 30, 2571, 36): '(30144)'}, {}), "('dcr170', 4, 30144)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2572, 8, 2572, 37), 'archinfo.arch.Register', 'Register', ({(2572, 17, 2572, 25): '"""dcr171"""', (2572, 27, 2572, 28): '(4)', (2572, 30, 2572, 36): '(30148)'}, {}), "('dcr171', 4, 30148)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2573, 8, 2573, 37), 'archinfo.arch.Register', 'Register', ({(2573, 17, 2573, 25): '"""dcr172"""', (2573, 27, 2573, 28): '(4)', (2573, 30, 2573, 36): '(30152)'}, {}), "('dcr172', 4, 30152)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2574, 8, 2574, 37), 'archinfo.arch.Register', 'Register', ({(2574, 17, 2574, 25): '"""dcr173"""', (2574, 27, 2574, 28): '(4)', (2574, 30, 2574, 36): '(30156)'}, {}), "('dcr173', 4, 30156)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2575, 8, 2575, 37), 'archinfo.arch.Register', 'Register', ({(2575, 17, 2575, 25): '"""dcr174"""', (2575, 27, 2575, 28): '(4)', (2575, 30, 2575, 36): '(30160)'}, {}), "('dcr174', 4, 30160)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2576, 8, 2576, 37), 'archinfo.arch.Register', 'Register', ({(2576, 17, 2576, 25): '"""dcr175"""', (2576, 27, 2576, 28): '(4)', (2576, 30, 2576, 36): '(30164)'}, {}), "('dcr175', 4, 30164)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2577, 8, 2577, 37), 'archinfo.arch.Register', 'Register', ({(2577, 17, 2577, 25): '"""dcr176"""', (2577, 27, 2577, 28): '(4)', (2577, 30, 2577, 36): '(30168)'}, {}), "('dcr176', 4, 30168)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2578, 8, 2578, 37), 'archinfo.arch.Register', 'Register', ({(2578, 17, 2578, 25): '"""dcr177"""', (2578, 27, 2578, 28): '(4)', (2578, 30, 2578, 36): '(30172)'}, {}), "('dcr177', 4, 30172)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2579, 8, 2579, 37), 'archinfo.arch.Register', 'Register', ({(2579, 17, 2579, 25): '"""dcr178"""', (2579, 27, 2579, 28): '(4)', (2579, 30, 2579, 36): '(30176)'}, {}), "('dcr178', 4, 30176)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2580, 8, 2580, 37), 'archinfo.arch.Register', 'Register', ({(2580, 17, 2580, 25): '"""dcr179"""', (2580, 27, 2580, 28): '(4)', (2580, 30, 2580, 36): '(30180)'}, {}), "('dcr179', 4, 30180)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2581, 8, 2581, 37), 'archinfo.arch.Register', 'Register', ({(2581, 17, 2581, 25): '"""dcr17a"""', (2581, 27, 2581, 28): '(4)', (2581, 30, 2581, 36): '(30184)'}, {}), "('dcr17a', 4, 30184)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2582, 8, 2582, 37), 'archinfo.arch.Register', 'Register', ({(2582, 17, 2582, 25): '"""dcr17b"""', (2582, 27, 2582, 28): '(4)', (2582, 30, 2582, 36): '(30188)'}, {}), "('dcr17b', 4, 30188)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2583, 8, 2583, 37), 'archinfo.arch.Register', 'Register', ({(2583, 17, 2583, 25): '"""dcr17c"""', (2583, 27, 2583, 28): '(4)', (2583, 30, 2583, 36): '(30192)'}, {}), "('dcr17c', 4, 30192)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2584, 8, 2584, 37), 'archinfo.arch.Register', 'Register', ({(2584, 17, 2584, 25): '"""dcr17d"""', (2584, 27, 2584, 28): '(4)', (2584, 30, 2584, 36): '(30196)'}, {}), "('dcr17d', 4, 30196)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2585, 8, 2585, 37), 'archinfo.arch.Register', 'Register', ({(2585, 17, 2585, 25): '"""dcr17e"""', (2585, 27, 2585, 28): '(4)', (2585, 30, 2585, 36): '(30200)'}, {}), "('dcr17e', 4, 30200)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2586, 8, 2586, 37), 'archinfo.arch.Register', 'Register', ({(2586, 17, 2586, 25): '"""dcr17f"""', (2586, 27, 2586, 28): '(4)', (2586, 30, 2586, 36): '(30204)'}, {}), "('dcr17f', 4, 30204)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2587, 8, 2587, 37), 'archinfo.arch.Register', 'Register', ({(2587, 17, 2587, 25): '"""dcr180"""', (2587, 27, 2587, 28): '(4)', (2587, 30, 2587, 36): '(30208)'}, {}), "('dcr180', 4, 30208)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2588, 8, 2588, 37), 'archinfo.arch.Register', 'Register', ({(2588, 17, 2588, 25): '"""dcr181"""', (2588, 27, 2588, 28): '(4)', (2588, 30, 2588, 36): '(30212)'}, {}), "('dcr181', 4, 30212)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2589, 8, 2589, 37), 'archinfo.arch.Register', 'Register', ({(2589, 17, 2589, 25): '"""dcr182"""', (2589, 27, 2589, 28): '(4)', (2589, 30, 2589, 36): '(30216)'}, {}), "('dcr182', 4, 30216)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2590, 8, 2590, 37), 'archinfo.arch.Register', 'Register', ({(2590, 17, 2590, 25): '"""dcr183"""', (2590, 27, 2590, 28): '(4)', (2590, 30, 2590, 36): '(30220)'}, {}), "('dcr183', 4, 30220)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2591, 8, 2591, 37), 'archinfo.arch.Register', 'Register', ({(2591, 17, 2591, 25): '"""dcr184"""', (2591, 27, 2591, 28): '(4)', (2591, 30, 2591, 36): '(30224)'}, {}), "('dcr184', 4, 30224)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2592, 8, 2592, 37), 'archinfo.arch.Register', 'Register', ({(2592, 17, 2592, 25): '"""dcr185"""', (2592, 27, 2592, 28): '(4)', (2592, 30, 2592, 36): '(30228)'}, {}), "('dcr185', 4, 30228)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2593, 8, 2593, 37), 'archinfo.arch.Register', 'Register', ({(2593, 17, 2593, 25): '"""dcr186"""', (2593, 27, 2593, 28): '(4)', (2593, 30, 2593, 36): '(30232)'}, {}), "('dcr186', 4, 30232)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2594, 8, 2594, 37), 'archinfo.arch.Register', 'Register', ({(2594, 17, 2594, 25): '"""dcr187"""', (2594, 27, 2594, 28): '(4)', (2594, 30, 2594, 36): '(30236)'}, {}), "('dcr187', 4, 30236)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2595, 8, 2595, 37), 'archinfo.arch.Register', 'Register', ({(2595, 17, 2595, 25): '"""dcr188"""', (2595, 27, 2595, 28): '(4)', (2595, 30, 2595, 36): '(30240)'}, {}), "('dcr188', 4, 30240)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2596, 8, 2596, 37), 'archinfo.arch.Register', 'Register', ({(2596, 17, 2596, 25): '"""dcr189"""', (2596, 27, 2596, 28): '(4)', (2596, 30, 2596, 36): '(30244)'}, {}), "('dcr189', 4, 30244)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2597, 8, 2597, 37), 'archinfo.arch.Register', 'Register', ({(2597, 17, 2597, 25): '"""dcr18a"""', (2597, 27, 2597, 28): '(4)', (2597, 30, 2597, 36): '(30248)'}, {}), "('dcr18a', 4, 30248)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2598, 8, 2598, 37), 'archinfo.arch.Register', 'Register', ({(2598, 17, 2598, 25): '"""dcr18b"""', (2598, 27, 2598, 28): '(4)', (2598, 30, 2598, 36): '(30252)'}, {}), "('dcr18b', 4, 30252)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2599, 8, 2599, 37), 'archinfo.arch.Register', 'Register', ({(2599, 17, 2599, 25): '"""dcr18c"""', (2599, 27, 2599, 28): '(4)', (2599, 30, 2599, 36): '(30256)'}, {}), "('dcr18c', 4, 30256)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2600, 8, 2600, 37), 'archinfo.arch.Register', 'Register', ({(2600, 17, 2600, 25): '"""dcr18d"""', (2600, 27, 2600, 28): '(4)', (2600, 30, 2600, 36): '(30260)'}, {}), "('dcr18d', 4, 30260)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2601, 8, 2601, 37), 'archinfo.arch.Register', 'Register', ({(2601, 17, 2601, 25): '"""dcr18e"""', (2601, 27, 2601, 28): '(4)', (2601, 30, 2601, 36): '(30264)'}, {}), "('dcr18e', 4, 30264)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2602, 8, 2602, 37), 'archinfo.arch.Register', 'Register', ({(2602, 17, 2602, 25): '"""dcr18f"""', (2602, 27, 2602, 28): '(4)', (2602, 30, 2602, 36): '(30268)'}, {}), "('dcr18f', 4, 30268)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2603, 8, 2603, 37), 'archinfo.arch.Register', 'Register', ({(2603, 17, 2603, 25): '"""dcr190"""', (2603, 27, 2603, 28): '(4)', (2603, 30, 2603, 36): '(30272)'}, {}), "('dcr190', 4, 30272)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2604, 8, 2604, 37), 'archinfo.arch.Register', 'Register', ({(2604, 17, 2604, 25): '"""dcr191"""', (2604, 27, 2604, 28): '(4)', (2604, 30, 2604, 36): '(30276)'}, {}), "('dcr191', 4, 30276)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2605, 8, 2605, 37), 'archinfo.arch.Register', 'Register', ({(2605, 17, 2605, 25): '"""dcr192"""', (2605, 27, 2605, 28): '(4)', (2605, 30, 2605, 36): '(30280)'}, {}), "('dcr192', 4, 30280)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2606, 8, 2606, 37), 'archinfo.arch.Register', 'Register', ({(2606, 17, 2606, 25): '"""dcr193"""', (2606, 27, 2606, 28): '(4)', (2606, 30, 2606, 36): '(30284)'}, {}), "('dcr193', 4, 30284)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2607, 8, 2607, 37), 'archinfo.arch.Register', 'Register', ({(2607, 17, 2607, 25): '"""dcr194"""', (2607, 27, 2607, 28): '(4)', (2607, 30, 2607, 36): '(30288)'}, {}), "('dcr194', 4, 30288)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2608, 8, 2608, 37), 'archinfo.arch.Register', 'Register', ({(2608, 17, 2608, 25): '"""dcr195"""', (2608, 27, 2608, 28): '(4)', (2608, 30, 2608, 36): '(30292)'}, {}), "('dcr195', 4, 30292)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2609, 8, 2609, 37), 'archinfo.arch.Register', 'Register', ({(2609, 17, 2609, 25): '"""dcr196"""', (2609, 27, 2609, 28): '(4)', (2609, 30, 2609, 36): '(30296)'}, {}), "('dcr196', 4, 30296)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2610, 8, 2610, 37), 'archinfo.arch.Register', 'Register', ({(2610, 17, 2610, 25): '"""dcr197"""', (2610, 27, 2610, 28): '(4)', (2610, 30, 2610, 36): '(30300)'}, {}), "('dcr197', 4, 30300)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2611, 8, 2611, 37), 'archinfo.arch.Register', 'Register', ({(2611, 17, 2611, 25): '"""dcr198"""', (2611, 27, 2611, 28): '(4)', (2611, 30, 2611, 36): '(30304)'}, {}), "('dcr198', 4, 30304)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2612, 8, 2612, 37), 'archinfo.arch.Register', 'Register', ({(2612, 17, 2612, 25): '"""dcr199"""', (2612, 27, 2612, 28): '(4)', (2612, 30, 2612, 36): '(30308)'}, {}), "('dcr199', 4, 30308)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2613, 8, 2613, 37), 'archinfo.arch.Register', 'Register', ({(2613, 17, 2613, 25): '"""dcr19a"""', (2613, 27, 2613, 28): '(4)', (2613, 30, 2613, 36): '(30312)'}, {}), "('dcr19a', 4, 30312)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2614, 8, 2614, 37), 'archinfo.arch.Register', 'Register', ({(2614, 17, 2614, 25): '"""dcr19b"""', (2614, 27, 2614, 28): '(4)', (2614, 30, 2614, 36): '(30316)'}, {}), "('dcr19b', 4, 30316)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2615, 8, 2615, 37), 'archinfo.arch.Register', 'Register', ({(2615, 17, 2615, 25): '"""dcr19c"""', (2615, 27, 2615, 28): '(4)', (2615, 30, 2615, 36): '(30320)'}, {}), "('dcr19c', 4, 30320)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2616, 8, 2616, 37), 'archinfo.arch.Register', 'Register', ({(2616, 17, 2616, 25): '"""dcr19d"""', (2616, 27, 2616, 28): '(4)', (2616, 30, 2616, 36): '(30324)'}, {}), "('dcr19d', 4, 30324)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2617, 8, 2617, 37), 'archinfo.arch.Register', 'Register', ({(2617, 17, 2617, 25): '"""dcr19e"""', (2617, 27, 2617, 28): '(4)', (2617, 30, 2617, 36): '(30328)'}, {}), "('dcr19e', 4, 30328)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2618, 8, 2618, 37), 'archinfo.arch.Register', 'Register', ({(2618, 17, 2618, 25): '"""dcr19f"""', (2618, 27, 2618, 28): '(4)', (2618, 30, 2618, 36): '(30332)'}, {}), "('dcr19f', 4, 30332)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2619, 8, 2619, 37), 'archinfo.arch.Register', 'Register', ({(2619, 17, 2619, 25): '"""dcr1a0"""', (2619, 27, 2619, 28): '(4)', (2619, 30, 2619, 36): '(30336)'}, {}), "('dcr1a0', 4, 30336)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2620, 8, 2620, 37), 'archinfo.arch.Register', 'Register', ({(2620, 17, 2620, 25): '"""dcr1a1"""', (2620, 27, 2620, 28): '(4)', (2620, 30, 2620, 36): '(30340)'}, {}), "('dcr1a1', 4, 30340)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2621, 8, 2621, 37), 'archinfo.arch.Register', 'Register', ({(2621, 17, 2621, 25): '"""dcr1a2"""', (2621, 27, 2621, 28): '(4)', (2621, 30, 2621, 36): '(30344)'}, {}), "('dcr1a2', 4, 30344)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2622, 8, 2622, 37), 'archinfo.arch.Register', 'Register', ({(2622, 17, 2622, 25): '"""dcr1a3"""', (2622, 27, 2622, 28): '(4)', (2622, 30, 2622, 36): '(30348)'}, {}), "('dcr1a3', 4, 30348)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2623, 8, 2623, 37), 'archinfo.arch.Register', 'Register', ({(2623, 17, 2623, 25): '"""dcr1a4"""', (2623, 27, 2623, 28): '(4)', (2623, 30, 2623, 36): '(30352)'}, {}), "('dcr1a4', 4, 30352)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2624, 8, 2624, 37), 'archinfo.arch.Register', 'Register', ({(2624, 17, 2624, 25): '"""dcr1a5"""', (2624, 27, 2624, 28): '(4)', (2624, 30, 2624, 36): '(30356)'}, {}), "('dcr1a5', 4, 30356)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2625, 8, 2625, 37), 'archinfo.arch.Register', 'Register', ({(2625, 17, 2625, 25): '"""dcr1a6"""', (2625, 27, 2625, 28): '(4)', (2625, 30, 2625, 36): '(30360)'}, {}), "('dcr1a6', 4, 30360)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2626, 8, 2626, 37), 'archinfo.arch.Register', 'Register', ({(2626, 17, 2626, 25): '"""dcr1a7"""', (2626, 27, 2626, 28): '(4)', (2626, 30, 2626, 36): '(30364)'}, {}), "('dcr1a7', 4, 30364)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2627, 8, 2627, 37), 'archinfo.arch.Register', 'Register', ({(2627, 17, 2627, 25): '"""dcr1a8"""', (2627, 27, 2627, 28): '(4)', (2627, 30, 2627, 36): '(30368)'}, {}), "('dcr1a8', 4, 30368)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2628, 8, 2628, 37), 'archinfo.arch.Register', 'Register', ({(2628, 17, 2628, 25): '"""dcr1a9"""', (2628, 27, 2628, 28): '(4)', (2628, 30, 2628, 36): '(30372)'}, {}), "('dcr1a9', 4, 30372)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2629, 8, 2629, 37), 'archinfo.arch.Register', 'Register', ({(2629, 17, 2629, 25): '"""dcr1aa"""', (2629, 27, 2629, 28): '(4)', (2629, 30, 2629, 36): '(30376)'}, {}), "('dcr1aa', 4, 30376)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2630, 8, 2630, 37), 'archinfo.arch.Register', 'Register', ({(2630, 17, 2630, 25): '"""dcr1ab"""', (2630, 27, 2630, 28): '(4)', (2630, 30, 2630, 36): '(30380)'}, {}), "('dcr1ab', 4, 30380)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2631, 8, 2631, 37), 'archinfo.arch.Register', 'Register', ({(2631, 17, 2631, 25): '"""dcr1ac"""', (2631, 27, 2631, 28): '(4)', (2631, 30, 2631, 36): '(30384)'}, {}), "('dcr1ac', 4, 30384)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2632, 8, 2632, 37), 'archinfo.arch.Register', 'Register', ({(2632, 17, 2632, 25): '"""dcr1ad"""', (2632, 27, 2632, 28): '(4)', (2632, 30, 2632, 36): '(30388)'}, {}), "('dcr1ad', 4, 30388)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2633, 8, 2633, 37), 'archinfo.arch.Register', 'Register', ({(2633, 17, 2633, 25): '"""dcr1ae"""', (2633, 27, 2633, 28): '(4)', (2633, 30, 2633, 36): '(30392)'}, {}), "('dcr1ae', 4, 30392)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2634, 8, 2634, 37), 'archinfo.arch.Register', 'Register', ({(2634, 17, 2634, 25): '"""dcr1af"""', (2634, 27, 2634, 28): '(4)', (2634, 30, 2634, 36): '(30396)'}, {}), "('dcr1af', 4, 30396)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2635, 8, 2635, 37), 'archinfo.arch.Register', 'Register', ({(2635, 17, 2635, 25): '"""dcr1b0"""', (2635, 27, 2635, 28): '(4)', (2635, 30, 2635, 36): '(30400)'}, {}), "('dcr1b0', 4, 30400)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2636, 8, 2636, 37), 'archinfo.arch.Register', 'Register', ({(2636, 17, 2636, 25): '"""dcr1b1"""', (2636, 27, 2636, 28): '(4)', (2636, 30, 2636, 36): '(30404)'}, {}), "('dcr1b1', 4, 30404)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2637, 8, 2637, 37), 'archinfo.arch.Register', 'Register', ({(2637, 17, 2637, 25): '"""dcr1b2"""', (2637, 27, 2637, 28): '(4)', (2637, 30, 2637, 36): '(30408)'}, {}), "('dcr1b2', 4, 30408)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2638, 8, 2638, 37), 'archinfo.arch.Register', 'Register', ({(2638, 17, 2638, 25): '"""dcr1b3"""', (2638, 27, 2638, 28): '(4)', (2638, 30, 2638, 36): '(30412)'}, {}), "('dcr1b3', 4, 30412)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2639, 8, 2639, 37), 'archinfo.arch.Register', 'Register', ({(2639, 17, 2639, 25): '"""dcr1b4"""', (2639, 27, 2639, 28): '(4)', (2639, 30, 2639, 36): '(30416)'}, {}), "('dcr1b4', 4, 30416)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2640, 8, 2640, 37), 'archinfo.arch.Register', 'Register', ({(2640, 17, 2640, 25): '"""dcr1b5"""', (2640, 27, 2640, 28): '(4)', (2640, 30, 2640, 36): '(30420)'}, {}), "('dcr1b5', 4, 30420)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2641, 8, 2641, 37), 'archinfo.arch.Register', 'Register', ({(2641, 17, 2641, 25): '"""dcr1b6"""', (2641, 27, 2641, 28): '(4)', (2641, 30, 2641, 36): '(30424)'}, {}), "('dcr1b6', 4, 30424)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2642, 8, 2642, 37), 'archinfo.arch.Register', 'Register', ({(2642, 17, 2642, 25): '"""dcr1b7"""', (2642, 27, 2642, 28): '(4)', (2642, 30, 2642, 36): '(30428)'}, {}), "('dcr1b7', 4, 30428)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2643, 8, 2643, 37), 'archinfo.arch.Register', 'Register', ({(2643, 17, 2643, 25): '"""dcr1b8"""', (2643, 27, 2643, 28): '(4)', (2643, 30, 2643, 36): '(30432)'}, {}), "('dcr1b8', 4, 30432)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2644, 8, 2644, 37), 'archinfo.arch.Register', 'Register', ({(2644, 17, 2644, 25): '"""dcr1b9"""', (2644, 27, 2644, 28): '(4)', (2644, 30, 2644, 36): '(30436)'}, {}), "('dcr1b9', 4, 30436)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2645, 8, 2645, 37), 'archinfo.arch.Register', 'Register', ({(2645, 17, 2645, 25): '"""dcr1ba"""', (2645, 27, 2645, 28): '(4)', (2645, 30, 2645, 36): '(30440)'}, {}), "('dcr1ba', 4, 30440)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2646, 8, 2646, 37), 'archinfo.arch.Register', 'Register', ({(2646, 17, 2646, 25): '"""dcr1bb"""', (2646, 27, 2646, 28): '(4)', (2646, 30, 2646, 36): '(30444)'}, {}), "('dcr1bb', 4, 30444)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2647, 8, 2647, 37), 'archinfo.arch.Register', 'Register', ({(2647, 17, 2647, 25): '"""dcr1bc"""', (2647, 27, 2647, 28): '(4)', (2647, 30, 2647, 36): '(30448)'}, {}), "('dcr1bc', 4, 30448)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2648, 8, 2648, 37), 'archinfo.arch.Register', 'Register', ({(2648, 17, 2648, 25): '"""dcr1bd"""', (2648, 27, 2648, 28): '(4)', (2648, 30, 2648, 36): '(30452)'}, {}), "('dcr1bd', 4, 30452)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2649, 8, 2649, 37), 'archinfo.arch.Register', 'Register', ({(2649, 17, 2649, 25): '"""dcr1be"""', (2649, 27, 2649, 28): '(4)', (2649, 30, 2649, 36): '(30456)'}, {}), "('dcr1be', 4, 30456)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2650, 8, 2650, 37), 'archinfo.arch.Register', 'Register', ({(2650, 17, 2650, 25): '"""dcr1bf"""', (2650, 27, 2650, 28): '(4)', (2650, 30, 2650, 36): '(30460)'}, {}), "('dcr1bf', 4, 30460)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2651, 8, 2651, 37), 'archinfo.arch.Register', 'Register', ({(2651, 17, 2651, 25): '"""dcr1c0"""', (2651, 27, 2651, 28): '(4)', (2651, 30, 2651, 36): '(30464)'}, {}), "('dcr1c0', 4, 30464)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2652, 8, 2652, 37), 'archinfo.arch.Register', 'Register', ({(2652, 17, 2652, 25): '"""dcr1c1"""', (2652, 27, 2652, 28): '(4)', (2652, 30, 2652, 36): '(30468)'}, {}), "('dcr1c1', 4, 30468)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2653, 8, 2653, 37), 'archinfo.arch.Register', 'Register', ({(2653, 17, 2653, 25): '"""dcr1c2"""', (2653, 27, 2653, 28): '(4)', (2653, 30, 2653, 36): '(30472)'}, {}), "('dcr1c2', 4, 30472)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2654, 8, 2654, 37), 'archinfo.arch.Register', 'Register', ({(2654, 17, 2654, 25): '"""dcr1c3"""', (2654, 27, 2654, 28): '(4)', (2654, 30, 2654, 36): '(30476)'}, {}), "('dcr1c3', 4, 30476)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2655, 8, 2655, 37), 'archinfo.arch.Register', 'Register', ({(2655, 17, 2655, 25): '"""dcr1c4"""', (2655, 27, 2655, 28): '(4)', (2655, 30, 2655, 36): '(30480)'}, {}), "('dcr1c4', 4, 30480)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2656, 8, 2656, 37), 'archinfo.arch.Register', 'Register', ({(2656, 17, 2656, 25): '"""dcr1c5"""', (2656, 27, 2656, 28): '(4)', (2656, 30, 2656, 36): '(30484)'}, {}), "('dcr1c5', 4, 30484)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2657, 8, 2657, 37), 'archinfo.arch.Register', 'Register', ({(2657, 17, 2657, 25): '"""dcr1c6"""', (2657, 27, 2657, 28): '(4)', (2657, 30, 2657, 36): '(30488)'}, {}), "('dcr1c6', 4, 30488)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2658, 8, 2658, 37), 'archinfo.arch.Register', 'Register', ({(2658, 17, 2658, 25): '"""dcr1c7"""', (2658, 27, 2658, 28): '(4)', (2658, 30, 2658, 36): '(30492)'}, {}), "('dcr1c7', 4, 30492)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2659, 8, 2659, 37), 'archinfo.arch.Register', 'Register', ({(2659, 17, 2659, 25): '"""dcr1c8"""', (2659, 27, 2659, 28): '(4)', (2659, 30, 2659, 36): '(30496)'}, {}), "('dcr1c8', 4, 30496)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2660, 8, 2660, 37), 'archinfo.arch.Register', 'Register', ({(2660, 17, 2660, 25): '"""dcr1c9"""', (2660, 27, 2660, 28): '(4)', (2660, 30, 2660, 36): '(30500)'}, {}), "('dcr1c9', 4, 30500)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2661, 8, 2661, 37), 'archinfo.arch.Register', 'Register', ({(2661, 17, 2661, 25): '"""dcr1ca"""', (2661, 27, 2661, 28): '(4)', (2661, 30, 2661, 36): '(30504)'}, {}), "('dcr1ca', 4, 30504)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2662, 8, 2662, 37), 'archinfo.arch.Register', 'Register', ({(2662, 17, 2662, 25): '"""dcr1cb"""', (2662, 27, 2662, 28): '(4)', (2662, 30, 2662, 36): '(30508)'}, {}), "('dcr1cb', 4, 30508)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2663, 8, 2663, 37), 'archinfo.arch.Register', 'Register', ({(2663, 17, 2663, 25): '"""dcr1cc"""', (2663, 27, 2663, 28): '(4)', (2663, 30, 2663, 36): '(30512)'}, {}), "('dcr1cc', 4, 30512)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2664, 8, 2664, 37), 'archinfo.arch.Register', 'Register', ({(2664, 17, 2664, 25): '"""dcr1cd"""', (2664, 27, 2664, 28): '(4)', (2664, 30, 2664, 36): '(30516)'}, {}), "('dcr1cd', 4, 30516)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2665, 8, 2665, 37), 'archinfo.arch.Register', 'Register', ({(2665, 17, 2665, 25): '"""dcr1ce"""', (2665, 27, 2665, 28): '(4)', (2665, 30, 2665, 36): '(30520)'}, {}), "('dcr1ce', 4, 30520)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2666, 8, 2666, 37), 'archinfo.arch.Register', 'Register', ({(2666, 17, 2666, 25): '"""dcr1cf"""', (2666, 27, 2666, 28): '(4)', (2666, 30, 2666, 36): '(30524)'}, {}), "('dcr1cf', 4, 30524)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2667, 8, 2667, 37), 'archinfo.arch.Register', 'Register', ({(2667, 17, 2667, 25): '"""dcr1d0"""', (2667, 27, 2667, 28): '(4)', (2667, 30, 2667, 36): '(30528)'}, {}), "('dcr1d0', 4, 30528)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2668, 8, 2668, 37), 'archinfo.arch.Register', 'Register', ({(2668, 17, 2668, 25): '"""dcr1d1"""', (2668, 27, 2668, 28): '(4)', (2668, 30, 2668, 36): '(30532)'}, {}), "('dcr1d1', 4, 30532)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2669, 8, 2669, 37), 'archinfo.arch.Register', 'Register', ({(2669, 17, 2669, 25): '"""dcr1d2"""', (2669, 27, 2669, 28): '(4)', (2669, 30, 2669, 36): '(30536)'}, {}), "('dcr1d2', 4, 30536)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2670, 8, 2670, 37), 'archinfo.arch.Register', 'Register', ({(2670, 17, 2670, 25): '"""dcr1d3"""', (2670, 27, 2670, 28): '(4)', (2670, 30, 2670, 36): '(30540)'}, {}), "('dcr1d3', 4, 30540)", False, 'from archinfo.arch import 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"('dcr1d7', 4, 30556)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2675, 8, 2675, 37), 'archinfo.arch.Register', 'Register', ({(2675, 17, 2675, 25): '"""dcr1d8"""', (2675, 27, 2675, 28): '(4)', (2675, 30, 2675, 36): '(30560)'}, {}), "('dcr1d8', 4, 30560)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2676, 8, 2676, 37), 'archinfo.arch.Register', 'Register', ({(2676, 17, 2676, 25): '"""dcr1d9"""', (2676, 27, 2676, 28): '(4)', (2676, 30, 2676, 36): '(30564)'}, {}), "('dcr1d9', 4, 30564)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2677, 8, 2677, 37), 'archinfo.arch.Register', 'Register', ({(2677, 17, 2677, 25): '"""dcr1da"""', (2677, 27, 2677, 28): '(4)', (2677, 30, 2677, 36): '(30568)'}, {}), "('dcr1da', 4, 30568)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2678, 8, 2678, 37), 'archinfo.arch.Register', 'Register', ({(2678, 17, 2678, 25): '"""dcr1db"""', (2678, 27, 2678, 28): '(4)', (2678, 30, 2678, 36): '(30572)'}, {}), "('dcr1db', 4, 30572)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2679, 8, 2679, 37), 'archinfo.arch.Register', 'Register', ({(2679, 17, 2679, 25): '"""dcr1dc"""', (2679, 27, 2679, 28): '(4)', (2679, 30, 2679, 36): '(30576)'}, {}), "('dcr1dc', 4, 30576)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2680, 8, 2680, 37), 'archinfo.arch.Register', 'Register', ({(2680, 17, 2680, 25): '"""dcr1dd"""', (2680, 27, 2680, 28): '(4)', (2680, 30, 2680, 36): '(30580)'}, {}), "('dcr1dd', 4, 30580)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2681, 8, 2681, 37), 'archinfo.arch.Register', 'Register', ({(2681, 17, 2681, 25): '"""dcr1de"""', (2681, 27, 2681, 28): '(4)', (2681, 30, 2681, 36): '(30584)'}, {}), "('dcr1de', 4, 30584)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2682, 8, 2682, 37), 'archinfo.arch.Register', 'Register', ({(2682, 17, 2682, 25): '"""dcr1df"""', (2682, 27, 2682, 28): '(4)', (2682, 30, 2682, 36): '(30588)'}, {}), "('dcr1df', 4, 30588)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2683, 8, 2683, 37), 'archinfo.arch.Register', 'Register', ({(2683, 17, 2683, 25): '"""dcr1e0"""', (2683, 27, 2683, 28): '(4)', (2683, 30, 2683, 36): '(30592)'}, {}), "('dcr1e0', 4, 30592)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2684, 8, 2684, 37), 'archinfo.arch.Register', 'Register', ({(2684, 17, 2684, 25): '"""dcr1e1"""', (2684, 27, 2684, 28): '(4)', (2684, 30, 2684, 36): '(30596)'}, {}), "('dcr1e1', 4, 30596)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2685, 8, 2685, 37), 'archinfo.arch.Register', 'Register', ({(2685, 17, 2685, 25): '"""dcr1e2"""', (2685, 27, 2685, 28): '(4)', (2685, 30, 2685, 36): '(30600)'}, {}), "('dcr1e2', 4, 30600)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2686, 8, 2686, 37), 'archinfo.arch.Register', 'Register', ({(2686, 17, 2686, 25): '"""dcr1e3"""', (2686, 27, 2686, 28): '(4)', (2686, 30, 2686, 36): '(30604)'}, {}), "('dcr1e3', 4, 30604)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2687, 8, 2687, 37), 'archinfo.arch.Register', 'Register', ({(2687, 17, 2687, 25): '"""dcr1e4"""', (2687, 27, 2687, 28): '(4)', (2687, 30, 2687, 36): '(30608)'}, {}), "('dcr1e4', 4, 30608)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2688, 8, 2688, 37), 'archinfo.arch.Register', 'Register', ({(2688, 17, 2688, 25): '"""dcr1e5"""', (2688, 27, 2688, 28): '(4)', (2688, 30, 2688, 36): '(30612)'}, {}), "('dcr1e5', 4, 30612)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2689, 8, 2689, 37), 'archinfo.arch.Register', 'Register', ({(2689, 17, 2689, 25): '"""dcr1e6"""', (2689, 27, 2689, 28): '(4)', (2689, 30, 2689, 36): '(30616)'}, {}), "('dcr1e6', 4, 30616)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2690, 8, 2690, 37), 'archinfo.arch.Register', 'Register', ({(2690, 17, 2690, 25): '"""dcr1e7"""', (2690, 27, 2690, 28): '(4)', (2690, 30, 2690, 36): '(30620)'}, {}), "('dcr1e7', 4, 30620)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2691, 8, 2691, 37), 'archinfo.arch.Register', 'Register', ({(2691, 17, 2691, 25): '"""dcr1e8"""', (2691, 27, 2691, 28): '(4)', (2691, 30, 2691, 36): '(30624)'}, {}), "('dcr1e8', 4, 30624)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2692, 8, 2692, 37), 'archinfo.arch.Register', 'Register', ({(2692, 17, 2692, 25): '"""dcr1e9"""', (2692, 27, 2692, 28): '(4)', (2692, 30, 2692, 36): '(30628)'}, {}), "('dcr1e9', 4, 30628)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2693, 8, 2693, 37), 'archinfo.arch.Register', 'Register', ({(2693, 17, 2693, 25): '"""dcr1ea"""', (2693, 27, 2693, 28): '(4)', (2693, 30, 2693, 36): '(30632)'}, {}), "('dcr1ea', 4, 30632)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2694, 8, 2694, 37), 'archinfo.arch.Register', 'Register', ({(2694, 17, 2694, 25): '"""dcr1eb"""', (2694, 27, 2694, 28): '(4)', (2694, 30, 2694, 36): '(30636)'}, {}), "('dcr1eb', 4, 30636)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2695, 8, 2695, 37), 'archinfo.arch.Register', 'Register', ({(2695, 17, 2695, 25): '"""dcr1ec"""', (2695, 27, 2695, 28): '(4)', (2695, 30, 2695, 36): '(30640)'}, {}), "('dcr1ec', 4, 30640)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2696, 8, 2696, 37), 'archinfo.arch.Register', 'Register', ({(2696, 17, 2696, 25): '"""dcr1ed"""', (2696, 27, 2696, 28): '(4)', (2696, 30, 2696, 36): '(30644)'}, {}), "('dcr1ed', 4, 30644)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2697, 8, 2697, 37), 'archinfo.arch.Register', 'Register', ({(2697, 17, 2697, 25): '"""dcr1ee"""', (2697, 27, 2697, 28): '(4)', (2697, 30, 2697, 36): '(30648)'}, {}), "('dcr1ee', 4, 30648)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2698, 8, 2698, 37), 'archinfo.arch.Register', 'Register', ({(2698, 17, 2698, 25): '"""dcr1ef"""', (2698, 27, 2698, 28): '(4)', (2698, 30, 2698, 36): '(30652)'}, {}), "('dcr1ef', 4, 30652)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2699, 8, 2699, 37), 'archinfo.arch.Register', 'Register', ({(2699, 17, 2699, 25): '"""dcr1f0"""', (2699, 27, 2699, 28): '(4)', (2699, 30, 2699, 36): '(30656)'}, {}), "('dcr1f0', 4, 30656)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2700, 8, 2700, 37), 'archinfo.arch.Register', 'Register', ({(2700, 17, 2700, 25): '"""dcr1f1"""', (2700, 27, 2700, 28): '(4)', (2700, 30, 2700, 36): '(30660)'}, {}), "('dcr1f1', 4, 30660)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2701, 8, 2701, 37), 'archinfo.arch.Register', 'Register', ({(2701, 17, 2701, 25): '"""dcr1f2"""', (2701, 27, 2701, 28): '(4)', (2701, 30, 2701, 36): '(30664)'}, {}), "('dcr1f2', 4, 30664)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2702, 8, 2702, 37), 'archinfo.arch.Register', 'Register', ({(2702, 17, 2702, 25): '"""dcr1f3"""', (2702, 27, 2702, 28): '(4)', (2702, 30, 2702, 36): '(30668)'}, {}), "('dcr1f3', 4, 30668)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2703, 8, 2703, 37), 'archinfo.arch.Register', 'Register', ({(2703, 17, 2703, 25): '"""dcr1f4"""', (2703, 27, 2703, 28): '(4)', (2703, 30, 2703, 36): '(30672)'}, {}), "('dcr1f4', 4, 30672)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2704, 8, 2704, 37), 'archinfo.arch.Register', 'Register', ({(2704, 17, 2704, 25): '"""dcr1f5"""', (2704, 27, 2704, 28): '(4)', (2704, 30, 2704, 36): '(30676)'}, {}), "('dcr1f5', 4, 30676)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2705, 8, 2705, 37), 'archinfo.arch.Register', 'Register', ({(2705, 17, 2705, 25): '"""dcr1f6"""', (2705, 27, 2705, 28): '(4)', (2705, 30, 2705, 36): '(30680)'}, {}), "('dcr1f6', 4, 30680)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2706, 8, 2706, 37), 'archinfo.arch.Register', 'Register', ({(2706, 17, 2706, 25): '"""dcr1f7"""', (2706, 27, 2706, 28): '(4)', (2706, 30, 2706, 36): '(30684)'}, {}), "('dcr1f7', 4, 30684)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2707, 8, 2707, 37), 'archinfo.arch.Register', 'Register', ({(2707, 17, 2707, 25): '"""dcr1f8"""', (2707, 27, 2707, 28): '(4)', (2707, 30, 2707, 36): '(30688)'}, {}), "('dcr1f8', 4, 30688)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2708, 8, 2708, 37), 'archinfo.arch.Register', 'Register', ({(2708, 17, 2708, 25): '"""dcr1f9"""', (2708, 27, 2708, 28): '(4)', (2708, 30, 2708, 36): '(30692)'}, {}), "('dcr1f9', 4, 30692)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2709, 8, 2709, 37), 'archinfo.arch.Register', 'Register', ({(2709, 17, 2709, 25): '"""dcr1fa"""', (2709, 27, 2709, 28): '(4)', (2709, 30, 2709, 36): '(30696)'}, {}), "('dcr1fa', 4, 30696)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2710, 8, 2710, 37), 'archinfo.arch.Register', 'Register', ({(2710, 17, 2710, 25): '"""dcr1fb"""', (2710, 27, 2710, 28): '(4)', (2710, 30, 2710, 36): '(30700)'}, {}), "('dcr1fb', 4, 30700)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2711, 8, 2711, 37), 'archinfo.arch.Register', 'Register', ({(2711, 17, 2711, 25): '"""dcr1fc"""', (2711, 27, 2711, 28): '(4)', (2711, 30, 2711, 36): '(30704)'}, {}), "('dcr1fc', 4, 30704)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2712, 8, 2712, 37), 'archinfo.arch.Register', 'Register', ({(2712, 17, 2712, 25): '"""dcr1fd"""', (2712, 27, 2712, 28): '(4)', (2712, 30, 2712, 36): '(30708)'}, {}), "('dcr1fd', 4, 30708)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2713, 8, 2713, 37), 'archinfo.arch.Register', 'Register', ({(2713, 17, 2713, 25): '"""dcr1fe"""', (2713, 27, 2713, 28): '(4)', (2713, 30, 2713, 36): '(30712)'}, {}), "('dcr1fe', 4, 30712)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2714, 8, 2714, 37), 'archinfo.arch.Register', 'Register', ({(2714, 17, 2714, 25): '"""dcr1ff"""', (2714, 27, 2714, 28): '(4)', (2714, 30, 2714, 36): '(30716)'}, {}), "('dcr1ff', 4, 30716)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2715, 8, 2715, 37), 'archinfo.arch.Register', 'Register', ({(2715, 17, 2715, 25): '"""dcr200"""', (2715, 27, 2715, 28): '(4)', (2715, 30, 2715, 36): '(30720)'}, {}), "('dcr200', 4, 30720)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2716, 8, 2716, 37), 'archinfo.arch.Register', 'Register', ({(2716, 17, 2716, 25): '"""dcr201"""', (2716, 27, 2716, 28): '(4)', (2716, 30, 2716, 36): '(30724)'}, {}), "('dcr201', 4, 30724)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2717, 8, 2717, 37), 'archinfo.arch.Register', 'Register', ({(2717, 17, 2717, 25): '"""dcr202"""', (2717, 27, 2717, 28): '(4)', (2717, 30, 2717, 36): '(30728)'}, {}), "('dcr202', 4, 30728)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2718, 8, 2718, 37), 'archinfo.arch.Register', 'Register', ({(2718, 17, 2718, 25): '"""dcr203"""', (2718, 27, 2718, 28): '(4)', (2718, 30, 2718, 36): '(30732)'}, {}), "('dcr203', 4, 30732)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2719, 8, 2719, 37), 'archinfo.arch.Register', 'Register', ({(2719, 17, 2719, 25): '"""dcr204"""', (2719, 27, 2719, 28): '(4)', (2719, 30, 2719, 36): '(30736)'}, {}), "('dcr204', 4, 30736)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2720, 8, 2720, 37), 'archinfo.arch.Register', 'Register', ({(2720, 17, 2720, 25): '"""dcr205"""', (2720, 27, 2720, 28): '(4)', (2720, 30, 2720, 36): '(30740)'}, {}), "('dcr205', 4, 30740)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2721, 8, 2721, 37), 'archinfo.arch.Register', 'Register', ({(2721, 17, 2721, 25): '"""dcr206"""', (2721, 27, 2721, 28): '(4)', (2721, 30, 2721, 36): '(30744)'}, {}), "('dcr206', 4, 30744)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2722, 8, 2722, 37), 'archinfo.arch.Register', 'Register', ({(2722, 17, 2722, 25): '"""dcr207"""', (2722, 27, 2722, 28): '(4)', (2722, 30, 2722, 36): '(30748)'}, {}), "('dcr207', 4, 30748)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2723, 8, 2723, 37), 'archinfo.arch.Register', 'Register', ({(2723, 17, 2723, 25): '"""dcr208"""', (2723, 27, 2723, 28): '(4)', (2723, 30, 2723, 36): '(30752)'}, {}), "('dcr208', 4, 30752)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2724, 8, 2724, 37), 'archinfo.arch.Register', 'Register', ({(2724, 17, 2724, 25): '"""dcr209"""', (2724, 27, 2724, 28): '(4)', (2724, 30, 2724, 36): '(30756)'}, {}), "('dcr209', 4, 30756)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2725, 8, 2725, 37), 'archinfo.arch.Register', 'Register', ({(2725, 17, 2725, 25): '"""dcr20a"""', (2725, 27, 2725, 28): '(4)', (2725, 30, 2725, 36): '(30760)'}, {}), "('dcr20a', 4, 30760)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2726, 8, 2726, 37), 'archinfo.arch.Register', 'Register', ({(2726, 17, 2726, 25): '"""dcr20b"""', (2726, 27, 2726, 28): '(4)', (2726, 30, 2726, 36): '(30764)'}, {}), "('dcr20b', 4, 30764)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2727, 8, 2727, 37), 'archinfo.arch.Register', 'Register', ({(2727, 17, 2727, 25): '"""dcr20c"""', (2727, 27, 2727, 28): '(4)', (2727, 30, 2727, 36): '(30768)'}, {}), "('dcr20c', 4, 30768)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2728, 8, 2728, 37), 'archinfo.arch.Register', 'Register', ({(2728, 17, 2728, 25): '"""dcr20d"""', (2728, 27, 2728, 28): '(4)', (2728, 30, 2728, 36): '(30772)'}, {}), "('dcr20d', 4, 30772)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2729, 8, 2729, 37), 'archinfo.arch.Register', 'Register', ({(2729, 17, 2729, 25): '"""dcr20e"""', (2729, 27, 2729, 28): '(4)', (2729, 30, 2729, 36): '(30776)'}, {}), "('dcr20e', 4, 30776)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2730, 8, 2730, 37), 'archinfo.arch.Register', 'Register', ({(2730, 17, 2730, 25): '"""dcr20f"""', (2730, 27, 2730, 28): '(4)', (2730, 30, 2730, 36): '(30780)'}, {}), "('dcr20f', 4, 30780)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2731, 8, 2731, 37), 'archinfo.arch.Register', 'Register', ({(2731, 17, 2731, 25): '"""dcr210"""', (2731, 27, 2731, 28): '(4)', (2731, 30, 2731, 36): '(30784)'}, {}), "('dcr210', 4, 30784)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2732, 8, 2732, 37), 'archinfo.arch.Register', 'Register', ({(2732, 17, 2732, 25): '"""dcr211"""', (2732, 27, 2732, 28): '(4)', (2732, 30, 2732, 36): '(30788)'}, {}), "('dcr211', 4, 30788)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2733, 8, 2733, 37), 'archinfo.arch.Register', 'Register', ({(2733, 17, 2733, 25): '"""dcr212"""', (2733, 27, 2733, 28): '(4)', (2733, 30, 2733, 36): '(30792)'}, {}), "('dcr212', 4, 30792)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2734, 8, 2734, 37), 'archinfo.arch.Register', 'Register', ({(2734, 17, 2734, 25): '"""dcr213"""', (2734, 27, 2734, 28): '(4)', (2734, 30, 2734, 36): '(30796)'}, {}), "('dcr213', 4, 30796)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2735, 8, 2735, 37), 'archinfo.arch.Register', 'Register', ({(2735, 17, 2735, 25): '"""dcr214"""', (2735, 27, 2735, 28): '(4)', (2735, 30, 2735, 36): '(30800)'}, {}), "('dcr214', 4, 30800)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2736, 8, 2736, 37), 'archinfo.arch.Register', 'Register', ({(2736, 17, 2736, 25): '"""dcr215"""', (2736, 27, 2736, 28): '(4)', (2736, 30, 2736, 36): '(30804)'}, {}), "('dcr215', 4, 30804)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2737, 8, 2737, 37), 'archinfo.arch.Register', 'Register', ({(2737, 17, 2737, 25): '"""dcr216"""', (2737, 27, 2737, 28): '(4)', (2737, 30, 2737, 36): '(30808)'}, {}), "('dcr216', 4, 30808)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2738, 8, 2738, 37), 'archinfo.arch.Register', 'Register', ({(2738, 17, 2738, 25): '"""dcr217"""', (2738, 27, 2738, 28): '(4)', (2738, 30, 2738, 36): '(30812)'}, {}), "('dcr217', 4, 30812)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2739, 8, 2739, 37), 'archinfo.arch.Register', 'Register', ({(2739, 17, 2739, 25): '"""dcr218"""', (2739, 27, 2739, 28): '(4)', (2739, 30, 2739, 36): '(30816)'}, {}), "('dcr218', 4, 30816)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2740, 8, 2740, 37), 'archinfo.arch.Register', 'Register', ({(2740, 17, 2740, 25): '"""dcr219"""', (2740, 27, 2740, 28): '(4)', (2740, 30, 2740, 36): '(30820)'}, {}), "('dcr219', 4, 30820)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2741, 8, 2741, 37), 'archinfo.arch.Register', 'Register', ({(2741, 17, 2741, 25): '"""dcr21a"""', (2741, 27, 2741, 28): '(4)', (2741, 30, 2741, 36): '(30824)'}, {}), "('dcr21a', 4, 30824)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2742, 8, 2742, 37), 'archinfo.arch.Register', 'Register', ({(2742, 17, 2742, 25): '"""dcr21b"""', (2742, 27, 2742, 28): '(4)', (2742, 30, 2742, 36): '(30828)'}, {}), "('dcr21b', 4, 30828)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2743, 8, 2743, 37), 'archinfo.arch.Register', 'Register', ({(2743, 17, 2743, 25): '"""dcr21c"""', (2743, 27, 2743, 28): '(4)', (2743, 30, 2743, 36): '(30832)'}, {}), "('dcr21c', 4, 30832)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2744, 8, 2744, 37), 'archinfo.arch.Register', 'Register', ({(2744, 17, 2744, 25): '"""dcr21d"""', (2744, 27, 2744, 28): '(4)', (2744, 30, 2744, 36): '(30836)'}, {}), "('dcr21d', 4, 30836)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2745, 8, 2745, 37), 'archinfo.arch.Register', 'Register', ({(2745, 17, 2745, 25): '"""dcr21e"""', (2745, 27, 2745, 28): '(4)', (2745, 30, 2745, 36): '(30840)'}, {}), "('dcr21e', 4, 30840)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2746, 8, 2746, 37), 'archinfo.arch.Register', 'Register', ({(2746, 17, 2746, 25): '"""dcr21f"""', (2746, 27, 2746, 28): '(4)', (2746, 30, 2746, 36): '(30844)'}, {}), "('dcr21f', 4, 30844)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2747, 8, 2747, 37), 'archinfo.arch.Register', 'Register', ({(2747, 17, 2747, 25): '"""dcr220"""', (2747, 27, 2747, 28): '(4)', (2747, 30, 2747, 36): '(30848)'}, {}), "('dcr220', 4, 30848)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2748, 8, 2748, 37), 'archinfo.arch.Register', 'Register', ({(2748, 17, 2748, 25): '"""dcr221"""', (2748, 27, 2748, 28): '(4)', (2748, 30, 2748, 36): '(30852)'}, {}), "('dcr221', 4, 30852)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2749, 8, 2749, 37), 'archinfo.arch.Register', 'Register', ({(2749, 17, 2749, 25): '"""dcr222"""', (2749, 27, 2749, 28): '(4)', (2749, 30, 2749, 36): '(30856)'}, {}), "('dcr222', 4, 30856)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2750, 8, 2750, 37), 'archinfo.arch.Register', 'Register', ({(2750, 17, 2750, 25): '"""dcr223"""', (2750, 27, 2750, 28): '(4)', (2750, 30, 2750, 36): '(30860)'}, {}), "('dcr223', 4, 30860)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2751, 8, 2751, 37), 'archinfo.arch.Register', 'Register', ({(2751, 17, 2751, 25): '"""dcr224"""', (2751, 27, 2751, 28): '(4)', (2751, 30, 2751, 36): '(30864)'}, {}), "('dcr224', 4, 30864)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2752, 8, 2752, 37), 'archinfo.arch.Register', 'Register', ({(2752, 17, 2752, 25): '"""dcr225"""', (2752, 27, 2752, 28): '(4)', (2752, 30, 2752, 36): '(30868)'}, {}), "('dcr225', 4, 30868)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2753, 8, 2753, 37), 'archinfo.arch.Register', 'Register', ({(2753, 17, 2753, 25): '"""dcr226"""', (2753, 27, 2753, 28): '(4)', (2753, 30, 2753, 36): '(30872)'}, {}), "('dcr226', 4, 30872)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2754, 8, 2754, 37), 'archinfo.arch.Register', 'Register', ({(2754, 17, 2754, 25): '"""dcr227"""', (2754, 27, 2754, 28): '(4)', (2754, 30, 2754, 36): '(30876)'}, {}), "('dcr227', 4, 30876)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2755, 8, 2755, 37), 'archinfo.arch.Register', 'Register', ({(2755, 17, 2755, 25): '"""dcr228"""', (2755, 27, 2755, 28): '(4)', (2755, 30, 2755, 36): '(30880)'}, {}), "('dcr228', 4, 30880)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2756, 8, 2756, 37), 'archinfo.arch.Register', 'Register', ({(2756, 17, 2756, 25): '"""dcr229"""', (2756, 27, 2756, 28): '(4)', (2756, 30, 2756, 36): '(30884)'}, {}), "('dcr229', 4, 30884)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2757, 8, 2757, 37), 'archinfo.arch.Register', 'Register', ({(2757, 17, 2757, 25): '"""dcr22a"""', (2757, 27, 2757, 28): '(4)', (2757, 30, 2757, 36): '(30888)'}, {}), "('dcr22a', 4, 30888)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2758, 8, 2758, 37), 'archinfo.arch.Register', 'Register', ({(2758, 17, 2758, 25): '"""dcr22b"""', (2758, 27, 2758, 28): '(4)', (2758, 30, 2758, 36): '(30892)'}, {}), "('dcr22b', 4, 30892)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2759, 8, 2759, 37), 'archinfo.arch.Register', 'Register', ({(2759, 17, 2759, 25): '"""dcr22c"""', (2759, 27, 2759, 28): '(4)', (2759, 30, 2759, 36): '(30896)'}, {}), "('dcr22c', 4, 30896)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2760, 8, 2760, 37), 'archinfo.arch.Register', 'Register', ({(2760, 17, 2760, 25): '"""dcr22d"""', (2760, 27, 2760, 28): '(4)', (2760, 30, 2760, 36): '(30900)'}, {}), "('dcr22d', 4, 30900)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2761, 8, 2761, 37), 'archinfo.arch.Register', 'Register', ({(2761, 17, 2761, 25): '"""dcr22e"""', (2761, 27, 2761, 28): '(4)', (2761, 30, 2761, 36): '(30904)'}, {}), "('dcr22e', 4, 30904)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2762, 8, 2762, 37), 'archinfo.arch.Register', 'Register', ({(2762, 17, 2762, 25): '"""dcr22f"""', (2762, 27, 2762, 28): '(4)', (2762, 30, 2762, 36): '(30908)'}, {}), "('dcr22f', 4, 30908)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2763, 8, 2763, 37), 'archinfo.arch.Register', 'Register', ({(2763, 17, 2763, 25): '"""dcr230"""', (2763, 27, 2763, 28): '(4)', (2763, 30, 2763, 36): '(30912)'}, {}), "('dcr230', 4, 30912)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2764, 8, 2764, 37), 'archinfo.arch.Register', 'Register', ({(2764, 17, 2764, 25): '"""dcr231"""', (2764, 27, 2764, 28): '(4)', (2764, 30, 2764, 36): '(30916)'}, {}), "('dcr231', 4, 30916)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2765, 8, 2765, 37), 'archinfo.arch.Register', 'Register', ({(2765, 17, 2765, 25): '"""dcr232"""', (2765, 27, 2765, 28): '(4)', (2765, 30, 2765, 36): '(30920)'}, {}), "('dcr232', 4, 30920)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2766, 8, 2766, 37), 'archinfo.arch.Register', 'Register', ({(2766, 17, 2766, 25): '"""dcr233"""', (2766, 27, 2766, 28): '(4)', (2766, 30, 2766, 36): '(30924)'}, {}), "('dcr233', 4, 30924)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2767, 8, 2767, 37), 'archinfo.arch.Register', 'Register', ({(2767, 17, 2767, 25): '"""dcr234"""', (2767, 27, 2767, 28): '(4)', (2767, 30, 2767, 36): '(30928)'}, {}), "('dcr234', 4, 30928)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2768, 8, 2768, 37), 'archinfo.arch.Register', 'Register', ({(2768, 17, 2768, 25): '"""dcr235"""', (2768, 27, 2768, 28): '(4)', (2768, 30, 2768, 36): '(30932)'}, {}), "('dcr235', 4, 30932)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2769, 8, 2769, 37), 'archinfo.arch.Register', 'Register', ({(2769, 17, 2769, 25): '"""dcr236"""', (2769, 27, 2769, 28): '(4)', (2769, 30, 2769, 36): '(30936)'}, {}), "('dcr236', 4, 30936)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2770, 8, 2770, 37), 'archinfo.arch.Register', 'Register', ({(2770, 17, 2770, 25): '"""dcr237"""', (2770, 27, 2770, 28): '(4)', (2770, 30, 2770, 36): '(30940)'}, {}), "('dcr237', 4, 30940)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2771, 8, 2771, 37), 'archinfo.arch.Register', 'Register', ({(2771, 17, 2771, 25): '"""dcr238"""', (2771, 27, 2771, 28): '(4)', (2771, 30, 2771, 36): '(30944)'}, {}), "('dcr238', 4, 30944)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2772, 8, 2772, 37), 'archinfo.arch.Register', 'Register', ({(2772, 17, 2772, 25): '"""dcr239"""', (2772, 27, 2772, 28): '(4)', (2772, 30, 2772, 36): '(30948)'}, {}), "('dcr239', 4, 30948)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2773, 8, 2773, 37), 'archinfo.arch.Register', 'Register', ({(2773, 17, 2773, 25): '"""dcr23a"""', (2773, 27, 2773, 28): '(4)', (2773, 30, 2773, 36): '(30952)'}, {}), "('dcr23a', 4, 30952)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2774, 8, 2774, 37), 'archinfo.arch.Register', 'Register', ({(2774, 17, 2774, 25): '"""dcr23b"""', (2774, 27, 2774, 28): '(4)', (2774, 30, 2774, 36): '(30956)'}, {}), "('dcr23b', 4, 30956)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2775, 8, 2775, 37), 'archinfo.arch.Register', 'Register', ({(2775, 17, 2775, 25): '"""dcr23c"""', (2775, 27, 2775, 28): '(4)', (2775, 30, 2775, 36): '(30960)'}, {}), "('dcr23c', 4, 30960)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2776, 8, 2776, 37), 'archinfo.arch.Register', 'Register', ({(2776, 17, 2776, 25): '"""dcr23d"""', (2776, 27, 2776, 28): '(4)', (2776, 30, 2776, 36): '(30964)'}, {}), "('dcr23d', 4, 30964)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2777, 8, 2777, 37), 'archinfo.arch.Register', 'Register', ({(2777, 17, 2777, 25): '"""dcr23e"""', (2777, 27, 2777, 28): '(4)', (2777, 30, 2777, 36): '(30968)'}, {}), "('dcr23e', 4, 30968)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2778, 8, 2778, 37), 'archinfo.arch.Register', 'Register', ({(2778, 17, 2778, 25): '"""dcr23f"""', (2778, 27, 2778, 28): '(4)', (2778, 30, 2778, 36): '(30972)'}, {}), "('dcr23f', 4, 30972)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2779, 8, 2779, 37), 'archinfo.arch.Register', 'Register', ({(2779, 17, 2779, 25): '"""dcr240"""', (2779, 27, 2779, 28): '(4)', (2779, 30, 2779, 36): '(30976)'}, {}), "('dcr240', 4, 30976)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2780, 8, 2780, 37), 'archinfo.arch.Register', 'Register', ({(2780, 17, 2780, 25): '"""dcr241"""', (2780, 27, 2780, 28): '(4)', (2780, 30, 2780, 36): '(30980)'}, {}), "('dcr241', 4, 30980)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2781, 8, 2781, 37), 'archinfo.arch.Register', 'Register', ({(2781, 17, 2781, 25): '"""dcr242"""', (2781, 27, 2781, 28): '(4)', (2781, 30, 2781, 36): '(30984)'}, {}), "('dcr242', 4, 30984)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2782, 8, 2782, 37), 'archinfo.arch.Register', 'Register', ({(2782, 17, 2782, 25): '"""dcr243"""', (2782, 27, 2782, 28): '(4)', (2782, 30, 2782, 36): '(30988)'}, {}), "('dcr243', 4, 30988)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2783, 8, 2783, 37), 'archinfo.arch.Register', 'Register', ({(2783, 17, 2783, 25): '"""dcr244"""', (2783, 27, 2783, 28): '(4)', (2783, 30, 2783, 36): '(30992)'}, {}), "('dcr244', 4, 30992)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2784, 8, 2784, 37), 'archinfo.arch.Register', 'Register', ({(2784, 17, 2784, 25): '"""dcr245"""', (2784, 27, 2784, 28): '(4)', (2784, 30, 2784, 36): '(30996)'}, {}), "('dcr245', 4, 30996)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2785, 8, 2785, 37), 'archinfo.arch.Register', 'Register', ({(2785, 17, 2785, 25): '"""dcr246"""', (2785, 27, 2785, 28): '(4)', (2785, 30, 2785, 36): '(31000)'}, {}), "('dcr246', 4, 31000)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2786, 8, 2786, 37), 'archinfo.arch.Register', 'Register', ({(2786, 17, 2786, 25): '"""dcr247"""', (2786, 27, 2786, 28): '(4)', (2786, 30, 2786, 36): '(31004)'}, {}), "('dcr247', 4, 31004)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2787, 8, 2787, 37), 'archinfo.arch.Register', 'Register', ({(2787, 17, 2787, 25): '"""dcr248"""', (2787, 27, 2787, 28): '(4)', (2787, 30, 2787, 36): '(31008)'}, {}), "('dcr248', 4, 31008)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2788, 8, 2788, 37), 'archinfo.arch.Register', 'Register', ({(2788, 17, 2788, 25): '"""dcr249"""', (2788, 27, 2788, 28): '(4)', (2788, 30, 2788, 36): '(31012)'}, {}), "('dcr249', 4, 31012)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2789, 8, 2789, 37), 'archinfo.arch.Register', 'Register', ({(2789, 17, 2789, 25): '"""dcr24a"""', (2789, 27, 2789, 28): '(4)', (2789, 30, 2789, 36): '(31016)'}, {}), "('dcr24a', 4, 31016)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2790, 8, 2790, 37), 'archinfo.arch.Register', 'Register', ({(2790, 17, 2790, 25): '"""dcr24b"""', (2790, 27, 2790, 28): '(4)', (2790, 30, 2790, 36): '(31020)'}, {}), "('dcr24b', 4, 31020)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2791, 8, 2791, 37), 'archinfo.arch.Register', 'Register', ({(2791, 17, 2791, 25): '"""dcr24c"""', (2791, 27, 2791, 28): '(4)', (2791, 30, 2791, 36): '(31024)'}, {}), "('dcr24c', 4, 31024)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2792, 8, 2792, 37), 'archinfo.arch.Register', 'Register', ({(2792, 17, 2792, 25): '"""dcr24d"""', (2792, 27, 2792, 28): '(4)', (2792, 30, 2792, 36): '(31028)'}, {}), "('dcr24d', 4, 31028)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2793, 8, 2793, 37), 'archinfo.arch.Register', 'Register', ({(2793, 17, 2793, 25): '"""dcr24e"""', (2793, 27, 2793, 28): '(4)', (2793, 30, 2793, 36): '(31032)'}, {}), "('dcr24e', 4, 31032)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2794, 8, 2794, 37), 'archinfo.arch.Register', 'Register', ({(2794, 17, 2794, 25): '"""dcr24f"""', (2794, 27, 2794, 28): '(4)', (2794, 30, 2794, 36): '(31036)'}, {}), "('dcr24f', 4, 31036)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2795, 8, 2795, 37), 'archinfo.arch.Register', 'Register', ({(2795, 17, 2795, 25): '"""dcr250"""', (2795, 27, 2795, 28): '(4)', (2795, 30, 2795, 36): '(31040)'}, {}), "('dcr250', 4, 31040)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2796, 8, 2796, 37), 'archinfo.arch.Register', 'Register', ({(2796, 17, 2796, 25): '"""dcr251"""', (2796, 27, 2796, 28): '(4)', (2796, 30, 2796, 36): '(31044)'}, {}), "('dcr251', 4, 31044)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2797, 8, 2797, 37), 'archinfo.arch.Register', 'Register', ({(2797, 17, 2797, 25): '"""dcr252"""', (2797, 27, 2797, 28): '(4)', (2797, 30, 2797, 36): '(31048)'}, {}), "('dcr252', 4, 31048)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2798, 8, 2798, 37), 'archinfo.arch.Register', 'Register', ({(2798, 17, 2798, 25): '"""dcr253"""', (2798, 27, 2798, 28): '(4)', (2798, 30, 2798, 36): '(31052)'}, {}), "('dcr253', 4, 31052)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2799, 8, 2799, 37), 'archinfo.arch.Register', 'Register', ({(2799, 17, 2799, 25): '"""dcr254"""', (2799, 27, 2799, 28): '(4)', (2799, 30, 2799, 36): '(31056)'}, {}), "('dcr254', 4, 31056)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2800, 8, 2800, 37), 'archinfo.arch.Register', 'Register', ({(2800, 17, 2800, 25): '"""dcr255"""', (2800, 27, 2800, 28): '(4)', (2800, 30, 2800, 36): '(31060)'}, {}), "('dcr255', 4, 31060)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2801, 8, 2801, 37), 'archinfo.arch.Register', 'Register', ({(2801, 17, 2801, 25): '"""dcr256"""', (2801, 27, 2801, 28): '(4)', (2801, 30, 2801, 36): '(31064)'}, {}), "('dcr256', 4, 31064)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2802, 8, 2802, 37), 'archinfo.arch.Register', 'Register', ({(2802, 17, 2802, 25): '"""dcr257"""', (2802, 27, 2802, 28): '(4)', (2802, 30, 2802, 36): '(31068)'}, {}), "('dcr257', 4, 31068)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2803, 8, 2803, 37), 'archinfo.arch.Register', 'Register', ({(2803, 17, 2803, 25): '"""dcr258"""', (2803, 27, 2803, 28): '(4)', (2803, 30, 2803, 36): '(31072)'}, {}), "('dcr258', 4, 31072)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2804, 8, 2804, 37), 'archinfo.arch.Register', 'Register', ({(2804, 17, 2804, 25): '"""dcr259"""', (2804, 27, 2804, 28): '(4)', (2804, 30, 2804, 36): '(31076)'}, {}), "('dcr259', 4, 31076)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2805, 8, 2805, 37), 'archinfo.arch.Register', 'Register', ({(2805, 17, 2805, 25): '"""dcr25a"""', (2805, 27, 2805, 28): '(4)', (2805, 30, 2805, 36): '(31080)'}, {}), "('dcr25a', 4, 31080)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2806, 8, 2806, 37), 'archinfo.arch.Register', 'Register', ({(2806, 17, 2806, 25): '"""dcr25b"""', (2806, 27, 2806, 28): '(4)', (2806, 30, 2806, 36): '(31084)'}, {}), "('dcr25b', 4, 31084)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2807, 8, 2807, 37), 'archinfo.arch.Register', 'Register', ({(2807, 17, 2807, 25): '"""dcr25c"""', (2807, 27, 2807, 28): '(4)', (2807, 30, 2807, 36): '(31088)'}, {}), "('dcr25c', 4, 31088)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2808, 8, 2808, 37), 'archinfo.arch.Register', 'Register', ({(2808, 17, 2808, 25): '"""dcr25d"""', (2808, 27, 2808, 28): '(4)', (2808, 30, 2808, 36): '(31092)'}, {}), "('dcr25d', 4, 31092)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2809, 8, 2809, 37), 'archinfo.arch.Register', 'Register', ({(2809, 17, 2809, 25): '"""dcr25e"""', (2809, 27, 2809, 28): '(4)', (2809, 30, 2809, 36): '(31096)'}, {}), "('dcr25e', 4, 31096)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2810, 8, 2810, 37), 'archinfo.arch.Register', 'Register', ({(2810, 17, 2810, 25): '"""dcr25f"""', (2810, 27, 2810, 28): '(4)', (2810, 30, 2810, 36): '(31100)'}, {}), "('dcr25f', 4, 31100)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2811, 8, 2811, 37), 'archinfo.arch.Register', 'Register', ({(2811, 17, 2811, 25): '"""dcr260"""', (2811, 27, 2811, 28): '(4)', (2811, 30, 2811, 36): '(31104)'}, {}), "('dcr260', 4, 31104)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2812, 8, 2812, 37), 'archinfo.arch.Register', 'Register', ({(2812, 17, 2812, 25): '"""dcr261"""', (2812, 27, 2812, 28): '(4)', (2812, 30, 2812, 36): '(31108)'}, {}), "('dcr261', 4, 31108)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2813, 8, 2813, 37), 'archinfo.arch.Register', 'Register', ({(2813, 17, 2813, 25): '"""dcr262"""', (2813, 27, 2813, 28): '(4)', (2813, 30, 2813, 36): '(31112)'}, {}), "('dcr262', 4, 31112)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2814, 8, 2814, 37), 'archinfo.arch.Register', 'Register', ({(2814, 17, 2814, 25): '"""dcr263"""', (2814, 27, 2814, 28): '(4)', (2814, 30, 2814, 36): '(31116)'}, {}), "('dcr263', 4, 31116)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2815, 8, 2815, 37), 'archinfo.arch.Register', 'Register', ({(2815, 17, 2815, 25): '"""dcr264"""', (2815, 27, 2815, 28): '(4)', (2815, 30, 2815, 36): '(31120)'}, {}), "('dcr264', 4, 31120)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2816, 8, 2816, 37), 'archinfo.arch.Register', 'Register', ({(2816, 17, 2816, 25): '"""dcr265"""', (2816, 27, 2816, 28): '(4)', (2816, 30, 2816, 36): '(31124)'}, {}), "('dcr265', 4, 31124)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2817, 8, 2817, 37), 'archinfo.arch.Register', 'Register', ({(2817, 17, 2817, 25): '"""dcr266"""', (2817, 27, 2817, 28): '(4)', (2817, 30, 2817, 36): '(31128)'}, {}), "('dcr266', 4, 31128)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2818, 8, 2818, 37), 'archinfo.arch.Register', 'Register', ({(2818, 17, 2818, 25): '"""dcr267"""', (2818, 27, 2818, 28): '(4)', (2818, 30, 2818, 36): '(31132)'}, {}), "('dcr267', 4, 31132)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2819, 8, 2819, 37), 'archinfo.arch.Register', 'Register', ({(2819, 17, 2819, 25): '"""dcr268"""', (2819, 27, 2819, 28): '(4)', (2819, 30, 2819, 36): '(31136)'}, {}), "('dcr268', 4, 31136)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2820, 8, 2820, 37), 'archinfo.arch.Register', 'Register', ({(2820, 17, 2820, 25): '"""dcr269"""', (2820, 27, 2820, 28): '(4)', (2820, 30, 2820, 36): '(31140)'}, {}), "('dcr269', 4, 31140)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2821, 8, 2821, 37), 'archinfo.arch.Register', 'Register', ({(2821, 17, 2821, 25): '"""dcr26a"""', (2821, 27, 2821, 28): '(4)', (2821, 30, 2821, 36): '(31144)'}, {}), "('dcr26a', 4, 31144)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2822, 8, 2822, 37), 'archinfo.arch.Register', 'Register', ({(2822, 17, 2822, 25): '"""dcr26b"""', (2822, 27, 2822, 28): '(4)', (2822, 30, 2822, 36): '(31148)'}, {}), "('dcr26b', 4, 31148)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2823, 8, 2823, 37), 'archinfo.arch.Register', 'Register', ({(2823, 17, 2823, 25): '"""dcr26c"""', (2823, 27, 2823, 28): '(4)', (2823, 30, 2823, 36): '(31152)'}, {}), "('dcr26c', 4, 31152)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2824, 8, 2824, 37), 'archinfo.arch.Register', 'Register', ({(2824, 17, 2824, 25): '"""dcr26d"""', (2824, 27, 2824, 28): '(4)', (2824, 30, 2824, 36): '(31156)'}, {}), "('dcr26d', 4, 31156)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2825, 8, 2825, 37), 'archinfo.arch.Register', 'Register', ({(2825, 17, 2825, 25): '"""dcr26e"""', (2825, 27, 2825, 28): '(4)', (2825, 30, 2825, 36): '(31160)'}, {}), "('dcr26e', 4, 31160)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2826, 8, 2826, 37), 'archinfo.arch.Register', 'Register', ({(2826, 17, 2826, 25): '"""dcr26f"""', (2826, 27, 2826, 28): '(4)', (2826, 30, 2826, 36): '(31164)'}, {}), "('dcr26f', 4, 31164)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2827, 8, 2827, 37), 'archinfo.arch.Register', 'Register', ({(2827, 17, 2827, 25): '"""dcr270"""', (2827, 27, 2827, 28): '(4)', (2827, 30, 2827, 36): '(31168)'}, {}), "('dcr270', 4, 31168)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2828, 8, 2828, 37), 'archinfo.arch.Register', 'Register', ({(2828, 17, 2828, 25): '"""dcr271"""', (2828, 27, 2828, 28): '(4)', (2828, 30, 2828, 36): '(31172)'}, {}), "('dcr271', 4, 31172)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2829, 8, 2829, 37), 'archinfo.arch.Register', 'Register', ({(2829, 17, 2829, 25): '"""dcr272"""', (2829, 27, 2829, 28): '(4)', (2829, 30, 2829, 36): '(31176)'}, {}), "('dcr272', 4, 31176)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2830, 8, 2830, 37), 'archinfo.arch.Register', 'Register', ({(2830, 17, 2830, 25): '"""dcr273"""', (2830, 27, 2830, 28): '(4)', (2830, 30, 2830, 36): '(31180)'}, {}), "('dcr273', 4, 31180)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2831, 8, 2831, 37), 'archinfo.arch.Register', 'Register', ({(2831, 17, 2831, 25): '"""dcr274"""', (2831, 27, 2831, 28): '(4)', (2831, 30, 2831, 36): '(31184)'}, {}), "('dcr274', 4, 31184)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2832, 8, 2832, 37), 'archinfo.arch.Register', 'Register', ({(2832, 17, 2832, 25): '"""dcr275"""', (2832, 27, 2832, 28): '(4)', (2832, 30, 2832, 36): '(31188)'}, {}), "('dcr275', 4, 31188)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2833, 8, 2833, 37), 'archinfo.arch.Register', 'Register', ({(2833, 17, 2833, 25): '"""dcr276"""', (2833, 27, 2833, 28): '(4)', (2833, 30, 2833, 36): '(31192)'}, {}), "('dcr276', 4, 31192)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2834, 8, 2834, 37), 'archinfo.arch.Register', 'Register', ({(2834, 17, 2834, 25): '"""dcr277"""', (2834, 27, 2834, 28): '(4)', (2834, 30, 2834, 36): '(31196)'}, {}), "('dcr277', 4, 31196)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2835, 8, 2835, 37), 'archinfo.arch.Register', 'Register', ({(2835, 17, 2835, 25): '"""dcr278"""', (2835, 27, 2835, 28): '(4)', (2835, 30, 2835, 36): '(31200)'}, {}), "('dcr278', 4, 31200)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2836, 8, 2836, 37), 'archinfo.arch.Register', 'Register', ({(2836, 17, 2836, 25): '"""dcr279"""', (2836, 27, 2836, 28): '(4)', (2836, 30, 2836, 36): '(31204)'}, {}), "('dcr279', 4, 31204)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2837, 8, 2837, 37), 'archinfo.arch.Register', 'Register', ({(2837, 17, 2837, 25): '"""dcr27a"""', (2837, 27, 2837, 28): '(4)', (2837, 30, 2837, 36): '(31208)'}, {}), "('dcr27a', 4, 31208)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2838, 8, 2838, 37), 'archinfo.arch.Register', 'Register', ({(2838, 17, 2838, 25): '"""dcr27b"""', (2838, 27, 2838, 28): '(4)', (2838, 30, 2838, 36): '(31212)'}, {}), "('dcr27b', 4, 31212)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2839, 8, 2839, 37), 'archinfo.arch.Register', 'Register', ({(2839, 17, 2839, 25): '"""dcr27c"""', (2839, 27, 2839, 28): '(4)', (2839, 30, 2839, 36): '(31216)'}, {}), "('dcr27c', 4, 31216)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2840, 8, 2840, 37), 'archinfo.arch.Register', 'Register', ({(2840, 17, 2840, 25): '"""dcr27d"""', (2840, 27, 2840, 28): '(4)', (2840, 30, 2840, 36): '(31220)'}, {}), "('dcr27d', 4, 31220)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2841, 8, 2841, 37), 'archinfo.arch.Register', 'Register', ({(2841, 17, 2841, 25): '"""dcr27e"""', (2841, 27, 2841, 28): '(4)', (2841, 30, 2841, 36): '(31224)'}, {}), "('dcr27e', 4, 31224)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2842, 8, 2842, 37), 'archinfo.arch.Register', 'Register', ({(2842, 17, 2842, 25): '"""dcr27f"""', (2842, 27, 2842, 28): '(4)', (2842, 30, 2842, 36): '(31228)'}, {}), "('dcr27f', 4, 31228)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2843, 8, 2843, 37), 'archinfo.arch.Register', 'Register', ({(2843, 17, 2843, 25): '"""dcr280"""', (2843, 27, 2843, 28): '(4)', (2843, 30, 2843, 36): '(31232)'}, {}), "('dcr280', 4, 31232)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2844, 8, 2844, 37), 'archinfo.arch.Register', 'Register', ({(2844, 17, 2844, 25): '"""dcr281"""', (2844, 27, 2844, 28): '(4)', (2844, 30, 2844, 36): '(31236)'}, {}), "('dcr281', 4, 31236)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2845, 8, 2845, 37), 'archinfo.arch.Register', 'Register', ({(2845, 17, 2845, 25): '"""dcr282"""', (2845, 27, 2845, 28): '(4)', (2845, 30, 2845, 36): '(31240)'}, {}), "('dcr282', 4, 31240)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2846, 8, 2846, 37), 'archinfo.arch.Register', 'Register', ({(2846, 17, 2846, 25): '"""dcr283"""', (2846, 27, 2846, 28): '(4)', (2846, 30, 2846, 36): '(31244)'}, {}), "('dcr283', 4, 31244)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2847, 8, 2847, 37), 'archinfo.arch.Register', 'Register', ({(2847, 17, 2847, 25): '"""dcr284"""', (2847, 27, 2847, 28): '(4)', (2847, 30, 2847, 36): '(31248)'}, {}), "('dcr284', 4, 31248)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2848, 8, 2848, 37), 'archinfo.arch.Register', 'Register', ({(2848, 17, 2848, 25): '"""dcr285"""', (2848, 27, 2848, 28): '(4)', (2848, 30, 2848, 36): '(31252)'}, {}), "('dcr285', 4, 31252)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2849, 8, 2849, 37), 'archinfo.arch.Register', 'Register', ({(2849, 17, 2849, 25): '"""dcr286"""', (2849, 27, 2849, 28): '(4)', (2849, 30, 2849, 36): '(31256)'}, {}), "('dcr286', 4, 31256)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2850, 8, 2850, 37), 'archinfo.arch.Register', 'Register', ({(2850, 17, 2850, 25): '"""dcr287"""', (2850, 27, 2850, 28): '(4)', (2850, 30, 2850, 36): '(31260)'}, {}), "('dcr287', 4, 31260)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2851, 8, 2851, 37), 'archinfo.arch.Register', 'Register', ({(2851, 17, 2851, 25): '"""dcr288"""', (2851, 27, 2851, 28): '(4)', (2851, 30, 2851, 36): '(31264)'}, {}), "('dcr288', 4, 31264)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2852, 8, 2852, 37), 'archinfo.arch.Register', 'Register', ({(2852, 17, 2852, 25): '"""dcr289"""', (2852, 27, 2852, 28): '(4)', (2852, 30, 2852, 36): '(31268)'}, {}), "('dcr289', 4, 31268)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2853, 8, 2853, 37), 'archinfo.arch.Register', 'Register', ({(2853, 17, 2853, 25): '"""dcr28a"""', (2853, 27, 2853, 28): '(4)', (2853, 30, 2853, 36): '(31272)'}, {}), "('dcr28a', 4, 31272)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2854, 8, 2854, 37), 'archinfo.arch.Register', 'Register', ({(2854, 17, 2854, 25): '"""dcr28b"""', (2854, 27, 2854, 28): '(4)', (2854, 30, 2854, 36): '(31276)'}, {}), "('dcr28b', 4, 31276)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2855, 8, 2855, 37), 'archinfo.arch.Register', 'Register', ({(2855, 17, 2855, 25): '"""dcr28c"""', (2855, 27, 2855, 28): '(4)', (2855, 30, 2855, 36): '(31280)'}, {}), "('dcr28c', 4, 31280)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2856, 8, 2856, 37), 'archinfo.arch.Register', 'Register', ({(2856, 17, 2856, 25): '"""dcr28d"""', (2856, 27, 2856, 28): '(4)', (2856, 30, 2856, 36): '(31284)'}, {}), "('dcr28d', 4, 31284)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2857, 8, 2857, 37), 'archinfo.arch.Register', 'Register', ({(2857, 17, 2857, 25): '"""dcr28e"""', (2857, 27, 2857, 28): '(4)', (2857, 30, 2857, 36): '(31288)'}, {}), "('dcr28e', 4, 31288)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2858, 8, 2858, 37), 'archinfo.arch.Register', 'Register', ({(2858, 17, 2858, 25): '"""dcr28f"""', (2858, 27, 2858, 28): '(4)', (2858, 30, 2858, 36): '(31292)'}, {}), "('dcr28f', 4, 31292)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2859, 8, 2859, 37), 'archinfo.arch.Register', 'Register', ({(2859, 17, 2859, 25): '"""dcr290"""', (2859, 27, 2859, 28): '(4)', (2859, 30, 2859, 36): '(31296)'}, {}), "('dcr290', 4, 31296)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2860, 8, 2860, 37), 'archinfo.arch.Register', 'Register', ({(2860, 17, 2860, 25): '"""dcr291"""', (2860, 27, 2860, 28): '(4)', (2860, 30, 2860, 36): '(31300)'}, {}), "('dcr291', 4, 31300)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2861, 8, 2861, 37), 'archinfo.arch.Register', 'Register', ({(2861, 17, 2861, 25): '"""dcr292"""', (2861, 27, 2861, 28): '(4)', (2861, 30, 2861, 36): '(31304)'}, {}), "('dcr292', 4, 31304)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2862, 8, 2862, 37), 'archinfo.arch.Register', 'Register', ({(2862, 17, 2862, 25): '"""dcr293"""', (2862, 27, 2862, 28): '(4)', (2862, 30, 2862, 36): '(31308)'}, {}), "('dcr293', 4, 31308)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2863, 8, 2863, 37), 'archinfo.arch.Register', 'Register', ({(2863, 17, 2863, 25): '"""dcr294"""', (2863, 27, 2863, 28): '(4)', (2863, 30, 2863, 36): '(31312)'}, {}), "('dcr294', 4, 31312)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2864, 8, 2864, 37), 'archinfo.arch.Register', 'Register', ({(2864, 17, 2864, 25): '"""dcr295"""', (2864, 27, 2864, 28): '(4)', (2864, 30, 2864, 36): '(31316)'}, {}), "('dcr295', 4, 31316)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2865, 8, 2865, 37), 'archinfo.arch.Register', 'Register', ({(2865, 17, 2865, 25): '"""dcr296"""', (2865, 27, 2865, 28): '(4)', (2865, 30, 2865, 36): '(31320)'}, {}), "('dcr296', 4, 31320)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2866, 8, 2866, 37), 'archinfo.arch.Register', 'Register', ({(2866, 17, 2866, 25): '"""dcr297"""', (2866, 27, 2866, 28): '(4)', (2866, 30, 2866, 36): '(31324)'}, {}), "('dcr297', 4, 31324)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2867, 8, 2867, 37), 'archinfo.arch.Register', 'Register', ({(2867, 17, 2867, 25): '"""dcr298"""', (2867, 27, 2867, 28): '(4)', (2867, 30, 2867, 36): '(31328)'}, {}), "('dcr298', 4, 31328)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2868, 8, 2868, 37), 'archinfo.arch.Register', 'Register', ({(2868, 17, 2868, 25): '"""dcr299"""', (2868, 27, 2868, 28): '(4)', (2868, 30, 2868, 36): '(31332)'}, {}), "('dcr299', 4, 31332)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2869, 8, 2869, 37), 'archinfo.arch.Register', 'Register', ({(2869, 17, 2869, 25): '"""dcr29a"""', (2869, 27, 2869, 28): '(4)', (2869, 30, 2869, 36): '(31336)'}, {}), "('dcr29a', 4, 31336)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2870, 8, 2870, 37), 'archinfo.arch.Register', 'Register', ({(2870, 17, 2870, 25): '"""dcr29b"""', (2870, 27, 2870, 28): '(4)', (2870, 30, 2870, 36): '(31340)'}, {}), "('dcr29b', 4, 31340)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2871, 8, 2871, 37), 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"('dcr2a3', 4, 31372)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2879, 8, 2879, 37), 'archinfo.arch.Register', 'Register', ({(2879, 17, 2879, 25): '"""dcr2a4"""', (2879, 27, 2879, 28): '(4)', (2879, 30, 2879, 36): '(31376)'}, {}), "('dcr2a4', 4, 31376)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2880, 8, 2880, 37), 'archinfo.arch.Register', 'Register', ({(2880, 17, 2880, 25): '"""dcr2a5"""', (2880, 27, 2880, 28): '(4)', (2880, 30, 2880, 36): '(31380)'}, {}), "('dcr2a5', 4, 31380)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2881, 8, 2881, 37), 'archinfo.arch.Register', 'Register', ({(2881, 17, 2881, 25): '"""dcr2a6"""', (2881, 27, 2881, 28): '(4)', (2881, 30, 2881, 36): '(31384)'}, {}), "('dcr2a6', 4, 31384)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2882, 8, 2882, 37), 'archinfo.arch.Register', 'Register', ({(2882, 17, 2882, 25): '"""dcr2a7"""', (2882, 27, 2882, 28): '(4)', (2882, 30, 2882, 36): '(31388)'}, {}), "('dcr2a7', 4, 31388)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2883, 8, 2883, 37), 'archinfo.arch.Register', 'Register', ({(2883, 17, 2883, 25): '"""dcr2a8"""', (2883, 27, 2883, 28): '(4)', (2883, 30, 2883, 36): '(31392)'}, {}), "('dcr2a8', 4, 31392)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2884, 8, 2884, 37), 'archinfo.arch.Register', 'Register', ({(2884, 17, 2884, 25): '"""dcr2a9"""', (2884, 27, 2884, 28): '(4)', (2884, 30, 2884, 36): '(31396)'}, {}), "('dcr2a9', 4, 31396)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2885, 8, 2885, 37), 'archinfo.arch.Register', 'Register', ({(2885, 17, 2885, 25): '"""dcr2aa"""', (2885, 27, 2885, 28): '(4)', (2885, 30, 2885, 36): '(31400)'}, {}), "('dcr2aa', 4, 31400)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2886, 8, 2886, 37), 'archinfo.arch.Register', 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Register\n'), ((2890, 8, 2890, 37), 'archinfo.arch.Register', 'Register', ({(2890, 17, 2890, 25): '"""dcr2af"""', (2890, 27, 2890, 28): '(4)', (2890, 30, 2890, 36): '(31420)'}, {}), "('dcr2af', 4, 31420)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2891, 8, 2891, 37), 'archinfo.arch.Register', 'Register', ({(2891, 17, 2891, 25): '"""dcr2b0"""', (2891, 27, 2891, 28): '(4)', (2891, 30, 2891, 36): '(31424)'}, {}), "('dcr2b0', 4, 31424)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2892, 8, 2892, 37), 'archinfo.arch.Register', 'Register', ({(2892, 17, 2892, 25): '"""dcr2b1"""', (2892, 27, 2892, 28): '(4)', (2892, 30, 2892, 36): '(31428)'}, {}), "('dcr2b1', 4, 31428)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2893, 8, 2893, 37), 'archinfo.arch.Register', 'Register', ({(2893, 17, 2893, 25): '"""dcr2b2"""', (2893, 27, 2893, 28): '(4)', (2893, 30, 2893, 36): '(31432)'}, {}), "('dcr2b2', 4, 31432)", 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25): '"""dcr2ba"""', (2901, 27, 2901, 28): '(4)', (2901, 30, 2901, 36): '(31464)'}, {}), "('dcr2ba', 4, 31464)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2902, 8, 2902, 37), 'archinfo.arch.Register', 'Register', ({(2902, 17, 2902, 25): '"""dcr2bb"""', (2902, 27, 2902, 28): '(4)', (2902, 30, 2902, 36): '(31468)'}, {}), "('dcr2bb', 4, 31468)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2903, 8, 2903, 37), 'archinfo.arch.Register', 'Register', ({(2903, 17, 2903, 25): '"""dcr2bc"""', (2903, 27, 2903, 28): '(4)', (2903, 30, 2903, 36): '(31472)'}, {}), "('dcr2bc', 4, 31472)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2904, 8, 2904, 37), 'archinfo.arch.Register', 'Register', ({(2904, 17, 2904, 25): '"""dcr2bd"""', (2904, 27, 2904, 28): '(4)', (2904, 30, 2904, 36): '(31476)'}, {}), "('dcr2bd', 4, 31476)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2905, 8, 2905, 37), 'archinfo.arch.Register', 'Register', ({(2905, 17, 2905, 25): '"""dcr2be"""', (2905, 27, 2905, 28): '(4)', (2905, 30, 2905, 36): '(31480)'}, {}), "('dcr2be', 4, 31480)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2906, 8, 2906, 37), 'archinfo.arch.Register', 'Register', ({(2906, 17, 2906, 25): '"""dcr2bf"""', (2906, 27, 2906, 28): '(4)', (2906, 30, 2906, 36): '(31484)'}, {}), "('dcr2bf', 4, 31484)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2907, 8, 2907, 37), 'archinfo.arch.Register', 'Register', ({(2907, 17, 2907, 25): '"""dcr2c0"""', (2907, 27, 2907, 28): '(4)', (2907, 30, 2907, 36): '(31488)'}, {}), "('dcr2c0', 4, 31488)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2908, 8, 2908, 37), 'archinfo.arch.Register', 'Register', ({(2908, 17, 2908, 25): '"""dcr2c1"""', (2908, 27, 2908, 28): '(4)', (2908, 30, 2908, 36): '(31492)'}, {}), "('dcr2c1', 4, 31492)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2909, 8, 2909, 37), 'archinfo.arch.Register', 'Register', ({(2909, 17, 2909, 25): '"""dcr2c2"""', (2909, 27, 2909, 28): '(4)', (2909, 30, 2909, 36): '(31496)'}, {}), "('dcr2c2', 4, 31496)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2910, 8, 2910, 37), 'archinfo.arch.Register', 'Register', ({(2910, 17, 2910, 25): '"""dcr2c3"""', (2910, 27, 2910, 28): '(4)', (2910, 30, 2910, 36): '(31500)'}, {}), "('dcr2c3', 4, 31500)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2911, 8, 2911, 37), 'archinfo.arch.Register', 'Register', ({(2911, 17, 2911, 25): '"""dcr2c4"""', (2911, 27, 2911, 28): '(4)', (2911, 30, 2911, 36): '(31504)'}, {}), "('dcr2c4', 4, 31504)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2912, 8, 2912, 37), 'archinfo.arch.Register', 'Register', ({(2912, 17, 2912, 25): '"""dcr2c5"""', (2912, 27, 2912, 28): '(4)', (2912, 30, 2912, 36): '(31508)'}, {}), "('dcr2c5', 4, 31508)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2913, 8, 2913, 37), 'archinfo.arch.Register', 'Register', ({(2913, 17, 2913, 25): '"""dcr2c6"""', (2913, 27, 2913, 28): '(4)', (2913, 30, 2913, 36): '(31512)'}, {}), "('dcr2c6', 4, 31512)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2914, 8, 2914, 37), 'archinfo.arch.Register', 'Register', ({(2914, 17, 2914, 25): '"""dcr2c7"""', (2914, 27, 2914, 28): '(4)', (2914, 30, 2914, 36): '(31516)'}, {}), "('dcr2c7', 4, 31516)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2915, 8, 2915, 37), 'archinfo.arch.Register', 'Register', ({(2915, 17, 2915, 25): '"""dcr2c8"""', (2915, 27, 2915, 28): '(4)', (2915, 30, 2915, 36): '(31520)'}, {}), "('dcr2c8', 4, 31520)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2916, 8, 2916, 37), 'archinfo.arch.Register', 'Register', ({(2916, 17, 2916, 25): '"""dcr2c9"""', (2916, 27, 2916, 28): '(4)', (2916, 30, 2916, 36): '(31524)'}, {}), "('dcr2c9', 4, 31524)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2917, 8, 2917, 37), 'archinfo.arch.Register', 'Register', ({(2917, 17, 2917, 25): '"""dcr2ca"""', (2917, 27, 2917, 28): '(4)', (2917, 30, 2917, 36): '(31528)'}, {}), "('dcr2ca', 4, 31528)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2918, 8, 2918, 37), 'archinfo.arch.Register', 'Register', ({(2918, 17, 2918, 25): '"""dcr2cb"""', (2918, 27, 2918, 28): '(4)', (2918, 30, 2918, 36): '(31532)'}, {}), "('dcr2cb', 4, 31532)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2919, 8, 2919, 37), 'archinfo.arch.Register', 'Register', ({(2919, 17, 2919, 25): '"""dcr2cc"""', (2919, 27, 2919, 28): '(4)', (2919, 30, 2919, 36): '(31536)'}, {}), "('dcr2cc', 4, 31536)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2920, 8, 2920, 37), 'archinfo.arch.Register', 'Register', ({(2920, 17, 2920, 25): '"""dcr2cd"""', (2920, 27, 2920, 28): '(4)', (2920, 30, 2920, 36): '(31540)'}, {}), "('dcr2cd', 4, 31540)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2921, 8, 2921, 37), 'archinfo.arch.Register', 'Register', ({(2921, 17, 2921, 25): '"""dcr2ce"""', (2921, 27, 2921, 28): '(4)', (2921, 30, 2921, 36): '(31544)'}, {}), "('dcr2ce', 4, 31544)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2922, 8, 2922, 37), 'archinfo.arch.Register', 'Register', ({(2922, 17, 2922, 25): '"""dcr2cf"""', (2922, 27, 2922, 28): '(4)', (2922, 30, 2922, 36): '(31548)'}, {}), "('dcr2cf', 4, 31548)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2923, 8, 2923, 37), 'archinfo.arch.Register', 'Register', ({(2923, 17, 2923, 25): '"""dcr2d0"""', (2923, 27, 2923, 28): '(4)', (2923, 30, 2923, 36): '(31552)'}, {}), "('dcr2d0', 4, 31552)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2924, 8, 2924, 37), 'archinfo.arch.Register', 'Register', ({(2924, 17, 2924, 25): '"""dcr2d1"""', (2924, 27, 2924, 28): '(4)', (2924, 30, 2924, 36): '(31556)'}, {}), "('dcr2d1', 4, 31556)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2925, 8, 2925, 37), 'archinfo.arch.Register', 'Register', ({(2925, 17, 2925, 25): '"""dcr2d2"""', (2925, 27, 2925, 28): '(4)', (2925, 30, 2925, 36): '(31560)'}, {}), "('dcr2d2', 4, 31560)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2926, 8, 2926, 37), 'archinfo.arch.Register', 'Register', ({(2926, 17, 2926, 25): '"""dcr2d3"""', (2926, 27, 2926, 28): '(4)', (2926, 30, 2926, 36): '(31564)'}, {}), "('dcr2d3', 4, 31564)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2927, 8, 2927, 37), 'archinfo.arch.Register', 'Register', ({(2927, 17, 2927, 25): '"""dcr2d4"""', (2927, 27, 2927, 28): '(4)', (2927, 30, 2927, 36): '(31568)'}, {}), "('dcr2d4', 4, 31568)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2928, 8, 2928, 37), 'archinfo.arch.Register', 'Register', ({(2928, 17, 2928, 25): '"""dcr2d5"""', (2928, 27, 2928, 28): '(4)', (2928, 30, 2928, 36): '(31572)'}, {}), "('dcr2d5', 4, 31572)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2929, 8, 2929, 37), 'archinfo.arch.Register', 'Register', ({(2929, 17, 2929, 25): '"""dcr2d6"""', (2929, 27, 2929, 28): '(4)', (2929, 30, 2929, 36): '(31576)'}, {}), "('dcr2d6', 4, 31576)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2930, 8, 2930, 37), 'archinfo.arch.Register', 'Register', ({(2930, 17, 2930, 25): '"""dcr2d7"""', (2930, 27, 2930, 28): '(4)', (2930, 30, 2930, 36): '(31580)'}, {}), "('dcr2d7', 4, 31580)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2931, 8, 2931, 37), 'archinfo.arch.Register', 'Register', ({(2931, 17, 2931, 25): '"""dcr2d8"""', (2931, 27, 2931, 28): '(4)', (2931, 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'Register', ({(2988, 17, 2988, 25): '"""dcr311"""', (2988, 27, 2988, 28): '(4)', (2988, 30, 2988, 36): '(31812)'}, {}), "('dcr311', 4, 31812)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2989, 8, 2989, 37), 'archinfo.arch.Register', 'Register', ({(2989, 17, 2989, 25): '"""dcr312"""', (2989, 27, 2989, 28): '(4)', (2989, 30, 2989, 36): '(31816)'}, {}), "('dcr312', 4, 31816)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2990, 8, 2990, 37), 'archinfo.arch.Register', 'Register', ({(2990, 17, 2990, 25): '"""dcr313"""', (2990, 27, 2990, 28): '(4)', (2990, 30, 2990, 36): '(31820)'}, {}), "('dcr313', 4, 31820)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2991, 8, 2991, 37), 'archinfo.arch.Register', 'Register', ({(2991, 17, 2991, 25): '"""dcr314"""', (2991, 27, 2991, 28): '(4)', (2991, 30, 2991, 36): '(31824)'}, {}), "('dcr314', 4, 31824)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2992, 8, 2992, 37), 'archinfo.arch.Register', 'Register', ({(2992, 17, 2992, 25): '"""dcr315"""', (2992, 27, 2992, 28): '(4)', (2992, 30, 2992, 36): '(31828)'}, {}), "('dcr315', 4, 31828)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2993, 8, 2993, 37), 'archinfo.arch.Register', 'Register', ({(2993, 17, 2993, 25): '"""dcr316"""', (2993, 27, 2993, 28): '(4)', (2993, 30, 2993, 36): '(31832)'}, {}), "('dcr316', 4, 31832)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2994, 8, 2994, 37), 'archinfo.arch.Register', 'Register', ({(2994, 17, 2994, 25): '"""dcr317"""', (2994, 27, 2994, 28): '(4)', (2994, 30, 2994, 36): '(31836)'}, {}), "('dcr317', 4, 31836)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((2995, 8, 2995, 37), 'archinfo.arch.Register', 'Register', ({(2995, 17, 2995, 25): '"""dcr318"""', (2995, 27, 2995, 28): '(4)', (2995, 30, 2995, 36): '(31840)'}, {}), "('dcr318', 4, 31840)", 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25): '"""dcr320"""', (3003, 27, 3003, 28): '(4)', (3003, 30, 3003, 36): '(31872)'}, {}), "('dcr320', 4, 31872)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3004, 8, 3004, 37), 'archinfo.arch.Register', 'Register', ({(3004, 17, 3004, 25): '"""dcr321"""', (3004, 27, 3004, 28): '(4)', (3004, 30, 3004, 36): '(31876)'}, {}), "('dcr321', 4, 31876)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3005, 8, 3005, 37), 'archinfo.arch.Register', 'Register', ({(3005, 17, 3005, 25): '"""dcr322"""', (3005, 27, 3005, 28): '(4)', (3005, 30, 3005, 36): '(31880)'}, {}), "('dcr322', 4, 31880)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3006, 8, 3006, 37), 'archinfo.arch.Register', 'Register', ({(3006, 17, 3006, 25): '"""dcr323"""', (3006, 27, 3006, 28): '(4)', (3006, 30, 3006, 36): '(31884)'}, {}), "('dcr323', 4, 31884)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3007, 8, 3007, 37), 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"('dcr32b', 4, 31916)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3015, 8, 3015, 37), 'archinfo.arch.Register', 'Register', ({(3015, 17, 3015, 25): '"""dcr32c"""', (3015, 27, 3015, 28): '(4)', (3015, 30, 3015, 36): '(31920)'}, {}), "('dcr32c', 4, 31920)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3016, 8, 3016, 37), 'archinfo.arch.Register', 'Register', ({(3016, 17, 3016, 25): '"""dcr32d"""', (3016, 27, 3016, 28): '(4)', (3016, 30, 3016, 36): '(31924)'}, {}), "('dcr32d', 4, 31924)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3017, 8, 3017, 37), 'archinfo.arch.Register', 'Register', ({(3017, 17, 3017, 25): '"""dcr32e"""', (3017, 27, 3017, 28): '(4)', (3017, 30, 3017, 36): '(31928)'}, {}), "('dcr32e', 4, 31928)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3018, 8, 3018, 37), 'archinfo.arch.Register', 'Register', ({(3018, 17, 3018, 25): '"""dcr32f"""', (3018, 27, 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25): '"""dcr342"""', (3037, 27, 3037, 28): '(4)', (3037, 30, 3037, 36): '(32008)'}, {}), "('dcr342', 4, 32008)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3038, 8, 3038, 37), 'archinfo.arch.Register', 'Register', ({(3038, 17, 3038, 25): '"""dcr343"""', (3038, 27, 3038, 28): '(4)', (3038, 30, 3038, 36): '(32012)'}, {}), "('dcr343', 4, 32012)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3039, 8, 3039, 37), 'archinfo.arch.Register', 'Register', ({(3039, 17, 3039, 25): '"""dcr344"""', (3039, 27, 3039, 28): '(4)', (3039, 30, 3039, 36): '(32016)'}, {}), "('dcr344', 4, 32016)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3040, 8, 3040, 37), 'archinfo.arch.Register', 'Register', ({(3040, 17, 3040, 25): '"""dcr345"""', (3040, 27, 3040, 28): '(4)', (3040, 30, 3040, 36): '(32020)'}, {}), "('dcr345', 4, 32020)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3041, 8, 3041, 37), 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register_arch, Endness, Register\n'), ((3045, 8, 3045, 37), 'archinfo.arch.Register', 'Register', ({(3045, 17, 3045, 25): '"""dcr34a"""', (3045, 27, 3045, 28): '(4)', (3045, 30, 3045, 36): '(32040)'}, {}), "('dcr34a', 4, 32040)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3046, 8, 3046, 37), 'archinfo.arch.Register', 'Register', ({(3046, 17, 3046, 25): '"""dcr34b"""', (3046, 27, 3046, 28): '(4)', (3046, 30, 3046, 36): '(32044)'}, {}), "('dcr34b', 4, 32044)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3047, 8, 3047, 37), 'archinfo.arch.Register', 'Register', ({(3047, 17, 3047, 25): '"""dcr34c"""', (3047, 27, 3047, 28): '(4)', (3047, 30, 3047, 36): '(32048)'}, {}), "('dcr34c', 4, 32048)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3048, 8, 3048, 37), 'archinfo.arch.Register', 'Register', ({(3048, 17, 3048, 25): '"""dcr34d"""', (3048, 27, 3048, 28): '(4)', (3048, 30, 3048, 36): '(32052)'}, {}), "('dcr34d', 4, 32052)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3049, 8, 3049, 37), 'archinfo.arch.Register', 'Register', ({(3049, 17, 3049, 25): '"""dcr34e"""', (3049, 27, 3049, 28): '(4)', (3049, 30, 3049, 36): '(32056)'}, {}), "('dcr34e', 4, 32056)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3050, 8, 3050, 37), 'archinfo.arch.Register', 'Register', ({(3050, 17, 3050, 25): '"""dcr34f"""', (3050, 27, 3050, 28): '(4)', (3050, 30, 3050, 36): '(32060)'}, {}), "('dcr34f', 4, 32060)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3051, 8, 3051, 37), 'archinfo.arch.Register', 'Register', ({(3051, 17, 3051, 25): '"""dcr350"""', (3051, 27, 3051, 28): '(4)', (3051, 30, 3051, 36): '(32064)'}, {}), "('dcr350', 4, 32064)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3052, 8, 3052, 37), 'archinfo.arch.Register', 'Register', ({(3052, 17, 3052, 25): '"""dcr351"""', (3052, 27, 3052, 28): '(4)', (3052, 30, 3052, 36): '(32068)'}, {}), "('dcr351', 4, 32068)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3053, 8, 3053, 37), 'archinfo.arch.Register', 'Register', ({(3053, 17, 3053, 25): '"""dcr352"""', (3053, 27, 3053, 28): '(4)', (3053, 30, 3053, 36): '(32072)'}, {}), "('dcr352', 4, 32072)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3054, 8, 3054, 37), 'archinfo.arch.Register', 'Register', ({(3054, 17, 3054, 25): '"""dcr353"""', (3054, 27, 3054, 28): '(4)', (3054, 30, 3054, 36): '(32076)'}, {}), "('dcr353', 4, 32076)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3055, 8, 3055, 37), 'archinfo.arch.Register', 'Register', ({(3055, 17, 3055, 25): '"""dcr354"""', (3055, 27, 3055, 28): '(4)', (3055, 30, 3055, 36): '(32080)'}, {}), "('dcr354', 4, 32080)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3056, 8, 3056, 37), 'archinfo.arch.Register', 'Register', ({(3056, 17, 3056, 25): '"""dcr355"""', (3056, 27, 3056, 28): '(4)', (3056, 30, 3056, 36): '(32084)'}, {}), "('dcr355', 4, 32084)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3057, 8, 3057, 37), 'archinfo.arch.Register', 'Register', ({(3057, 17, 3057, 25): '"""dcr356"""', (3057, 27, 3057, 28): '(4)', (3057, 30, 3057, 36): '(32088)'}, {}), "('dcr356', 4, 32088)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3058, 8, 3058, 37), 'archinfo.arch.Register', 'Register', ({(3058, 17, 3058, 25): '"""dcr357"""', (3058, 27, 3058, 28): '(4)', (3058, 30, 3058, 36): '(32092)'}, {}), "('dcr357', 4, 32092)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3059, 8, 3059, 37), 'archinfo.arch.Register', 'Register', ({(3059, 17, 3059, 25): '"""dcr358"""', (3059, 27, 3059, 28): '(4)', (3059, 30, 3059, 36): '(32096)'}, {}), "('dcr358', 4, 32096)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3060, 8, 3060, 37), 'archinfo.arch.Register', 'Register', ({(3060, 17, 3060, 25): '"""dcr359"""', (3060, 27, 3060, 28): '(4)', (3060, 30, 3060, 36): '(32100)'}, {}), "('dcr359', 4, 32100)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3061, 8, 3061, 37), 'archinfo.arch.Register', 'Register', ({(3061, 17, 3061, 25): '"""dcr35a"""', (3061, 27, 3061, 28): '(4)', (3061, 30, 3061, 36): '(32104)'}, {}), "('dcr35a', 4, 32104)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3062, 8, 3062, 37), 'archinfo.arch.Register', 'Register', ({(3062, 17, 3062, 25): '"""dcr35b"""', (3062, 27, 3062, 28): '(4)', (3062, 30, 3062, 36): '(32108)'}, {}), "('dcr35b', 4, 32108)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3063, 8, 3063, 37), 'archinfo.arch.Register', 'Register', ({(3063, 17, 3063, 25): '"""dcr35c"""', (3063, 27, 3063, 28): '(4)', (3063, 30, 3063, 36): '(32112)'}, {}), "('dcr35c', 4, 32112)", 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'Register', ({(3124, 17, 3124, 25): '"""dcr399"""', (3124, 27, 3124, 28): '(4)', (3124, 30, 3124, 36): '(32356)'}, {}), "('dcr399', 4, 32356)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3125, 8, 3125, 37), 'archinfo.arch.Register', 'Register', ({(3125, 17, 3125, 25): '"""dcr39a"""', (3125, 27, 3125, 28): '(4)', (3125, 30, 3125, 36): '(32360)'}, {}), "('dcr39a', 4, 32360)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3126, 8, 3126, 37), 'archinfo.arch.Register', 'Register', ({(3126, 17, 3126, 25): '"""dcr39b"""', (3126, 27, 3126, 28): '(4)', (3126, 30, 3126, 36): '(32364)'}, {}), "('dcr39b', 4, 32364)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3127, 8, 3127, 37), 'archinfo.arch.Register', 'Register', ({(3127, 17, 3127, 25): '"""dcr39c"""', (3127, 27, 3127, 28): '(4)', (3127, 30, 3127, 36): '(32368)'}, {}), "('dcr39c', 4, 32368)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3128, 8, 3128, 37), 'archinfo.arch.Register', 'Register', ({(3128, 17, 3128, 25): '"""dcr39d"""', (3128, 27, 3128, 28): '(4)', (3128, 30, 3128, 36): '(32372)'}, {}), "('dcr39d', 4, 32372)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3129, 8, 3129, 37), 'archinfo.arch.Register', 'Register', ({(3129, 17, 3129, 25): '"""dcr39e"""', (3129, 27, 3129, 28): '(4)', (3129, 30, 3129, 36): '(32376)'}, {}), "('dcr39e', 4, 32376)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3130, 8, 3130, 37), 'archinfo.arch.Register', 'Register', ({(3130, 17, 3130, 25): '"""dcr39f"""', (3130, 27, 3130, 28): '(4)', (3130, 30, 3130, 36): '(32380)'}, {}), "('dcr39f', 4, 32380)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3131, 8, 3131, 37), 'archinfo.arch.Register', 'Register', ({(3131, 17, 3131, 25): '"""dcr3a0"""', (3131, 27, 3131, 28): '(4)', (3131, 30, 3131, 36): '(32384)'}, {}), "('dcr3a0', 4, 32384)", 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25): '"""dcr3ca"""', (3173, 27, 3173, 28): '(4)', (3173, 30, 3173, 36): '(32552)'}, {}), "('dcr3ca', 4, 32552)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3174, 8, 3174, 37), 'archinfo.arch.Register', 'Register', ({(3174, 17, 3174, 25): '"""dcr3cb"""', (3174, 27, 3174, 28): '(4)', (3174, 30, 3174, 36): '(32556)'}, {}), "('dcr3cb', 4, 32556)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3175, 8, 3175, 37), 'archinfo.arch.Register', 'Register', ({(3175, 17, 3175, 25): '"""dcr3cc"""', (3175, 27, 3175, 28): '(4)', (3175, 30, 3175, 36): '(32560)'}, {}), "('dcr3cc', 4, 32560)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3176, 8, 3176, 37), 'archinfo.arch.Register', 'Register', ({(3176, 17, 3176, 25): '"""dcr3cd"""', (3176, 27, 3176, 28): '(4)', (3176, 30, 3176, 36): '(32564)'}, {}), "('dcr3cd', 4, 32564)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3177, 8, 3177, 37), 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"('dcr3d5', 4, 32596)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3185, 8, 3185, 37), 'archinfo.arch.Register', 'Register', ({(3185, 17, 3185, 25): '"""dcr3d6"""', (3185, 27, 3185, 28): '(4)', (3185, 30, 3185, 36): '(32600)'}, {}), "('dcr3d6', 4, 32600)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3186, 8, 3186, 37), 'archinfo.arch.Register', 'Register', ({(3186, 17, 3186, 25): '"""dcr3d7"""', (3186, 27, 3186, 28): '(4)', (3186, 30, 3186, 36): '(32604)'}, {}), "('dcr3d7', 4, 32604)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3187, 8, 3187, 37), 'archinfo.arch.Register', 'Register', ({(3187, 17, 3187, 25): '"""dcr3d8"""', (3187, 27, 3187, 28): '(4)', (3187, 30, 3187, 36): '(32608)'}, {}), "('dcr3d8', 4, 32608)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3188, 8, 3188, 37), 'archinfo.arch.Register', 'Register', ({(3188, 17, 3188, 25): '"""dcr3d9"""', (3188, 27, 3188, 28): '(4)', (3188, 30, 3188, 36): '(32612)'}, {}), "('dcr3d9', 4, 32612)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3189, 8, 3189, 37), 'archinfo.arch.Register', 'Register', ({(3189, 17, 3189, 25): '"""dcr3da"""', (3189, 27, 3189, 28): '(4)', (3189, 30, 3189, 36): '(32616)'}, {}), "('dcr3da', 4, 32616)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3190, 8, 3190, 37), 'archinfo.arch.Register', 'Register', ({(3190, 17, 3190, 25): '"""dcr3db"""', (3190, 27, 3190, 28): '(4)', (3190, 30, 3190, 36): '(32620)'}, {}), "('dcr3db', 4, 32620)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3191, 8, 3191, 37), 'archinfo.arch.Register', 'Register', ({(3191, 17, 3191, 25): '"""dcr3dc"""', (3191, 27, 3191, 28): '(4)', (3191, 30, 3191, 36): '(32624)'}, {}), "('dcr3dc', 4, 32624)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3192, 8, 3192, 37), 'archinfo.arch.Register', 'Register', ({(3192, 17, 3192, 25): '"""dcr3dd"""', (3192, 27, 3192, 28): '(4)', (3192, 30, 3192, 36): '(32628)'}, {}), "('dcr3dd', 4, 32628)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3193, 8, 3193, 37), 'archinfo.arch.Register', 'Register', ({(3193, 17, 3193, 25): '"""dcr3de"""', (3193, 27, 3193, 28): '(4)', (3193, 30, 3193, 36): '(32632)'}, {}), "('dcr3de', 4, 32632)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3194, 8, 3194, 37), 'archinfo.arch.Register', 'Register', ({(3194, 17, 3194, 25): '"""dcr3df"""', (3194, 27, 3194, 28): '(4)', (3194, 30, 3194, 36): '(32636)'}, {}), "('dcr3df', 4, 32636)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3195, 8, 3195, 37), 'archinfo.arch.Register', 'Register', ({(3195, 17, 3195, 25): '"""dcr3e0"""', (3195, 27, 3195, 28): '(4)', (3195, 30, 3195, 36): '(32640)'}, {}), "('dcr3e0', 4, 32640)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3196, 8, 3196, 37), 'archinfo.arch.Register', 'Register', ({(3196, 17, 3196, 25): '"""dcr3e1"""', (3196, 27, 3196, 28): '(4)', (3196, 30, 3196, 36): '(32644)'}, {}), "('dcr3e1', 4, 32644)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3197, 8, 3197, 37), 'archinfo.arch.Register', 'Register', ({(3197, 17, 3197, 25): '"""dcr3e2"""', (3197, 27, 3197, 28): '(4)', (3197, 30, 3197, 36): '(32648)'}, {}), "('dcr3e2', 4, 32648)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3198, 8, 3198, 37), 'archinfo.arch.Register', 'Register', ({(3198, 17, 3198, 25): '"""dcr3e3"""', (3198, 27, 3198, 28): '(4)', (3198, 30, 3198, 36): '(32652)'}, {}), "('dcr3e3', 4, 32652)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3199, 8, 3199, 37), 'archinfo.arch.Register', 'Register', ({(3199, 17, 3199, 25): '"""dcr3e4"""', (3199, 27, 3199, 28): '(4)', (3199, 30, 3199, 36): '(32656)'}, {}), "('dcr3e4', 4, 32656)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3200, 8, 3200, 37), 'archinfo.arch.Register', 'Register', ({(3200, 17, 3200, 25): '"""dcr3e5"""', (3200, 27, 3200, 28): '(4)', (3200, 30, 3200, 36): '(32660)'}, {}), "('dcr3e5', 4, 32660)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3201, 8, 3201, 37), 'archinfo.arch.Register', 'Register', ({(3201, 17, 3201, 25): '"""dcr3e6"""', (3201, 27, 3201, 28): '(4)', (3201, 30, 3201, 36): '(32664)'}, {}), "('dcr3e6', 4, 32664)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3202, 8, 3202, 37), 'archinfo.arch.Register', 'Register', ({(3202, 17, 3202, 25): '"""dcr3e7"""', (3202, 27, 3202, 28): '(4)', (3202, 30, 3202, 36): '(32668)'}, {}), "('dcr3e7', 4, 32668)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3203, 8, 3203, 37), 'archinfo.arch.Register', 'Register', ({(3203, 17, 3203, 25): '"""dcr3e8"""', (3203, 27, 3203, 28): '(4)', (3203, 30, 3203, 36): '(32672)'}, {}), "('dcr3e8', 4, 32672)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3204, 8, 3204, 37), 'archinfo.arch.Register', 'Register', ({(3204, 17, 3204, 25): '"""dcr3e9"""', (3204, 27, 3204, 28): '(4)', (3204, 30, 3204, 36): '(32676)'}, {}), "('dcr3e9', 4, 32676)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3205, 8, 3205, 37), 'archinfo.arch.Register', 'Register', ({(3205, 17, 3205, 25): '"""dcr3ea"""', (3205, 27, 3205, 28): '(4)', (3205, 30, 3205, 36): '(32680)'}, {}), "('dcr3ea', 4, 32680)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3206, 8, 3206, 37), 'archinfo.arch.Register', 'Register', ({(3206, 17, 3206, 25): '"""dcr3eb"""', (3206, 27, 3206, 28): '(4)', (3206, 30, 3206, 36): '(32684)'}, {}), "('dcr3eb', 4, 32684)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3207, 8, 3207, 37), 'archinfo.arch.Register', 'Register', ({(3207, 17, 3207, 25): '"""dcr3ec"""', (3207, 27, 3207, 28): '(4)', (3207, 30, 3207, 36): '(32688)'}, {}), "('dcr3ec', 4, 32688)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3208, 8, 3208, 37), 'archinfo.arch.Register', 'Register', ({(3208, 17, 3208, 25): '"""dcr3ed"""', (3208, 27, 3208, 28): '(4)', (3208, 30, 3208, 36): '(32692)'}, {}), "('dcr3ed', 4, 32692)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3209, 8, 3209, 37), 'archinfo.arch.Register', 'Register', ({(3209, 17, 3209, 25): '"""dcr3ee"""', (3209, 27, 3209, 28): '(4)', (3209, 30, 3209, 36): '(32696)'}, {}), "('dcr3ee', 4, 32696)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3210, 8, 3210, 37), 'archinfo.arch.Register', 'Register', ({(3210, 17, 3210, 25): '"""dcr3ef"""', (3210, 27, 3210, 28): '(4)', (3210, 30, 3210, 36): '(32700)'}, {}), "('dcr3ef', 4, 32700)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3211, 8, 3211, 37), 'archinfo.arch.Register', 'Register', ({(3211, 17, 3211, 25): '"""dcr3f0"""', (3211, 27, 3211, 28): '(4)', (3211, 30, 3211, 36): '(32704)'}, {}), "('dcr3f0', 4, 32704)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3212, 8, 3212, 37), 'archinfo.arch.Register', 'Register', ({(3212, 17, 3212, 25): '"""dcr3f1"""', (3212, 27, 3212, 28): '(4)', (3212, 30, 3212, 36): '(32708)'}, {}), "('dcr3f1', 4, 32708)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3213, 8, 3213, 37), 'archinfo.arch.Register', 'Register', ({(3213, 17, 3213, 25): '"""dcr3f2"""', (3213, 27, 3213, 28): '(4)', (3213, 30, 3213, 36): '(32712)'}, {}), "('dcr3f2', 4, 32712)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3214, 8, 3214, 37), 'archinfo.arch.Register', 'Register', ({(3214, 17, 3214, 25): '"""dcr3f3"""', (3214, 27, 3214, 28): '(4)', (3214, 30, 3214, 36): '(32716)'}, {}), "('dcr3f3', 4, 32716)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3215, 8, 3215, 37), 'archinfo.arch.Register', 'Register', ({(3215, 17, 3215, 25): '"""dcr3f4"""', (3215, 27, 3215, 28): '(4)', (3215, 30, 3215, 36): '(32720)'}, {}), "('dcr3f4', 4, 32720)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3216, 8, 3216, 37), 'archinfo.arch.Register', 'Register', ({(3216, 17, 3216, 25): '"""dcr3f5"""', (3216, 27, 3216, 28): '(4)', (3216, 30, 3216, 36): '(32724)'}, {}), "('dcr3f5', 4, 32724)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3217, 8, 3217, 37), 'archinfo.arch.Register', 'Register', ({(3217, 17, 3217, 25): '"""dcr3f6"""', (3217, 27, 3217, 28): '(4)', (3217, 30, 3217, 36): '(32728)'}, {}), "('dcr3f6', 4, 32728)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3218, 8, 3218, 37), 'archinfo.arch.Register', 'Register', ({(3218, 17, 3218, 25): '"""dcr3f7"""', (3218, 27, 3218, 28): '(4)', (3218, 30, 3218, 36): '(32732)'}, {}), "('dcr3f7', 4, 32732)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3219, 8, 3219, 37), 'archinfo.arch.Register', 'Register', ({(3219, 17, 3219, 25): '"""dcr3f8"""', (3219, 27, 3219, 28): '(4)', (3219, 30, 3219, 36): '(32736)'}, {}), "('dcr3f8', 4, 32736)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3220, 8, 3220, 37), 'archinfo.arch.Register', 'Register', ({(3220, 17, 3220, 25): '"""dcr3f9"""', (3220, 27, 3220, 28): '(4)', (3220, 30, 3220, 36): '(32740)'}, {}), "('dcr3f9', 4, 32740)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3221, 8, 3221, 37), 'archinfo.arch.Register', 'Register', ({(3221, 17, 3221, 25): '"""dcr3fa"""', (3221, 27, 3221, 28): '(4)', (3221, 30, 3221, 36): '(32744)'}, {}), "('dcr3fa', 4, 32744)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3222, 8, 3222, 37), 'archinfo.arch.Register', 'Register', ({(3222, 17, 3222, 25): '"""dcr3fb"""', (3222, 27, 3222, 28): '(4)', (3222, 30, 3222, 36): '(32748)'}, {}), "('dcr3fb', 4, 32748)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3223, 8, 3223, 37), 'archinfo.arch.Register', 'Register', ({(3223, 17, 3223, 25): '"""dcr3fc"""', (3223, 27, 3223, 28): '(4)', (3223, 30, 3223, 36): '(32752)'}, {}), "('dcr3fc', 4, 32752)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3224, 8, 3224, 37), 'archinfo.arch.Register', 'Register', ({(3224, 17, 3224, 25): '"""dcr3fd"""', (3224, 27, 3224, 28): '(4)', (3224, 30, 3224, 36): '(32756)'}, {}), "('dcr3fd', 4, 32756)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3225, 8, 3225, 37), 'archinfo.arch.Register', 'Register', ({(3225, 17, 3225, 25): '"""dcr3fe"""', (3225, 27, 3225, 28): '(4)', (3225, 30, 3225, 36): '(32760)'}, {}), "('dcr3fe', 4, 32760)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3226, 8, 3226, 37), 'archinfo.arch.Register', 'Register', ({(3226, 17, 3226, 25): '"""dcr3ff"""', (3226, 27, 3226, 28): '(4)', (3226, 30, 3226, 36): '(32764)'}, {}), "('dcr3ff', 4, 32764)", False, 'from archinfo.arch import register_arch, Endness, Register\n'), ((3227, 8, 3227, 35), 'archinfo.arch.Register', 'Register', ({(3227, 17, 3227, 22): '"""acc"""', (3227, 24, 3227, 25): '(8)', (3227, 27, 3227, 34): '(65536)'}, {}), "('acc', 8, 65536)", False, 'from archinfo.arch import register_arch, Endness, Register\n')]