public void handler() {
            /*unsigned*/
            int ModRM = FETCH();
            /*unsigned*/
            int dst = GetRMWord(ModRM) & 0xFFFF;
            /*unsigned*/
            int src = FETCH();
            src += (FETCH() << 8);
            nec_ICount[0] -= (ModRM >= 0xc0) ? 4 : 26;

            switch (ModRM & 0x38) {
                case 0x00: /* ADD ew,d16 */ {
                    //ADDW(dst,src);
                        /*unsigned*/
                    int res = dst + src;
                    SetCFW(res);
                    SetOFW_Add(res, src, dst);
                    SetAF(res, src, dst);
                    SetSZPF_Word(res);
                    dst = res & 0xFFFF;
                    PutbackRMWord(ModRM, dst);
                    if (neclog != null) {
                        fprintf(neclog, "i_81pre_0x00 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                }
                break;
                case 0x08:  /* OR ew,d16 */

                    //ORW(dst,src);

                    dst |= src;
                    I.CarryVal = I.OverVal = I.AuxVal = 0;
                    SetSZPF_Word(dst);
                    PutbackRMWord(ModRM, dst & 0xFFFF);
                    if (neclog != null) {
                        fprintf(neclog, "i_81pre_0x08 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                /*TODO*///    case 0x10:  /* ADC ew,d16 */
    /*TODO*///        src+=CF;
    /*TODO*///		ADDW(dst,src);
    /*TODO*///        PutbackRMWord(ModRM,dst);
    /*TODO*///	break;
    /*TODO*///    case 0x18:  /* SBB ew,d16 */
    /*TODO*///        src+=CF;
    /*TODO*///        SUBW(dst,src);
    /*TODO*///        PutbackRMWord(ModRM,dst);
    /*TODO*///	break;
                case 0x20: /* AND ew,d16 */ {
                    //ANDW(dst,src);
                    dst &= src;
                    I.CarryVal = I.OverVal = I.AuxVal = 0;
                    SetSZPF_Word(dst);
                    PutbackRMWord(ModRM, dst);
                    if (neclog != null) {
                        fprintf(neclog, "i_81pre_0x20 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                }
                break;
                case 0x28: /* SUB ew,d16 */ {
                    //SUBW(dst,src);
                        /*unsigned*/
                    int res = dst - src;
                    SetCFW(res);
                    SetOFW_Sub(res, src, dst);
                    SetAF(res, src, dst);
                    SetSZPF_Word(res);
                    dst = res & 0xFFFF;
                    PutbackRMWord(ModRM, dst);
                    if (neclog != null) {
                        fprintf(neclog, "i_81pre_0x28 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                }
                break;
                case 0x30:  /* XOR ew,d16 */

                    //XORW(dst,src);

                    dst ^= src;
                    I.CarryVal = I.OverVal = I.AuxVal = 0;
                    SetSZPF_Word(dst);
                    PutbackRMWord(ModRM, dst & 0xFFFF);
                    if (neclog != null) {
                        fprintf(neclog, "i_81pre_0x30 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }

                    break;
                case 0x38: /* CMP ew,d16 */ {
                    //SUBW(dst,src);
                    /*unsigned*/
                    int res = dst - src;
                    SetCFW(res);
                    SetOFW_Sub(res, src, dst);
                    SetAF(res, src, dst);
                    SetSZPF_Word(res);
                    dst = res & 0xFFFF;
                    if (neclog != null) {
                        fprintf(neclog, "i_81pre_0x38 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                }
                break;
                default:
                    System.out.println("i_81pre 0x" + Integer.toHexString(ModRM & 0x38));
                    break;
            }
        }