public void handler() {
            int Opcode = FETCH();
            int ModRM;
            int tmp;
            int tmp2;

            switch (Opcode) {
                case 0x10: // 0F 10 47 30 - TEST1 [bx+30h],cl
                    ModRM = FETCH();
                    if (ModRM >= 0xc0) {
                        tmp = I.regs.b[Mod_RM.RM.b[ModRM]];
                        nec_ICount[0] -= 3;
                    } else {
                        int old = nec_ICount[0];
                        (GetEA[ModRM]).handler();
                        tmp = ReadByte(EA);
                        nec_ICount[0] = old - 12;			/* my source says 14 cycles everytime and not
                         ModRM-dependent like GetEA[] does..hmmm */

                    }
                    tmp2 = I.regs.b[CL] & 0x7;
                    I.ZeroVal = (tmp & bytes[tmp2]) != 0 ? 1 : 0;
                    //			SetZF(tmp & (1<<tmp2));
                    if (neclog != null) {
                        fprintf(neclog, "i_pre_nec_0x10 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                case 0x11: // 0F 11 47 30 - TEST1 [bx+30h],cl
                    ModRM = FETCH();
                    //tmp = GetRMWord(ModRM);
                    if (ModRM >= 0xc0) {
                        tmp = I.regs.w[Mod_RM.RM.w[ModRM]];
                        nec_ICount[0] -= 3;
                    } else {
                        int old = nec_ICount[0];
                        (GetEA[ModRM]).handler();
                        tmp = ReadWord(EA);
                        nec_ICount[0] = old - 12;			/* my source says 14 cycles everytime and not
                         ModRM-dependent like GetEA[] does..hmmm */

                    }
                    tmp2 = I.regs.b[CL] & 0xF;
                    I.ZeroVal = (tmp & bytes[tmp2]) != 0 ? 1 : 0;
                    //			SetZF(tmp & (1<<tmp2));
                    if (neclog != null) {
                        fprintf(neclog, "i_pre_nec_0x11 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;

                case 0x12: // 0F 12 [mod:000:r/m] - CLR1 reg/m8,cl
                    ModRM = FETCH();
                    /* need the long if due to correct cycles OB[19.07.99] */
                    if (ModRM >= 0xc0) {
                        tmp = I.regs.b[Mod_RM.RM.b[ModRM]];
                        nec_ICount[0] -= 5;
                    } else {
                        int old = nec_ICount[0];
                        (GetEA[ModRM]).handler();
                        tmp = ReadByte(EA);
                        nec_ICount[0] = old - 14;			/* my source says 14 cycles everytime and not
                         ModRM-dependent like GetEA[] does..hmmm */

                    }
                    tmp2 = I.regs.b[CL] & 0x7;		/* hey its a Byte so &07 NOT &0f */

                    tmp &= ~(bytes[tmp2]);
                    PutbackRMByte(ModRM, tmp & 0xFF);
                    if (neclog != null) {
                        fprintf(neclog, "i_pre_nec_0x12 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;

                /*TODO*///		case 0x13 : // 0F 13 [mod:000:r/m] - CLR1 reg/m16,cl
    /*TODO*///			ModRM = FETCH;
    /*TODO*///		    //tmp = GetRMWord(ModRM);
    /*TODO*///			if (ModRM >= 0xc0) {
    /*TODO*///				tmp=I.regs.w[Mod_RM.RM.w[ModRM]];
    /*TODO*///				nec_ICount-=5;
    /*TODO*///			}
    /*TODO*///			else {
    /*TODO*///				int old=nec_ICount;
    /*TODO*///				(*GetEA[ModRM])();;
    /*TODO*///				tmp=ReadWord(EA);
    /*TODO*///				nec_ICount=old-14;			/* my source says 14 cycles everytime and not
    /*TODO*///   											   ModRM-dependent like GetEA[] does..hmmm */
    /*TODO*///			}
    /*TODO*///			tmp2 = I.regs.b[CL] & 0xF;		/* this time its a word */
    /*TODO*///			tmp &= ~(bytes[tmp2]);
    /*TODO*///			PutbackRMWord(ModRM,tmp);
    /*TODO*///			break;
    /*TODO*///
    /*TODO*///		case 0x14 : // 0F 14 47 30 - SET1 [bx+30h],cl
    /*TODO*///			ModRM = FETCH;
    /*TODO*///			if (ModRM >= 0xc0) {
    /*TODO*///		    	tmp=I.regs.b[Mod_RM.RM.b[ModRM]];
    /*TODO*///		    	nec_ICount-=4;
    /*TODO*///		    }
    /*TODO*///		    else {
    /*TODO*///		    	int old=nec_ICount;
    /*TODO*///		    	 (*GetEA[ModRM])();;
    /*TODO*///		    	tmp=ReadByte(EA);
    /*TODO*///   				nec_ICount=old-13;
    /*TODO*///		    }
    /*TODO*///			tmp2 = I.regs.b[CL] & 0x7;
    /*TODO*///			tmp |= (bytes[tmp2]);
    /*TODO*///			PutbackRMByte(ModRM,tmp);
    /*TODO*///			break;
                case 0x15: // 0F 15 C6 - SET1 si,cl
                    ModRM = FETCH();
                    //tmp = GetRMWord(ModRM);
                    if (ModRM >= 0xc0) {
                        tmp = I.regs.w[Mod_RM.RM.w[ModRM]];
                        nec_ICount[0] -= 4;
                    } else {
                        int old = nec_ICount[0];
                        (GetEA[ModRM]).handler();
                        tmp = ReadWord(EA);
                        nec_ICount[0] = old - 13;
                    }
                    tmp2 = I.regs.b[CL] & 0xF;
                    tmp |= (bytes[tmp2]);
                    PutbackRMWord(ModRM, tmp & 0xFFFF);
                    if (neclog != null) {
                        fprintf(neclog, "i_pre_nec_0x15 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                /*TODO*///		case 0x16 : // 0F 16 C6 - NOT1 si,cl
    /*TODO*///			ModRM = FETCH;
    /*TODO*///		    /* need the long if due to correct cycles OB[19.07.99] */
    /*TODO*///		    if (ModRM >= 0xc0) {
    /*TODO*///		    	tmp=I.regs.b[Mod_RM.RM.b[ModRM]];
    /*TODO*///		    	nec_ICount-=4;
    /*TODO*///		    }
    /*TODO*///		    else {
    /*TODO*///		    	int old=nec_ICount;
    /*TODO*///		    	(*GetEA[ModRM])();;
    /*TODO*///		    	tmp=ReadByte(EA);
    /*TODO*///   				nec_ICount=old-18;			/* my source says 18 cycles everytime and not
    /*TODO*///   											   ModRM-dependent like GetEA[] does..hmmm */
    /*TODO*///		    }
    /*TODO*///			tmp2 = I.regs.b[CL] & 0x7;	/* hey its a Byte so &07 NOT &0f */
    /*TODO*///			if (tmp & bytes[tmp2])
    /*TODO*///				tmp &= ~(bytes[tmp2]);
    /*TODO*///			else
    /*TODO*///				tmp |= (bytes[tmp2]);
    /*TODO*///			PutbackRMByte(ModRM,tmp);
    /*TODO*///			break;
    /*TODO*///		case 0x17 : // 0F 17 C6 - NOT1 si,cl
    /*TODO*///			ModRM = FETCH;
    /*TODO*///		    //tmp = GetRMWord(ModRM);
    /*TODO*///			if (ModRM >= 0xc0) {
    /*TODO*///				tmp=I.regs.w[Mod_RM.RM.w[ModRM]];
    /*TODO*///				nec_ICount-=4;
    /*TODO*///			}
    /*TODO*///			else {
    /*TODO*///				int old=nec_ICount;
    /*TODO*///				(*GetEA[ModRM])();;
    /*TODO*///				tmp=ReadWord(EA);
    /*TODO*///				nec_ICount=old-18;			/* my source says 14 cycles everytime and not
    /*TODO*///   											   ModRM-dependent like GetEA[] does..hmmm */
    /*TODO*///			}
    /*TODO*///			tmp2 = I.regs.b[CL] & 0xF;		/* this time its a word */
    /*TODO*///			if (tmp & bytes[tmp2])
    /*TODO*///				tmp &= ~(bytes[tmp2]);
    /*TODO*///			else
    /*TODO*///				tmp |= (bytes[tmp2]);
    /*TODO*///			PutbackRMWord(ModRM,tmp);
    /*TODO*///			break;
                case 0x18: // 0F 18 XX - TEST1 [bx+30h],07
                    ModRM = FETCH();
                    //tmp = GetRMByte(ModRM);
                    if (ModRM >= 0xc0) {
                        tmp = I.regs.b[Mod_RM.RM.b[ModRM]];
                        nec_ICount[0] -= 4;
                    } else {
                        int old = nec_ICount[0];
                        (GetEA[ModRM]).handler();
                        tmp = ReadByte(EA);
                        nec_ICount[0] = old - 13;			/* my source says 15 cycles everytime and not
                         ModRM-dependent like GetEA[] does..hmmm */

                    }
                    tmp2 = FETCH();
                    tmp2 &= 0xF;
                    I.ZeroVal = (tmp & (bytes[tmp2])) != 0 ? 1 : 0;
                    //			SetZF(tmp & (1<<tmp2));
                    if (neclog != null) {
                        fprintf(neclog, "i_pre_nec_0x18 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                case 0x19: // 0F 19 XX - TEST1 [bx+30h],07
                    ModRM = FETCH();
                    //tmp = GetRMWord(ModRM);
                    if (ModRM >= 0xc0) {
                        tmp = I.regs.w[Mod_RM.RM.w[ModRM]];
                        nec_ICount[0] -= 4;
                    } else {
                        int old = nec_ICount[0];
                        (GetEA[ModRM]).handler();
                        tmp = ReadWord(EA);
                        nec_ICount[0] = old - 13;			/* my source says 14 cycles everytime and not
                         ModRM-dependent like GetEA[] does..hmmm */

                    }
                    tmp2 = FETCH();
                    tmp2 &= 0xf;
                    I.ZeroVal = (tmp & (bytes[tmp2])) != 0 ? 1 : 0;
                    //SetZF(tmp & (1<<tmp2));
                    if (neclog != null) {
                        fprintf(neclog, "i_pre_nec_0x19 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                case 0x1a: // 0F 1A 06 - CLR1 si,cl
                    ModRM = FETCH();
                    //tmp = GetRMByte(ModRM);
                    if (ModRM >= 0xc0) {
                        tmp = I.regs.b[Mod_RM.RM.b[ModRM]];
                        nec_ICount[0] -= 6;
                    } else {
                        int old = nec_ICount[0];
                        (GetEA[ModRM]).handler();;
                        tmp = ReadByte(EA);
                        nec_ICount[0] = old - 15;			/* my source says 15 cycles everytime and not
                         ModRM-dependent like GetEA[] does..hmmm */

                    }
                    tmp2 = FETCH();
                    tmp2 &= 0x7;
                    tmp &= ~(bytes[tmp2]);
                    PutbackRMByte(ModRM, tmp & 0xFF);
                    if (neclog != null) {
                        fprintf(neclog, "i_pre_nec_0x1a :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                case 0x1B: // 0F 1B 06 - CLR1 si,cl
                    ModRM = FETCH();
                    //tmp = GetRMWord(ModRM);
                    if (ModRM >= 0xc0) {
                        tmp = I.regs.w[Mod_RM.RM.w[ModRM]];
                        nec_ICount[0] -= 6;
                    } else {
                        int old = nec_ICount[0];
                        (GetEA[ModRM]).handler();
                        tmp = ReadWord(EA);
                        nec_ICount[0] = old - 15;			/* my source says 15 cycles everytime and not
                         ModRM-dependent like GetEA[] does..hmmm */

                    }
                    tmp2 = FETCH();
                    tmp2 &= 0xF;
                    tmp &= ~(bytes[tmp2]);
                    PutbackRMWord(ModRM, tmp & 0xFFFF);
                    if (neclog != null) {
                        fprintf(neclog, "i_pre_nec_0x1b :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                case 0x1C: // 0F 1C 47 30 - SET1 [bx+30h],cl
                    ModRM = FETCH();
                    //tmp = GetRMByte(ModRM);
                    if (ModRM >= 0xc0) {
                        tmp = I.regs.b[Mod_RM.RM.b[ModRM]];
                        nec_ICount[0] -= 5;
                    } else {
                        int old = nec_ICount[0];
                        (GetEA[ModRM]).handler();
                        tmp = ReadByte(EA);
                        nec_ICount[0] = old - 14;			/* my source says 15 cycles everytime and not
                         ModRM-dependent like GetEA[] does..hmmm */

                    }
                    tmp2 = FETCH();
                    tmp2 &= 0x7;
                    tmp |= (bytes[tmp2]);
                    PutbackRMByte(ModRM, tmp & 0xFF);
                    if (neclog != null) {
                        fprintf(neclog, "i_pre_nec_0x1c :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                case 0x1D: // 0F 1D C6 - SET1 si,cl
                    //if (errorlog) fprintf(errorlog,"PC=%06x : Set1 ",cpu_get_pc()-2);
                    ModRM = FETCH();
                    if (ModRM >= 0xc0) {
                        tmp = I.regs.w[Mod_RM.RM.w[ModRM]];
                        nec_ICount[0] -= 5;
                        //if (errorlog) fprintf(errorlog,"reg=%04x ->",tmp);
                    } else {
                        int old = nec_ICount[0];
                        (GetEA[ModRM]).handler();	// calculate EA
                        tmp = ReadWord(EA);	// read from EA
                        nec_ICount[0] = old - 14;
                        //if (errorlog) fprintf(errorlog,"[%04x]=%04x ->",EA,tmp);
                    }
                    tmp2 = FETCH();
                    tmp2 &= 0xF;
                    tmp |= (bytes[tmp2]);
                    //if (errorlog) fprintf(errorlog,"%04x",tmp);
                    PutbackRMWord(ModRM, tmp & 0xFFFF);
                    if (neclog != null) {
                        fprintf(neclog, "i_pre_nec_0x1d :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                /*TODO*///		case 0x1e : // 0F 1e C6 - NOT1 si,07
    /*TODO*///			ModRM = FETCH;
    /*TODO*///		   	//tmp = GetRMByte(ModRM);
    /*TODO*///		   	if (ModRM >= 0xc0) {
    /*TODO*///		    	tmp=I.regs.b[Mod_RM.RM.b[ModRM]];
    /*TODO*///		    	nec_ICount-=5;
    /*TODO*///		    }
    /*TODO*///		    else {
    /*TODO*///		    	int old=nec_ICount;
    /*TODO*///		    	(*GetEA[ModRM])();;
    /*TODO*///		    	tmp=ReadByte(EA);
    /*TODO*///   				nec_ICount=old-19;
    /*TODO*///		    }
    /*TODO*///			tmp2 = FETCH;
    /*TODO*///			tmp2 &= 0x7;
    /*TODO*///			if (tmp & bytes[tmp2])
    /*TODO*///				tmp &= ~(bytes[tmp2]);
    /*TODO*///			else
    /*TODO*///				tmp |= (bytes[tmp2]);
    /*TODO*///			PutbackRMByte(ModRM,tmp);
    /*TODO*///			break;
                case 0x1f: // 0F 1f C6 - NOT1 si,07
                    ModRM = FETCH();
                    //tmp = GetRMWord(ModRM);
                    if (ModRM >= 0xc0) {
                        tmp = I.regs.w[Mod_RM.RM.w[ModRM]];
                        nec_ICount[0] -= 5;
                    } else {
                        int old = nec_ICount[0];
                        (GetEA[ModRM]).handler();
                        tmp = ReadWord(EA);
                        nec_ICount[0] = old - 19;			/* my source says 15 cycles everytime and not
                         ModRM-dependent like GetEA[] does..hmmm */

                    }
                    tmp2 = FETCH();
                    tmp2 &= 0xF;
                    if ((tmp & bytes[tmp2]) != 0) {
                        tmp &= ~(bytes[tmp2]);
                    } else {
                        tmp |= (bytes[tmp2]);
                    }
                    PutbackRMWord(ModRM, tmp & 0xFFFF);
                    if (neclog != null) {
                        fprintf(neclog, "i_pre_nec_0x1f :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                case 0x20: { // 0F 20 59 - add4s
                    int count = (I.regs.b[CL] + 1) / 2;	// length in words !
                    int i;
                    int di = I.regs.w[IY];
                    int si = I.regs.w[IX];
                    I.ZeroVal = 0;
                    I.CarryVal = 0; // NOT ADC
                    for (i = 0; i < count; i++) {
                        int v1, v2;
                        int result;
                        tmp = GetMemB(DS, si);
                        tmp2 = GetMemB(ES, di);

                        v1 = (tmp >> 4) * 10 + (tmp & 0xf);
                        v2 = (tmp2 >> 4) * 10 + (tmp2 & 0xf);
                        result = v1 + v2 + I.CarryVal;
                        I.CarryVal = result > 99 ? 1 : 0;
                        result = result % 100;
                        v1 = ((result / 10) << 4) | (result % 10);
                        PutMemB(ES, di, v1);
                        if (v1 != 0) {
                            I.ZeroVal = 1;
                        }
                        si = (si + 1) & 0xFFFF;
                        di = (di + 1) & 0xFFFF;
                    }
                    I.OverVal = I.CarryVal;
                    nec_ICount[0] -= 7 + 19 * count;	// 7+19n, n #operand words
                    if (neclog != null) {
                        fprintf(neclog, "i_pre_nec_0x20 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                }
                break;

                /*TODO*///		case 0x22 : { // 0F 22 59 - sub4s
    /*TODO*///			int count = (I.regs.b[CL]+1)/2;
    /*TODO*///			int i;
    /*TODO*///	      unsigned di = I.regs.w[IY];
    /*TODO*///			unsigned si = I.regs.w[IX];
    /*TODO*///			I.ZeroVal = 0;
    /*TODO*///			I.CarryVal = 0; // NOT ADC
    /*TODO*///			for (i=0;i<count;i++) {
    /*TODO*///				int v1,v2;
    /*TODO*///				int result;
    /*TODO*///				tmp = GetMemB(ES, di);
    /*TODO*///				tmp2 = GetMemB(DS, si);
    /*TODO*///
    /*TODO*///				v1 = (tmp>>4)*10 + (tmp&0xf);
    /*TODO*///				v2 = (tmp2>>4)*10 + (tmp2&0xf);
    /*TODO*///				if (v1 < (v2+I.CarryVal)) {
    /*TODO*///					v1+=100;
    /*TODO*///					result = v1-(v2+I.CarryVal);
    /*TODO*///					I.CarryVal = 1;
    /*TODO*///				} else {
    /*TODO*///					result = v1-(v2+I.CarryVal);
    /*TODO*///					I.CarryVal = 0;
    /*TODO*///				}
    /*TODO*///				v1 = ((result/10)<<4) | (result % 10);
    /*TODO*///				PutMemB(ES, di,v1)
    /*TODO*///				if (v1) I.ZeroVal = 1;
    /*TODO*///				si++;
    /*TODO*///				di++;
    /*TODO*///			}
    /*TODO*///			I.OverVal = I.CarryVal;
    /*TODO*///			nec_ICount-=7+19*count;
    /*TODO*///			} break;
    /*TODO*///
    /*TODO*///		case 0x25 :
    /*TODO*///			/*
    /*TODO*///			----------O-MOVSPA---------------------------------
    /*TODO*///			OPCODE MOVSPA	 -  Move Stack Pointer After Bank Switched
    /*TODO*///
    /*TODO*///			CPU:  NEC V25,V35,V25 Plus,V35 Plus,V25 Software Guard
    /*TODO*///			Type of Instruction: System
    /*TODO*///
    /*TODO*///			Instruction:  MOVSPA
    /*TODO*///
    /*TODO*///			Description:  This instruction transfer	 both SS and SP	 of the old register
    /*TODO*///				      bank to new register bank after the bank has been switched by
    /*TODO*///				      interrupt or BRKCS instruction.
    /*TODO*///
    /*TODO*///			Flags Affected:	 None
    /*TODO*///
    /*TODO*///			CPU mode: RM
    /*TODO*///
    /*TODO*///			+++++++++++++++++++++++
    /*TODO*///			Physical Form:	MOVSPA
    /*TODO*///			COP (Code of Operation)	 : 0Fh 25h
    /*TODO*///
    /*TODO*///			Clocks:	 16
    /*TODO*///			*/
    /*TODO*///			if (errorlog) fprintf(errorlog,"PC=%06x : MOVSPA\n",cpu_get_pc()-2);
    /*TODO*///			nec_ICount-=16;
    /*TODO*///			break;
                case 0x26: { // 0F 22 59 - cmp4s
                    int count = (I.regs.b[CL] + 1) / 2;
                    int i;
                    int di = I.regs.w[IY];
                    int si = I.regs.w[IX];
                    I.ZeroVal = 0;
                    I.CarryVal = 0; // NOT ADC
                    for (i = 0; i < count; i++) {
                        int v1, v2;
                        int result;
                        tmp = GetMemB(ES, di);
                        tmp2 = GetMemB(DS, si);

                        v1 = (tmp >> 4) * 10 + (tmp & 0xf);
                        v2 = (tmp2 >> 4) * 10 + (tmp2 & 0xf);
                        if (v1 < (v2 + I.CarryVal)) {
                            v1 += 100;
                            result = v1 - (v2 + I.CarryVal);
                            I.CarryVal = 1;
                        } else {
                            result = v1 - (v2 + I.CarryVal);
                            I.CarryVal = 0;
                        }
                        v1 = ((result / 10) << 4) | (result % 10);
                        //PutMemB(ES, di,v1)	/* no store, only compare */
                        if (v1 != 0) {
                            I.ZeroVal = 1;
                        }
                        si = (si + 1) & 0xFFFF;
                        di = (di + 1) & 0xFFFF;
                    }
                    I.OverVal = I.CarryVal;
                    nec_ICount[0] -= 7 + 19 * count;	// 7+19n, n #operand bytes
                    if (neclog != null) {
                        fprintf(neclog, "i_pre_nec_0x26 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                }
                break;
                case 0x28: // 0F 28 C7 - ROL4 bh
                    ModRM = FETCH();
                    //tmp = GetRMByte(ModRM);
                    if (ModRM >= 0xc0) {
                        tmp = I.regs.b[Mod_RM.RM.b[ModRM]];
                        nec_ICount[0] -= 25;
                    } else {
                        int old = nec_ICount[0];
                        (GetEA[ModRM]).handler();
                        tmp = ReadByte(EA);
                        nec_ICount[0] = old - 28;
                    }
                    tmp <<= 4;
                    tmp |= I.regs.b[AL] & 0xF;
                    I.regs.SetB(AL, (I.regs.b[AL] & 0xF0) | ((tmp >> 8) & 0xF) & 0xFF);
                    tmp &= 0xff;
                    PutbackRMByte(ModRM, tmp);
                    if (neclog != null) {
                        fprintf(neclog, "i_pre_nec_0x28 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                /*TODO*///		// Is this a REAL instruction??
    /*TODO*///		case 0x29 : // 0F 29 C7 - ROL4 bx
    /*TODO*///
    /*TODO*///			ModRM = FETCH;
    /*TODO*///		    /*
    /*TODO*///		    if (ModRM >= 0xc0) {
    /*TODO*///				tmp=I.regs.w[Mod_RM.RM.w[ModRM]];
    /*TODO*///				nec_ICount-=29;
    /*TODO*///			}
    /*TODO*///			else {
    /*TODO*///				int old=nec_ICount;
    /*TODO*///				(*GetEA[ModRM])();;
    /*TODO*///				tmp=ReadWord(EA);
    /*TODO*///				nec_ICount=old-33;
    /*TODO*///			}
    /*TODO*///			tmp <<= 4;
    /*TODO*///			tmp |= I.regs.b[AL] & 0xF;
    /*TODO*///			I.regs.b[AL] = (I.regs.b[AL] & 0xF0) | ((tmp>>8)&0xF);
    /*TODO*///			tmp &= 0xffff;
    /*TODO*///			PutbackRMWord(ModRM,tmp);
    /*TODO*///			*/
    /*TODO*///			if (errorlog) fprintf(errorlog,"PC=%06x : ROL4 %02x\n",cpu_get_pc()-3,ModRM);
    /*TODO*///			break;
    /*TODO*///
    /*TODO*///		case 0x2A : // 0F 2a c2 - ROR4 bh
    /*TODO*///			ModRM = FETCH;
    /*TODO*///		   	//tmp = GetRMByte(ModRM);
    /*TODO*///		   	if (ModRM >= 0xc0) {
    /*TODO*///		    	tmp=I.regs.b[Mod_RM.RM.b[ModRM]];
    /*TODO*///		    	nec_ICount-=29;
    /*TODO*///		    }
    /*TODO*///		    else {
    /*TODO*///		    	int old=nec_ICount;
    /*TODO*///		    	(*GetEA[ModRM])();;
    /*TODO*///		    	tmp=ReadByte(EA);
    /*TODO*///   				nec_ICount=old-33;
    /*TODO*///   			}
    /*TODO*///			tmp2 = (I.regs.b[AL] & 0xF)<<4;
    /*TODO*///			I.regs.b[AL] = (I.regs.b[AL] & 0xF0) | (tmp&0xF);
    /*TODO*///			tmp = tmp2 | (tmp>>4);
    /*TODO*///			PutbackRMByte(ModRM,tmp);
    /*TODO*///			break;
    /*TODO*///
    /*TODO*///		case 0x2B : // 0F 2b c2 - ROR4 bx
    /*TODO*///			ModRM = FETCH;
    /*TODO*///			/*
    /*TODO*///			//tmp = GetRMWord(ModRM);
    /*TODO*///			if (ModRM >= 0xc0) {
    /*TODO*///				tmp=I.regs.w[Mod_RM.RM.w[ModRM]];
    /*TODO*///				nec_ICount-=29;
    /*TODO*///			}
    /*TODO*///			else {
    /*TODO*///				int old=nec_ICount;
    /*TODO*///				(*GetEA[ModRM])();;
    /*TODO*///				tmp=ReadWord(EA);
    /*TODO*///				nec_ICount=old-33;
    /*TODO*///			}
    /*TODO*///			tmp2 = (I.regs.b[AL] & 0xF)<<4;
    /*TODO*///			I.regs.b[AL] = (I.regs.b[AL] & 0xF0) | (tmp&0xF);
    /*TODO*///
    /*TODO*///			tmp = tmp2 | (tmp>>4);
    /*TODO*///			PutbackRMWord(ModRM,tmp);
    /*TODO*///			*/
    /*TODO*///			if (errorlog) fprintf(errorlog,"PC=%06x : ROR4 %02x\n",cpu_get_pc()-3,ModRM);
    /*TODO*///			break;
    /*TODO*///		case 0x2D : // 0Fh 2Dh <1111 1RRR>
    /*TODO*///			/* OPCODE BRKCS  -	 Break with Contex Switch
    /*TODO*///			   CPU:  NEC V25,V35,V25 Plus,V35 Plus,V25 Software Guard
    /*TODO*///			   Description:
    /*TODO*///
    /*TODO*///				Perform a High-Speed Software Interrupt with contex-switch to
    /*TODO*///				register bank indicated by the lower 3-bits of 'bank'.
    /*TODO*///
    /*TODO*///			Info:	NEC V25/V35/V25 Plus/V35 Plus Bank System
    /*TODO*///
    /*TODO*///				This Chips have	 8 32bytes register banks, which placed in
    /*TODO*///				Internal chip RAM by addresses:
    /*TODO*///				xxE00h..xxE1Fh Bank 0
    /*TODO*///				xxE20h..xxE3Fh Bank 1
    /*TODO*///				   .........
    /*TODO*///				xxEC0h..xxEDFh Bank 6
    /*TODO*///				xxEE0h..xxEFFh Bank 7
    /*TODO*///				xxF00h..xxFFFh Special Functions Register
    /*TODO*///				Where xx is Value of IDB register.
    /*TODO*///				IBD is Byte Register contained Internal data area base
    /*TODO*///				IBD addresses is FFFFFh and xxFFFh where xx is data in IBD.
    /*TODO*///
    /*TODO*///				Format of Bank:
    /*TODO*///				+0	Reserved
    /*TODO*///				+2	Vector PC
    /*TODO*///				+4	Save   PSW
    /*TODO*///				+6	Save   PC
    /*TODO*///				+8	DS0		;DS
    /*TODO*///				+A	SS		;SS
    /*TODO*///				+C	PS		;CS
    /*TODO*///				+E	DS1		;ES
    /*TODO*///				+10	IY		;IY
    /*TODO*///				+11	IX		;IX
    /*TODO*///				+14	BP		;BP
    /*TODO*///				+16	SP		;SP
    /*TODO*///				+18	BW		;BW
    /*TODO*///				+1A	DW		;DW
    /*TODO*///				+1C	CW		;CW
    /*TODO*///				+1E	AW		;AW
    /*TODO*///
    /*TODO*///				Format of V25 etc. PSW (FLAGS):
    /*TODO*///				Bit	Description
    /*TODO*///				15	1
    /*TODO*///				14	RB2 \
    /*TODO*///				13	RB1  >	Current Bank Number
    /*TODO*///				12	RB0 /
    /*TODO*///				11	V	;OF
    /*TODO*///				10	IYR	;DF
    /*TODO*///				9	IE	;IF
    /*TODO*///				8	BRK	;TF
    /*TODO*///				7	S	;SF
    /*TODO*///				6	Z	;ZF
    /*TODO*///				5	F1	General Purpose user flag #1
    /*TODO*///						(accessed by Flag Special Function Register)
    /*TODO*///				4	AC	;AF
    /*TODO*///				3	F0	General purpose user flag #0
    /*TODO*///						(accessed by Flag Special Function Register)
    /*TODO*///				2	P	;PF
    /*TODO*///				1	BRKI	I/O Trap Enable Flag
    /*TODO*///				0	CY	;CF
    /*TODO*///
    /*TODO*///			Flags Affected:	 None
    /*TODO*///			*/
    /*TODO*///			ModRM = FETCH;
    /*TODO*///			if (errorlog) fprintf(errorlog,"PC=%06x : BRKCS %02x\n",cpu_get_pc()-3,ModRM);
    /*TODO*///			nec_ICount-=15;// checked !
    /*TODO*///			break;
    /*TODO*///
    /*TODO*///		case 0x31: // 0F 31 [mod:reg:r/m] - INS reg8,reg8 or INS reg8,imm4
    /*TODO*///
    /*TODO*///			ModRM = FETCH;
    /*TODO*///			if (errorlog) fprintf(errorlog,"PC=%06x : INS ",cpu_get_pc()-2);
    /*TODO*///		   	if (ModRM >= 0xc0) {
    /*TODO*///		    	tmp=I.regs.b[Mod_RM.RM.b[ModRM]];
    /*TODO*///		        if (errorlog) fprintf(errorlog,"ModRM=%04x \n",ModRM);
    /*TODO*///		    	nec_ICount-=29;
    /*TODO*///		    }
    /*TODO*///		    else {
    /*TODO*///		    	int old=nec_ICount;
    /*TODO*///		    	(*GetEA[ModRM])();;
    /*TODO*///		    	tmp=ReadByte(EA);
    /*TODO*///		    	if (errorlog) fprintf(errorlog,"ModRM=%04x  Byte=%04x\n",EA,tmp);
    /*TODO*///   				nec_ICount=old-33;
    /*TODO*///   			}
    /*TODO*///
    /*TODO*///			// more to come
    /*TODO*///			//bfl=tmp2 & 0xf;		// bit field length
    /*TODO*///			//bfs=tmp & 0xf;		// bit field start (bit offset in DS:IX)
    /*TODO*///			//I.regs.b[AH] =0;	// AH =0
    /*TODO*///
    /*TODO*///			/*2do: the rest is silence....yet
    /*TODO*///			----------O-INS------------------------------------
    /*TODO*///			OPCODE INS  -  Insert Bit String
    /*TODO*///
    /*TODO*///			CPU: NEC/Sony  all V-series
    /*TODO*///			Type of Instruction: User
    /*TODO*///
    /*TODO*///			Instruction:  INS  start,len
    /*TODO*///
    /*TODO*///			Description:
    /*TODO*///
    /*TODO*///				  BitField [	     BASE =  ES:IY
    /*TODO*///					 START BIT OFFSET =  start
    /*TODO*///						   LENGTH =  len
    /*TODO*///						 ]   <-	 AW [ bits= (len-1)..0]
    /*TODO*///
    /*TODO*///			Note:	di and start automatically UPDATE
    /*TODO*///			Note:	Alternative Name of this instruction is NECINS
    /*TODO*///
    /*TODO*///			Flags Affected: None
    /*TODO*///
    /*TODO*///			CPU mode: RM
    /*TODO*///
    /*TODO*///			+++++++++++++++++++++++
    /*TODO*///			Physical Form		 : INS	reg8,reg8
    /*TODO*///			COP (Code of Operation)	 : 0FH 31H  PostByte
    /*TODO*///			*/
    /*TODO*///
    /*TODO*///			//nec_ICount-=31; /* 31 -117 clocks ....*/
    /*TODO*///			break;
    /*TODO*///		case 0x33: // 0F 33 [mod:reg:r/m] - EXT reg8,reg8 or EXT reg8,imm4
    /*TODO*///
    /*TODO*///			ModRM = FETCH;
    /*TODO*///			if (errorlog) fprintf(errorlog,"PC=%06x : EXT ",cpu_get_pc()-2);
    /*TODO*///		   	if (ModRM >= 0xc0) {
    /*TODO*///		    	tmp=I.regs.b[Mod_RM.RM.b[ModRM]];
    /*TODO*///		        if (errorlog) fprintf(errorlog,"ModRM=%04x \n",ModRM);
    /*TODO*///		    	nec_ICount-=29;
    /*TODO*///		    }
    /*TODO*///		    else {
    /*TODO*///		    	int old=nec_ICount;
    /*TODO*///		    	(*GetEA[ModRM])();;
    /*TODO*///		    	tmp=ReadByte(EA);
    /*TODO*///		    	if (errorlog) fprintf(errorlog,"ModRM=%04x  Byte=%04x\n",EA,tmp);
    /*TODO*///   				nec_ICount=old-33;
    /*TODO*///   			}
    /*TODO*///			/*2do: the rest is silence....yet */
    /*TODO*///			//bfl=tmp2 & 0xf;		// bit field length
    /*TODO*///			//bfs=tmp & 0xf;		// bit field start (bit offset in DS:IX)
    /*TODO*///			//I.regs.b[AH] =0;	// AH =0
    /*TODO*///
    /*TODO*///			/*
    /*TODO*///
    /*TODO*///			----------O-EXT------------------------------------
    /*TODO*///			OPCODE EXT  -  Extract Bit Field
    /*TODO*///
    /*TODO*///			CPU: NEC/Sony all  V-series
    /*TODO*///			Type of Instruction: User
    /*TODO*///
    /*TODO*///			Instruction:  EXT  start,len
    /*TODO*///
    /*TODO*///			Description:
    /*TODO*///
    /*TODO*///				  AW <- BitField [
    /*TODO*///						     BASE =  DS:IX
    /*TODO*///					 START BIT OFFSET =  start
    /*TODO*///						   LENGTH =  len
    /*TODO*///						 ];
    /*TODO*///
    /*TODO*///			Note:	si and start automatically UPDATE
    /*TODO*///
    /*TODO*///			Flags Affected: None
    /*TODO*///
    /*TODO*///			CPU mode: RM
    /*TODO*///
    /*TODO*///			+++++++++++++++++++++++
    /*TODO*///			Physical Form		 : EXT	reg8,reg8
    /*TODO*///			COP (Code of Operation)	 : 0FH 33H  PostByte
    /*TODO*///
    /*TODO*///			Clocks:		EXT  reg8,reg8
    /*TODO*///			NEC V20:	26-55
    /*TODO*///			*/
    /*TODO*///
    /*TODO*///			//NEC_ICount-=26; /* 26 -55 clocks ....*/
    /*TODO*///			break;
    /*TODO*///		case 0x91:
    /*TODO*///			/*
    /*TODO*///			----------O-RETRBI---------------------------------
    /*TODO*///			OPCODE RETRBI	 -  Return from Register Bank Context
    /*TODO*///				     Switch  Interrupt.
    /*TODO*///
    /*TODO*///			CPU:  NEC V25,V35,V25 Plus,V35 Plus,V25 Software Guard
    /*TODO*///			Type of Instruction: System
    /*TODO*///
    /*TODO*///			Instruction:  RETRBI
    /*TODO*///
    /*TODO*///			Description:
    /*TODO*///
    /*TODO*///				PC  <- Save PC;
    /*TODO*///				PSW <- Save PSW;
    /*TODO*///
    /*TODO*///			Flags Affected:	 All
    /*TODO*///
    /*TODO*///			CPU mode: RM
    /*TODO*///
    /*TODO*///			+++++++++++++++++++++++
    /*TODO*///			Physical Form:	RETRBI
    /*TODO*///			COP (Code of Operation)	 : 0Fh 91h
    /*TODO*///
    /*TODO*///			Clocks:	 12
    /*TODO*///			*/
    /*TODO*///			if (errorlog) fprintf(errorlog,"PC=%06x : RETRBI\n",cpu_get_pc()-2);
    /*TODO*///			nec_ICount-=12;
    /*TODO*///			break;
    /*TODO*///
    /*TODO*///		case 0x94:
    /*TODO*///			/*
    /*TODO*///			----------O-TSKSW----------------------------------
    /*TODO*///			OPCODE TSKSW  -	  Task Switch
    /*TODO*///
    /*TODO*///			CPU:  NEC V25,V35,V25 Plus,V35 Plus,V25 Software Guard
    /*TODO*///			Type of Instruction: System
    /*TODO*///
    /*TODO*///			Instruction:  TSKSW   reg16
    /*TODO*///
    /*TODO*///			Description:  Perform a High-Speed task switch to the register bank indicated
    /*TODO*///				      by lower 3 bits of reg16. The PC and PSW are saved in the old
    /*TODO*///				      banks. PC and PSW save Registers and the new PC and PSW values
    /*TODO*///				      are retrived from the new register bank's save area.
    /*TODO*///
    /*TODO*///			Note:	     See BRKCS instruction for more Info about banks.
    /*TODO*///
    /*TODO*///			Flags Affected:	 All
    /*TODO*///
    /*TODO*///			CPU mode: RM
    /*TODO*///
    /*TODO*///			+++++++++++++++++++++++
    /*TODO*///			Physical Form:	TSCSW reg16
    /*TODO*///			COP (Code of Operation)	 : 0Fh 94h <1111 1RRR>
    /*TODO*///
    /*TODO*///			Clocks:	 11
    /*TODO*///			*/
    /*TODO*///			ModRM = FETCH;
    /*TODO*///
    /*TODO*///			if (errorlog) fprintf(errorlog,"PC=%06x : TSCSW %02x\n",cpu_get_pc()-3,ModRM);
    /*TODO*///			nec_ICount-=11;
    /*TODO*///			break;
    /*TODO*///		case 0x95:
    /*TODO*///			/*
    /*TODO*///			----------O-MOVSPB---------------------------------
    /*TODO*///			OPCODE MOVSPB	 -  Move Stack Pointer Before Bamk Switching
    /*TODO*///
    /*TODO*///			CPU:  NEC V25,V35,V25 Plus,V35 Plus,V25 Software Guard
    /*TODO*///			Type of Instruction: System
    /*TODO*///
    /*TODO*///			Instruction:  MOVSPB  Number_of_bank
    /*TODO*///
    /*TODO*///			Description:  The MOVSPB instruction transfers the current SP and SS before
    /*TODO*///				      the bank switching to new register bank.
    /*TODO*///
    /*TODO*///			Note:	      New Register Bank Number indicated by lower 3bit of Number_of_
    /*TODO*///				      _bank.
    /*TODO*///
    /*TODO*///			Note:	      See BRKCS instruction for more info about banks.
    /*TODO*///
    /*TODO*///			Flags Affected:	 None
    /*TODO*///
    /*TODO*///			CPU mode: RM
    /*TODO*///
    /*TODO*///			+++++++++++++++++++++++
    /*TODO*///			Physical Form:	MOVSPB	  reg16
    /*TODO*///			COP (Code of Operation)	 : 0Fh 95h <1111 1RRR>
    /*TODO*///
    /*TODO*///			Clocks:	 11
    /*TODO*///			*/
    /*TODO*///			ModRM = FETCH;
    /*TODO*///			if (errorlog) fprintf(errorlog,"PC=%06x : MOVSPB %02x\n",cpu_get_pc()-3,ModRM);
    /*TODO*///			nec_ICount-=11;
    /*TODO*///			break;
    /*TODO*///		case 0xbe:
    /*TODO*///			/*
    /*TODO*///			----------O-STOP-----------------------------------
    /*TODO*///			OPCODE STOP    -  Stop CPU
    /*TODO*///
    /*TODO*///			CPU:  NEC V25,V35,V25 Plus,V35 Plus,V25 Software Guard
    /*TODO*///			Type of Instruction: System
    /*TODO*///
    /*TODO*///			Instruction:  STOP
    /*TODO*///
    /*TODO*///			Description:
    /*TODO*///					PowerDown instruction, Stop Oscillator,
    /*TODO*///					Halt CPU.
    /*TODO*///
    /*TODO*///			Flags Affected:	 None
    /*TODO*///
    /*TODO*///			CPU mode: RM
    /*TODO*///
    /*TODO*///			+++++++++++++++++++++++
    /*TODO*///			Physical Form:	STOP
    /*TODO*///			COP (Code of Operation)	 : 0Fh BEh
    /*TODO*///
    /*TODO*///			Clocks:	 N/A
    /*TODO*///			*/
    /*TODO*///			if (errorlog) fprintf(errorlog,"PC=%06x : STOP\n",cpu_get_pc()-2);
    /*TODO*///			nec_ICount-=2; /* of course this is crap */
    /*TODO*///			break;
    /*TODO*///		case 0xe0:
    /*TODO*///			/*
    /*TODO*///			----------O-BRKXA----------------------------------
    /*TODO*///			OPCODE BRKXA   -  Break to Expansion Address
    /*TODO*///
    /*TODO*///			CPU:  NEC V33/V53  only
    /*TODO*///			Type of Instruction: System
    /*TODO*///
    /*TODO*///			Instruction:  BRKXA int_vector
    /*TODO*///
    /*TODO*///			Description:
    /*TODO*///				     [sp-1,sp-2] <- PSW		; PSW EQU FLAGS
    /*TODO*///				     [sp-3,sp-4] <- PS		; PS  EQU CS
    /*TODO*///				     [sp-5,sp-6] <- PC		; PC  EQU IP
    /*TODO*///				     SP	 <-  SP -6
    /*TODO*///				     IE	 <-  0
    /*TODO*///				     BRK <-  0
    /*TODO*///				     MD	 <-  0
    /*TODO*///				     PC	 <- [int_vector*4 +0,+1]
    /*TODO*///				     PS	 <- [int_vector*4 +2,+3]
    /*TODO*///				     Enter Expansion Address Mode.
    /*TODO*///
    /*TODO*///			Note:	In NEC V53 Memory Space dividing into 1024 16K pages.
    /*TODO*///				The programming model is Same as in Normal mode.
    /*TODO*///
    /*TODO*///				Mechanism is:
    /*TODO*///				20 bit Logical Address:	 19..14 Page Num  13..0 Offset
    /*TODO*///
    /*TODO*///				page Num convertin by internal table to 23..14 Page Base
    /*TODO*///				tHE pHYIXCAL ADDRESS is both Base and Offset.
    /*TODO*///
    /*TODO*///				Address Expansion Registers:
    /*TODO*///				logical Address A19..A14	I/O Address
    /*TODO*///				0				FF00h
    /*TODO*///				1				FF02h
    /*TODO*///				...				...
    /*TODO*///				63				FF7Eh
    /*TODO*///
    /*TODO*///				Register XAM aliased with port # FF80h indicated current mode
    /*TODO*///				of operation.
    /*TODO*///				Format of XAM register (READ ONLY):
    /*TODO*///				15..1	reserved
    /*TODO*///				0	XA Flag, if=1 then in XA mode.
    /*TODO*///
    /*TODO*///			Format	of  V53 PSW:
    /*TODO*///				15..12	1
    /*TODO*///				11	V
    /*TODO*///				10	IYR
    /*TODO*///				9	IE
    /*TODO*///				8	BRK
    /*TODO*///				7	S
    /*TODO*///				6	Z
    /*TODO*///				5	0
    /*TODO*///				4	AC
    /*TODO*///				3	0
    /*TODO*///				2	P
    /*TODO*///				1	1
    /*TODO*///				0	CY
    /*TODO*///
    /*TODO*///			Flags Affected:	 None
    /*TODO*///
    /*TODO*///			CPU mode: RM
    /*TODO*///
    /*TODO*///			+++++++++++++++++++++++
    /*TODO*///			Physical Form:	BRKXA  imm8
    /*TODO*///			COP (Code of Operation)	 : 0Fh E0h imm8
    /*TODO*///			*/
    /*TODO*///
    /*TODO*///			ModRM = FETCH;
    /*TODO*///			if (errorlog) fprintf(errorlog,"PC=%06x : BRKXA %02x\n",cpu_get_pc()-3,ModRM);
    /*TODO*///			nec_ICount-=12;
    /*TODO*///			break;
    /*TODO*///		case 0xf0:
    /*TODO*///			/*
    /*TODO*///			----------O-RETXA----------------------------------
    /*TODO*///			OPCODE RETXA   -  Return from  Expansion Address
    /*TODO*///
    /*TODO*///			CPU:  NEC V33/V53 only
    /*TODO*///			Type of Instruction: System
    /*TODO*///
    /*TODO*///			Instruction:  RETXA int_vector
    /*TODO*///
    /*TODO*///			Description:
    /*TODO*///				     [sp-1,sp-2] <- PSW		; PSW EQU FLAGS
    /*TODO*///				     [sp-3,sp-4] <- PS		; PS  EQU CS
    /*TODO*///				     [sp-5,sp-6] <- PC		; PC  EQU IP
    /*TODO*///				     SP	 <-  SP -6
    /*TODO*///				     IE	 <-  0
    /*TODO*///				     BRK <-  0
    /*TODO*///				     MD	 <-  0
    /*TODO*///				     PC	 <- [int_vector*4 +0,+1]
    /*TODO*///				     PS	 <- [int_vector*4 +2,+3]
    /*TODO*///				     Disable EA mode.
    /*TODO*///
    /*TODO*///			Flags Affected:	 None
    /*TODO*///
    /*TODO*///			CPU mode: RM
    /*TODO*///
    /*TODO*///			+++++++++++++++++++++++
    /*TODO*///			Physical Form:	RETXA  imm8
    /*TODO*///			COP (Code of Operation)	 : 0Fh F0h imm8
    /*TODO*///
    /*TODO*///			Clocks:	 12
    /*TODO*///			*/
    /*TODO*///			ModRM = FETCH;
    /*TODO*///			if (errorlog) fprintf(errorlog,"PC=%06x : RETXA %02x\n",cpu_get_pc()-3,ModRM);
    /*TODO*///			nec_ICount-=12;
    /*TODO*///			break;
    /*TODO*///		case 0xff: /* 0F ff imm8 - BRKEM */
    /*TODO*///			/*
    /*TODO*///			OPCODE BRKEM  -	 Break for Emulation
    /*TODO*///
    /*TODO*///			CPU: NEC/Sony V20/V30/V40/V50
    /*TODO*///			Description:
    /*TODO*///
    /*TODO*///					PUSH	FLAGS
    /*TODO*///					PUSH	CS
    /*TODO*///					PUSH	IP
    /*TODO*///					MOV	CS,0:[intnum*4+2]
    /*TODO*///					MOV	IP,0:[intnum*4]
    /*TODO*///					MD <- 0;	// Enable 8080 emulation
    /*TODO*///
    /*TODO*///			Note:	BRKEM instruction do software interrupt and then New CS,IP loaded
    /*TODO*///				it switch to 8080 mode i.e. CPU will execute 8080 code.
    /*TODO*///				Mapping Table of Registers in 8080 Mode
    /*TODO*///				8080 Md.   A  B	 C  D  E  H  L	SP PC  F
    /*TODO*///				native.	   AL CH CL DH DL BH BL BP IP  FLAGS(low)
    /*TODO*///				For Return of 8080 mode use CALLN instruction.
    /*TODO*///			Note:	I.e. 8080 addressing only 64KB then "Real Address" is CS*16+PC
    /*TODO*///
    /*TODO*///			Flags Affected: MD
    /*TODO*///			*/
    /*TODO*///			ModRM=FETCH;
    /*TODO*///			nec_ICount-=38;
    /*TODO*///			if (errorlog) fprintf(errorlog,"PC=%06x : BRKEM %02x\n",cpu_get_pc()-3,ModRM);
    /*TODO*///			nec_interrupt(ModRM,1);
    /*TODO*///			break;
                default:
                    System.out.println("i_pre_nec 0x" + Integer.toHexString(Opcode));
                    break;
            }
        }