public void handler() {
            int ModRM = FETCH();
            int tmp = GetRMWord(ModRM);
            int tmp2;

            switch (ModRM & 0x38) {
                case 0x00:  /* TEST Ew, data16 */

                case 0x08:  /* ??? */

                    tmp2 = FETCH();
                    tmp2 += FETCH() << 8;

                    tmp &= tmp2;

                    I.CarryVal = I.OverVal = I.AuxVal = 0;
                    SetSZPF_Word(tmp);
                    nec_ICount[0] -= (ModRM >= 0xc0) ? 4 : 15;
                    if (neclog != null) {
                        fprintf(neclog, "i_f7pre 0x00 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                case 0x10:  /* NOT Ew */

                    tmp = ~tmp;
                    PutbackRMWord(ModRM, tmp & 0xFFFF);
                    nec_ICount[0] -= (ModRM >= 0xc0) ? 2 : 24;
                    if (neclog != null) {
                        fprintf(neclog, "i_f7pre 0x10 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;

                case 0x18:  /* NEG Ew */

                    tmp2 = 0;
                    //SUBW(tmp2,tmp);
                    int res = tmp2 - tmp;
                    SetCFW(res);
                    SetOFW_Sub(res, tmp, tmp2);
                    SetAF(res, tmp, tmp2);
                    SetSZPF_Word(res);
                    tmp2 = res & 0xFFFF;
                    PutbackRMWord(ModRM, tmp2);
                    nec_ICount[0] -= (ModRM >= 0xc0) ? 2 : 24;
                    if (neclog != null) {
                        fprintf(neclog, "i_f7pre 0x18 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                case 0x20: /* MUL AW, Ew */ {
                    /*UINT32*/
                    int result;
                    tmp2 = I.regs.w[AW];

                    SetSF((short) tmp2);
                    SetPF(tmp2);

                    result = /*(UINT32)*/ tmp2 * tmp;
                    I.regs.SetW(AW, result & 0xFFFF);
                    result >>>= 16; //unsigned shift??
                    I.regs.SetW(DW, result & 0xFFFF);

                    SetZF(I.regs.w[AW] | I.regs.w[DW]);
                    I.CarryVal = I.OverVal = BOOL(I.regs.w[DW] != 0);
                }
                nec_ICount[0] -= (ModRM >= 0xc0) ? 30 : 36;
                if (neclog != null) {
                    fprintf(neclog, "i_f7pre 0x20 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                }
                break;

                case 0x28:  /* IMUL AW, Ew */

                    nec_ICount[0] -= 150;
                     {
                        int result;

                        tmp2 = I.regs.w[AW];

                        SetSF((short) tmp2);
                        SetPF(tmp2);

                        result = (int) ((short) tmp2) * (int) ((short) tmp);
                        I.CarryVal = I.OverVal = BOOL((result >> 15 != 0) && (result >> 15 != -1));

                        I.regs.SetW(AW, result & 0xFFFF);
                        result = (result >> 16) & 0xFFFF;
                        I.regs.SetW(DW, result & 0xFFFF);

                        SetZF(I.regs.w[AW] | I.regs.w[DW]);
                    }
                    nec_ICount[0] -= (ModRM >= 0xc0) ? 34 : 44;
                    if (neclog != null) {
                        fprintf(neclog, "i_f7pre 0x28 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                case 0x30: /* IYV AW, Ew */ {
                    /*UINT32*/ int result;

                    result = ((/*(UINT32)*/I.regs.w[DW]) << 16) | I.regs.w[AW];

                    if (tmp != 0) {
                        tmp2 = result % tmp;
                        if ((result /= tmp) > 0xffff) {
                            nec_interrupt(0, 0);
                            break;
                        } else {
                            I.regs.SetW(AW, result & 0xFFFF);
                            I.regs.SetW(DW, tmp2 & 0xFFFF);
                        }
                    } else {
                        nec_interrupt(0, 0);
                        break;
                    }
                }
                nec_ICount[0] -= (ModRM >= 0xc0) ? 25 : 35;
                if (neclog != null) {
                    fprintf(neclog, "i_f7pre 0x30 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                }
                break;
                case 0x38: /* IIYV AW, Ew */ {
                    int result;

                    result = (/*(UINT32)*/I.regs.w[DW] << 16) + I.regs.w[AW];

                    if (tmp != 0) {
                        tmp2 = result % (int) ((short) tmp);
                        if ((result /= (int) ((short) tmp)) > 0xffff) {
                            nec_interrupt(0, 0);
                            break;
                        } else {
                            I.regs.SetW(AW, result & 0xFFFF);
                            I.regs.SetW(DW, tmp2 & 0xFFFF);
                        }
                    } else {
                        nec_interrupt(0, 0);
                        break;
                    }
                }
                nec_ICount[0] -= (ModRM >= 0xc0) ? 43 : 53;
                if (neclog != null) {
                    fprintf(neclog, "i_f7pre 0x38 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                }
                break;
                default:
                    System.out.println("i_f7pre 0x" + Integer.toHexString(ModRM & 0x38));
                    break;
            }
        }