public void handler() {
            int tmp;
            I.regs.SetW(IY, POP());
            I.regs.SetW(IX, POP());
            I.regs.SetW(BP, POP());
            tmp = POP();
            I.regs.SetW(BW, POP());
            I.regs.SetW(DW, POP());
            I.regs.SetW(CW, POP());
            I.regs.SetW(AW, POP());
            nec_ICount[0] -= 59;
            if (neclog != null) {
                fprintf(neclog, "i_popa :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
            }
        }
    };

    /*TODO*///static void i_bound(void)    /* Opcode 0x62  BOUND or CHKIND (on NEC)*/
    /*TODO*///{
    /*TODO*///	unsigned ModRM = FETCH;
    /*TODO*///    int low = (INT16)GetRMWord(ModRM);
    /*TODO*///    int high= (INT16)GetnextRMWord;
    /*TODO*///    int tmp= (INT16)RegWord(ModRM);
    /*TODO*///    if (tmp<low || tmp>high) {
    /*TODO*///		/* OB: on NECs CS:IP points to instruction
    /*TODO*///		       FOLLOWING the BOUND instruction ! */
    /*TODO*///		// I.ip-=2;
    /*TODO*///		nec_interrupt(5,0);
    /*TODO*///    }
    /*TODO*/// 	nec_ICount-=20;
    /*TODO*///}
    /*TODO*///
    /*TODO*///static void i_brkn(void)	/* Opcode 0x63 BRKN -  Break to Native Mode */
    /*TODO*///{
    /*TODO*///	/*
    /*TODO*///	CPU:  NEC (V25/V35) Software Guard only
    /*TODO*///	Instruction:  BRKN int_vector
    /*TODO*///
    /*TODO*///	Description:
    /*TODO*///		     [sp-1,sp-2] <- PSW		; PSW EQU FLAGS
    /*TODO*///		     [sp-3,sp-4] <- PS		; PS  EQU CS
    /*TODO*///		     [sp-5,sp-6] <- PC		; PC  EQU IP
    /*TODO*///		     SP	 <-  SP -6
    /*TODO*///		     IE	 <-  0
    /*TODO*///		     BRK <-  0
    /*TODO*///		     MD	 <-  1
    /*TODO*///		     PC	 <- [int_vector*4 +0,+1]
    /*TODO*///		     PS	 <- [int_vector*4 +2,+3]
    /*TODO*///
    /*TODO*///	Note:	The BRKN instruction switches operations in Native Mode
    /*TODO*///		from Security Mode via Interrupt call. In Normal Mode
    /*TODO*///		Instruction executed as	 mPD70320/70322 (V25) operation mode.
    /*TODO*///
    /*TODO*///	Flags Affected:	 None
    /*TODO*///
    /*TODO*///	CPU mode: RM
    /*TODO*///
    /*TODO*///	+++++++++++++++++++++++
    /*TODO*///	Physical Form:	BRKN  imm8
    /*TODO*///	COP (Code of Operation)	 : 63h imm8
    /*TODO*///
    /*TODO*///	Clocks:	 56+10T [44+10T]
    /*TODO*///	*/
    /*TODO*///	//nec_ICount-=56;
    /*TODO*///	unsigned int_vector;
    /*TODO*///	int_vector = FETCH;
    /*TODO*///	if (errorlog) fprintf(errorlog,"PC=%06x : BRKN %02x\n",cpu_get_pc()-2,int_vector);
    /*TODO*///}
    /*TODO*///
    /*TODO*///
    /*TODO*///
    /*TODO*///static void repc(int flagval)
    /*TODO*///{
    /*TODO*///    /* Handles repc- and repnc- prefixes. flagval is the value of ZF for the
    /*TODO*///       loop  to continue for CMPS and SCAS instructions. */
    /*TODO*///
    /*TODO*///	unsigned next = FETCHOP;
    /*TODO*///	unsigned count = I.regs.w[CW];
    /*TODO*///
    /*TODO*///    switch(next)
    /*TODO*///    {
    /*TODO*///    case 0x26:  /* ES: */
    /*TODO*///        I.seg_prefix=TRUE;
    /*TODO*///		I.prefix_base=I.base[ES];
    /*TODO*///		nec_ICount-=2;
    /*TODO*///		repc(flagval);
    /*TODO*///		break;
    /*TODO*///    case 0x2e:  /* CS: */
    /*TODO*///        I.seg_prefix=TRUE;
    /*TODO*///		I.prefix_base=I.base[CS];
    /*TODO*///		nec_ICount-=2;
    /*TODO*///		repc(flagval);
    /*TODO*///		break;
    /*TODO*///    case 0x36:  /* SS: */
    /*TODO*///        I.seg_prefix=TRUE;
    /*TODO*///		I.prefix_base=I.base[SS];
    /*TODO*///		nec_ICount-=2;
    /*TODO*///		repc(flagval);
    /*TODO*///		break;
    /*TODO*///    case 0x3e:  /* DS: */
    /*TODO*///        I.seg_prefix=TRUE;
    /*TODO*///		I.prefix_base=I.base[DS];
    /*TODO*///		nec_ICount-=2;
    /*TODO*///		repc(flagval);
    /*TODO*///		break;
    /*TODO*///    case 0x6c:  /* REP INSB */
    /*TODO*///		nec_ICount-=9-count;
    /*TODO*///		for (; (CF==flagval)&&(count > 0); count--)
    /*TODO*///           i_insb();
    /*TODO*///		I.regs.w[CW]=count;
    /*TODO*///		break;
    /*TODO*///    case 0x6d:  /* REP INSW */
    /*TODO*///		nec_ICount-=9-count;
    /*TODO*///		for (;(CF==flagval)&&(count > 0); count--)
    /*TODO*///           i_insw();
    /*TODO*///		I.regs.w[CW]=count;
    /*TODO*///		break;
    /*TODO*///    case 0x6e:  /* REP OUTSB */
    /*TODO*///		nec_ICount-=9-count;
    /*TODO*///		for (;(CF==flagval)&&(count > 0); count--)
    /*TODO*///            i_outsb();
    /*TODO*///		I.regs.w[CW]=count;
    /*TODO*///		break;
    /*TODO*///    case 0x6f:  /* REP OUTSW */
    /*TODO*///		nec_ICount-=9-count;
    /*TODO*///		for (; (CF==flagval)&&(count > 0); count--)
    /*TODO*///            i_outsw();
    /*TODO*///		I.regs.w[CW]=count;
    /*TODO*///		break;
    /*TODO*///    case 0xa4:  /* REP MOVSB */
    /*TODO*///		nec_ICount-=9-count;
    /*TODO*///		for (;(CF==flagval)&&(count > 0); count--)
    /*TODO*///			i_movsb();
    /*TODO*///		I.regs.w[CW]=count;
    /*TODO*///		break;
    /*TODO*///    case 0xa5:  /* REP MOVSW */
    /*TODO*///		nec_ICount-=9-count;
    /*TODO*///		for (;(CF==flagval)&&(count > 0); count--)
    /*TODO*///			i_movsw();
    /*TODO*///		I.regs.w[CW]=count;
    /*TODO*///		break;
    /*TODO*///    case 0xa6:  /* REP(N)E CMPSB */
    /*TODO*///		nec_ICount-=9;
    /*TODO*///		for (I.ZeroVal = !flagval; (ZF == flagval) && (CF==flagval)&&(count > 0); count--)
    /*TODO*///			i_cmpsb();
    /*TODO*///		I.regs.w[CW]=count;
    /*TODO*///		break;
    /*TODO*///    case 0xa7:  /* REP(N)E CMPSW */
    /*TODO*///		nec_ICount-=9;
    /*TODO*///		for (I.ZeroVal = !flagval; (ZF == flagval) && (CF==flagval)&&(count > 0); count--)
    /*TODO*///			i_cmpsw();
    /*TODO*///		I.regs.w[CW]=count;
    /*TODO*///		break;
    /*TODO*///    case 0xaa:  /* REP STOSB */
    /*TODO*///		nec_ICount-=9-count;
    /*TODO*///		for (;(CF==flagval)&&(count > 0); count--)
    /*TODO*///			i_stosb();
    /*TODO*///		I.regs.w[CW]=count;
    /*TODO*///		break;
    /*TODO*///    case 0xab:  /* REP STOSW */
    /*TODO*///		nec_ICount-=9-count;
    /*TODO*///		for (;(CF==flagval)&&(count > 0); count--)
    /*TODO*///			i_stosw();
    /*TODO*///		I.regs.w[CW]=count;
    /*TODO*///		break;
    /*TODO*///    case 0xac:  /* REP LODSB */
    /*TODO*///		nec_ICount-=9;
    /*TODO*///		for (;(CF==flagval)&&(count > 0); count--)
    /*TODO*///			i_lodsb();
    /*TODO*///		I.regs.w[CW]=count;
    /*TODO*///		break;
    /*TODO*///    case 0xad:  /* REP LODSW */
    /*TODO*///		nec_ICount-=9;
    /*TODO*///		for (;(CF==flagval)&&(count > 0); count--)
    /*TODO*///			i_lodsw();
    /*TODO*///		I.regs.w[CW]=count;
    /*TODO*///		break;
    /*TODO*///    case 0xae:  /* REP(N)E SCASB */
    /*TODO*///		nec_ICount-=9;
    /*TODO*///		for (I.ZeroVal = !flagval; (ZF == flagval) && (CF==flagval)&&(count > 0); count--)
    /*TODO*///			i_scasb();
    /*TODO*///		I.regs.w[CW]=count;
    /*TODO*///		break;
    /*TODO*///    case 0xaf:  /* REP(N)E SCASW */
    /*TODO*///		nec_ICount-=9;
    /*TODO*///		for (I.ZeroVal = !flagval; (ZF == flagval) && (CF==flagval)&&(count > 0); count--)
    /*TODO*///			i_scasw();
    /*TODO*///		I.regs.w[CW]=count;
    /*TODO*///		break;
    /*TODO*///    default:
    /*TODO*///		nec_instruction[next]();
    /*TODO*///    }
    /*TODO*///}
    /*TODO*///
    /*TODO*///static void i_repnc(void)    /* Opcode 0x64 */
    /*TODO*///{
    /*TODO*///    repc(0);
    /*TODO*///}