public static void nec_rotate_shift_Word(int ModRM, int count) {
        int src = GetRMWord(ModRM);
        int dst = src;

        if (count < 0) /* FETCH must come _after_ GetRMWord */ {
            count = FETCH();
        }

        if (count == 0) {
            nec_ICount[0] -= 8; /* or 7 if dest is in memory */

        } else if (count == 1) {
            nec_ICount[0] -= (ModRM >= 0xc0) ? 2 : 24;
            switch (ModRM & 0x38) {
                case 0x00:  /* ROL ew,1 */

                    I.CarryVal = src & 0x8000;
                    dst = (src << 1) + CF();
                    PutbackRMWord(ModRM, dst & 0xFFFF);//unsigned?
                    I.OverVal = (src ^ dst) & 0x8000;
                    if (neclog != null) {
                        fprintf(neclog, "nec_rotate_shift_Word1_0x00 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                case 0x08:  /* ROR ew,1 */

                    I.CarryVal = src & 0x01;
                    dst = ((CF() << 16) + src) >>> 1;//unsigned shift?
                    PutbackRMWord(ModRM, dst & 0xFFFF);//unsigned?
                    I.OverVal = (src ^ dst) & 0x8000;
                    if (neclog != null) {
                        fprintf(neclog, "nec_rotate_shift_Word1_0x08 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                case 0x10:  /* RCL ew,1 */

                    dst = (src << 1) + CF();
                    PutbackRMWord(ModRM, dst & 0xFFFF);
                    SetCFW(dst);
                    I.OverVal = (src ^ dst) & 0x8000;
                    if (neclog != null) {
                        fprintf(neclog, "nec_rotate_shift_Word1_0x10 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                case 0x18:  /* RCR ew,1 */

                    dst = ((CF() << 16) + src) >> 1;
                    PutbackRMWord(ModRM, dst & 0xFFFF);
                    I.CarryVal = src & 0x01;
                    I.OverVal = (src ^ dst) & 0x8000;
                    if (neclog != null) {
                        fprintf(neclog, "nec_rotate_shift_Word1_0x18 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                case 0x20:  /* SHL ew,1 */

                case 0x30:
                    dst = src << 1;
                    PutbackRMWord(ModRM, dst);
                    SetCFW(dst);
                    I.OverVal = (src ^ dst) & 0x8000;
                    I.AuxVal = 1;
                    SetSZPF_Word(dst);
                    if (neclog != null) {
                        fprintf(neclog, "nec_rotate_shift_Word1_0x20 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                case 0x28:  /* SHR ew,1 */

                    dst = src >> 1;
                    PutbackRMWord(ModRM, dst);
                    I.CarryVal = src & 0x01;
                    I.OverVal = src & 0x8000;
                    I.AuxVal = 1;
                    SetSZPF_Word(dst);
                    if (neclog != null) {
                        fprintf(neclog, "nec_rotate_shift_Word1_0x28 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }

                    break;
                case 0x38:  /* SAR ew,1 */

                    dst = ((short) src) >> 1;
                    PutbackRMWord(ModRM, dst & 0xFFFF);
                    I.CarryVal = src & 0x01;
                    I.OverVal = 0;
                    I.AuxVal = 1;
                    SetSZPF_Word(dst);
                    if (neclog != null) {
                        fprintf(neclog, "nec_rotate_shift_Word1_0x38 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                default:
                    System.out.println("nec_rotate_shift_Word_1 0x" + Integer.toHexString(ModRM & 0x38));
                    break;
            }
        } else {

            nec_ICount[0] -= (ModRM >= 0xc0) ? 7 + count * 4 : 27 + count * 4;
            switch (ModRM & 0x38) {
                case 0x00:  /* ROL ew,count */

                    for (; count > 0; count--) {
                        I.CarryVal = dst & 0x8000;
                        dst = (dst << 1) + CF();
                    }
                    PutbackRMWord(ModRM, dst & 0xFFFF);
                    if (neclog != null) {
                        fprintf(neclog, "nec_rotate_shift_Word_0x00 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                case 0x08:  /* ROR ew,count */

                    for (; count > 0; count--) {
                        I.CarryVal = dst & 0x01;
                        dst = (dst >> 1) + (CF() << 15);
                    }
                    PutbackRMWord(ModRM, dst & 0xFFFF);
                    if (neclog != null) {
                        fprintf(neclog, "nec_rotate_shift_Word_0x08 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                /*TODO*///      case 0x10:  /* RCL ew,count */
    /*TODO*///	for (; count > 0; count--)
    /*TODO*///	{
    /*TODO*///          dst = (dst << 1) + CF;
    /*TODO*///          SetCFW(dst);
    /*TODO*///	}
    /*TODO*///        PutbackRMWord(ModRM,dst);
    /*TODO*///	break;
    /*TODO*///      case 0x18:  /* RCR ew,count */
    /*TODO*///	for (; count > 0; count--)
    /*TODO*///	{
    /*TODO*///          dst = dst + (CF << 16);
    /*TODO*///	  I.CarryVal = dst & 0x01;
    /*TODO*///           dst >>= 1;
    /*TODO*///	}
    /*TODO*///        PutbackRMWord(ModRM,dst);
    /*TODO*///	break;
                case 0x20:
                case 0x30:  /* SHL ew,count */

                    dst <<= count;
                    SetCFW(dst);
                    I.AuxVal = 1;
                    SetSZPF_Word(dst);
                    PutbackRMWord(ModRM, dst & 0xFFFF);//unsigned?
                    if (neclog != null) {
                        fprintf(neclog, "nec_rotate_shift_Word_0x20 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                case 0x28:  /* SHR ew,count */

                    dst >>>= count - 1; //unsigned??
                    I.CarryVal = dst & 0x1;
                    dst >>>= 1;  //unsigned??
                    SetSZPF_Word(dst);
                    I.AuxVal = 1;
                    PutbackRMWord(ModRM, dst & 0xFFFF);//unsigned?
                    if (neclog != null) {
                        fprintf(neclog, "nec_rotate_shift_Word_0x28 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                case 0x38:  /* SAR ew,count */

                    dst = ((short) dst) >> (count - 1);//unsigned?
                    I.CarryVal = dst & 0x01;
                    dst = ((short) (dst & 0xFFFF)) >> 1;//unsigned?
                    SetSZPF_Word(dst);
                    I.AuxVal = 1;
                    PutbackRMWord(ModRM, dst & 0xFFFF);
                    if (neclog != null) {
                        fprintf(neclog, "nec_rotate_shift_Word_0x38 :PC:%d,I.ip:%d,AW:%d,CW:%d,DW:%d,BW:%d,SP:%d,BP:%d,IX:%d,IY:%d,b1:%d,b2:%d,b3:%d,b4:%d,s1:%d,s2:%d,s3:%d,s4:%d,A:%d,O:%d,S:%d,Z:%d,C:%d,P:%d,T:%d,I:%d,D:%d,M:%d,v:%d,irq:%d,ns:%d,is:%d,pb:%d,pre:%d,EA:%d\n", cpu_get_pc(), I.ip, I.regs.w[AW], I.regs.w[CW], I.regs.w[DW], I.regs.w[BW], I.regs.w[SP], I.regs.w[BP], I.regs.w[IX], I.regs.w[IY], I.base[0], I.base[1], I.base[2], I.base[3], I.sregs[0], I.sregs[1], I.sregs[2], I.sregs[3], I.AuxVal, I.OverVal, I.SignVal, I.ZeroVal, I.CarryVal, I.ParityVal, I.TF, I.IF, I.DF, I.MF, I.int_vector, I.pending_irq, I.nmi_state, I.irq_state, I.prefix_base, I.seg_prefix, EA);
                    }
                    break;
                default:
                    System.out.println("nec_rotate_shift_Word 0x" + Integer.toHexString(ModRM & 0x38));
                    break;
            }
        }
    }