Shaoling Bai,Lin Yang,Katherina Haase,Jakob Wolansky,Zongbao Zhang,Hsin Tseng,Felix Talnack,Joshua Kress,Jonathan Perez Andrade,Johannes Benduhn,Ji Ma,Xinliang Feng,Mike Hambsch,Stefan C. B. Mannsfeld
Nanographene‐Based Heterojunctions for High‐Performance Organic Phototransistor Memory Devices
memory,nanographene,organic phototransistors,photosensitivity
Abstract Organic phototransistors can enable many important applications such as nonvolatile memory, artificial synapses, and photodetectors in next‐generation optical communication and wearable electronics. However, it is still a challenge to achieve a big memory window (threshold voltage response ∆V th) for phototransistors. Here, a nanographene‐based heterojunction phototransistor memory with large ∆V th responses is reported. Exposure to low intensity light (25.7 µW cm−2) for 1 s yields a memory window of 35 V, and the threshold voltage shift is found to be larger than 140 V under continuous light illumination. The device exhibits both good photosensitivity (3.6 × 105) and memory properties including long retention time (>1.5 × 105 s), large hysteresis (45.35 V), and high endurance for voltage‐erasing and light‐programming. These findings demonstrate the high application potential of nanographenes in the field of optoelectronics. In addition, the working principle of these hybrid nanographene‐organic structured heterojunction phototransistor memory devices is described which provides new insight into the design of high‐performance organic phototransistor devices.
Nanographene‐Based Heterojunctions for High‐Performance Organic Phototransistor Memory Devices

Organic phototransistors can enable many important applications such as nonvolatile memory, artificial synapses, and photodetectors in next‐generation optical communication and wearable electronics. However, it is still a challenge to achieve a big memory window (threshold voltage response ∆V th) for phototransistors. Here, a nanographene‐based heterojunction phototransistor memory with large ∆V th responses is reported. Exposure to low intensity light (25.7 µW cm−2) for 1 s yields a memory window of 35 V, and the threshold voltage shift is found to be larger than 140 V under continuous light illumination. The device exhibits both good photosensitivity (3.6 × 105) and memory properties including long retention time (>1.5 × 105 s), large hysteresis (45.35 V), and high endurance for voltage‐erasing and light‐programming. These findings demonstrate the high application potential of nanographenes in the field of optoelectronics. In addition, the working principle of these hybrid nanographene‐organic structured heterojunction phototransistor memory devices is described which provides new insight into the design of high‐performance organic phototransistor devices.

Organic semiconductors possess advantages such as being light‐weight, low‐cost, and mechanically flexible with potential application in wearable electronics.[ ] The use of organic field effect transistors as organic phototransistors (OPTs) has attracted considerable attention since such devices can be energy‐saving, have ultrafast transmission characteristics, and are promising candidates as elements in next‐generation communication electronics.[ , , , , ] Based on the volatility, OPTs can be categorized as photodetectors (sensor memory), artificial synapses (short‐term memory), and memory devices (long‐term memory).[ ] The latter ones have been considered as the most innovative products of the electronic community since they have a number of advantages such as nonvolatile storage, low‐power consumption, and high reliability.[ ] For OPT memory devices, the presence of charge trapping sites is desired. Organic electrets, inorganic nanoparticles, and nanostructured defects are the main methods for creating charge traps.[ , , , , ] Organic electrets have a number of advantages in their flexibility, the ease of processing, and the variety of new organic materials that can be chosen. Therefore, novel organic photoactive electrets with high photosensitivity and good charge trapping ability are needed to be synthesized and studied to meet the high requirements of the fast‐developing technology. The trapping ability of traditional ferro‐, piezo‐, and pyroelectric polymeric electrets has been studied in the past.[ , ] Recently, new functional polymers and small molecules have been synthesized and applied as electrets in OPT memory devices.[ , , , ] Nanographenes (NGs) are emerging as promising photoactive and charge trapping materials for electronic and optoelectronic applications, e.g., isolated nanographene was used as the charge trapping nanofloating gate for memory devices,[ ] and graphene–nanographene heterostructures were applied in photodetector devices.[ ] As for the trapping properties, the charge trapping ability of NGs is related to their molecular size, shape, and configuration. When NGs work as floating gate, smaller sizes increase its trapping density.[ ] While, among the different fabrication methods of NGs, such as cutting of graphene sheets, unzipping of carbon nanotubes and chemical vapor deposition, the bottom‐up synthesis method is the most appealing one as it is easier to control the molecular size and side groups additionally to the good reproducibility.[ , ] Besides the growing interest in NGs, their application in devices is still in its infancy. In this context, we report novel OPT memory devices based on bottom‐up synthesized soluble azulene‐embedded helical nanographene (NG) and the well‐known small molecular semiconductor 2,9‐didecyldinaphtho[2,3‐b:2′,3′‐f]thieno[3,2‐b]thiophene (C10‐DNTT), the chemical structures are shown in Figure 1a. In the device, C10‐DNTT works as the semiconductor, while NG functions as the charge trapping electret. The NG was selected as the electret because of its low bandgap and amorphous layer morphology, which are desired for optical devices and large charge trapping capacity, respectively.[ , ] The fabricated Si/SiO2/NG/C10‐DNTT/Au bottom‐gate/top‐contact (BGTC) OPT memory devices can be programmed by white light and erased by applying a negative gate voltage. The experimental results demonstrate that NG‐based OPT memory devices exhibit a high light sensitivity, low readout voltage, and nonvolatile memory properties with long retention times.

Before discussing the NG‐based OPT memory devices in the section below, here we first describe the measured physical properties of the devices’ thin films. Figure 1b shows the ultraviolet–visible (UV–vis) spectra of NG, C10‐DNTT, and C10‐DNTT on NG structured heterojunction (C10‐DNTT/NG) thin films. The absorption band of NG is in the range of 200–603 nm and the calculated optical bandgap is 2.03 eV. C10‐DNTT has a relatively narrow absorption band between 200 and 487 nm with an optical bandgap of 2.6 eV. In addition, the heterojunction film showed the complementary absorption spectrum of the two materials. We also investigated the energy band of NG and C10‐DNTT thin films with ultraviolet photoelectron spectroscopy (UPS) measurements (Figure 1c). The highest occupied molecular orbital (HOMO) and work function of NG are 5.28 and 4.10 eV, while the HOMO and work function of C10‐DNTT are 5.12 and 3.88 eV. According to the UV–vis and UPS results, we drew the energy level diagram of NG and C10‐DNTT thin films, as displayed in Figure 1d. The energy levels of C10‐DNTT and NG are in good agreement with reported values in the literature.[ , , ] Atomic force microscope (AFM) and grazing incidence wide‐angle X‐ray scattering (GIWAXS) were employed to investigate the impact of the NG layer on the morphology and crystal structure of C10‐DNTT thin film. The surface of the NG layer is very smooth (Figure 2a) with a root mean square roughness of 0.17 nm. The NG layer produces no discernable GIWAXS signal, indicating an amorphous morphology. The reason for this likely lies in the nonplanar helical structure, which impedes a crystalline close‐packing of the molecules.[ ] The AFM images of C10‐DNTT and C10‐DNTT/NG (Figure 2b,c) are very similar and show a much rougher morphology that is known for vapor‐deposited C10‐DNTT films[ ] with small crystals growing vertically on top of a C10‐DNTT base film. The GIWAXS diffraction patterns of pure C10‐DNTT and C10‐DNTT/NG stacked films (Figure 2d,e) show characteristic Bragg rods from the base film, which is highly crystalline and well aligned with the respective substrate (SiO2 and NG/SiO2, respectively) and ring‐like patterns (“arching”) from less well aligned crystals from the top portion of the C10‐DNTT films—those that are visible as bright features in the AFM images. There are some differences between the two GIWAXS images regarding the degree of the disordered film part, but the highly substrate‐aligned 2D powder pattern (Bragg rods) in the C10‐DNTT/NG image device is virtually identical to that from the pure C10‐DNTT film (in peak positions, intensity ratios, and peak widths). This strongly suggests that the buried device‐relevant interface C10‐DNTT/NG is crystallographically identical to that in the pure C10‐DNTT film.

Figure 3a schematically shows the BGTC architecture of the NG‐based OPT memory devices, which consist of bottom gate SiO2 wafer substrates and a C10‐DNTT/NG film stack with gold top electrodes. The detailed fabrication process can be found in the Experimental Section and the thickness of each layer can be seen in Figure S1 (Supporting Information). The electronic state of the C10‐DNTT/NG film stack devices respond to even just ambient light exposure, and since white light exposure was unavoidable during fabrication, transfer, and contact alignment processes, the as‐fabricated devices were already in a “programmed/written” state. As will be discussed in more detail later, this state can be reverted by an application of a negative gate voltage, erasing the device state. Therefore, in order to assess the impact of light and light power on the device, it was erased by an application of −100 V gate voltage (V GS) at zero drain voltage (V DS) for 30 s before recording the light power‐dependent transfer curves in Figure 3b. In the “erased” state, the devices exhibit a fairly significant negative on‐voltage (V on) of ≈ −43 V and the device was erased before each scan. The transfer curves that were measured under light illumination clearly exhibit a dependence on the white light intensity that the devices are exposed to—by intensity (P inc) we refer to the light incident power (P opt) per unit area herein. With increasing light intensity, the transfer curves are more strongly shifted toward positive voltages and their off‐current levels shift to higher values. This readily demonstrates that the NG‐based OPT memory devices are responsive to white light. The dependence of the device's threshold voltage shift (∆V th) and off‐current (I off) on the incident light intensity are plotted in Figure S2 (Supporting Information), with further electrical characteristics being summarized in Table S1 (Supporting Information). A clear gradual increase in ∆V th and I off with increasing light intensity can be seen. According to the empirical equation ΔV th = (nkT/q) × ln[1 + (nqP opt)/(I dark hv)] proposed by Muramoto and co‐workers for phototransistor, we fit the obtained ∆V th dependent on light intensity with equation ΔV th = A × ln(1 + B × P inc).[ ] The final obtained equation is ΔV th = [27.91 × ln(1 + 4.73 × P inc)] V, whereas the off current can be described by Ioff=[Pinc1.17×(1.28×10−10)]A—the detailed fitting parameters are shown in Figure S2 (Supporting Information). A direct comparison of the fitting parameters to those reported in other works[ , , ] using this equation is difficult since unlike in those cases, we do not use a single wavelength but rather white light. However, according to the interpretation of the fit,[ ] the power relationship between the ∆V th and P inc is due to the strong absorption and high internal quantum efficiency of the photoactive heterojunction—in our case the C10‐DNTT/NG heterojunction. It is apparent that V th shifts to values greater than 100 V if the sample is illuminated by 330.5 µW cm−2 light intensity (Figure 3b). The total variation in the threshold voltage (∆V th) is >140 V. Moreover, the NG‐based OPT memory devices are very sensitive compared with other white light sensitive devices.[ , ] V th can be changed by 0. 1 µW cm−2 light intensity and 0.3 µW cm−2 light caused a clear I off increase (detailed values can be found in Table S1, Supporting Information). These results indicate that the photoactive layer can efficiently generate charge carriers under low intensity light. We also fabricated NG‐only and C10‐DNTT‐only BGTC transistor devices. NG‐only devices did not show any conductivity. While Figure S3 of the Supporting Information displays the device architecture of C10‐DNTT‐only devices, the comparison of the performance between C10‐DNTT‐only devices and NG‐based OPT memory is also shown. Under the same light intensity illumination, the V th shift in the NG‐based device is much larger than in the C10‐DNTT‐only devices (Figure S3b,e, Supporting Information). A short time exposure to a strong light does not cause a noticeable V on shift on the C10‐DNTT‐only transfer curve (Figure S3c, Supporting Information). In addition, it is more difficult to shift V on to negative values by applying a −100 V gate voltage in these devices (Figure S3d, Supporting Information). These results indicate that the C10‐DNTT‐only devices would not work well as phototransistor memories and conversely, that the heterojunction between the two materials provides the observed large‐magnitude effects.[ ] Additionally, compared with C10‐DNTT‐only transistors, the NG‐based OPT memory devices exhibit lower drain current (I DS), the reason might be both the hole trapping ability of the NG layer[ ] and the fact that the NG layer, due to its very low mobility, during transistor operation acts as an extra dielectric layer. The capacitances of SiO2 and NG/SiO2 are displayed in Figure S4 (Supporting Information). In the following we want to discuss the physical working principle that we find most consistent with the observed device behavior. Figure 3c,d displays the working principle schematically. The key property that enables this principle is that the NG layer can act as a charge trapping layer/electret for both holes and electrons. Before the light illumination, the NG layer is either void of trapped charges (empty) or, if it had been subjected to negative gate voltages in the dark (erasing), some of the injected holes that form the transistor's accumulation layer became trapped in the NG layer with long lifetimes. Upon illumination, electron–hole pairs, i.e., excitons, are generated. Those excitons that are generated within the exciton diffusion length of the NG/C10‐DNTT interface can become split because of the energetic offsets at the interface (see energy band diagram in Figure 1d). (Note that the sketch is drawn with the exciton forming in the NG layer, but the final electrical device state after splitting does not depend in which layer the exciton is formed.) After the splitting, electrons are left in the NG layer due to the large energetic barrier between the LUMO levels, which prevents the electrons from moving to the C10‐DNTT layer, while the photoinduced holes experience a small ≈160 meV driving force/barrier from the HOMO level offset to cross into/remain in the C10‐DNTT layer. In the C10‐DNTT layer, these holes cause an increase in the drain current, whereas the photoinduced electrons are trapped in the NG layer, which results in the positive shift of threshold voltage (V th). If, depending on the previous device state, trapped holes are already populating the NG layer (after an erasing process/application of large negative gate voltage), the increasing concentration of electrons in the same layer leads to the emptying of the NG layer of charges due to recombination. In any case, the illumination with light will lead to an eventual net storage of long‐lived, trapped electrons in the NG layer. In this work, we refer to the process of storing electrons in the NG layer by light illumination—resulting in a light dose‐dependent positive shift of V th—as writing. After studying the impact of light intensity on the devices’ electronic properties, we investigated the impact of negative gate voltage on the NG‐based OPT memory devices (Figure 3e). The shifts in V th and I off as functions of biasing time (V GS = −100 V, V DS = 0 V) are shown in Figure S5a (Supporting Information). We note that the resulting V th is significantly above 0 V even though the curve was measured in dark, indicating there were still electrons trapped in the NG layer from prior exposure to light. With continued biasing at V GS = −100 V, V th showed a gradual shift toward negative voltages. This negative shift of V th originates from the elimination of trapped electrons that recombine with injected holes in the accumulation layer.[ , ] The off current decreased to 10−11 A after applying V GS = −100 V for 1 s and did not show further change after applying V GS for a longer time which suggests that the channel has become completely depleted of mobile holes. The underlying mechanism of this erasing process is illustrated in Figure 3f,g. Previously photoinduced electrons might be trapped in the NG layer before the application of a negative gate voltage. In that case, with the application of a negative bias there is a driving force for these long‐lived trapped electrons to migrate to and concentrate at the interface to C10‐DNTT, which makes a recombination with holes injected into the transistor channel more efficient, resulting in the V th shift to 0 V. After elimination of all trapped electrons, a net density of holes becomes trapped in the NG layer, resulting in a V th shift further to the negative values. We also studied the impact of various negative erasing gate biases with the results summarized in Figure S5b (Supporting Information). We found that already a gate bias of −20 V can cause a negative V th shift, indicating that even a small/moderate gate bias can initiate the erasing process, i.e., the removal of the trapped electrons from the NG layer. To explore the impact of the applied gate voltage during the transfer sweeps, measurements with various gate voltage ranges were carried out and the results are displayed in Figure S5c,d (Supporting Information). The I DS obtained in the V GS range of 40 to −20 V did not show any obvious increase, meaning that the V on is ≥20 V. The V on of curves measured in the range of 40 to −40 V and 40 to −60 V are −20 V. The V on showed a negative shift with further increase of the V GS range and finally reached −47 V. We also tested the response of the NG‐based OPT memory devices to a high positive gate bias. As displayed in Figure S6 (Supporting Information), +100 V gate bias did not cause a noticeable V on shift, indicating that electrons cannot be directly injected into the NG layer because of the large electron injection barrier.[ ] Overall, these results indicate that positive gate voltages cannot cause a positive V on shift, and that a high negative gate voltage is needed to inject holes into the NG layer. Based on the above experimental results, we summarize the working principle here to explain how the NG‐based devices work as optical memories, and the working diagram is depicted in Figure 4 . If one would for simplicity assume that the devices were to be entirely fabricated in the dark, there would be no electrons or holes trapped in the NG layer. In other words, before exposure to light or application of a gate voltage, the device state is empty. Under illumination, excitons are formed, which upon reaching the NG/C10‐DNTT interface can split into mobile holes in the C10‐DNTT layer and electrons that exhibit very low mobility in the NG layer (electron trapping state). These trapped electrons can be removed by recombination due to the flooding of the channel region with injected holes at a sufficiently large negative gate voltage, returning the device to the empty state or populating the NG layer with trapped holes. Any holes that are trapped in the NG layer after an application of a negative gate bias can then again be eliminated by illuminating the device with light.

To study the impact of light on the output characteristics of NG‐based OPT memory devices, I DS(V DS) measurements were carried out in dark and under different light intensity illuminations at V GS = 0 V, as displayed in Figure 5a. The threshold voltage of the device was determined to be −2 V right before the light dependent experiments. In the dark, the measured current was in the range of 10−12–10−11 A, confirming that the device is in the off‐state. Upon illuminating the device with a white light of the intensity of 0.1 µW cm−2, the measured I DS increased by one order of magnitude, indicating the device has been successfully written by the weak light. Furthermore, devices exhibit a substantial increase in I DS upon increasing the light intensity at the same V GS and V DS. The origin of this behavior is the increasing number of trapped electrons in the NG layer with increasing light intensity, which results in a higher built‐in electric field which, in turn, similar in effect to the external gate electric field effect, increases the source–drain current I DS. For OPT devices, in addition to the electrical characteristics, the optical characteristics are also important parameters. It is rather common in the literature to calculate these characteristics based on transfer curves, where in most cases both drain and gate voltage are applied.[ , , ] But for FET structure devices, we think it is better to study the built‐in electric field, which is caused by the trapped electrons/holes, without applying a gate voltage to avoid the impact of the gate‐induced electric field. In addition to that, as mentioned above, a small gate bias leads to the recombination of holes and electrons. Therefore, we investigated the photosensitivity, photoresponsivity, and specific detectivity of NG‐based OPT memory devices with the I DS–V DS curves obtained at V GS = 0 V. The device photosensitivity P, which is defined as the signal‐to‐noise ratio, is given by Equation (1) where I d,ph and I d,dark are I DS under illumination and in dark, respectively.[ , , , ] Figure 5b plots P as a function of V DS. P increases with increasing incident light power, reaching a maximum of 3.6 × 105 at V DS = −30 V under 25.7 µW cm−2 incident light power, indicating an excellent photosensitivity of the NG‐based OPT devices. Despite the high sensitivity, the devices can work at a low readout voltage since clear steps can be seen at V DS = −1 V for curves measured under different light intensities. The photoresponsivity R reflects the performance in terms of optical power converted into electrical current and can be calculated from Equation (2) where I ph, P opt, P inc, and A are the photocurrent, power of the incident light, incident light intensity, and area of the active region, respectively. We note that this equation must be used very carefully to calculate the R for electric field transistor‐based optical devices since R can be very high as long as the I d,ph is high even if the light only causes a small current increase.[ , , , ] The I DS–V DS curves at a fixed V GS of 0 V have been utilized here to exclude the exaggeration of R, which can be caused by the gate‐induced electric field. The relationship of R and V DS under different light intensities is plotted in Figure 5c. The photoresponsivity increased with the increasing V DS and peaked at 1 µW cm−2 light intensity, with the highest R being 160 A W−1. The diminishing photoresponsivity at higher light intensity could be attributed to two mechanisms: the saturation of the charge storage capacity of the NG layer, and the density‐dependent electron–hole recombination, which is higher at larger number of photoinduced charges.[ , ] The specific detectivity D * is calculated from Equation (3) where q is the electron charge and with the assumption that the total background noise is dominated by the shot noise from the dark current.[ ] We plot the D* versus V DS curves in Figure 5d. It can be seen from Equation (3) that D* is related to the photoresponsivity (R), thus exhibiting the same trend with respect to the light intensity. The highest obtained D* is 2 × 1013 Jones. The photo characteristics of the NG‐based OPT memory devices that calculated from the I DS–V DS curves with V GS = 0 V are competitive compared to reports from literature which are usually calculated from higher gate–source and drain–source voltages.[ , , ] These results demonstrate that the NG‐based OPT memory devices are excellent optical devices that can work at low voltage and are responsive to ultraweak white light.

Besides the “vertical” memory window—the spread of the current signal between the different device states—the hysteresis window is defined as the change in threshold voltage between the forward and the backward sweeps caused by the net charge carrier trapping/detrapping is another important parameter for transistor memory devices.[ ] Hence, we measured the transfer curves in forward and backward directions (dual‐sweep) of the device under different light intensities and after exposure to different light doses. The dual‐sweep curves of NG‐based OPT memory devices in dark and under different light exposures are shown in Figure S7a of the Supporting Information, the hysteresis window and the ∆V th versus light intensity are plotted in Figure S7b of the Supporting Information. The highest hysteresis of 25 V is achieved when the light intensity was 0.6 µW cm−2. For even higher light intensities, the backward curves are not typical transfer‐characteristic anymore and the device cannot be switched off by reducing the gate voltage, indicating a high built‐in electrical field from a high density of trapped, photoinduced electrons in the NG layer. The results indicate that for the phototransistors one can think of the effective gate electric field as seen by the channel region as being caused by two sets of charges: both Qgatee, the external gate electrons, and the internal photoinduced electrons (Qphotoe). Under low light intensities, the effective gate electric field is then dominated by Qgatee and the transfer curves are controlled by the external gate bias (V GS), resulting in conventional transistor transfer curves. On the other hand, under significant light illumination, the Qphotoe charges cause a high internal contribution to the effective gate electric field so that a high I DS current is obtained even at low or positive external gate bias V GS. The dual‐sweep curves after a brief exposure to light were studied to investigate the impact of light exposure history on NG‐based OPT memory devices. Figure 6a displays the transfer curves measured in dark after different exposure durations to a light intensity of 25.7 µW cm−2, revealing a gradual shift of V th in the direction of positive voltages with increasing exposure times. A variation of 49.75 V was achieved after 5 s light exposure, and the highest hysteresis was 43.29 V, detailed data are summarized in Table S2 (Supporting Information). Moreover, the transfer curves after exposure to different light intensities for 1 s are shown in Figure 6b, ∆V th increased with the increase of light intensity, other detailed electrical characteristics can be found in Table S3 (Supporting Information). The large memory window and hysteresis of the NG‐based phototransistor are attributed to the high photosensitivity and strong electron/hole trapping capability of the NG layer. In addition, the results also indicate that NG‐based OPT memory devices are not only sensitive to light but also can “remember” light exposure history and light dose, indicating NG‐based OPT memory devices are promising candidates for photodosimeter application. For practical applications of nonvolatile memory devices, retention time, and endurance/reliability are important parameters, which indicate long‐term memory stability and multiple switching stability, respectively.[ , , , , , ] The evaluation of these memory properties of NG‐based OPTs memory devices is shown in Figure 7 . For these measurements, V th < 0 V is defined as “0” (off) state, and V th > 0 V is defined as “1” (on) state. Figure 7a,b plots the ability of the NG layer to retain data with the retention time after the writing and erasing operations. Two “on state” readout curves are shown in Figure 7a: one where the device is getting written/programmed by light exposure only and one where the device is written by both light exposure and a subsequent positive gate voltage. A slower rise in current upon time for the first 500 s can be seen for the light‐only programmed curve The reason for this is that the hole/electron generation rate is higher than their recombination rate, and the total number of photoinduced electrons/holes increases upon time. Subsequently, a stable stage can be seen when recombination rate equals generation rate, followed by a rather slow drop‐off over time. A higher memory on/off ratio is obtained when the device is programmed with light and +100 V gate voltage and the current increase time is then imperceptible. That is because the photoinduced electrons moved drift further away from junction into deeper located trapping sites, driven by the electrostatic force from the positive gate voltage, and as a result, the recombination rate and the generation rate reach a balance within a shorter time frame. Figure 7b displays the NG‐based OPT memory devices when programmed without using a dedicated light source but simply by ambient light in order to demonstrate that the programming of the OPT memory devices is not limited to white LED light sources. From the retention tests we see that the memory on/off ratio is above 1.0 × 103 even though the readout voltage is very low (V GS = 0 V and V DS = −3 V) and remains largely the same after 1.5 × 105 s (in Figure 7b), demonstrating the excellent data durability of the NG‐based OPT memory devices. Additionally, the devices were periodically exposed to a writing white light of 3345 µW cm−2 for 1 s and with an erasing gate voltage of −50 V for 1 s to test the multiple write–read–erase–read (WRER) stability. No obvious decay was observed after the dynamic on/off switching for 100 cycles (Figure 7c), suggesting that the NG‐based OPT memory devices possess a good stability. We compared the performance of NG based OPT memory devices with previously reported high‐performance organic phototransistor memory devices (Table 1 ).[ , , , , , , , , , ] Compared to the reported devices, the NG‐based OPT memory devices are more sensitive than other reported devices. For both modes of illumination—constant exposure and short‐time exposure—the NG‐based OPT devices produce a significant response, even at low incidence light intensity. The resulting incident light power normalized memory window (∆V th/P) is much larger than that of other reported organic phototransistor devices. In addition, the retention time is outstanding compared with reported organic phototransistor memories. All of these results indicating such hybrid heterojunctions are promising candidates for write‐once‐read‐many (WORM) nonvolatile photomemories.

In summary, high‐performance NG‐based OPT memory devices that can be programmed by white light were developed with high photosensitivity (3.6 × 105), a large memory window exceeding 140 V under light, fast programming speed (1 s), a long retention time (>1.5 × 105 s) and good multiple switching stability (>100 demonstrated). We also found that the presence of the heterojunction interface is essential for the photoresponsivity of the fabricated devices. We proposed a working principle based on the experimental results of this work and former studies, which can be helpful for designing and fabricating high‐performance phototransistor devices. Additionally, the electrical characteristics of the devices change with the incident light dose, indicating the promising application of such devices as photo‐dosimeters and multiple states data storage devices.

NG was synthesized as reported,[ ] C10‐DNTT was purchased from Lumtec and used without further purification.

AFM images were obtained in tapping mode with a Flex‐Axiom from Nanosurf. Thickness was measured with a profilometer (DektakXT, Bruker). GIWAXS measurements of C10‐DNTT/NG and C10‐DNTT were carried out at SIRIUIS beamline at SOLEIL, France. The sample‐to‐detector distance was 306 mm and an X‐ray beam energy of 10 keV was used. The incident angle was 0.14°. All images were recorded using a Pilatus 1M detector. The NG GIWAXS measurements were done at NCD‐SWEET beamline at ALBA, Spain, with a sample‐to‐detector distance of 180 mm and an X‐ray energy of 12.4 keV. The incident angle was set as 0.12° and the images were recorded using a Rayonix (LX255‐HS) detector. UPS was performed with a Thermofisher Escalab 250Xi system, a HeI lamp (26.3 eV), −5 V bias, and a passing energy of 2 eV were applied for measuring. The work function (E Ψ) was calculated by subtracting the cutoff values of the secondary photoemission onset from the photon energy of 26.3 eV, with the formula Valence band minimum (VBM) onset value was extracted from the UPS spectra by extrapolating the slope of the photoemission onset and reading the value from the intersection with the x‐axis. Then, the VBM value was calculated with the formula Si was used as the substrate for above mentioned measurements. UV–vis spectra were obtained by using a spectrophotometer (Cary 5000, Agilent) and quartz slides were used as the substrate. The optical bandgap was evaluated from the absorption spectrum using the following Tauc relationwhere C is a constant, C = 1 for solid samples, α is the absorption coefficient, h is the Planck's constant, v is the photon frequency, E G is the optical bandgap and obtained by extrapolating the straight portion of the curves to zero absorption coefficient value.

NG in CHCl3 (8 mg mL−1) was shear coated (5000 µm s−1) at room temperature onto highly n‐doped silicon wafers with a SiO2 (300 nm) layer under ambient conditions. The SiO2/Si substrates were successively cleaned with acetone and ethanol for 10 min, and then dried with nitrogen. A C10‐DNTT (25 nm, 0.025 nm s−1) film was thermally evaporated on top of the NG layer, and Au (50 nm, 0.15 nm s−1) was evaporated as the top source and drain contacts.

The retention measurements programmed by room light were performed with a Keysight B1500 semiconductor analyzer, and the ambient light intensity was 566.5 µW cm−2. The quantified photoresponse measurements were conducted with a HP 4145 semiconductor analyzer controlled by SweepMe!. White light illumination was performed using an LED (MWWHLP1 – 3000 K, Thorlabs) with an emission spectrum from 400 to 800 nm, and light intensity was measured with a Si reference diode (SRC‐1000‐RTD‐QZ, VLSI Standards). V on is the gate voltage where I DS enters the regime of weak accumulation in the transfer curves. The threshold voltage (V th) was obtained from the intersection of the linear fit of the I DS 1/2 curve and the x‐axis, I off was the average current before V on. The capacitance was measured with an LCR meter (Keysight E4980).

The authors declare no conflict of interest.

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