{'fraction_non_alphanumeric': 0.016270337922403004, 'fraction_numerical': 0.0, 'mean_word_length': 5.6115702479338845, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Optimization of on-package decoupling capacitors considering system variables

A key aspect of power integrity in modern electronic systems is the choice and optimization of decoupling capacitors. Traditionally, this issue has been addressed at PCB level, but the integration of discrete SMD capacitors inside BGA package substrates is becoming more and more common in complex high-speed digital devices. In the context of semiconductors industry, the on-package decoupling applied to digital microcontrollers needs to be defined, often without any clear information on system configuration. This paper shows how the package behavior can change depending on the interaction with PCB parameters, and proposes a methodology to optimize on-package decoupling taking into account the system variability.