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Demonstration of Ultra Low Loop Inductance on a High Efficient GaN Converter Using PCB Embedded Capacitors

This paper presents design and layout considerations for a high efficient GaN converter on two-layer cost-effective PCB. The fast switching capabilities of GaN FETs requires very low power loop inductance. The proposed method of embedding the input capacitors to minimize loop inductance is analyzed and tested on a non-isolated buck converter using GaN switches. Ultra low power loop inductance (418 pH) was achieved by placing the bypass capacitors vertically through the board. The proposed converter has reached a maximum measured conversion efficiency of 98.6 percentage in both buck and boost mode.