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Reliability of Low-Temperature Poly-Si Thin Film Transistors with Lightly Doped Drain Structures

We have investigated the hot carrier degradation of n-ch poly-Si lightly doped drain thin film transistors (LDD-TFTs) under dynamic stress with various annealing conditions after LDD doping. Degradation of ON current was observed in the LDD-TFT. Observation with an emission microscope suggested the generation of hot electrons under dynamic stress. We have successfully clarified the relationship between the annealing temperature of the LDD region and hot carrier degradation. The thin film transistor with higher annealing temperature showed higher reliability. From the crystal analysis by Raman spectroscopy, it was determined that many defects were generated in the LDD region after doping. This shift of Raman peak indicated that residual stress caused by LDD doping is relieved by restructuring of the crystal network when the annealing temperature was over 500°C. Based on the results by electrical measurements and the Raman analysis, we have found that the degradation is strongly affected by the crystallinity of the LDD region.