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Reusable Spiking Neural Network Architecture

The paper describes a full-fledged digital hardware implementation of Spiking Neural Network (SNN) architecture on a Field Programmable Gate Array (FPGA) and is focused on proposing a solution to reuse the same SNN for various applications for optimal hardware. This brain-inspired Neuromorphic computing approach to solve various problems has got a lot of potential and benefits. The accurate implementation of spiking neuron models occupies lot of hardware. Designing multiple SNNs for solving various applications is not seen as an ideal approach for implementation which is the key issue addressed in this work. Reusable architecture is proposed as a solution to this issue. The goal of this work is to demonstrate this reusability aspect to reduce the hardware usage by applying the same SNN to two different applications of gesture controlled robotic arm and pattern recognition. The entire hardware designing is done in Very High-Speed Integrated Circuit Hardware Description Language and simulated in ModelSim RTL simulator. The tool used for performing synthesis is Intel Quartus Prime. It has been demonstrated that the number of neurons and the hardware resource utilization required in the proposed dual application SNN framework is much less than the same for the reported works intended for single application.