{'fraction_non_alphanumeric': 0.021494370522006142, 'fraction_numerical': 0.0, 'mean_word_length': 6.0359712230215825, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Impact of Intermittent Faults on Nanocomputing Devices

Operation of semiconductor devices may be negatively affected by permanent, transient and intermittent faults. Nanocomputing devices are expected to experience higher error rates, in particular due to transient and intermittent faults. The errors induced by high energy particles, usually referred to as soft errors, have been extensively studied. However, similar errors may be induced by intermittent faults. This paper defines the permanent, intermittent and transient fault classes, emphasizing several malfunction causes, from manufacturing residues to ultra-thin oxide breakdown and timing violations. Error signatures, specific to intermittent faults, are provided along with failure analysis results. Mitigation techniques are also discussed. This analysis points towards an increased need for chip level faulttolerance, especially error detecting and correcting codes, and hardware based checkpointing and retry.