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Silicon photonic-electronic neural network for fibre nonlinearity compensation

In optical communication systems, fibre nonlinearity is the major obstacle in increasing the transmission capacity. Typically, digital signal processing techniques and hardware are used to deal with optical communication signals, but increasing speed and computational complexity create challenges for such approaches. Highly parallel, ultrafast neural networks using photonic devices have the potential to ease the requirements placed on the digital signal processing circuits by processing the optical signals in the analogue domain. Here we report a silicon photonice-lectronic neural network for solving fibre nonlinearity compensation of submarine optical fibre transmission systems. Our approach uses a photonic neural network based on wavelength-division multiplexing built on a CMOS-compatible silicon photonic platform. We show that the platform can be used to compensate optical fibre nonlinearities and improve the signal quality (Q)-factor in a 10,080 km submarine fibre communication system. The Q-factor improvement is comparable to that of a software-based neural network implemented on a 32-bit graphic processing unit-assisted workstation. Our reconfigurable photonic-electronic integrated neural network promises to address pressing challenges in high-speed intelligent signal processing.

must be processed in real-time. Bounded by the clock rate of digital electronic hardware (typically application-specific integrated circuits; ASICs), processing such high-speed signals requires massive parallelisation. As a result, the circuit complexity scales with the computational complexity of the digital signal processing (DSP) algorithms. At the same time, the signal processing unit needs to be built into a pluggable transceiver module and its power consumption needs to fit into the power envelope of network switches, typically tens of watts including both optical and electrical modules 11 . The challenges in high circuit complexity with a tight power budget have prohibited implementing high-performance, but computationally intensive, ANN based algorithms 12 . And efforts have been focused on developing algorithms that lead to a compromise between transmission link performance and DSP complexity.
An alternative approach is to explore hardware that intrinsically offers both high bandwidth and low power consumption in ANN applications, and photonic neural networks (PNNs) could potentially provide such capabilites 13,14 . PNNs aim to leverage high-speed optical devices to mimic the essential computing primitives (neurons and synapses) and connect them into a neural network with highly parallel and dense optical interconnects. As a result, PNNs are potentially capable of supporting real-time ANN implementations with tens of gigahertz bandwidth in a single pipeline.
The approach could thus address DSP related hardware constraints, such as analogue-to-digital performance and computational complexity, and help cope with the increasing data transmission capacity.
PNNs have previously been demonstrated on various platforms, including free-space 15,16 , optical fibres [17][18][19] , diffractive optics 20,21 , and integrated photonic circuits [22][23][24][25][26] . The past decade has seen a rapid development of silicon photonics, driven by the rising demands in optical communication capacities. These advances have provided fast and efficient optical modulators and detectors for optical communications, and have led to high-density integrated optoelectronic devices and interconnects that can perform scalable information processing and computing tasks. However, many of the integrated devices demonstrated so far have focused on building analogue interconnects for multiply-accumulate (MAC) computations for linear matrix-vector multiplication operations 20,24 with nonlinear activation functions (neurons) implemented offline (in the digital domain) or with slow optics. Alternatively, there have been demonstrations of neurons with reconfigurable activation functions but without co-integrated linear operations 27,28 . The lack of a fully integrated neuron with network compatibility prevents PNNs from performing real-time processing with gigahertz bandwidth, which is vital for many signal processing applications.
In this Article, we report an integrated silicon PNN system that integrates a full NN model with neurons and synapses, and demonstrate for the first time that a PNN is capable of simultaneously providing accurate weighting, summation, and biased nonlinearity (i.e., neurons) for high-speed signals. Integrating fast photonic neurons on chip is a critical step toward achieving high-speed NNs for real-time intelligent signal processing. Our PNN is a reconfigurable photonicelectronic integrated circuit and is programmable to perform different tasks. We demonstrate a unique application of PNN for fibre nonlinearity compensation (NLC) in submarine optical fibre communications transmission systems. ANN parameters trained on a computer in advance are accurately uploaded to our photonic chip, which can then be used to perform inference acceler-4 ation tasks. Our platform can predict optical fibre nonlinearities and improve the signal quality (Q)-factor in a 10,080 km submarine fibre communication system. The Q-factor improvement is comparable to the results obtained from a software-based neural network running on a 32-bit graphics processing unit (GPU)-assisted workstation. The results illustrate that our photonic analogue computing circuit can preserve signal integrity, while offering potential speed and gigahertz bandwidth advantages without sacrificing accuracy. The NLC application could also be generalized as a regression problem, and extended to solve different real-world application problems currently unreachable with conventional computing technologies.

Neural network model for fiber nonlinearity compensation
We investigate a 10,080 km submarine optical transmission system carrying a single channel Gbaud polarization-multiplexed (PM)-16 quadrature amplitude modulation (QAM) signal. While recent demonstrations have shown the transmission capacities have approached the Shannon limit in the linear regime of optical fibers, the nonlinear impairment remains the major limiting effect in long-distance transmission systems 29 . The evolution of the signals in the fiber link is described by the Nonlinear Schrödinger Equation: where u x/y (t, z) is the optical field at the x and y polarizations, respectively, β 2 is the group velocity dispersion governing the linear impairment, and γ is the Kerr nonlinear coefficient governing the nonlinear impairment in the fiber transmission systems. Although state-of-the-art DSP can overcome linear impairments, nonlinear impairments remain difficult to overcome due to the difficulty in applying computationally expensive nonlinear compensation algorithms using ASICs.
The nonlinearity impairment can be treated as the the perturbation due to the nonlinear effects, i.e., u x/y (t, z) = u 0,x/y (t, z) + ∆u x/y (t, z), where u 0,x/y (t, z) is the solution of linear propagation and ∆u x/y (t, z) is the nonlinear perturbation. The idea of NLC is to build up a model of the nonlinear perturbation ∆u x/y (t, z) with the abundance of transmission data using a NN, and remove the distortion by subtracting the perturbation from the received optical field u x/y (t, z).
Here we first consider how fiber nonlinearities impair the signal on the x-polarization as an example. We define a term triplet as Eq. 2. Triplet T corresponds to the nonlinear terms on the right side of Eq. 1. Then, the nonlinear perturbation can be approximated by a combination of triplets T 30 : where P 0 is the launch power, C m,n are the nonlinear perturbation coefficients.   the trained parameters can be applied to both polarizations. Here, we choose polarization x as an example. The inputs of the NN are the triplets T for the x-polarization signal 8 . The two outputs of the NN are the real and imaginary components of the estimated nonlinearityĤ k,N L at the k-th symbol. The recovered symbolĤ k is obtained by subtractingĤ k, N L from the received The NN is trained by searching for the tensor parameters that minimize the mean squared error (MSE) between theĤ k and the transmitted symbol A x,k .
After training, the NN can execute the inference task of estimating the optical nonlinearity of every incoming symbol. The NN is much simpler than those used for many other applications with the 4×2 PNN circuit, we feed the two first-layer outputs to the PNN four times with four subsets of weights and biases. The photonic neuron circuit diagram is shown in Fig. 1(d). The MRR weight bank is implemented with in-ring N-doped photoconductive heaters 35 and provides the key functionality to configure connection strengths (i.e. weights or synapses). The weight is determined by the MRR transmission, which can be thermally tuned by adjusting the electrical current applied to the N-doped heaters 35  The Q factor converges as the NN is trained, 32,016 symbols generated from the transmission system to monitor the training process; red trace: Q factor before nonlinearity compensation. (d) Transmission performance comparison. The neural network model for NLC is trained with the activation function of photonic neuron. The 3-step and 6-step DBP mean that fiber nonlinearity is compensated based on the conventional DSP approach digital backpropagation by equally dividing 10,080 km transmission link into 3 and 6 sections, respectively. to best approximate the higher-order nonlinearity features from the symbols. To ensure that the trained NN parameters can be accurately mapped on the photonic device, we include the activation function of photonic neurons in the training phase. As shown in Fig. 2(a), we begin by characterizing the on-chip activation function by sending a training data sequence into the weight bank and recording the corresponding neuron output waveform. The transfer function is fitted to a Lorentzian function, as shown in Fig. 2(b), since the E/O response of MRR modulators is typically a Lorentzian function. The training data have the same data rate as the test data, in order to capture the bandwidth and the noise in the device that would affect the activation function shape.
Following that, we apply the characterized activation function in the NN model and train the neural network with the Adam learning algorithm 39 .
The NN is trained with 32,106 training symbols in a single channel 32 Gbaud PM-16-QAM signal transmitted over a 10,080 km pure silica core fiber link. The weights are constrained to a range of -1 to 1 during the training, according to the operation range of the MRR weight bank.
We monitor the Q-factor of a cross-validation (CV) data set to ensure that the NN is successfully trained to recognize the fiber nonlinear distortion. The CV data set contains 32,106 symbols and is independent with the training data set. As shown in Fig. 2(c), the Q-factor of the CV data increases gradually in the training process and finally converges to 8.1 dB after 21,600 steps. To enable efficient training, here we train the NN with a launch power higher than the optimal value. After training, a test data set with varying launch powers is sent to the optical link and processed by the trained NN. The nonlinear perturbation obtained from the NN is weighted by the difference in the launch power between the training and test set, and is then subtracted from the received signal.  The Q factor of the signal after NLC is calculated and plotted in Fig. 2(d). The optical power at the Q factor peak is the optimal power that should be launched in the transmission fiber. Using the simulated PNN, the Q factor of the transmission link is increased by 0.66 dB as compared to that without NLC. Compared with 3-step DBP, the PNN is capable of achieving comparable Q factor performance.

Photonic neural network implementation
Following training, we implement the trained NN model to the PNN device, and evaluate whether the PNN can accurately compensate fiber nonlinearity impairment for high-speed signals. (See Supplementary Table. 3  The trained NN parameters are grouped into four subsets, each with a 2×2 weight matrix and 2 neuron biases. Each weight matrix is mapped to a current matrix I h and applied to the in-ring heaters of the MRR weight banks using the control method described in Ref 36 . To apply neuron biases, the modulator bias current I bias is tuned to approximate the trained transfer function. The 2×2 current matrix and 2 modulator biases are simultaneously applied to the PNN chip. Fig. 4(a) shows the waveform snapshots from the PNN output, which presents the outputs of the second hid- PNN output (red dots) with the simulated NN (blue dots). The mean squared errors (MSEs) of photonic neurons are calculated over 32,016 test symbols. MSEs are used to quantify the errors caused by noises and derivations from target weights and activation functions. The MSEs vary between 0.008 to 0.014. The signal's Q factor is then calculated from the eight photonic neuron outputs (see Supplementary information Q factor calculation). Without nonlinearity compensation, the optimal Q-factor of the signal is 9.34 dB, obtained at the launch power of -1 dBm. With the PNN, the signal's Q factor is improved by 0.60 dB, and the constellation diagram after NLC is plotted in Fig. 4(b.i), showing less noise in contrast to that without NLC. The Q-factor obtained from the simulated NN indicates a 0.65 dB gain in Q-factor. That is, the penalty of loading the neural network to the PNN is only 0.05 dB after taking into account all inherent noise from the physical components and equipment.

Scalability for NLC
Mainstream silicon photonic platforms offer an opportunity to implement the entire neural network for NLC on a single silicon photonic chip. Silicon photonic circuits with a few thousands of elements have been demonstrated 33,34 . Weight pruning 8 is an effective pathway for reducing the PNN footprint and power consumption, which can be accomplished by having a few more neurons in hidden layers (see Fig. 5) while reducing the number of input triplets. The current NN model has 892 input triplets. After weight pruning, the number of inputs can be reduced by three times to 300. The photonic neural network, in this case, has 952 optoelectronic components.
These components require 0.38 mm 2 chip space. Electrical traces and pads connecting to the optoelectronic components provide electrical biases to the photonic circuit. Electrical traces and pads connecting to the optoelectronic components provide electrical biases to the photonic circuit.
The amount of chip space used by electrical traces and pads varies significantly depending on the chip floorplan and packaging technologies. For example, the electrical traces can be very short using the flip-chip bonding technology, and the pads take up 0.76 mm 2 areas (each bonding pad takes 20µm × 20µm area) 40 . Ref 33 have demonstrated that silicon photonic devices with comparable footprints are feasible.
A challenge of large-scale silicon photonic circuits is device non-uniformity, i.e., the dimensions and performances of the devices across the chip are not uniform and deviate from the design.
In PNNs, device non-uniformity will cause variations of the relationship between the actuated MRR currents and the actual weights, the activation function shape, etc. The influences of device variations can be minimized by pre-calibrating each device or using control methods, such as the feedback MRR control 35,36 . Device variances can be further reduced through post-fabrication technologies such as trimming 41 or in-situ training 42 . Another challenge deals with light sources.

Claiming cascadability for NLC
We discuss the feasibility of scaling the current chip to a multi-layer neural network. This issue refers to the need for cascadability, that is, the ability to have the one neuron output to excite the neurons in the next layer. Cascadability requires 1) the neuron output can evoke an equivalent response in neurons in the subsquent layer; 2) to avoid noise propagation along with multiple neural layers. The main conclusion is, in order to have one layer driving the next layer, enough power must be provided to compensate for loss and power splitting due to fan-out to the next layer. Such power can come from optical lasers or electrical gain via a high transimpedance. The electrical gain can be provided with a passive resistor or an active TIA, both of which are compatible with today's silicon photonic platform. For example, we have implemented an on-chip resistor in our current PNN design. Alternatively, we can use an efficient modulator (i.e. small V π and junction capacitor C) to reduce the power requirement. We derive the devices and power requirement of maintaining the cascadability in the Supplementary information Performance comparison between DSP and PNNs.
Regarding noise propagation, we found that if the voltage swing to the modulator is large enough, the nonlinear transfer function of the modulator can suppress the noise and avoid noise propagation across the network 44 . Such requirements can also be addressed with sufficient power or with an efficient modulator, as argued in [44][45][46] .

Impact of activation function and the number of neurons
In the NLC application, the NN is trained to recognize the fiber nonlinearity perturbation from the received symbols. An appropriate choice of activation function can benefit such regression problems by including higher-order nonlinearities among the symbols. Fiber nonlinearity perturbation manifests itself as long, heavy-tailed symbols due to nonlinear phase noise. To extract such features, especially the tail edge, an activation function with an unbounded range is preferred.

Conclusion
We have reported a reconfigurable photonic-electronic integrated neural network platform that incorporates photonic components on a silicon photonic platform for high-speed information processing. We demonstrated our system is capable of performing essential functionalities such as accurate weighting, summation, and biased nonlinearity for neural network computing. We applied this system for fibre nonlinearity compensation in trans-Pacific transmission data links, which require extremely high throughput and real-time signal processing. We experimentally implemented the second layer of the neural network using silicon photonic neurons, and showed in simulations that the extended system can accurately model the fibre nonlinearity, leading to a Q-factor improvement comparable with numerical simulations on a conventional computer. The system is capable of processing optical signals in the analogue domain, thereby significantly relaxing the stringent requirements of complexity and speed that are typically placed on conventional DSP circuits. Our approach could help in the development of reconfigurable photonic-electronic integrated circuits 20 for solving a range of problems in high-speed intelligent signal processing. To implement the N-doped heater, each MRR consists of a ring waveguide etched to a 90 nm thick pedestal that hosts the phosphorus dopants. A 10 µm wide N doping section is patterned to follow the MRR, outside of which heavy N++ doping is used to make ohmic contacts. Metal vias and traces are deposited to connect the heater contacts of the MRR weight bank to electrical metal pads.

Device Fabrication
The MRR modulator consists of a ring waveguide with a radius of 8 µm coupled to two bus waveguides with gaps of 0.2 and 0.5 µm respectively. The ring waveguide is etched to a 90-nmthick pedestal that hosts boron and phosphorus to form n+ and n-, and p+ and p-regions, respectively. The lightly p-and n-doped regions are extended to the waveguide core to form a p-n junction for high-speed modulation. The highly p+ or n+ doped regions are located at the pedestal edge to serve as p-type and n-type ohmic contact areas. To fabricate the germanium-on-silicon photode-tector, a germanium layer is deposited and patterned on top of the silicon waveguide. Boron and phosphorus are implanted in the sidewalls and slabs of the Ge waveguide to form a horizontal p-i-n junction as well as p-type and n-type ohmic contact areas. Metal vias and traces are deposited to connect the electrical ports of the devices to the electrical metal pads. The cross-sections of MRR resonator embedded with n-doped heater, MRR modulator, and germanium-on-silicon photodetector are illustrated in Supplementary Fig. 1.
The on-chip capacitor is formed by two layers of metal and has a capacitance of 2 pF. The resistor is formed by a slab waveguide etched to a 90 nm thick pedestal that heavily doped with phosphorus (N++). The resistor has a resistance of 300 Ω.
Data availability All data used in this study are available from the corresponding author upon reasonable request.
Code availability All codes used in this study are available from the corresponding author upon reasonable request.