text: /* Copyright (C) 2016 RDA Technologies Limited and/or its affiliates("RDA").
  * All rights reserved.
  *
  * This software is supplied "AS IS" without any warranties.
  * RDA assumes no responsibility or liability for the use of the software,
  * conveys no license or title under any patent, copyright, or mask work
  * right to the product. RDA reserves the right to make changes in the
  * software without notification.  RDA also make no representation or
  * warranty that such application will be suitable for the specified use
  * without further testing or modification.
  */
  
  
  #ifndef _PMU_H_
  #define _PMU_H_
  
  #ifdef CT_ASM
  #error "You are trying to use in an assembly code the normal H description of 'pmu'."
  #endif
  
  
  #include "globals.h"
  
  // =============================================================================
  //  MACROS
  // =============================================================================
  
  // =============================================================================
  //  TYPES
  // =============================================================================
  
  // ============================================================================
  // PMU_T
  // -----------------------------------------------------------------------------
  ///
  // =============================================================================
  #define REG_PMU_BASE               0xA2000640
  
  typedef volatile struct
  {
      REG16                          CHIP_ID_reg;                  //0x00000000
      REG16                          IRQ_settings;                 //0x00000002
      REG16                          LDO_settings;                 //0x00000004
      REG16                          LDO_active_settings1;         //0x00000006
      REG16                          LDO_active_settings2;         //0x00000008
      REG16                          LDO_active_settings3;         //0x0000000A
      REG16                          LDO_active_settings4;         //0x0000000C
      REG16                          LDO_active_settings5;         //0x0000000E
      REG16                          LDO_LP_SETTING_1;             //0x00000010
      REG16                          LDO_LP_SETTING_2;             //0x00000012
      REG16                          LDO_LP_SETTING_3;             //0x00000014
      REG16                          LDO_LP_SETTING_4;             //0x00000016
      REG16                          LDO_LP_SETTING_5;             //0x00000018
      REG16                          LDO_POWER_ON_SETTING_1;       //0x0000001A
      REG16                          LDO_POWER_ON_SETTING_2;       //0x0000001C
      REG16                          LDO_POWER_ON_SETTING_3;       //0x0000001E
      REG16                          LDO_POWER_ON_SETTING_4;       //0x00000020
      REG16                          LDO_POWER_ON_SETTING_5;       //0x00000022
      REG16                          Charger_setting_1;            //0x00000024
      REG16                          Charger_setting_2;            //0x00000026
      REG16                          Charger_status;               //0x00000028
      REG16                          Charger_control;              //0x0000002A
      REG16                          CALIBRATION_SETTINGl;         //0x0000002C
      REG16                          CALIBRATION_SETTING2;         //0x0000002E
      REG16                          MISC_CONTROL;                 //0x00000030
      REG16                          LED_SETTING1;                 //0x00000032
      REG16                          LED_SETTING2;                 //0x00000034
      REG16                          LED_SETTING3;                 //0x00000036
      REG16                          AUDIO_CONTROL;                //0x00000038
      REG16                          TOUCH_SCREEN_CONTROL;         //0x0000003A
      REG16                          TOUCH_SCREEN_RESULT1;         //0x0000003C
      REG16                          TOUCH_SCREEN_RESULT2;         //0x0000003E
      REG16                          TOUCH_SCREEN_RESULT3;         //0x00000040
      REG16                          EFUSE_OTP_SETTING1;           //0x00000042
      REG16                          EFUSE_OTP_SETTING2;           //0x00000044
      REG16                          EFUSE_OTP_SETTING3;           //0x00000046
      REG16                          EFUSE_OTP_SETTING4;           //0x00000048
      REG16                          EFUSE_OTP_SETTING5;           //0x0000004A
      REG16                          SIM_INTERFACE;                //0x0000004C
      REG16 Reserved_0000004E[20];                //0x0000004E
      REG16                          LDO_POWER_OFF_SETTING_1;      //0x00000076
      REG16                          LDO_POWER_OFF_SETTING_2;      //0x00000078
      REG16                          LDO_POWER_OFF_SETTING_3;      //0x0000007A
      REG16                          LDO_POWER_OFF_SETTING_4;      //0x0000007C
      REG16                          LDO_POWER_OFF_SETTING_5;      //0x0000007E
      REG16                          THERMAL_CALIBRATION;          //0x00000080
      REG16                          MISC;                         //0x00000082
  } HWP_PMU_T;
  
  #define hwp_pmu                    ((HWP_PMU_T*) KSEG1(REG_PMU_BASE))
  
  
  //CHIP_ID_reg
  #define PMU_REVISION_ID(n)         (((n)&15)<<0)
  #define PMU_REVISION_ID_MASK       (15<<0)
  #define PMU_REVISION_ID_SHIFT      (0)
  #define PMU_CHIP_ID(n)             (((n)&0xFFF)<<4)
  #define PMU_CHIP_ID_MASK           (0xFFF<<4)
  #define PMU_CHIP_ID_SHIFT          (4)
  
  //IRQ_settings
  #define PMU_PD_MODE_SEL            (1<<0)
  #define PMU_PD_MODE_SEL_MASK       (1<<0)
  #define PMU_PD_MODE_SEL_SHIFT      (0)
  #define PMU_PD_MODE_SEL_DEFAULT    (0<<0)
  #define PMU_PD_MODE_SEL_SOFTWARE   (1<<0)
  #define PMU_PENIRQ_MASK            (1<<8)
  #define PMU_PENIRQ_MASK_MASK       (1<<8)
  #define PMU_PENIRQ_MASK_SHIFT      (8)
  #define PMU_PENIRQ_MASK_NO_MASK    (0<<8)
  //#define PMU_PENIRQ_MASK_MASK     (1<<8)
  #define PMU_EOMIRQ_MASK            (1<<9)
  #define PMU_EOMIRQ_MASK_MASK       (1<<9)
  #define PMU_EOMIRQ_MASK_SHIFT      (9)
  #define PMU_EOMIRQ_MASK_NO_MASK    (0<<9)
  //#define PMU_EOMIRQ_MASK_MASK     (1<<9)
  #define PMU_PENIRQ_CLEAR           (1<<10)
  #define PMU_PENIRQ_CLEAR_MASK      (1<<10)
  #define PMU_PENIRQ_CLEAR_SHIFT     (10)
  #define PMU_EOMIRQ_CLEAR           (1<<11)
  #define PMU_EOMIRQ_CLEAR_MASK      (1<<11)
  #define PMU_EOMIRQ_CLEAR_SHIFT     (11)
  #define PMU_PENIRQ_CAUSE           (1<<12)
  #define PMU_PENIRQ_CAUSE_MASK      (1<<12)
  #define PMU_PENIRQ_CAUSE_SHIFT     (12)
  #define PMU_EOMIRQ_CAUSE           (1<<13)
  #define PMU_EOMIRQ_CAUSE_MASK      (1<<13)
  #define PMU_EOMIRQ_CAUSE_SHIFT     (13)
  #define PMU_PENIRQ                 (1<<14)
  //#define PMU_PENIRQ_MASK          (1<<14)
  #define PMU_PENIRQ_SHIFT           (14)
  #define PMU_EOMIRQ                 (1<<15)
  //#define PMU_EOMIRQ_MASK          (1<<15)
  #define PMU_EOMIRQ_SHIFT           (15)
  
  //LDO_settings
  #define PMU_GPDAC_ENABLE           (1<<0)
  #define PMU_GPDAC_ENABLE_MASK      (1<<0)
  #define PMU_GPDAC_ENABLE_SHIFT     (0)
  #define PMU_TSC_ENABLE             (1<<1)
  #define PMU_TSC_ENABLE_MASK        (1<<1)
  #define PMU_TSC_ENABLE_SHIFT       (1)
  #define PMU_VLCD_ENABLE            (1<<2)
  #define PMU_VLCD_ENABLE_MASK       (1<<2)
  #define PMU_VLCD_ENABLE_SHIFT      (2)
  #define PMU_VCAM_ENABLE            (1<<3)
  #define PMU_VCAM_ENABLE_MASK       (1<<3)
  #define PMU_VCAM_ENABLE_SHIFT      (3)
  #define PMU_VMIC_ENABLE            (1<<4)
  #define PMU_VMIC_ENABLE_MASK       (1<<4)
  #define PMU_VMIC_ENABLE_SHIFT      (4)
  #define PMU_VIBR_ENABLE            (1<<5)
  #define PMU_VIBR_ENABLE_MASK       (1<<5)
  #define PMU_VIBR_ENABLE_SHIFT      (5)
  #define PMU_VUSB_ENABLE            (1<<6)
  #define PMU_VUSB_ENABLE_MASK       (1<<6)
  #define PMU_VUSB_ENABLE_SHIFT      (6)
  #define PMU_VSIM2_ENABLE           (1<<7)
  #define PMU_VSIM2_ENABLE_MASK      (1<<7)
  #define PMU_VSIM2_ENABLE_SHIFT     (7)
  #define PMU_VSIM1_ENABLE           (1<<8)
  #define PMU_VSIM1_ENABLE_MASK      (1<<8)
  #define PMU_VSIM1_ENABLE_SHIFT     (8)
  #define PMU_VASW_ENABLE            (1<<9)
  #define PMU_VASW_ENABLE_MASK       (1<<9)
  #define PMU_VASW_ENABLE_SHIFT      (9)
  #define PMU_VA_ENABLE              (1<<10)
  #define PMU_VA_ENABLE_MASK         (1<<10)
  #define PMU_VA_ENABLE_SHIFT        (10)
  #define PMU_VMC_ENABLE             (1<<11)
  #define PMU_VMC_ENABLE_MASK        (1<<11)
  #define PMU_VMC_ENABLE_SHIFT       (11)
  
  //LDO_active_settings1
  #define PMU_LP_MODE_B_ACT          (1<<0)
  #define PMU_LP_MODE_B_ACT_MASK     (1<<0)
  #define PMU_LP_MODE_B_ACT_SHIFT    (0)
  #define PMU_LP_MODE_B_ACT_LP_MODE  (0<<0)
  #define PMU_LP_MODE_B_ACT_NORMAL_MODE (1<<0)
  #define PMU_PD_VSIM2_ACT           (1<<1)
  #define PMU_PD_VSIM2_ACT_MASK      (1<<1)
  #define PMU_PD_VSIM2_ACT_SHIFT     (1)
  #define PMU_PD_VSIM2_ACT_POWER_ON  (0<<1)
  #define PMU_PD_VSIM2_ACT_POWER_OFF (1<<1)
  #define PMU_PD_VSIM1_ACT           (1<<2)
  #define PMU_PD_VSIM1_ACT_MASK      (1<<2)
  #define PMU_PD_VSIM1_ACT_SHIFT     (2)
  #define PMU_PD_VSIM1_ACT_POWER_ON  (0<<2)
  #define PMU_PD_VSIM1_ACT_POWER_OFF (1<<2)
  #define PMU_PD_VMIC_ACT            (1<<3)
  #define PMU_PD_VMIC_ACT_MASK       (1<<3)
  #define PMU_PD_VMIC_ACT_SHIFT      (3)
  #define PMU_PD_VMIC_ACT_POWER_ON   (0<<3)
  #define PMU_PD_VMIC_ACT_POWER_OFF  (1<<3)
  #define PMU_PD_VUSB_ACT            (1<<4)
  #define PMU_PD_VUSB_ACT_MASK       (1<<4)
  #define PMU_PD_VUSB_ACT_SHIFT      (4)
  #define PMU_PD_VUSB_ACT_POWER_ON   (0<<4)
  #define PMU_PD_VUSB_ACT_POWER_OFF  (1<<4)
  #define PMU_PD_VIBR_ACT            (1<<5)
  #define PMU_PD_VIBR_ACT_MASK       (1<<5)
  #define PMU_PD_VIBR_ACT_SHIFT      (5)
  #define PMU_PD_VIBR_ACT_POWER_ON   (0<<5)
  #define PMU_PD_VIBR_ACT_POWER_OFF  (1<<5)
  #define PMU_PD_VMC_ACT             (1<<6)
  #define PMU_PD_VMC_ACT_MASK        (1<<6)
  #define PMU_PD_VMC_ACT_SHIFT       (6)
  #define PMU_PD_VMC_ACT_POWER_ON    (0<<6)
  #define PMU_PD_VMC_ACT_POWER_OFF   (1<<6)
  #define PMU_PD_VLCD_ACT            (1<<7)
  #define PMU_PD_VLCD_ACT_MASK       (1<<7)
  #define PMU_PD_VLCD_ACT_SHIFT      (7)
  #define PMU_PD_VLCD_ACT_POWER_ON   (0<<7)
  #define PMU_PD_VLCD_ACT_POWER_OFF  (1<<7)
  #define PMU_PD_VCAM_ACT            (1<<8)
  #define PMU_PD_VCAM_ACT_MASK       (1<<8)
  #define PMU_PD_VCAM_ACT_SHIFT      (8)
  #define PMU_PD_VCAM_ACT_POWER_ON   (0<<8)
  #define PMU_PD_VCAM_ACT_POWER_OFF  (1<<8)
  #define PMU_PD_VASW_ACT            (1<<9)
  #define PMU_PD_VASW_ACT_MASK       (1<<9)
  #define PMU_PD_VASW_ACT_SHIFT      (9)
  #define PMU_PD_VASW_ACT_POWER_ON   (0<<9)
  #define PMU_PD_VASW_ACT_POWER_OFF  (1<<9)
  #define PMU_PD_VA_ACT              (1<<10)
  #define PMU_PD_VA_ACT_MASK         (1<<10)
  #define PMU_PD_VA_ACT_SHIFT        (10)
  #define PMU_PD_VA_ACT_POWER_ON     (0<<10)
  #define PMU_PD_VA_ACT_POWER_OFF    (1<<10)
  #define PMU_PD_VIO_ACT             (1<<11)
  #define PMU_PD_VIO_ACT_MASK        (1<<11)
  #define PMU_PD_VIO_ACT_SHIFT       (11)
  #define PMU_PD_VIO_ACT_POWER_ON    (0<<11)
  #define PMU_PD_VIO_ACT_POWER_OFF   (1<<11)
  #define PMU_PD_VM_ACT              (1<<12)
  #define PMU_PD_VM_ACT_MASK         (1<<12)
  #define PMU_PD_VM_ACT_SHIFT        (12)
  #define PMU_PD_VM_ACT_POWER_ON     (0<<12)
  #define PMU_PD_VM_ACT_POWER_OFF    (1<<12)
  #define PMU_PD_DCDC_VD_ACT         (1<<13)
  #define PMU_PD_DCDC_VD_ACT_MASK    (1<<13)
  #define PMU_PD_DCDC_VD_ACT_SHIFT   (13)
  #define PMU_PD_DCDC_VD_ACT_POWER_ON (0<<13)
  #define PMU_PD_DCDC_VD_ACT_POWER_OFF (1<<13)
  #define PMU_PD_VD_LDO_ACT          (1<<14)
  #define PMU_PD_VD_LDO_ACT_MASK     (1<<14)
  #define PMU_PD_VD_LDO_ACT_SHIFT    (14)
  #define PMU_PD_VD_LDO_ACT_POWER_ON (0<<14)
  #define PMU_PD_VD_LDO_ACT_POWER_OFF (1<<14)
  
  //LDO_active_settings2
  #define PMU_VRTC_VBIT_ACT(n)       (((n)&7)<<0)
  #define PMU_VRTC_VBIT_ACT_MASK     (7<<0)
  #define PMU_VRTC_VBIT_ACT_SHIFT    (0)
  #define PMU_VSIM2_VSEL_ACT         (1<<3)
  #define PMU_VSIM2_VSEL_ACT_MASK    (1<<3)
  #define PMU_VSIM2_VSEL_ACT_SHIFT   (3)
  #define PMU_VSIM2_VSEL_ACT_3V      (0<<3)
  #define PMU_VSIM2_VSEL_ACT_1_8V    (1<<3)
  #define PMU_VSIM1_VSEL_ACT         (1<<4)
  #define PMU_VSIM1_VSEL_ACT_MASK    (1<<4)
  #define PMU_VSIM1_VSEL_ACT_SHIFT   (4)
  #define PMU_VSIM1_VSEL_ACT_3V      (0<<4)
  #define PMU_VSIM1_VSEL_ACT_1_8V    (1<<4)
  #define PMU_VMIC_VSEL_ACT(n)       (((n)&7)<<5)
  #define PMU_VMIC_VSEL_ACT_MASK     (7<<5)
  #define PMU_VMIC_VSEL_ACT_SHIFT    (5)
  #define PMU_VIBR_VSEL_ACT          (1<<8)
  #define PMU_VIBR_VSEL_ACT_MASK     (1<<8)
  #define PMU_VIBR_VSEL_ACT_SHIFT    (8)
  #define PMU_VIBR_VSEL_ACT_2_8V     (0<<8)
  #define PMU_VIBR_VSEL_ACT_1_8V     (1<<8)
  #define PMU_VMC_VSEL_ACT           (1<<9)
  #define PMU_VMC_VSEL_ACT_MASK      (1<<9)
  #define PMU_VMC_VSEL_ACT_SHIFT     (9)
  #define PMU_VMC_VSEL_ACT_2_8V      (0<<9)
  #define PMU_VMC_VSEL_ACT_1_8V      (1<<9)
  #define PMU_VLCD_VSEL_ACT          (1<<10)
  #define PMU_VLCD_VSEL_ACT_MASK     (1<<10)
  #define PMU_VLCD_VSEL_ACT_SHIFT    (10)
  #define PMU_VLCD_VSEL_ACT_2_8V     (0<<10)
  #define PMU_VLCD_VSEL_ACT_1_8V     (1<<10)
  #define PMU_VCAM_VSEL_ACT          (1<<11)
  #define PMU_VCAM_VSEL_ACT_MASK     (1<<11)
  #define PMU_VCAM_VSEL_ACT_SHIFT    (11)
  #define PMU_VCAM_VSEL_ACT_2_8V     (0<<11)
  #define PMU_VCAM_VSEL_ACT_1_8V     (1<<11)
  #define PMU_VASW_VSEL_ACT          (1<<12)
  #define PMU_VASW_VSEL_ACT_MASK     (1<<12)
  #define PMU_VASW_VSEL_ACT_SHIFT    (12)
  #define PMU_VASW_VSEL_ACT_2_8V     (0<<12)
  #define PMU_VASW_VSEL_ACT_1_8V     (1<<12)
  #define PMU_VIO_VSEL_ACT           (1<<13)
  #define PMU_VIO_VSEL_ACT_MASK      (1<<13)
  #define PMU_VIO_VSEL_ACT_SHIFT     (13)
  #define PMU_VIO_VSEL_ACT_2_8V      (0<<13)
  #define PMU_VIO_VSEL_ACT_1_8V      (1<<13)
  #define PMU_VD_VSEL_LDO_ACT(n)     (((n)&3)<<14)
  
  //LDO_active_settings3
  #define PMU_VA_IBIT_ACT(n)         (((n)&7)<<0)
  #define PMU_VA_IBIT_ACT_MASK       (7<<0)
  #define PMU_VA_IBIT_ACT_SHIFT      (0)
  #define PMU_VIO_IBIT_ACT(n)        (((n)&7)<<3)
  #define PMU_VIO_IBIT_ACT_MASK      (7<<3)
  #define PMU_VIO_IBIT_ACT_SHIFT     (3)
  #define PMU_VM_IBIT_ACT(n)         (((n)&7)<<6)
  #define PMU_VM_IBIT_ACT_MASK       (7<<6)
  #define PMU_VM_IBIT_ACT_SHIFT      (6)
  #define PMU_VD_BIT_DCDC_ACT(n)     (((n)&7)<<9)
  #define PMU_VD_BIT_DCDC_ACT_MASK   (7<<9)
  #define PMU_VD_BIT_DCDC_ACT_SHIFT  (9)
  #define PMU_VD_IBIT_LDO_ACT(n)     (((n)&7)<<12)
  #define PMU_VD_IBIT_LDO_ACT_MASK   (7<<12)
  #define PMU_VD_IBIT_LDO_ACT_SHIFT  (12)
  
  //LDO_active_settings4
  #define PMU_VIBR_IBIT_ACT(n)       (((n)&7)<<0)
  #define PMU_VIBR_IBIT_ACT_MASK     (7<<0)
  #define PMU_VIBR_IBIT_ACT_SHIFT    (0)
  #define PMU_VMC_IBIT_ACT(n)        (((n)&7)<<3)
  #define PMU_VMC_IBIT_ACT_MASK      (7<<3)
  #define PMU_VMC_IBIT_ACT_SHIFT     (3)
  #define PMU_VLCD_IBIT_ACT(n)       (((n)&7)<<6)
  #define PMU_VLCD_IBIT_ACT_MASK     (7<<6)
  #define PMU_VLCD_IBIT_ACT_SHIFT    (6)
  #define PMU_VCAM_IBIT_ACT(n)       (((n)&7)<<9)
  #define PMU_VCAM_IBIT_ACT_MASK     (7<<9)
  #define PMU_VCAM_IBIT_ACT_SHIFT    (9)
  #define PMU_VASW_IBIT_ACT(n)       (((n)&7)<<12)
  #define PMU_VASW_IBIT_ACT_MASK     (7<<12)
  #define PMU_VASW_IBIT_ACT_SHIFT    (12)
  
  //LDO_active_settings5
  #define PMU_VSIM2_IBIT_ACT(n)      (((n)&7)<<0)
  #define PMU_VSIM2_IBIT_ACT_MASK    (7<<0)
  #define PMU_VSIM2_IBIT_ACT_SHIFT   (0)
  #define PMU_VSIM1_IBIT_ACT(n)      (((n)&7)<<3)
  #define PMU_VSIM1_IBIT_ACT_MASK    (7<<3)
  #define PMU_VSIM1_IBIT_ACT_SHIFT   (3)
  #define PMU_VMIC_IBIT_ACT(n)       (((n)&7)<<6)
  #define PMU_VMIC_IBIT_ACT_MASK     (7<<6)
  #define PMU_VMIC_IBIT_ACT_SHIFT    (6)
  #define PMU_VUSB_IBIT_ACT(n)       (((n)&7)<<9)
  #define PMU_VUSB_IBIT_ACT_MASK     (7<<9)
  #define PMU_VUSB_IBIT_ACT_SHIFT    (9)
  
  //LDO_LP_SETTING_1
  #define PMU_LP_MODE_B_LP           (1<<0)
  #define PMU_LP_MODE_B_LP_MASK      (1<<0)
  #define PMU_LP_MODE_B_LP_SHIFT     (0)
  #define PMU_LP_MODE_B_LP_LP_MODE   (0<<0)
  #define PMU_LP_MODE_B_LP_NORMAL_MODE (1<<0)
  #define PMU_PD_VSIM2_LP            (1<<1)
  #define PMU_PD_VSIM2_LP_MASK       (1<<1)
  #define PMU_PD_VSIM2_LP_SHIFT      (1)
  #define PMU_PD_VSIM2_LP_POWER_ON   (0<<1)
  #define PMU_PD_VSIM2_LP_POWER_OFF  (1<<1)
  #define PMU_PD_VSIM1_LP            (1<<2)
  #define PMU_PD_VSIM1_LP_MASK       (1<<2)
  #define PMU_PD_VSIM1_LP_SHIFT      (2)
  #define PMU_PD_VSIM1_LP_POWER_ON   (0<<2)
  #define PMU_PD_VSIM1_LP_POWER_OFF  (1<<2)
  #define PMU_PD_VMIC_LP             (1<<3)
  #define PMU_PD_VMIC_LP_MASK        (1<<3)
  #define PMU_PD_VMIC_LP_SHIFT       (3)
  #define PMU_PD_VMIC_LP_POWER_ON    (0<<3)
  #define PMU_PD_VMIC_LP_POWER_OFF   (1<<3)
  #define PMU_PD_VUSB_LP             (1<<4)
  #define PMU_PD_VUSB_LP_MASK        (1<<4)
  #define PMU_PD_VUSB_LP_SHIFT       (4)
  #define PMU_PD_VUSB_LP_POWER_ON    (0<<4)
  #define PMU_PD_VUSB_LP_POWER_OFF   (1<<4)
  #define PMU_PD_VIBR_LP             (1<<5)
  #define PMU_PD_VIBR_LP_MASK        (1<<5)
  #define PMU_PD_VIBR_LP_SHIFT       (5)
  #define PMU_PD_VIBR_LP_POWER_ON    (0<<5)
  #define PMU_PD_VIBR_LP_POWER_OFF   (1<<5)
  #define PMU_PD_VMC_LP              (1<<6)
  #define PMU_PD_VMC_LP_MASK         (1<<6)
  #define PMU_PD_VMC_LP_SHIFT        (6)
  #define PMU_PD_VMC_LP_POWER_ON     (0<<6)
  #define PMU_PD_VMC_LP_POWER_OFF    (1<<6)
  #define PMU_PD_VLCD_LP             (1<<7)
  #define PMU_PD_VLCD_LP_MASK        (1<<7)
  #define PMU_PD_VLCD_LP_SHIFT       (7)
  #define PMU_PD_VLCD_LP_POWER_ON    (0<<7)
  #define PMU_PD_VLCD_LP_POWER_OFF   (1<<7)
  #define PMU_PD_VCAM_LP             (1<<8)
  #define PMU_PD_VCAM_LP_MASK        (1<<8)
  #define PMU_PD_VCAM_LP_SHIFT       (8)
  #define PMU_PD_VCAM_LP_POWER_ON    (0<<8)
  #define PMU_PD_VCAM_LP_POWER_OFF   (1<<8)
  #define PMU_PD_VASW_LP             (1<<9)
  #define PMU_PD_VASW_LP_MASK        (1<<9)
  #define PMU_PD_VASW_LP_SHIFT       (9)
  #define PMU_PD_VASW_LP_POWER_ON    (0<<9)
  #define PMU_PD_VASW_LP_POWER_OFF   (1<<9)
  #define PMU_PD_VA_LP               (1<<10)
  #define PMU_PD_VA_LP_MASK          (1<<10)
  #define PMU_PD_VA_LP_SHIFT         (10)
  #define PMU_PD_VA_LP_POWER_ON      (0<<10)
  #define PMU_PD_VA_LP_POWER_OFF     (1<<10)
  #define PMU_PD_VIO_LP              (1<<11)
  #define PMU_PD_VIO_LP_MASK         (1<<11)
  #define PMU_PD_VIO_LP_SHIFT        (11)
  #define PMU_PD_VIO_LP_POWER_ON     (0<<11)
  #define PMU_PD_VIO_LP_POWER_OFF    (1<<11)
  #define PMU_PD_VM_LP               (1<<12)
  #define PMU_PD_VM_LP_MASK          (1<<12)
  #define PMU_PD_VM_LP_SHIFT         (12)
  #define PMU_PD_VM_LP_POWER_ON      (0<<12)
  #define PMU_PD_VM_LP_POWER_OFF     (1<<12)
  #define PMU_PD_DCDC_VD_LP          (1<<13)
  #define PMU_PD_DCDC_VD_LP_MASK     (1<<13)
  #define PMU_PD_DCDC_VD_LP_SHIFT    (13)
  #define PMU_PD_DCDC_VD_LP_POWER_ON (0<<13)
  #define PMU_PD_DCDC_VD_LP_POWER_OFF (1<<13)
  #define PMU_PD_VD_LDO_LP           (1<<14)
  #define PMU_PD_VD_LDO_LP_MASK      (1<<14)
  #define PMU_PD_VD_LDO_LP_SHIFT     (14)
  #define PMU_PD_VD_LDO_LP_POWER_ON  (0<<14)
  #define PMU_PD_VD_LDO_LP_POWER_OFF (1<<14)
  
  //LDO_LP_SETTING_2
  #define PMU_VRTC_VBIT_LP(n)        (((n)&7)<<0)
  #define PMU_VRTC_VBIT_LP_MASK      (7<<0)
  #define PMU_VRTC_VBIT_LP_SHIFT     (0)
  #define PMU_VSIM2_VSEL_LP          (1<<3)
  #define PMU_VSIM2_VSEL_LP_MASK     (1<<3)
  #define PMU_VSIM2_VSEL_LP_SHIFT    (3)
  #define PMU_VSIM2_VSEL_LP_2_8V     (0<<3)
  #define PMU_VSIM2_VSEL_LP_1_8V     (1<<3)
  #define PMU_VSIM1_VSEL_LP          (1<<4)
  #define PMU_VSIM1_VSEL_LP_MASK     (1<<4)
  #define PMU_VSIM1_VSEL_LP_SHIFT    (4)
  #define PMU_VSIM1_VSEL_LP_2_8V     (0<<4)
  #define PMU_VSIM1_VSEL_LP_1_8V     (1<<4)
  #define PMU_VMIC_VSEL_LP(n)        (((n)&7)<<5)
  #define PMU_VMIC_VSEL_LP_MASK      (7<<5)
  #define PMU_VMIC_VSEL_LP_SHIFT     (5)
  #define PMU_VIBR_VSEL_LP           (1<<8)
  #define PMU_VIBR_VSEL_LP_MASK      (1<<8)
  #define PMU_VIBR_VSEL_LP_SHIFT     (8)
  #define PMU_VIBR_VSEL_LP_2_8V      (0<<8)
  #define PMU_VIBR_VSEL_LP_1_8V      (1<<8)
  #define PMU_VMC_VSEL_LP            (1<<9)
  #define PMU_VMC_VSEL_LP_MASK       (1<<9)
  #define PMU_VMC_VSEL_LP_SHIFT      (9)
  #define PMU_VMC_VSEL_LP_2_8V       (0<<9)
  #define PMU_VMC_VSEL_LP_1_8V       (1<<9)
  #define PMU_VLCD_VSEL_LP           (1<<10)
  #define PMU_VLCD_VSEL_LP_MASK      (1<<10)
  #define PMU_VLCD_VSEL_LP_SHIFT     (10)
  #define PMU_VLCD_VSEL_LP_2_8V      (0<<10)
  #define PMU_VLCD_VSEL_LP_1_8V      (1<<10)
  #define PMU_VCAM_VSEL_LP           (1<<11)
  #define PMU_VCAM_VSEL_LP_MASK      (1<<11)
  #define PMU_VCAM_VSEL_LP_SHIFT     (11)
  #define PMU_VCAM_VSEL_LP_2_8V      (0<<11)
  #define PMU_VCAM_VSEL_LP_1_8V      (1<<11)
  #define PMU_VASW_VSEL_LP           (1<<12)
  #define PMU_VASW_VSEL_LP_MASK      (1<<12)
  #define PMU_VASW_VSEL_LP_SHIFT     (12)
  #define PMU_VASW_VSEL_LP_2_8V      (0<<12)
  #define PMU_VASW_VSEL_LP_1_8V      (1<<12)
  #define PMU_VIO_VSEL_LP            (1<<13)
  #define PMU_VIO_VSEL_LP_MASK       (1<<13)
  #define PMU_VIO_VSEL_LP_SHIFT      (13)
  #define PMU_VIO_VSEL_LP_2_8V       (0<<13)
  #define PMU_VIO_VSEL_LP_1_8V       (1<<13)
  #define PMU_VD_VSEL_LDO_LP(n)      (((n)&3)<<14)
  #define PMU_VD_VSEL_LDO_LP_MASK    (3<<14)
  #define PMU_VD_VSEL_LDO_LP_SHIFT   (14)
  
  //LDO_LP_SETTING_3
  #define PMU_VA_IBIT_LP(n)          (((n)&7)<<0)
  #define PMU_VA_IBIT_LP_MASK        (7<<0)
  #define PMU_VA_IBIT_LP_SHIFT       (0)
  #define PMU_VIO_IBIT_LP(n)         (((n)&7)<<3)
  #define PMU_VIO_IBIT_LP_MASK       (7<<3)
  #define PMU_VIO_IBIT_LP_SHIFT      (3)
  #define PMU_VM_IBIT_LP(n)          (((n)&7)<<6)
  #define PMU_VM_IBIT_LP_MASK        (7<<6)
  #define PMU_VM_IBIT_LP_SHIFT       (6)
  #define PMU_VD_BIT_DCDC_LP(n)      (((n)&7)<<9)
  #define PMU_VD_BIT_DCDC_LP_MASK    (7<<9)
  #define PMU_VD_BIT_DCDC_LP_SHIFT   (9)
  #define PMU_VD_IBIT_LDO_LP(n)      (((n)&7)<<12)
  #define PMU_VD_IBIT_LDO_LP_MASK    (7<<12)
  #define PMU_VD_IBIT_LDO_LP_SHIFT   (12)
  
  //LDO_LP_SETTING_4
  #define PMU_VIBR_IBIT_LP(n)        (((n)&7)<<0)
  #define PMU_VIBR_IBIT_LP_MASK      (7<<0)
  #define PMU_VIBR_IBIT_LP_SHIFT     (0)
  #define PMU_VMC_IBIT_LP(n)         (((n)&7)<<3)
  #define PMU_VMC_IBIT_LP_MASK       (7<<3)
  #define PMU_VMC_IBIT_LP_SHIFT      (3)
  #define PMU_VLCD_IBIT_LP(n)        (((n)&7)<<6)
  #define PMU_VLCD_IBIT_LP_MASK      (7<<6)
  #define PMU_VLCD_IBIT_LP_SHIFT     (6)
  #define PMU_VCAM_IBIT_LP(n)        (((n)&7)<<9)
  #define PMU_VCAM_IBIT_LP_MASK      (7<<9)
  #define PMU_VCAM_IBIT_LP_SHIFT     (9)
  #define PMU_VASW_IBIT_LP(n)        (((n)&7)<<12)
  #define PMU_VASW_IBIT_LP_MASK      (7<<12)
  #define PMU_VASW_IBIT_LP_SHIFT     (12)
  
  //LDO_LP_SETTING_5
  #define PMU_VSIM2_IBIT_LP(n)       (((n)&7)<<0)
  #define PMU_VSIM2_IBIT_LP_MASK     (7<<0)
  #define PMU_VSIM2_IBIT_LP_SHIFT    (0)
  #define PMU_VSIM1_IBIT_LP(n)       (((n)&7)<<3)
  #define PMU_VSIM1_IBIT_LP_MASK     (7<<3)
  #define PMU_VSIM1_IBIT_LP_SHIFT    (3)
  #define PMU_VMIC_IBIT_LP(n)        (((n)&7)<<6)
  #define PMU_VMIC_IBIT_LP_MASK      (7<<6)
  #define PMU_VMIC_IBIT_LP_SHIFT     (6)
  #define PMU_VUSB_IBIT_LP(n)        (((n)&7)<<9)
  #define PMU_VUSB_IBIT_LP_MASK      (7<<9)
  #define PMU_VUSB_IBIT_LP_SHIFT     (9)
  
  //LDO_POWER_ON_SETTING_1
  #define PMU_LP_MODE_B_PON          (1<<0)
  #define PMU_LP_MODE_B_PON_MASK     (1<<0)
  #define PMU_LP_MODE_B_PON_SHIFT    (0)
  #define PMU_LP_MODE_B_PON_LP_MODE  (0<<0)
  #define PMU_LP_MODE_B_PON_NORMAL_MODE (1<<0)
  #define PMU_PD_VSIM2_PON           (1<<1)
  #define PMU_PD_VSIM2_PON_MASK      (1<<1)
  #define PMU_PD_VSIM2_PON_SHIFT     (1)
  #define PMU_PD_VSIM2_PON_POWER_ON  (0<<1)
  #define PMU_PD_VSIM2_PON_POWER_OFF (1<<1)
  #define PMU_PD_VSIM1_PON           (1<<2)
  #define PMU_PD_VSIM1_PON_MASK      (1<<2)
  #define PMU_PD_VSIM1_PON_SHIFT     (2)
  #define PMU_PD_VSIM1_PON_POWER_ON  (0<<2)
  #define PMU_PD_VSIM1_PON_POWER_OFF (1<<2)
  #define PMU_PD_VMIC_PON            (1<<3)
  #define PMU_PD_VMIC_PON_MASK       (1<<3)
  #define PMU_PD_VMIC_PON_SHIFT      (3)
  #define PMU_PD_VMIC_PON_POWER_ON   (0<<3)
  #define PMU_PD_VMIC_PON_POWER_OFF  (1<<3)
  #define PMU_PD_VUSB_PON            (1<<4)
  #define PMU_PD_VUSB_PON_MASK       (1<<4)
  #define PMU_PD_VUSB_PON_SHIFT      (4)
  #define PMU_PD_VUSB_PON_POWER_ON   (0<<4)
  #define PMU_PD_VUSB_PON_POWER_OFF  (1<<4)
  #define PMU_PD_VIBR_PON            (1<<5)
  #define PMU_PD_VIBR_PON_MASK       (1<<5)
  #define PMU_PD_VIBR_PON_SHIFT      (5)
  #define PMU_PD_VIBR_PON_POWER_ON   (0<<5)
  #define PMU_PD_VIBR_PON_POWER_OFF  (1<<5)
  #define PMU_PD_VMC_PON             (1<<6)
  #define PMU_PD_VMC_PON_MASK        (1<<6)
  #define PMU_PD_VMC_PON_SHIFT       (6)
  #define PMU_PD_VMC_PON_POWER_ON    (0<<6)
  #define PMU_PD_VMC_PON_POWER_OFF   (1<<6)
  #define PMU_PD_VLCD_PON            (1<<7)
  #define PMU_PD_VLCD_PON_MASK       (1<<7)
  #define PMU_PD_VLCD_PON_SHIFT      (7)
  #define PMU_PD_VLCD_PON_POWER_ON   (0<<7)
  #define PMU_PD_VLCD_PON_POWER_OFF  (1<<7)
  #define PMU_PD_VCAM_PON            (1<<8)
  #define PMU_PD_VCAM_PON_MASK       (1<<8)
  #define PMU_PD_VCAM_PON_SHIFT      (8)
  #define PMU_PD_VCAM_PON_POWER_ON   (0<<8)
  #define PMU_PD_VCAM_PON_POWER_OFF  (1<<8)
  #define PMU_PD_VASW_PON            (1<<9)
  #define PMU_PD_VASW_PON_MASK       (1<<9)
  #define PMU_PD_VASW_PON_SHIFT      (9)
  #define PMU_PD_VASW_PON_POWER_ON   (0<<9)
  #define PMU_PD_VASW_PON_POWER_OFF  (1<<9)
  #define PMU_PD_VA_PON              (1<<10)
  #define PMU_PD_VA_PON_MASK         (1<<10)
  #define PMU_PD_VA_PON_SHIFT        (10)
  #define PMU_PD_VA_PON_POWER_ON     (0<<10)
  #define PMU_PD_VA_PON_POWER_OFF    (1<<10)
  #define PMU_PD_VIO_PON             (1<<11)
  #define PMU_PD_VIO_PON_MASK        (1<<11)
  #define PMU_PD_VIO_PON_SHIFT       (11)
  #define PMU_PD_VIO_PON_POWER_ON    (0<<11)
  #define PMU_PD_VIO_PON_POWER_OFF   (1<<11)
  #define PMU_PD_VM_PON              (1<<12)
  #define PMU_PD_VM_PON_MASK         (1<<12)
  #define PMU_PD_VM_PON_SHIFT        (12)
  #define PMU_PD_VM_PON_POWER_ON     (0<<12)
  #define PMU_PD_VM_PON_POWER_OFF    (1<<12)
  #define PMU_PD_DCDC_VD_PON         (1<<13)
  #define PMU_PD_DCDC_VD_PON_MASK    (1<<13)
  #define PMU_PD_DCDC_VD_PON_SHIFT   (13)
  #define PMU_PD_DCDC_VD_PON_POWER_ON (0<<13)
  #define PMU_PD_DCDC_VD_PON_POWER_OFF (1<<13)
  #define PMU_PD_VD_LDO_PON          (1<<14)
  #define PMU_PD_VD_LDO_PON_MASK     (1<<14)
  #define PMU_PD_VD_LDO_PON_SHIFT    (14)
  #define PMU_PD_VD_LDO_PON_POWER_ON (0<<14)
  #define PMU_PD_VD_LDO_PON_POWER_OFF (1<<14)
  
  //LDO_POWER_ON_SETTING_2
  #define PMU_VRTC_VBIT_PON(n)       (((n)&7)<<0)
  #define PMU_VRTC_VBIT_PON_MASK     (7<<0)
  #define PMU_VRTC_VBIT_PON_SHIFT    (0)
  #define PMU_VSIM2_VSEL_PON         (1<<3)
  #define PMU_VSIM2_VSEL_PON_MASK    (1<<3)
  #define PMU_VSIM2_VSEL_PON_SHIFT   (3)
  #define PMU_VSIM1_VSEL_PON         (1<<4)
  #define PMU_VSIM1_VSEL_PON_MASK    (1<<4)
  #define PMU_VSIM1_VSEL_PON_SHIFT   (4)
  #define PMU_VMIC_VSEL_PON(n)       (((n)&7)<<5)
  #define PMU_VMIC_VSEL_PON_MASK     (7<<5)
  #define PMU_VMIC_VSEL_PON_SHIFT    (5)
  #define PMU_VIBR_VSEL_PON          (1<<8)
  #define PMU_VIBR_VSEL_PON_MASK     (1<<8)
  #define PMU_VIBR_VSEL_PON_SHIFT    (8)
  #define PMU_VMC_VSEL_PON           (1<<9)
  #define PMU_VMC_VSEL_PON_MASK      (1<<9)
  #define PMU_VMC_VSEL_PON_SHIFT     (9)
  #define PMU_VLCD_VSEL_PON          (1<<10)
  #define PMU_VLCD_VSEL_PON_MASK     (1<<10)
  #define PMU_VLCD_VSEL_PON_SHIFT    (10)
  #define PMU_VCAM_VSEL_PON          (1<<11)
  #define PMU_VCAM_VSEL_PON_MASK     (1<<11)
  #define PMU_VCAM_VSEL_PON_SHIFT    (11)
  #define PMU_VASW_VSEL_PON          (1<<12)
  #define PMU_VASW_VSEL_PON_MASK     (1<<12)
  #define PMU_VASW_VSEL_PON_SHIFT    (12)
  #define PMU_VIO_VSEL_PON           (1<<13)
  #define PMU_VIO_VSEL_PON_MASK      (1<<13)
  #define PMU_VIO_VSEL_PON_SHIFT     (13)
  #define PMU_VD_VSEL_LDO_PON(n)     (((n)&3)<<14)
  #define PMU_VD_VSEL_LDO_PON_MASK   (3<<14)
  #define PMU_VD_VSEL_LDO_PON_SHIFT  (14)
  
  //LDO_POWER_ON_SETTING_3
  #define PMU_VA_IBIT_PON(n)         (((n)&7)<<0)
  #define PMU_VA_IBIT_PON_MASK       (7<<0)
  #define PMU_VA_IBIT_PON_SHIFT      (0)
  #define PMU_VIO_IBIT_PON(n)        (((n)&7)<<3)
  #define PMU_VIO_IBIT_PON_MASK      (7<<3)
  #define PMU_VIO_IBIT_PON_SHIFT     (3)
  #define PMU_VM_IBIT_PON(n)         (((n)&7)<<6)
  #define PMU_VM_IBIT_PON_MASK       (7<<6)
  #define PMU_VM_IBIT_PON_SHIFT      (6)
  #define PMU_VD_BIT_DCDC_PON(n)     (((n)&7)<<9)
  #define PMU_VD_BIT_DCDC_PON_MASK   (7<<9)
  #define PMU_VD_BIT_DCDC_PON_SHIFT  (9)
  #define PMU_VD_IBIT_LDO_PON(n)     (((n)&7)<<12)
  #define PMU_VD_IBIT_LDO_PON_MASK   (7<<12)
  #define PMU_VD_IBIT_LDO_PON_SHIFT  (12)
  
  //LDO_POWER_ON_SETTING_4
  #define PMU_VIBR_IBIT_PON(n)       (((n)&7)<<0)
  #define PMU_VIBR_IBIT_PON_MASK     (7<<0)
  #define PMU_VIBR_IBIT_PON_SHIFT    (0)
  #define PMU_VMC_IBIT_PON(n)        (((n)&7)<<3)
  #define PMU_VMC_IBIT_PON_MASK      (7<<3)
  #define PMU_VMC_IBIT_PON_SHIFT     (3)
  #define PMU_VLCD_IBIT_PON(n)       (((n)&7)<<6)
  #define PMU_VLCD_IBIT_PON_MASK     (7<<6)
  #define PMU_VLCD_IBIT_PON_SHIFT    (6)
  #define PMU_VCAM_IBIT_PON(n)       (((n)&7)<<9)
  #define PMU_VCAM_IBIT_PON_MASK     (7<<9)
  #define PMU_VCAM_IBIT_PON_SHIFT    (9)
  #define PMU_VASW_IBIT_PON(n)       (((n)&7)<<12)
  #define PMU_VASW_IBIT_PON_MASK     (7<<12)
  #define PMU_VASW_IBIT_PON_SHIFT    (12)
  
  //LDO_POWER_ON_SETTING_5
  #define PMU_VSIM2_IBIT_PON(n)      (((n)&7)<<0)
  #define PMU_VSIM2_IBIT_PON_MASK    (7<<0)
  #define PMU_VSIM2_IBIT_PON_SHIFT   (0)
  #define PMU_VSIM1_IBIT_PON(n)      (((n)&7)<<3)
  #define PMU_VSIM1_IBIT_PON_MASK    (7<<3)
  #define PMU_VSIM1_IBIT_PON_SHIFT   (3)
  #define PMU_VMIC_IBIT_PON(n)       (((n)&7)<<6)
  #define PMU_VMIC_IBIT_PON_MASK     (7<<6)
  #define PMU_VMIC_IBIT_PON_SHIFT    (6)
  #define PMU_VUSB_IBIT_PON(n)       (((n)&7)<<9)
  #define PMU_VUSB_IBIT_PON_MASK     (7<<9)
  #define PMU_VUSB_IBIT_PON_SHIFT    (9)
  
  //Charger_setting_1
  #define PMU_BG_CAL_TC_BIT1(n)      (((n)&31)<<0)
  #define PMU_BG_CAL_TC_BIT1_MASK    (31<<0)
  #define PMU_BG_CAL_TC_BIT1_SHIFT   (0)
  #define PMU_IREF_CTL_CHAGER(n)     (((n)&7)<<5)
  #define PMU_IREF_CTL_CHAGER_MASK   (7<<5)
  #define PMU_IREF_CTL_CHAGER_SHIFT  (5)
  #define PMU_UV_SEL(n)              (((n)&3)<<8)
  #define PMU_UV_SEL_MASK            (3<<8)
  #define PMU_UV_SEL_SHIFT           (8)
  #define PMU_PRECH_VSEL(n)          (((n)&7)<<10)
  #define PMU_PRECH_VSEL_MASK        (7<<10)
  #define PMU_PRECH_VSEL_SHIFT       (10)
  #define PMU_CHARGER_VSEL(n)        (((n)&7)<<13)
  #define PMU_CHARGER_VSEL_MASK      (7<<13)
  #define PMU_CHARGER_VSEL_SHIFT     (13)
  
  //Charger_setting_2
  #define PMU_BG_CAL_TC_BIT2(n)      (((n)&31)<<0)
  #define PMU_BG_CAL_TC_BIT2_MASK    (31<<0)
  #define PMU_BG_CAL_TC_BIT2_SHIFT   (0)
  #define PMU_CHR_VFB_SEL_REG16(n)   (((n)&15)<<5)
  #define PMU_CHR_VFB_SEL_REG16_MASK (15<<5)
  #define PMU_CHR_VFB_SEL_REG16_SHIFT (5)
  #define PMU_CHR_VFB_SEL_DR         (1<<9)
  #define PMU_CHR_VFB_SEL_DR_MASK    (1<<9)
  #define PMU_CHR_VFB_SEL_DR_SHIFT   (9)
  
  //Charger_status
  #define PMU_LOW_BAT                (1<<0)
  #define PMU_LOW_BAT_MASK           (1<<0)
  #define PMU_LOW_BAT_SHIFT          (0)
  #define PMU_LOW_BAT_LOW            (1<<0)
  #define PMU_LOW_BAT_HIGH           (0<<0)
  #define PMU_CHR_RCH                (1<<1)
  #define PMU_CHR_RCH_MASK           (1<<1)
  #define PMU_CHR_RCH_SHIFT          (1)
  #define PMU_CHR_RCH_LOW            (1<<1)
  #define PMU_CHR_RCH_HIGH           (0<<1)
  #define PMU_CHR_TERM               (1<<2)
  #define PMU_CHR_TERM_MASK          (1<<2)
  #define PMU_CHR_TERM_SHIFT         (2)
  #define PMU_CHR_TERM_LOW           (1<<2)
  #define PMU_CHR_TERM_HIGH          (0<<2)
  #define PMU_CHR_TAPER              (1<<3)
  #define PMU_CHR_TAPER_MASK         (1<<3)
  #define PMU_CHR_TAPER_SHIFT        (3)
  #define PMU_CHR_TAPER_LOW          (1<<3)
  #define PMU_CHR_TAPER_HIGH         (0<<3)
  #define PMU_CHR_VREG16             (1<<4)
  #define PMU_CHR_VREG16_MASK        (1<<4)
  #define PMU_CHR_VREG16_SHIFT       (4)
  #define PMU_CHR_VREG16_LOW         (0<<4)
  #define PMU_CHR_VREG16_HIGH        (1<<4)
  #define PMU_CHR_CREG16             (1<<5)
  #define PMU_CHR_CREG16_MASK        (1<<5)
  #define PMU_CHR_CREG16_SHIFT       (5)
  #define PMU_CHR_CREG16_LOW         (0<<5)
  #define PMU_CHR_CREG16_HIGH        (1<<5)
  #define PMU_CHR_AC_ON              (1<<6)
  #define PMU_CHR_AC_ON_MASK         (1<<6)
  #define PMU_CHR_AC_ON_SHIFT        (6)
  #define PMU_CHR_AC_ON_OFF          (0<<6)
  #define PMU_CHR_AC_ON_ON           (1<<6)
  #define PMU_BG_CHARGER_CAL_OUT     (1<<7)
  #define PMU_BG_CHARGER_CAL_OUT_MASK (1<<7)
  #define PMU_BG_CHARGER_CAL_OUT_SHIFT (7)
  #define PMU_CAL_OUT_CREG16         (1<<8)
  #define PMU_CAL_OUT_CREG16_MASK    (1<<8)
  #define PMU_CAL_OUT_CREG16_SHIFT   (8)
  #define PMU_BG_PMU_CAL_OUT         (1<<9)
  #define PMU_BG_PMU_CAL_OUT_MASK    (1<<9)
  #define PMU_BG_PMU_CAL_OUT_SHIFT   (9)
  #define PMU_SAR_OUT                (1<<10)
  #define PMU_SAR_OUT_MASK           (1<<10)
  #define PMU_SAR_OUT_SHIFT          (10)
  #define PMU_PENIRQ_B               (1<<11)
  #define PMU_PENIRQ_B_MASK          (1<<11)
  #define PMU_PENIRQ_B_SHIFT         (11)
  #define PMU_PENIRQ_B_TOUCHED       (0<<11)
  #define PMU_PENIRQ_B_NOT_TOUCHED   (1<<11)
  #define PMU_OVER_TEMP              (1<<12)
  #define PMU_OVER_TEMP_MASK         (1<<12)
  #define PMU_OVER_TEMP_SHIFT        (12)
  #define PMU_OVER_TEMP_TEMP_OK      (0<<12)
  #define PMU_OVER_TEMP_TEMP_HIGH    (1<<12)
  
  //Charger_control
  #define PMU_TERM_CHARGE_TIMER(n)   (((n)&3)<<0)
  #define PMU_TERM_CHARGE_TIMER_MASK (3<<0)
  #define PMU_TERM_CHARGE_TIMER_SHIFT (0)
  #define PMU_PRE_CHARGE_TIMER(n)    (((n)&3)<<2)
  #define PMU_PRE_CHARGE_TIMER_MASK  (3<<2)
  #define PMU_PRE_CHARGE_TIMER_SHIFT (2)
  #define PMU_POWER_ON_TIMER(n)      (((n)&3)<<4)
  #define PMU_POWER_ON_TIMER_MASK    (3<<4)
  #define PMU_POWER_ON_TIMER_SHIFT   (4)
  #define PMU_CREG16_CAL_POLARITY    (1<<6)
  #define PMU_CREG16_CAL_POLARITY_MASK (1<<6)
  #define PMU_CREG16_CAL_POLARITY_SHIFT (6)
  #define PMU_CREG16_CAL_CLOCK_INV   (1<<7)
  #define PMU_CREG16_CAL_CLOCK_INV_MASK (1<<7)
  #define PMU_CREG16_CAL_CLOCK_INV_SHIFT (7)
  #define PMU_PMU_BGAP_CAL_POLARITY  (1<<8)
  #define PMU_PMU_BGAP_CAL_POLARITY_MASK (1<<8)
  #define PMU_PMU_BGAP_CAL_POLARITY_SHIFT (8)
  #define PMU_PMU_BGAP_CAL_CLOCK_INV (1<<9)
  #define PMU_PMU_BGAP_CAL_CLOCK_INV_MASK (1<<9)
  #define PMU_PMU_BGAP_CAL_CLOCK_INV_SHIFT (9)
  #define PMU_CHR_BGAP_CAL_POLARITY  (1<<10)
  #define PMU_CHR_BGAP_CAL_POLARITY_MASK (1<<10)
  #define PMU_CHR_BGAP_CAL_POLARITY_SHIFT (10)
  #define PMU_CHR_BGAP_CAL_CLOCK_INV (1<<11)
  #define PMU_CHR_BGAP_CAL_CLOCK_INV_MASK (1<<11)
  #define PMU_CHR_BGAP_CAL_CLOCK_INV_SHIFT (11)
  #define PMU_CHR_CREG16_CAL_BYPASS  (1<<12)
  #define PMU_CHR_CREG16_CAL_BYPASS_MASK (1<<12)
  #define PMU_CHR_CREG16_CAL_BYPASS_SHIFT (12)
  #define PMU_CHR_BGAP_CAL_BYPASS    (1<<13)
  #define PMU_CHR_BGAP_CAL_BYPASS_MASK (1<<13)
  #define PMU_CHR_BGAP_CAL_BYPASS_SHIFT (13)
  #define PMU_VBAT_OVER_3P2_BYPASS   (1<<14)
  #define PMU_VBAT_OVER_3P2_BYPASS_MASK (1<<14)
  #define PMU_VBAT_OVER_3P2_BYPASS_SHIFT (14)
  #define PMU_PMU_BGAP_CAL_BYPASS    (1<<15)
  #define PMU_PMU_BGAP_CAL_BYPASS_MASK (1<<15)
  #define PMU_PMU_BGAP_CAL_BYPASS_SHIFT (15)
  
  //CALIBRATION_SETTINGl
  #define PMU_CHR_BGAP_CAL_RESETN_REG16 (1<<0)
  #define PMU_CHR_BGAP_CAL_RESETN_REG16_MASK (1<<0)
  #define PMU_CHR_BGAP_CAL_RESETN_REG16_SHIFT (0)
  #define PMU_CHR_BGAP_CAL_RESETN_DR (1<<1)
  #define PMU_CHR_BGAP_CAL_RESETN_DR_MASK (1<<1)
  #define PMU_CHR_BGAP_CAL_RESETN_DR_SHIFT (1)
  #define PMU_PMU_BGAP_CAL_BIT_REG16(n) (((n)&0x3F)<<2)
  #define PMU_PMU_BGAP_CAL_BIT_REG16_MASK (0x3F<<2)
  #define PMU_PMU_BGAP_CAL_BIT_REG16_SHIFT (2)
  #define PMU_PMU_BGAP_CAL_BIT_DR    (1<<8)
  #define PMU_PMU_BGAP_CAL_BIT_DR_MASK (1<<8)
  #define PMU_PMU_BGAP_CAL_BIT_DR_SHIFT (8)
  #define PMU_CHR_BGAP_CAL_BIT_REG16(n) (((n)&0x3F)<<9)
  #define PMU_CHR_BGAP_CAL_BIT_REG16_MASK (0x3F<<9)
  #define PMU_CHR_BGAP_CAL_BIT_REG16_SHIFT (9)
  #define PMU_CHR_BGAP_CAL_BIT_DR    (1<<15)
  #define PMU_CHR_BGAP_CAL_BIT_DR_MASK (1<<15)
  #define PMU_CHR_BGAP_CAL_BIT_DR_SHIFT (15)
  
  //CALIBRATION_SETTING2
  #define PMU_PD_CHR_DELAY_REG16     (1<<0)
  #define PMU_PD_CHR_DELAY_REG16_MASK (1<<0)
  #define PMU_PD_CHR_DELAY_REG16_SHIFT (0)
  #define PMU_PD_CHR_DELAY_DR        (1<<1)
  #define PMU_PD_CHR_DELAY_DR_MASK   (1<<1)
  #define PMU_PD_CHR_DELAY_DR_SHIFT  (1)
  #define PMU_CREG16_CAL_RESETN_REG16 (1<<2)
  #define PMU_CREG16_CAL_RESETN_REG16_MASK (1<<2)
  #define PMU_CREG16_CAL_RESETN_REG16_SHIFT (2)
  #define PMU_CREG16_CAL_RESETN_DR   (1<<3)
  #define PMU_CREG16_CAL_RESETN_DR_MASK (1<<3)
  #define PMU_CREG16_CAL_RESETN_DR_SHIFT (3)
  #define PMU_PMU_BGAP_CAL_RESETN_REG16 (1<<4)
  #define PMU_PMU_BGAP_CAL_RESETN_REG16_MASK (1<<4)
  #define PMU_PMU_BGAP_CAL_RESETN_REG16_SHIFT (4)
  #define PMU_PMU_BGAP_CAL_RESETN_DR (1<<5)
  #define PMU_PMU_BGAP_CAL_RESETN_DR_MASK (1<<5)
  #define PMU_PMU_BGAP_CAL_RESETN_DR_SHIFT (5)
  #define PMU_CREG16_CAL_BIT_REG16(n) (((n)&0xFF)<<6)
  #define PMU_CREG16_CAL_BIT_REG16_MASK (0xFF<<6)
  #define PMU_CREG16_CAL_BIT_REG16_SHIFT (6)
  #define PMU_CREG16_CAL_BIT_DR      (1<<14)
  #define PMU_CREG16_CAL_BIT_DR_MASK (1<<14)
  #define PMU_CREG16_CAL_BIT_DR_SHIFT (14)
  
  //MISC_CONTROL
  #define PMU_LDO_AVDD3_BIT(n)       (((n)&7)<<0)
  #define PMU_LDO_AVDD3_BIT_MASK     (7<<0)
  #define PMU_LDO_AVDD3_BIT_SHIFT    (0)
  #define PMU_CLK2M_FTUN_BIT(n)      (((n)&7)<<3)
  #define PMU_CLK2M_FTUN_BIT_MASK    (7<<3)
  #define PMU_CLK2M_FTUN_BIT_SHIFT   (3)
  #define PMU_PD_LDO_AVDD3_REG16     (1<<6)
  #define PMU_PD_LDO_AVDD3_REG16_MASK (1<<6)
  #define PMU_PD_LDO_AVDD3_REG16_SHIFT (6)
  #define PMU_PD_LDO_AVDD3_DR        (1<<7)
  #define PMU_PD_LDO_AVDD3_DR_MASK   (1<<7)
  #define PMU_PD_LDO_AVDD3_DR_SHIFT  (7)
  #define PMU_PU_CLK_2M_REG16        (1<<8)
  #define PMU_PU_CLK_2M_REG16_MASK   (1<<8)
  #define PMU_PU_CLK_2M_REG16_SHIFT  (8)
  #define PMU_PU_CLK_2M_DR           (1<<9)
  #define PMU_PU_CLK_2M_DR_MASK      (1<<9)
  #define PMU_PU_CLK_2M_DR_SHIFT     (9)
  #define PMU_PU_CLK_25K_REG16       (1<<10)
  #define PMU_PU_CLK_25K_REG16_MASK  (1<<10)
  #define PMU_PU_CLK_25K_REG16_SHIFT (10)
  #define PMU_PU_CLK_25K_DR          (1<<11)
  #define PMU_PU_CLK_25K_DR_MASK     (1<<11)
  #define PMU_PU_CLK_25K_DR_SHIFT    (11)
  #define PMU_CHR_FINISH_REG16       (1<<12)
  #define PMU_CHR_FINISH_REG16_MASK  (1<<12)
  #define PMU_CHR_FINISH_REG16_SHIFT (12)
  #define PMU_CHR_FINISH_DR          (1<<13)
  #define PMU_CHR_FINISH_DR_MASK     (1<<13)
  #define PMU_CHR_FINISH_DR_SHIFT    (13)
  #define PMU_CHR_RCH_CTL_REG16      (1<<14)
  #define PMU_CHR_RCH_CTL_REG16_MASK (1<<14)
  #define PMU_CHR_RCH_CTL_REG16_SHIFT (14)
  #define PMU_CHR_RCH_CTL_DR         (1<<15)
  #define PMU_CHR_RCH_CTL_DR_MASK    (1<<15)
  #define PMU_CHR_RCH_CTL_DR_SHIFT   (15)
  
  //LED_SETTING1
  #define PMU_DIM_KP_REG16           (1<<0)
  #define PMU_DIM_KP_REG16_MASK      (1<<0)
  #define PMU_DIM_KP_REG16_SHIFT     (0)
  #define PMU_PWM_KP_ENABLE          (1<<1)
  #define PMU_PWM_KP_ENABLE_MASK     (1<<1)
  #define PMU_PWM_KP_ENABLE_SHIFT    (1)
  #define PMU_DIM_BL_REG16           (1<<2)
  #define PMU_DIM_BL_REG16_MASK      (1<<2)
  #define PMU_DIM_BL_REG16_SHIFT     (2)
  #define PMU_DIM_BL_DR              (1<<3)
  #define PMU_DIM_BL_DR_MASK         (1<<3)
  #define PMU_DIM_BL_DR_SHIFT        (3)
  #define PMU_PWM_BL_MODE            (1<<4)
  #define PMU_PWM_BL_MODE_MASK       (1<<4)
  #define PMU_PWM_BL_MODE_SHIFT      (4)
  #define PMU_PWM_BL_MODE_FROM_PMU   (0<<4)
  #define PMU_PWM_BL_MODE_FROM_BB    (1<<4)
  #define PMU_BOOST_BIT(n)           (((n)&3)<<5)
  #define PMU_BOOST_BIT_MASK         (3<<5)
  #define PMU_BOOST_BIT_SHIFT        (5)
  #define PMU_BOOST_ENABLE           (1<<7)
  #define PMU_BOOST_ENABLE_MASK      (1<<7)
  #define PMU_BOOST_ENABLE_SHIFT     (7)
  #define PMU_PD_BL_LP               (1<<8)
  #define PMU_PD_BL_LP_MASK          (1<<8)
  #define PMU_PD_BL_LP_SHIFT         (8)
  #define PMU_PD_BL_ACT              (1<<9)
  #define PMU_PD_BL_ACT_MASK         (1<<9)
  #define PMU_PD_BL_ACT_SHIFT        (9)
  #define PMU_PD_BL_PON              (1<<10)
  #define PMU_PD_BL_PON_MASK         (1<<10)
  #define PMU_PD_BL_PON_SHIFT        (10)
  #define PMU_PD_KP_LP               (1<<11)
  #define PMU_PD_KP_LP_MASK          (1<<11)
  #define PMU_PD_KP_LP_SHIFT         (11)
  #define PMU_PD_KP_ACT              (1<<12)
  #define PMU_PD_KP_ACT_MASK         (1<<12)
  #define PMU_PD_KP_ACT_SHIFT        (12)
  #define PMU_PD_KP_PON              (1<<13)
  #define PMU_PD_KP_PON_MASK         (1<<13)
  #define PMU_PD_KP_PON_SHIFT        (13)
  
  //LED_SETTING2
  #define PMU_PWM_KP_FREQ(n)         (((n)&15)<<0)
  #define PMU_PWM_KP_FREQ_MASK       (15<<0)
  #define PMU_PWM_KP_FREQ_SHIFT      (0)
  #define PMU_I_BIT_BL_LP(n)         (((n)&15)<<4)
  #define PMU_I_BIT_BL_LP_MASK       (15<<4)
  #define PMU_I_BIT_BL_LP_SHIFT      (4)
  #define PMU_I_BIT_BL_ACT(n)        (((n)&15)<<8)
  #define PMU_I_BIT_BL_ACT_MASK      (15<<8)
  #define PMU_I_BIT_BL_ACT_SHIFT     (8)
  #define PMU_I_BIT_BL_PON(n)        (((n)&15)<<12)
  #define PMU_I_BIT_BL_PON_MASK      (15<<12)
  #define PMU_I_BIT_BL_PON_SHIFT     (12)
  
  //LED_SETTING3
  #define PMU_PWM_KP_DUTY_CYCLE(n)   (((n)&31)<<0)
  #define PMU_PWM_KP_DUTY_CYCLE_MASK (31<<0)
  #define PMU_PWM_KP_DUTY_CYCLE_SHIFT (0)
  #define PMU_PWM_BL_FREQ_SEL        (1<<5)
  #define PMU_PWM_BL_FREQ_SEL_MASK   (1<<5)
  #define PMU_PWM_BL_FREQ_SEL_SHIFT  (5)
  #define PMU_PWM_BL_FREQ(n)         (((n)&15)<<6)
  #define PMU_PWM_BL_FREQ_MASK       (15<<6)
  #define PMU_PWM_BL_FREQ_SHIFT      (6)
  #define PMU_PWM_BL_DUTY_CYCLE(n)   (((n)&31)<<10)
  #define PMU_PWM_BL_DUTY_CYCLE_MASK (31<<10)
  #define PMU_PWM_BL_DUTY_CYCLE_SHIFT (10)
  
  //AUDIO_CONTROL
  #define PMU_TIMER_PENIRQ_STABLE(n) (((n)&3)<<2)
  #define PMU_TIMER_PENIRQ_STABLE_MASK (3<<2)
  #define PMU_TIMER_PENIRQ_STABLE_SHIFT (2)
  #define PMU_TIMER_PENIRQ_STABLE_2_US (0<<2)
  #define PMU_TIMER_PENIRQ_STABLE_4_US (1<<2)
  #define PMU_TIMER_PENIRQ_STABLE_8_US (2<<2)
  #define PMU_TIMER_PENIRQ_STABLE_16_US (3<<2)
  #define PMU_TEST_CLASSAB           (1<<4)
  #define PMU_TEST_CLASSAB_MASK      (1<<4)
  #define PMU_TEST_CLASSAB_SHIFT     (4)
  #define PMU_MUTE_CLASSAB           (1<<5)
  #define PMU_MUTE_CLASSAB_MASK      (1<<5)
  #define PMU_MUTE_CLASSAB_SHIFT     (5)
  #define PMU_PU_CLASSAB_R           (1<<6)
  #define PMU_PU_CLASSAB_R_MASK      (1<<6)
  #define PMU_PU_CLASSAB_R_SHIFT     (6)
  #define PMU_PU_CLASSAB_L           (1<<7)
  #define PMU_PU_CLASSAB_L_MASK      (1<<7)
  #define PMU_PU_CLASSAB_L_SHIFT     (7)
  #define PMU_AMPGAIN(n)             (((n)&7)<<8)
  #define PMU_AMPGAIN_MASK           (7<<8)
  #define PMU_AMPGAIN_SHIFT          (8)
  #define PMU_PWM_CLK_DIV2_ENABLE    (1<<11)
  #define PMU_PWM_CLK_DIV2_ENABLE_MASK (1<<11)
  #define PMU_PWM_CLK_DIV2_ENABLE_SHIFT (11)
  #define PMU_DELAY_BEFORE_SAMP(n)   (((n)&3)<<12)
  #define PMU_DELAY_BEFORE_SAMP_MASK (3<<12)
  #define PMU_DELAY_BEFORE_SAMP_SHIFT (12)
  #define PMU_DELAY_BEFORE_SAMP_0_US (0<<12)
  #define PMU_DELAY_BEFORE_SAMP_2_US (1<<12)
  #define PMU_DELAY_BEFORE_SAMP_4_US (2<<12)
  #define PMU_DELAY_BEFORE_SAMP_8_US (3<<12)
  #define PMU_MEAS_WAIT_CLR_PENIRQ   (1<<14)
  #define PMU_MEAS_WAIT_CLR_PENIRQ_MASK (1<<14)
  #define PMU_MEAS_WAIT_CLR_PENIRQ_SHIFT (14)
  #define PMU_MEAS_WAIT_CLR_PENIRQ_NO_WAIT (0<<14)
  #define PMU_MEAS_WAIT_CLR_PENIRQ_WAIT_CLR_PENIRQ (1<<14)
  #define PMU_BYPASS_BB_READ         (1<<15)
  #define PMU_BYPASS_BB_READ_MASK    (1<<15)
  #define PMU_BYPASS_BB_READ_SHIFT   (15)
  #define PMU_BYPASS_BB_READ_WAIT_BB_READ (0<<15)
  #define PMU_BYPASS_BB_READ_BYPASS_BB_READ (1<<15)
  
  //TOUCH_SCREEN_CONTROL
  #define PMU_PD_SAR_REG16           (1<<0)
  #define PMU_PD_SAR_REG16_MASK      (1<<0)
  #define PMU_PD_SAR_REG16_SHIFT     (0)
  #define PMU_PD_SAR_DR              (1<<1)
  #define PMU_PD_SAR_DR_MASK         (1<<1)
  #define PMU_PD_SAR_DR_SHIFT        (1)
  #define PMU_CONV_CLK_INV           (1<<2)
  #define PMU_CONV_CLK_INV_MASK      (1<<2)
  #define PMU_CONV_CLK_INV_SHIFT     (2)
  #define PMU_SAMP_CLK_INV           (1<<3)
  #define PMU_SAMP_CLK_INV_MASK      (1<<3)
  #define PMU_SAMP_CLK_INV_SHIFT     (3)
  #define PMU_SAR_ADC_MODE           (1<<4)
  #define PMU_SAR_ADC_MODE_MASK      (1<<4)
  #define PMU_SAR_ADC_MODE_SHIFT     (4)
  #define PMU_SAR_OUT_POLARITY       (1<<5)
  #define PMU_SAR_OUT_POLARITY_MASK  (1<<5)
  #define PMU_SAR_OUT_POLARITY_SHIFT (5)
  #define PMU_WAIT_BB_READ_TIMESEL(n) (((n)&3)<<6)
  #define PMU_WAIT_BB_READ_TIMESEL_MASK (3<<6)
  #define PMU_WAIT_BB_READ_TIMESEL_SHIFT (6)
  #define PMU_SAR_VREF_BIT(n)        (((n)&3)<<8)
  #define PMU_SAR_VREF_BIT_MASK      (3<<8)
  #define PMU_SAR_VREF_BIT_SHIFT     (8)
  #define PMU_TSC_SAR_SEL_R(n)       (((n)&3)<<10)
  #define PMU_TSC_SAR_SEL_R_MASK     (3<<10)
  #define PMU_TSC_SAR_SEL_R_SHIFT    (10)
  #define PMU_CH4_EN                 (1<<12)
  #define PMU_CH4_EN_MASK            (1<<12)
  #define PMU_CH4_EN_SHIFT           (12)
  #define PMU_CH3_EN                 (1<<13)
  #define PMU_CH3_EN_MASK            (1<<13)
  #define PMU_CH3_EN_SHIFT           (13)
  #define PMU_CH2_EN                 (1<<14)
  #define PMU_CH2_EN_MASK            (1<<14)
  #define PMU_CH2_EN_SHIFT           (14)
  #define PMU_CH1_EN                 (1<<15)
  #define PMU_CH1_EN_MASK            (1<<15)
  #define PMU_CH1_EN_SHIFT           (15)
  
  //TOUCH_SCREEN_RESULT1
  #define PMU_TSC_X_VALUE_BIT(n)     (((n)&0x3FF)<<0)
  #define PMU_TSC_X_VALUE_BIT_MASK   (0x3FF<<0)
  #define PMU_TSC_X_VALUE_BIT_SHIFT  (0)
  #define PMU_TSC_X_VALUE_VALID      (1<<10)
  #define PMU_TSC_X_VALUE_VALID_MASK (1<<10)
  #define PMU_TSC_X_VALUE_VALID_SHIFT (10)
  
  //TOUCH_SCREEN_RESULT2
  #define PMU_TSC_Y_VALUE_BIT(n)     (((n)&0x3FF)<<0)
  #define PMU_TSC_Y_VALUE_BIT_MASK   (0x3FF<<0)
  #define PMU_TSC_Y_VALUE_BIT_SHIFT  (0)
  #define PMU_TSC_Y_VALUE_VALID      (1<<10)
  #define PMU_TSC_Y_VALUE_VALID_MASK (1<<10)
  #define PMU_TSC_Y_VALUE_VALID_SHIFT (10)
  
  //TOUCH_SCREEN_RESULT3
  #define PMU_GPADC_VALUE_BIT(n)     (((n)&0x3FF)<<0)
  #define PMU_GPADC_VALUE_BIT_MASK   (0x3FF<<0)
  #define PMU_GPADC_VALUE_BIT_SHIFT  (0)
  #define PMU_GPADC_VALUE_VALID      (1<<10)
  #define PMU_GPADC_VALUE_VALID_MASK (1<<10)
  #define PMU_GPADC_VALUE_VALID_SHIFT (10)
  
  //EFUSE_OTP_SETTING1
  #define PMU_PA_OTP(n)              (((n)&0x1FF)<<0)
  #define PMU_PA_OTP_MASK            (0x1FF<<0)
  #define PMU_PA_OTP_SHIFT           (0)
  #define PMU_PTM_OTP(n)             (((n)&3)<<9)
  #define PMU_PTM_OTP_MASK           (3<<9)
  #define PMU_PTM_OTP_SHIFT          (9)
  #define PMU_EFFUSE_SENSE_REG16     (1<<11)
  #define PMU_EFFUSE_SENSE_REG16_MASK (1<<11)
  #define PMU_EFFUSE_SENSE_REG16_SHIFT (11)
  #define PMU_EFFUSE_SENSE_DR        (1<<12)
  #define PMU_EFFUSE_SENSE_DR_MASK   (1<<12)
  #define PMU_EFFUSE_SENSE_DR_SHIFT  (12)
  #define PMU_PRD_OTP_REG16          (1<<13)
  #define PMU_PRD_OTP_REG16_MASK     (1<<13)
  #define PMU_PRD_OTP_REG16_SHIFT    (13)
  #define PMU_PRD_OTP_DR             (1<<14)
  #define PMU_PRD_OTP_DR_MASK        (1<<14)
  #define PMU_PRD_OTP_DR_SHIFT       (14)
  #define PMU_OTP_EFUSE_SEL          (1<<15)
  #define PMU_OTP_EFUSE_SEL_MASK     (1<<15)
  #define PMU_OTP_EFUSE_SEL_SHIFT    (15)
  #define PMU_OTP_EFUSE_SEL_FROM_OTP (0<<15)
  #define PMU_OTP_EFUSE_SEL_FROM_EFFUSE (0<<15)
  
  //EFUSE_OTP_SETTING2
  #define PMU_PWE_OTP                (1<<0)
  #define PMU_PWE_OTP_MASK           (1<<0)
  #define PMU_PWE_OTP_SHIFT          (0)
  #define PMU_PDIN_OTP(n)            (((n)&0xFF)<<1)
  #define PMU_PDIN_OTP_MASK          (0xFF<<1)
  #define PMU_PDIN_OTP_SHIFT         (1)
  #define PMU_PD_OTP_REG16           (1<<9)
  #define PMU_PD_OTP_REG16_MASK      (1<<9)
  #define PMU_PD_OTP_REG16_SHIFT     (9)
  
  //EFUSE_OTP_SETTING3
  #define PMU_EFFUSE_SEL(n)          (((n)&0xFFFF)<<0)
  #define PMU_EFFUSE_SEL_MASK        (0xFFFF<<0)
  #define PMU_EFFUSE_SEL_SHIFT       (0)
  
  //EFUSE_OTP_SETTING4
  #define PMU_EFFUSE_OUT(n)          (((n)&0xFFFF)<<0)
  #define PMU_EFFUSE_OUT_MASK        (0xFFFF<<0)
  #define PMU_EFFUSE_OUT_SHIFT       (0)
  
  //EFUSE_OTP_SETTING5
  #define PMU_PDOP_OTP(n)            (((n)&0xFF)<<0)
  #define PMU_PDOP_OTP_MASK          (0xFF<<0)
  #define PMU_PDOP_OTP_SHIFT         (0)
  #define PMU_PRD_OTP                (1<<8)
  #define PMU_PRD_OTP_MASK           (1<<8)
  #define PMU_PRD_OTP_SHIFT          (8)
  #define PMU_EFFUSE_SENSE           (1<<9)
  #define PMU_EFFUSE_SENSE_MASK      (1<<9)
  #define PMU_EFFUSE_SENSE_SHIFT     (9)
  
  //SIM_INTERFACE
  #define PMU_SELF_CAL_ENABLE_REG16  (1<<0)
  #define PMU_SELF_CAL_ENABLE_REG16_MASK (1<<0)
  #define PMU_SELF_CAL_ENABLE_REG16_SHIFT (0)
  #define PMU_SELF_CAL_ENABLE_DR     (1<<1)
  #define PMU_SELF_CAL_ENABLE_DR_MASK (1<<1)
  #define PMU_SELF_CAL_ENABLE_DR_SHIFT (1)
  #define PMU_BYPASS_CLK_2M_GATE     (1<<2)
  #define PMU_BYPASS_CLK_2M_GATE_MASK (1<<2)
  #define PMU_BYPASS_CLK_2M_GATE_SHIFT (2)
  #define PMU_BYPASS_CLK_25K_GATE    (1<<3)
  #define PMU_BYPASS_CLK_25K_GATE_MASK (1<<3)
  #define PMU_BYPASS_CLK_25K_GATE_SHIFT (3)
  #define PMU_TIMER_BB_RESETN_SEL(n) (((n)&3)<<4)
  #define PMU_TIMER_BB_RESETN_SEL_MASK (3<<4)
  #define PMU_TIMER_BB_RESETN_SEL_SHIFT (4)
  #define PMU_TIMER_BB_RESETN_SEL_10_MS (0<<4)
  #define PMU_TIMER_BB_RESETN_SEL_40_MS (1<<4)
  #define PMU_TIMER_BB_RESETN_SEL_60_MS (2<<4)
  #define PMU_TIMER_BB_RESETN_SEL_100_MS (3<<4)
  #define PMU_UNSEL_RST_VAL_2        (1<<9)
  #define PMU_UNSEL_RST_VAL_2_MASK   (1<<9)
  #define PMU_UNSEL_RST_VAL_2_SHIFT  (9)
  #define PMU_UNSEL_RST_VAL_2_LOW    (0<<9)
  #define PMU_UNSEL_RST_VAL_2_HIGH   (1<<9)
  #define PMU_UNSEL_CLK_VAL_2        (1<<10)
  #define PMU_UNSEL_CLK_VAL_2_MASK   (1<<10)
  #define PMU_UNSEL_CLK_VAL_2_SHIFT  (10)
  #define PMU_UNSEL_CLK_VAL_2_LOW    (0<<10)
  #define PMU_UNSEL_CLK_VAL_2_HIGH   (1<<10)
  #define PMU_PULLUP_ENABLE_2        (1<<11)
  #define PMU_PULLUP_ENABLE_2_MASK   (1<<11)
  #define PMU_PULLUP_ENABLE_2_SHIFT  (11)
  #define PMU_PULLUP_ENABLE_2_LOW    (0<<11)
  #define PMU_PULLUP_ENABLE_2_HIGH   (1<<11)
  #define PMU_UNSEL_RST_VAL_1        (1<<12)
  #define PMU_UNSEL_RST_VAL_1_MASK   (1<<12)
  #define PMU_UNSEL_RST_VAL_1_SHIFT  (12)
  #define PMU_UNSEL_RST_VAL_1_LOW    (0<<12)
  #define PMU_UNSEL_RST_VAL_1_HIGH   (1<<12)
  #define PMU_UNSEL_CLK_VAL_1        (1<<13)
  #define PMU_UNSEL_CLK_VAL_1_MASK   (1<<13)
  #define PMU_UNSEL_CLK_VAL_1_SHIFT  (13)
  #define PMU_UNSEL_CLK_VAL_1_LOW    (0<<13)
  #define PMU_UNSEL_CLK_VAL_1_HIGH   (1<<13)
  #define PMU_PULLUP_ENABLE_1        (1<<14)
  #define PMU_PULLUP_ENABLE_1_MASK   (1<<14)
  #define PMU_PULLUP_ENABLE_1_SHIFT  (14)
  #define PMU_PULLUP_ENABLE_1_LOW    (0<<14)
  #define PMU_PULLUP_ENABLE_1_HIGH   (1<<14)
  #define PMU_SIM_SELECT             (1<<15)
  #define PMU_SIM_SELECT_MASK        (1<<15)
  #define PMU_SIM_SELECT_SHIFT       (15)
  #define PMU_SIM_SELECT_SIM1        (0<<15)
  #define PMU_SIM_SELECT_SIM2        (1<<15)
  
  //LDO_POWER_OFF_SETTING_1
  #define PMU_LP_MODE_B_POFF         (1<<0)
  #define PMU_LP_MODE_B_POFF_MASK    (1<<0)
  #define PMU_LP_MODE_B_POFF_SHIFT   (0)
  #define PMU_PD_VSIM2_POFF          (1<<1)
  #define PMU_PD_VSIM2_POFF_MASK     (1<<1)
  #define PMU_PD_VSIM2_POFF_SHIFT    (1)
  #define PMU_PD_VSIM1_POFF          (1<<2)
  #define PMU_PD_VSIM1_POFF_MASK     (1<<2)
  #define PMU_PD_VSIM1_POFF_SHIFT    (2)
  #define PMU_PD_VMIC_POFF           (1<<3)
  #define PMU_PD_VMIC_POFF_MASK      (1<<3)
  #define PMU_PD_VMIC_POFF_SHIFT     (3)
  #define PMU_PD_VUSB_POFF           (1<<4)
  #define PMU_PD_VUSB_POFF_MASK      (1<<4)
  #define PMU_PD_VUSB_POFF_SHIFT     (4)
  #define PMU_PD_VIBR_POFF           (1<<5)
  #define PMU_PD_VIBR_POFF_MASK      (1<<5)
  #define PMU_PD_VIBR_POFF_SHIFT     (5)
  #define PMU_PD_VMC_POFF            (1<<6)
  #define PMU_PD_VMC_POFF_MASK       (1<<6)
  #define PMU_PD_VMC_POFF_SHIFT      (6)
  #define PMU_PD_VLCD_POFF           (1<<7)
  #define PMU_PD_VLCD_POFF_MASK      (1<<7)
  #define PMU_PD_VLCD_POFF_SHIFT     (7)
  #define PMU_PD_VCAM_POFF           (1<<8)
  #define PMU_PD_VCAM_POFF_MASK      (1<<8)
  #define PMU_PD_VCAM_POFF_SHIFT     (8)
  #define PMU_PD_VASW_POFF           (1<<9)
  #define PMU_PD_VASW_POFF_MASK      (1<<9)
  #define PMU_PD_VASW_POFF_SHIFT     (9)
  #define PMU_PD_VA_POFF             (1<<10)
  #define PMU_PD_VA_POFF_MASK        (1<<10)
  #define PMU_PD_VA_POFF_SHIFT       (10)
  #define PMU_PD_VIO_POFF            (1<<11)
  #define PMU_PD_VIO_POFF_MASK       (1<<11)
  #define PMU_PD_VIO_POFF_SHIFT      (11)
  #define PMU_PD_VM_POFF             (1<<12)
  #define PMU_PD_VM_POFF_MASK        (1<<12)
  #define PMU_PD_VM_POFF_SHIFT       (12)
  #define PMU_PD_DCDC_VD_POFF        (1<<13)
  #define PMU_PD_DCDC_VD_POFF_MASK   (1<<13)
  #define PMU_PD_DCDC_VD_POFF_SHIFT  (13)
  #define PMU_PD_VD_LDO_POFF         (1<<14)
  #define PMU_PD_VD_LDO_POFF_MASK    (1<<14)
  #define PMU_PD_VD_LDO_POFF_SHIFT   (14)
  
  //LDO_POWER_OFF_SETTING_2
  #define PMU_VRTC_VBIT_POFF(n)      (((n)&7)<<0)
  #define PMU_VRTC_VBIT_POFF_MASK    (7<<0)
  #define PMU_VRTC_VBIT_POFF_SHIFT   (0)
  #define PMU_VSIM2_VSEL_POFF        (1<<3)
  #define PMU_VSIM2_VSEL_POFF_MASK   (1<<3)
  #define PMU_VSIM2_VSEL_POFF_SHIFT  (3)
  #define PMU_VSIM1_VSEL_POFF        (1<<4)
  #define PMU_VSIM1_VSEL_POFF_MASK   (1<<4)
  #define PMU_VSIM1_VSEL_POFF_SHIFT  (4)
  #define PMU_VMIC_VSEL_POFF(n)      (((n)&7)<<5)
  #define PMU_VMIC_VSEL_POFF_MASK    (7<<5)
  #define PMU_VMIC_VSEL_POFF_SHIFT   (5)
  #define PMU_VIBR_VSEL_POFF         (1<<8)
  #define PMU_VIBR_VSEL_POFF_MASK    (1<<8)
  #define PMU_VIBR_VSEL_POFF_SHIFT   (8)
  #define PMU_VMC_VSEL_POFF          (1<<9)
  #define PMU_VMC_VSEL_POFF_MASK     (1<<9)
  #define PMU_VMC_VSEL_POFF_SHIFT    (9)
  #define PMU_VLCD_VSEL_POFF         (1<<10)
  #define PMU_VLCD_VSEL_POFF_MASK    (1<<10)
  #define PMU_VLCD_VSEL_POFF_SHIFT   (10)
  #define PMU_VCAM_VSEL_POFF         (1<<11)
  #define PMU_VCAM_VSEL_POFF_MASK    (1<<11)
  #define PMU_VCAM_VSEL_POFF_SHIFT   (11)
  #define PMU_VASW_VSEL_POFF         (1<<12)
  #define PMU_VASW_VSEL_POFF_MASK    (1<<12)
  #define PMU_VASW_VSEL_POFF_SHIFT   (12)
  #define PMU_VIO_VSEL_POFF          (1<<13)
  #define PMU_VIO_VSEL_POFF_MASK     (1<<13)
  #define PMU_VIO_VSEL_POFF_SHIFT    (13)
  #define PMU_VD_VSEL_LDO_POFF(n)    (((n)&3)<<14)
  #define PMU_VD_VSEL_LDO_POFF_MASK  (3<<14)
  #define PMU_VD_VSEL_LDO_POFF_SHIFT (14)
  
  //LDO_POWER_OFF_SETTING_3
  #define PMU_VA_IBIT_POFF(n)        (((n)&7)<<0)
  #define PMU_VA_IBIT_POFF_MASK      (7<<0)
  #define PMU_VA_IBIT_POFF_SHIFT     (0)
  #define PMU_VIO_IBIT_POFF(n)       (((n)&7)<<3)
  #define PMU_VIO_IBIT_POFF_MASK     (7<<3)
  #define PMU_VIO_IBIT_POFF_SHIFT    (3)
  #define PMU_VM_IBIT_POFF(n)        (((n)&7)<<6)
  #define PMU_VM_IBIT_POFF_MASK      (7<<6)
  #define PMU_VM_IBIT_POFF_SHIFT     (6)
  #define PMU_VD_BIT_DCDC_POFF(n)    (((n)&7)<<9)
  #define PMU_VD_BIT_DCDC_POFF_MASK  (7<<9)
  #define PMU_VD_BIT_DCDC_POFF_SHIFT (9)
  #define PMU_VD_IBIT_LDO_POFF(n)    (((n)&7)<<12)
  #define PMU_VD_IBIT_LDO_POFF_MASK  (7<<12)
  #define PMU_VD_IBIT_LDO_POFF_SHIFT (12)
  #define PMU_PD_KP_POFF             (1<<15)
  #define PMU_PD_KP_POFF_MASK        (1<<15)
  #define PMU_PD_KP_POFF_SHIFT       (15)
  
  //LDO_POWER_OFF_SETTING_4
  #define PMU_VIBR_IBIT_POFF(n)      (((n)&7)<<0)
  #define PMU_VIBR_IBIT_POFF_MASK    (7<<0)
  #define PMU_VIBR_IBIT_POFF_SHIFT   (0)
  #define PMU_VMC_IBIT_POFF(n)       (((n)&7)<<3)
  #define PMU_VMC_IBIT_POFF_MASK     (7<<3)
  #define PMU_VMC_IBIT_POFF_SHIFT    (3)
  #define PMU_VLCD_IBIT_POFF(n)      (((n)&7)<<6)
  #define PMU_VLCD_IBIT_POFF_MASK    (7<<6)
  #define PMU_VLCD_IBIT_POFF_SHIFT   (6)
  #define PMU_VCAM_IBIT_POFF(n)      (((n)&7)<<9)
  #define PMU_VCAM_IBIT_POFF_MASK    (7<<9)
  #define PMU_VCAM_IBIT_POFF_SHIFT   (9)
  #define PMU_VASW_IBIT_POFF(n)      (((n)&7)<<12)
  #define PMU_VASW_IBIT_POFF_MASK    (7<<12)
  #define PMU_VASW_IBIT_POFF_SHIFT   (12)
  #define PMU_PD_BL_POFF             (1<<15)
  #define PMU_PD_BL_POFF_MASK        (1<<15)
  #define PMU_PD_BL_POFF_SHIFT       (15)
  
  //LDO_POWER_OFF_SETTING_5
  #define PMU_VSIM2_IBIT_POFF(n)     (((n)&7)<<0)
  #define PMU_VSIM2_IBIT_POFF_MASK   (7<<0)
  #define PMU_VSIM2_IBIT_POFF_SHIFT  (0)
  #define PMU_VSIM1_IBIT_POFF(n)     (((n)&7)<<3)
  #define PMU_VSIM1_IBIT_POFF_MASK   (7<<3)
  #define PMU_VSIM1_IBIT_POFF_SHIFT  (3)
  #define PMU_VMIC_IBIT_POFF(n)      (((n)&7)<<6)
  #define PMU_VMIC_IBIT_POFF_MASK    (7<<6)
  #define PMU_VMIC_IBIT_POFF_SHIFT   (6)
  #define PMU_VUSB_IBIT_POFF(n)      (((n)&7)<<9)
  #define PMU_VUSB_IBIT_POFF_MASK    (7<<9)
  #define PMU_VUSB_IBIT_POFF_SHIFT   (9)
  #define PMU_I_BIT_BL_POFF(n)       (((n)&15)<<12)
  #define PMU_I_BIT_BL_POFF_MASK     (15<<12)
  #define PMU_I_BIT_BL_POFF_SHIFT    (12)
  
  //THERMAL_CALIBRATION
  #define PMU_THERMO_SEL(n)          (((n)&3)<<8)
  #define PMU_THERMO_SEL_MASK        (3<<8)
  #define PMU_THERMO_SEL_SHIFT       (8)
  #define PMU_PU_THERMO_PROTECT      (1<<10)
  #define PMU_PU_THERMO_PROTECT_MASK (1<<10)
  #define PMU_PU_THERMO_PROTECT_SHIFT (10)
  
  //MISC
  #define PMU_OVER_TEMP_BYPASS       (1<<6)
  #define PMU_OVER_TEMP_BYPASS_MASK  (1<<6)
  #define PMU_OVER_TEMP_BYPASS_SHIFT (6)
  #define PMU_PU_BGAP_REG16          (1<<7)
  #define PMU_PU_BGAP_REG16_MASK     (1<<7)
  #define PMU_PU_BGAP_REG16_SHIFT    (7)
  #define PMU_PU_BGAP_DR             (1<<8)
  #define PMU_PU_BGAP_DR_MASK        (1<<8)
  #define PMU_PU_BGAP_DR_SHIFT       (8)
  #define PMU_RESETN_BB_REG16        (1<<9)
  #define PMU_RESETN_BB_REG16_MASK   (1<<9)
  #define PMU_RESETN_BB_REG16_SHIFT  (9)
  #define PMU_RESETN_BB_DR           (1<<10)
  #define PMU_RESETN_BB_DR_MASK      (1<<10)
  #define PMU_RESETN_BB_DR_SHIFT     (10)
  #define PMU_RESETN_TSC_REG16       (1<<11)
  #define PMU_RESETN_TSC_REG16_MASK  (1<<11)
  #define PMU_RESETN_TSC_REG16_SHIFT (11)
  #define PMU_RESETN_TSC_DR          (1<<12)
  #define PMU_RESETN_TSC_DR_MASK     (1<<12)
  #define PMU_RESETN_TSC_DR_SHIFT    (12)
  
  
  
  
  
  #endif
  
  