text: DECL|GCLK_GENDIV_BITS|macro|GCLK_GENDIV_BITS
  DECL|GCLK_GEN_NUM_MSB|macro|GCLK_GEN_NUM_MSB
  DECL|GCLK_GEN_NUM|macro|GCLK_GEN_NUM
  DECL|GCLK_GEN_SOURCE_NUM_MSB|macro|GCLK_GEN_SOURCE_NUM_MSB
  DECL|GCLK_NUM|macro|GCLK_NUM
  DECL|GCLK_SOURCE_DFLL48M|macro|GCLK_SOURCE_DFLL48M
  DECL|GCLK_SOURCE_FDPLL|macro|GCLK_SOURCE_FDPLL
  DECL|GCLK_SOURCE_GCLKGEN1|macro|GCLK_SOURCE_GCLKGEN1
  DECL|GCLK_SOURCE_GCLKIN|macro|GCLK_SOURCE_GCLKIN
  DECL|GCLK_SOURCE_NUM|macro|GCLK_SOURCE_NUM
  DECL|GCLK_SOURCE_OSC32K|macro|GCLK_SOURCE_OSC32K
  DECL|GCLK_SOURCE_OSC8M|macro|GCLK_SOURCE_OSC8M
  DECL|GCLK_SOURCE_OSCULP32K|macro|GCLK_SOURCE_OSCULP32K
  DECL|GCLK_SOURCE_XOSC32K|macro|GCLK_SOURCE_XOSC32K
  DECL|GCLK_SOURCE_XOSC|macro|GCLK_SOURCE_XOSC
  DECL|REG_GCLK_CLKCTRL|macro|REG_GCLK_CLKCTRL
  DECL|REG_GCLK_CLKCTRL|macro|REG_GCLK_CLKCTRL
  DECL|REG_GCLK_CTRL|macro|REG_GCLK_CTRL
  DECL|REG_GCLK_CTRL|macro|REG_GCLK_CTRL
  DECL|REG_GCLK_GENCTRL|macro|REG_GCLK_GENCTRL
  DECL|REG_GCLK_GENCTRL|macro|REG_GCLK_GENCTRL
  DECL|REG_GCLK_GENDIV|macro|REG_GCLK_GENDIV
  DECL|REG_GCLK_GENDIV|macro|REG_GCLK_GENDIV
  DECL|REG_GCLK_STATUS|macro|REG_GCLK_STATUS
  DECL|REG_GCLK_STATUS|macro|REG_GCLK_STATUS
  DECL|_SAMD21_GCLK_INSTANCE_|macro|_SAMD21_GCLK_INSTANCE_
  