text: /**************************************************************************//**
   * @file     main.c
   * @version  V3.0
   * $Revision: 3 $
   * $Date: 15/02/06 10:22a $
   * @brief
   *           Configure SPI0 as Master mode and demonstrate how to communicate with an off-chip SPI Slave device with FIFO mode.
   *           This sample code needs to work with SPI_SlaveFifoMode sample code.
   * @note
   * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
   *
   ******************************************************************************/
  #include <stdio.h>
  #include "M058S.h"
  
  
  #define TEST_COUNT 16
  
  uint32_t g_au32SourceData[TEST_COUNT];
  uint32_t g_au32DestinationData[TEST_COUNT];
  volatile uint32_t g_u32TxDataCount;
  volatile uint32_t g_u32RxDataCount;
  
  /* Function prototype declaration */
  void SYS_Init(void);
  void UART0_Init(void);
  void SPI_Init(void);
  extern char GetChar(void);
  
  /* ------------- */
  /* Main function */
  /* ------------- */
  int main(void)
  {
      uint32_t u32DataCount;
  
      /* Unlock protected registers */
      SYS_UnlockReg();
      /* Init System, IP clock and multi-function I/O. */
      SYS_Init();
      /* Lock protected registers */
      SYS_LockReg();
  
      /* Init UART0 for printf */
      UART0_Init();
  
      /* Init SPI */
      SPI_Init();
  
      printf("\n\n");
      printf("+-----------------------------------------------------+\n");
      printf("|             SPI Master Mode Sample Code             |\n");
      printf("+-----------------------------------------------------+\n");
      printf("\n");
      printf("Configure SPI0 as a master.\n");
      printf("Bit length of a transaction: 32\n");
      printf("The I/O connection for SPI0:\n");
      printf("    SPISS (P0.4)\n    SPICLK (P0.7)\n");
      printf("    MISO (P0.6)\n    MOSI (P0.5)\n\n");
      printf("SPI controller will enable FIFO mode and transfer %d data to a off-chip slave device.\n", TEST_COUNT);
      printf("In the meanwhile the SPI controller will receive %d data from the off-chip slave device.\n", TEST_COUNT);
      printf("After the transfer is done, the %d received data will be printed out.\n", TEST_COUNT);
      printf("The SPI master configuration is ready.\n");
  
      for(u32DataCount = 0; u32DataCount < TEST_COUNT; u32DataCount++)
      {
          /* Write the initial value to source buffer */
          g_au32SourceData[u32DataCount] = 0x00550000 + u32DataCount;
          /* Clear destination buffer */
          g_au32DestinationData[u32DataCount] = 0;
      }
  
      printf("Before starting the data transfer, make sure the slave device is ready. Press any key to start the transfer.\n");
      GetChar();
      printf("\n");
  
      /* Set TX FIFO threshold, enable TX FIFO threshold interrupt and RX FIFO time-out interrupt */
      SPI0->FIFO_CTL = (2 << SPI_FIFO_CTL_TX_THRESHOLD_Pos) | SPI_FIFO_CTL_TIMEOUT_INTEN_Msk | SPI_FIFO_CTL_TX_INTEN_Msk;
      g_u32TxDataCount = 0;
      g_u32RxDataCount = 0;
      NVIC_EnableIRQ(SPI0_IRQn);
  
      /* Wait for transfer done */
      while(g_u32RxDataCount < TEST_COUNT);
  
      /* Print the received data */
      printf("Received data:\n");
      for(u32DataCount = 0; u32DataCount < TEST_COUNT; u32DataCount++)
      {
          printf("%d:\t0x%X\n", u32DataCount, g_au32DestinationData[u32DataCount]);
      }
      /* Disable TX FIFO threshold interrupt and RX FIFO time-out interrupt */
      SPI0->FIFO_CTL = 0;
      NVIC_DisableIRQ(SPI0_IRQn);
      printf("The data transfer was done.\n");
  
      printf("\n\nExit SPI driver sample code.\n");
  
      /* Disable SPI0 peripheral clock */
      CLK->APBCLK &= (~CLK_APBCLK_SPI0_EN_Msk);
      while(1);
  }
  
  void SYS_Init(void)
  {
      /*---------------------------------------------------------------------------------------------------------*/
      /* Init System Clock                                                                                       */
      /*---------------------------------------------------------------------------------------------------------*/
      /* Enable external 12 MHz XTAL */
      CLK->PWRCON |= CLK_PWRCON_XTL12M_EN_Msk;
  
      /* Waiting for clock ready */
      while(!(CLK->CLKSTATUS & CLK_CLKSTATUS_XTL12M_STB_Msk));
  
      /* Select HXT as the clock source of HCLK */
      CLK->CLKSEL0 = (CLK->CLKSEL0 & (~CLK_CLKSEL0_HCLK_S_Msk)) | CLK_CLKSEL0_HCLK_S_HXT;
  
      /* Select HXT as the clock source of UART; select HCLK as the clock source of SPI0. */
      CLK->CLKSEL1 = (CLK->CLKSEL1 & (~(CLK_CLKSEL1_UART_S_Msk | CLK_CLKSEL1_SPI0_S_Msk))) | (CLK_CLKSEL1_UART_S_HXT | CLK_CLKSEL1_SPI0_S_HCLK);
  
      /* Enable UART and SPI0 clock */
      CLK->APBCLK = CLK_APBCLK_UART0_EN_Msk | CLK_APBCLK_SPI0_EN_Msk;
  
      /* Update System Core Clock */
      /* User can use SystemCoreClockUpdate() to calculate PllClock, SystemCoreClock and CyclesPerUs automatically. */
      SystemCoreClockUpdate();
  
      /*---------------------------------------------------------------------------------------------------------*/
      /* Init I/O Multi-function                                                                                 */
      /*---------------------------------------------------------------------------------------------------------*/
      /* Set P3 multi-function pins for UART0 RXD and TXD */
      SYS->P3_MFP &= ~(SYS_MFP_P30_Msk | SYS_MFP_P31_Msk);
      SYS->P3_MFP |= (SYS_MFP_P30_RXD | SYS_MFP_P31_TXD);
  
      /* Setup SPI0 multi-function pins */
      SYS->P0_MFP &= ~(SYS_MFP_P04_Msk | SYS_MFP_P05_Msk | SYS_MFP_P06_Msk | SYS_MFP_P07_Msk);
      SYS->P0_MFP |= (SYS_MFP_P04_SPISS | SYS_MFP_P05_MOSI | SYS_MFP_P06_MISO | SYS_MFP_P07_SPICLK);
  }
  
  void UART0_Init(void)
  {
      /* Word length is 8 bits; 1 stop bit; no parity bit. */
      UART0->LCR = UART_LCR_WLS_Msk;
      /* Using mode 2 calculation: UART bit rate = UART peripheral clock rate / (BRD setting + 2) */
      /* UART peripheral clock rate 12 MHz; UART bit rate 115200 bps. */
      /* 12000000 / 115200 bps ~= 104 */
      /* 104 - 2 = 0x66. */
      UART0->BAUD = UART_BAUD_DIV_X_EN_Msk | UART_BAUD_DIV_X_ONE_Msk | (0x66);
  }
  
  void SPI_Init(void)
  {
      /*---------------------------------------------------------------------------------------------------------*/
      /* Init SPI                                                                                                */
      /*---------------------------------------------------------------------------------------------------------*/
      /* Configure SPI0 as a master, clock idle low, 32-bit transaction, drive output on falling clock edge and latch input on rising edge. */
      SPI0->CNTRL = SPI_CNTRL_FIFO_Msk | SPI_MASTER | SPI_CNTRL_TX_NEG_Msk;
      /* Enable the automatic hardware slave select function. Select the SS pin and configure as low-active. */
      SPI0->SSR = SPI_SSR_AUTOSS_Msk | SPI_SSR_SSR_Msk;
      /* Set IP clock divider. SPI clock rate = HCLK / ((5+1)*2) = 1 MHz */
      SPI0->DIVIDER = (SPI0->DIVIDER & (~SPI_DIVIDER_DIVIDER_Msk)) | 5;
  }
  
  void SPI0_IRQHandler(void)
  {
      /* Check RX EMPTY flag */
      while((SPI0->STATUS & SPI_STATUS_RX_EMPTY_Msk) == 0)
      {
          /* Read RX FIFO */
          g_au32DestinationData[g_u32RxDataCount++] = SPI0->RX0;
      }
      /* Check TX FULL flag and TX data count */
      while(((SPI0->STATUS & SPI_STATUS_TX_FULL_Msk) == 0) && (g_u32TxDataCount < TEST_COUNT))
      {
          /* Write to TX FIFO */
          SPI0->TX0 = g_au32SourceData[g_u32TxDataCount++];
      }
      if(g_u32TxDataCount >= TEST_COUNT)
          SPI0->FIFO_CTL &= (~SPI_FIFO_CTL_TX_INTEN_Msk); /* Disable TX FIFO threshold interrupt */
  
      /* Check the RX FIFO time-out interrupt flag */
      if(SPI0->STATUS & SPI_STATUS_TIMEOUT_Msk)
      {
          /* If RX FIFO is not empty, read RX FIFO. */
          while((SPI0->STATUS & SPI_STATUS_RX_EMPTY_Msk) == 0)
              g_au32DestinationData[g_u32RxDataCount++] = SPI0->RX0;
      }
  }
  
  
  /*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/
  
  