text: /*
   * Copyright (c) 2016, Freescale Semiconductor, Inc.
   * Copyright 2016-2017 NXP
   * All rights reserved.
   *
   * SPDX-License-Identifier: BSD-3-Clause
   */
  
  
  /*
   * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
  !!GlobalInfo
  product: Pins v3.0
  processor: MK64FN1M0xxx12
  package_id: MK64FN1M0VLL12
  mcu_data: ksdk2_0
  processor_version: 2.0.0
   * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
   */
  
  #include "fsl_common.h"
  #include "fsl_port.h"
  #include "pin_mux.h"
  
  
  
  #define PIN1_IDX                         1u   /*!< Pin number for pin 1 in a port */
  #define PIN2_IDX                         2u   /*!< Pin number for pin 2 in a port */
  #define PIN16_IDX                       16u   /*!< Pin number for pin 16 in a port */
  #define PIN17_IDX                       17u   /*!< Pin number for pin 17 in a port */
  #define SOPT5_UART0TXSRC_UART_TX      0x00u   /*!< UART 0 transmit data source select: UART0_TX pin */
  
  /*
   * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
  BOARD_InitPins:
  - options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
  - pin_list:
    - {pin_num: '62', peripheral: UART0, signal: RX, pin_signal: PTB16/SPI1_SOUT/UART0_RX/FTM_CLKIN0/FB_AD17/EWM_IN}
    - {pin_num: '63', peripheral: UART0, signal: TX, pin_signal: PTB17/SPI1_SIN/UART0_TX/FTM_CLKIN1/FB_AD16/EWM_OUT_b}
    - {pin_num: '71', peripheral: FTM0, signal: 'CH, 0', pin_signal: ADC0_SE15/PTC1/LLWU_P6/SPI0_PCS3/UART1_RTS_b/FTM0_CH0/FB_AD13/I2S0_TXD0}
    - {pin_num: '72', peripheral: FTM0, signal: 'CH, 1', pin_signal: ADC0_SE4b/CMP1_IN0/PTC2/SPI0_PCS2/UART1_CTS_b/FTM0_CH1/FB_AD12/I2S0_TX_FS}
   * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
   */
  
  /*FUNCTION**********************************************************************
   *
   * Function Name : BOARD_InitPins
   * Description   : Configures pin routing and optionally pin electrical features.
   *
   *END**************************************************************************/
  void BOARD_InitPins(void) {
    CLOCK_EnableClock(kCLOCK_PortB);                           /* Port B Clock Gate Control: Clock enabled */
    CLOCK_EnableClock(kCLOCK_PortC);                           /* Port C Clock Gate Control: Clock enabled */
  
    PORT_SetPinMux(PORTB, PIN16_IDX, kPORT_MuxAlt3);           /* PORTB16 (pin 62) is configured as UART0_RX */
    PORT_SetPinMux(PORTB, PIN17_IDX, kPORT_MuxAlt3);           /* PORTB17 (pin 63) is configured as UART0_TX */
    PORT_SetPinMux(PORTC, PIN1_IDX, kPORT_MuxAlt4);            /* PORTC1 (pin 71) is configured as FTM0_CH0 */
    PORT_SetPinMux(PORTC, PIN2_IDX, kPORT_MuxAlt4);            /* PORTC2 (pin 72) is configured as FTM0_CH1 */
    SIM->SOPT5 = ((SIM->SOPT5 &
      (~(SIM_SOPT5_UART0TXSRC_MASK)))                          /* Mask bits to zero which are setting */
        | SIM_SOPT5_UART0TXSRC(SOPT5_UART0TXSRC_UART_TX)       /* UART 0 transmit data source select: UART0_TX pin */
      );
  }
  
  /*******************************************************************************
   * EOF
   ******************************************************************************/
  