text: //===-- X86SelectionDAGInfo.h - X86 SelectionDAG Info -----------*- C++ -*-===//
  //
  // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  // See https://llvm.org/LICENSE.txt for license information.
  // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  //
  //===----------------------------------------------------------------------===//
  //
  // This file defines the X86 subclass for SelectionDAGTargetInfo.
  //
  //===----------------------------------------------------------------------===//
  
  #ifndef LLVM_LIB_TARGET_X86_X86SELECTIONDAGINFO_H
  #define LLVM_LIB_TARGET_X86_X86SELECTIONDAGINFO_H
  
  #include "llvm/CodeGen/SelectionDAGTargetInfo.h"
  #include "llvm/MC/MCRegisterInfo.h"
  
  namespace llvm {
  
  class X86TargetLowering;
  class X86TargetMachine;
  class X86Subtarget;
  
  class X86SelectionDAGInfo : public SelectionDAGTargetInfo {
    /// Returns true if it is possible for the base register to conflict with the
    /// given set of clobbers for a memory intrinsic.
    bool isBaseRegConflictPossible(SelectionDAG &DAG,
                                   ArrayRef<MCPhysReg> ClobberSet) const;
  
  public:
    explicit X86SelectionDAGInfo() = default;
  
    SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl,
                                    SDValue Chain, SDValue Dst, SDValue Src,
                                    SDValue Size, unsigned Align, bool isVolatile,
                                    MachinePointerInfo DstPtrInfo) const override;
  
    SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl,
                                    SDValue Chain, SDValue Dst, SDValue Src,
                                    SDValue Size, unsigned Align, bool isVolatile,
                                    bool AlwaysInline,
                                    MachinePointerInfo DstPtrInfo,
                                    MachinePointerInfo SrcPtrInfo) const override;
  };
  
  }
  
  #endif
  