text: //===-- AArch64MCTargetDesc.h - AArch64 Target Descriptions -----*- C++ -*-===//
  //
  //                     The LLVM Compiler Infrastructure
  //
  // This file is distributed under the University of Illinois Open Source
  // License. See LICENSE.TXT for details.
  //
  //===----------------------------------------------------------------------===//
  //
  // This file provides AArch64 specific target descriptions.
  //
  //===----------------------------------------------------------------------===//
  
  #ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCTARGETDESC_H
  #define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCTARGETDESC_H
  
  #include "llvm/Support/DataTypes.h"
  
  #include <memory>
  
  namespace llvm {
  class formatted_raw_ostream;
  class MCAsmBackend;
  class MCCodeEmitter;
  class MCContext;
  class MCInstrInfo;
  class MCInstPrinter;
  class MCRegisterInfo;
  class MCObjectTargetWriter;
  class MCStreamer;
  class MCSubtargetInfo;
  class MCTargetOptions;
  class MCTargetStreamer;
  class StringRef;
  class Target;
  class Triple;
  class raw_ostream;
  class raw_pwrite_stream;
  
  Target &getTheAArch64leTarget();
  Target &getTheAArch64beTarget();
  Target &getTheARM64Target();
  
  MCCodeEmitter *createAArch64MCCodeEmitter(const MCInstrInfo &MCII,
                                            const MCRegisterInfo &MRI,
                                            MCContext &Ctx);
  MCAsmBackend *createAArch64leAsmBackend(const Target &T,
                                          const MCSubtargetInfo &STI,
                                          const MCRegisterInfo &MRI,
                                          const MCTargetOptions &Options);
  MCAsmBackend *createAArch64beAsmBackend(const Target &T,
                                          const MCSubtargetInfo &STI,
                                          const MCRegisterInfo &MRI,
                                          const MCTargetOptions &Options);
  
  std::unique_ptr<MCObjectTargetWriter>
  createAArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32);
  
  std::unique_ptr<MCObjectTargetWriter>
  createAArch64MachObjectWriter(uint32_t CPUType, uint32_t CPUSubtype);
  
  std::unique_ptr<MCObjectTargetWriter> createAArch64WinCOFFObjectWriter();
  
  MCTargetStreamer *createAArch64AsmTargetStreamer(MCStreamer &S,
                                                   formatted_raw_ostream &OS,
                                                   MCInstPrinter *InstPrint,
                                                   bool isVerboseAsm);
  
  MCTargetStreamer *createAArch64ObjectTargetStreamer(MCStreamer &S,
                                                      const MCSubtargetInfo &STI);
  
  namespace AArch64_MC {
  void initLLVMToCVRegMapping(MCRegisterInfo *MRI);
  }
  
  } // End llvm namespace
  
  // Defines symbolic names for AArch64 registers.  This defines a mapping from
  // register name to register number.
  //
  #define GET_REGINFO_ENUM
  #include "AArch64GenRegisterInfo.inc"
  
  // Defines symbolic names for the AArch64 instructions.
  //
  #define GET_INSTRINFO_ENUM
  #define GET_INSTRINFO_MC_HELPER_DECLS
  #include "AArch64GenInstrInfo.inc"
  
  #define GET_SUBTARGETINFO_ENUM
  #include "AArch64GenSubtargetInfo.inc"
  
  #endif
  