text: /* SPDX-License-Identifier: GPL-2.0+ */
  /*
   * Copyright 2020 NXP
   */
  
  #ifndef __IMX8M_PHANBELL_H
  #define __IMX8M_PHANBELL_H
  
  #include <linux/sizes.h>
  #include <asm/arch/imx-regs.h>
  
  #define CONFIG_SPL_MAX_SIZE		(172 * 1024)
  #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
  #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
  #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
  
  #ifdef CONFIG_SPL_BUILD
  /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
  #define CONFIG_SPL_WATCHDOG_SUPPORT
  #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
  #define CONFIG_SPL_POWER_SUPPORT
  #define CONFIG_SPL_I2C_SUPPORT
  #define CONFIG_SPL_LDSCRIPT		"arch/arm/cpu/armv8/u-boot-spl.lds"
  #define CONFIG_SPL_STACK		0x187FF0
  #define CONFIG_SPL_LIBCOMMON_SUPPORT
  #define CONFIG_SPL_LIBGENERIC_SUPPORT
  #define CONFIG_SPL_GPIO_SUPPORT
  #define CONFIG_SPL_MMC_SUPPORT
  #define CONFIG_SPL_BSS_START_ADDR      0x00180000
  #define CONFIG_SPL_BSS_MAX_SIZE        0x2000	/* 8 KB */
  #define CONFIG_SYS_SPL_MALLOC_START    0x42200000
  #define CONFIG_SYS_SPL_MALLOC_SIZE    0x80000	/* 512 KB */
  #define CONFIG_SYS_SPL_PTE_RAM_BASE    0x41580000
  
  /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
  #define CONFIG_MALLOC_F_ADDR		0x182000
  /* For RAW image gives a error info not panic */
  #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  
  #undef CONFIG_DM_MMC
  #undef CONFIG_DM_PMIC
  #undef CONFIG_DM_PMIC_PFUZE100
  
  #define CONFIG_SYS_I2C
  #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
  #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
  #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
  
  #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
  
  #define CONFIG_POWER
  #define CONFIG_POWER_I2C
  #endif
  
  #define CONFIG_REMAKE_ELF
  
  /* ENET Config */
  /* ENET1 */
  #if defined(CONFIG_CMD_NET)
  #define CONFIG_MII
  #define CONFIG_ETHPRIME                 "FEC"
  
  #define CONFIG_FEC_MXC
  #define CONFIG_FEC_XCV_TYPE             RGMII
  #define CONFIG_FEC_MXC_PHYADDR          0
  #define FEC_QUIRK_ENET_MAC
  
  #define CONFIG_PHY_GIGE
  #define IMX_FEC_BASE			0x30BE0000
  
  #define CONFIG_PHYLIB
  #endif
  
  #define CONFIG_MFG_ENV_SETTINGS \
  	"initrd_addr=0x43800000\0" \
  	"initrd_high=0xffffffff\0" \
  
  /* Initial environment variables */
  #define CONFIG_EXTRA_ENV_SETTINGS		\
  	CONFIG_MFG_ENV_SETTINGS \
  	"script=boot.scr\0" \
  	"image=Image\0" \
  	"console=ttymxc0,115200\0" \
  	"fdt_addr=0x43000000\0"			\
  	"fdt_high=0xffffffffffffffff\0"		\
  	"boot_fdt=try\0" \
  	"fdt_file=imx8mq-phanbell.dtb\0" \
  	"initrd_addr=0x43800000\0"		\
  	"initrd_high=0xffffffffffffffff\0" \
  	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
  	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  	"mmcautodetect=yes\0" \
  	"mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
  	"loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  	"bootscript=echo Running bootscript from mmc ...; " \
  		"source\0" \
  	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  	"mmcboot=echo Booting from mmc ...; " \
  		"run mmcargs; " \
  		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  			"if run loadfdt; then " \
  				"booti ${loadaddr} - ${fdt_addr}; " \
  			"else " \
  				"echo WARN: Cannot load the DT; " \
  			"fi; " \
  		"else " \
  			"echo wait for boot; " \
  		"fi;\0" \
  	"netargs=setenv bootargs console=${console} " \
  		"root=/dev/nfs " \
  		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  	"netboot=echo Booting from net ...; " \
  		"run netargs;  " \
  		"if test ${ip_dyn} = yes; then " \
  			"setenv get_cmd dhcp; " \
  		"else " \
  			"setenv get_cmd tftp; " \
  		"fi; " \
  		"${get_cmd} ${loadaddr} ${image}; " \
  		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
  				"booti ${loadaddr} - ${fdt_addr}; " \
  			"else " \
  				"echo WARN: Cannot load the DT; " \
  			"fi; " \
  		"else " \
  			"booti; " \
  		"fi;\0"
  
  #define CONFIG_BOOTCOMMAND \
  	   "mmc dev ${mmcdev}; if mmc rescan; then " \
  		   "if run loadbootscript; then " \
  			   "run bootscript; " \
  		   "else " \
  			   "if run loadimage; then " \
  				   "run mmcboot; " \
  			   "else run netboot; " \
  			   "fi; " \
  		   "fi; " \
  	   "else booti ${loadaddr} - ${fdt_addr}; fi"
  
  /* Link Definitions */
  #define CONFIG_LOADADDR			0x40480000
  
  #define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
  
  #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
  #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
  #define CONFIG_SYS_INIT_SP_OFFSET \
  	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  #define CONFIG_SYS_INIT_SP_ADDR \
  	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  
  #define CONFIG_MMCROOT			"/dev/mmcblk1p2"  /* USDHC2 */
  
  /* Size of malloc() pool */
  #define CONFIG_SYS_MALLOC_LEN		((CONFIG_ENV_SIZE + (2 * 1024)) * 1024)
  
  #define CONFIG_SYS_SDRAM_BASE           0x40000000
  #define PHYS_SDRAM                      0x40000000
  #define PHYS_SDRAM_SIZE			0x40000000 /* 1GB DDR */
  
  #define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
  #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
  					(PHYS_SDRAM_SIZE >> 1))
  
  #define CONFIG_MXC_UART_BASE		UART1_BASE_ADDR
  
  /* Monitor Command Prompt */
  #define CONFIG_SYS_CBSIZE		1024
  #define CONFIG_SYS_MAXARGS		64
  #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
  #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
  					sizeof(CONFIG_SYS_PROMPT) + 16)
  
  #define CONFIG_IMX_BOOTAUX
  
  #define CONFIG_SYS_FSL_USDHC_NUM	2
  #define CONFIG_SYS_FSL_ESDHC_ADDR       0
  
  #define CONFIG_SYS_MMC_IMG_LOAD_PART	1
  
  #define CONFIG_MXC_GPIO
  
  /* I2C Configs */
  #define CONFIG_SYS_I2C_SPEED		  100000
  
  #define CONFIG_OF_SYSTEM_SETUP
  
  #ifndef CONFIG_SPL_BUILD
  #define CONFIG_DM_PMIC
  #endif
  
  #endif
  