text: # -*- mode:python -*-
  # Copyright (c) 2009-2014 ARM Limited
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  #
  # Authors: Matt Horsnell
  #          Andreas Sandberg
  
  from m5.defines import buildEnv
  from m5.SimObject import SimObject
  from m5.params import *
  from m5.params import isNullPointer
  from m5.proxy import *
  
  class ArmPMU(SimObject):
      type = 'ArmPMU'
      cxx_class = 'ArmISA::PMU'
      cxx_header = 'arch/arm/pmu.hh'
  
      @classmethod
      def export_methods(cls, code):
          code('''
        void addEventProbe(unsigned int id,
                          SimObject *obj, const char *name);
  ''')
  
      # To prevent cycles in the configuration hierarchy, we don't keep
      # a list of supported events as a configuration param. Instead, we
      # keep them in a local list and register them using the
      # addEventProbe interface when other SimObjects register their
      # probe listeners.
      _deferred_event_types = []
      # Override the normal SimObject::regProbeListeners method and
      # register deferred event handlers.
      def regProbeListeners(self):
          for event_id, obj, name in self._deferred_event_types:
              self.getCCObject().addEventProbe(event_id, obj.getCCObject(), name)
  
          self.getCCObject().regProbeListeners()
  
      def addEventProbe(self, event_id, obj, *args):
          """Add a probe-based event to the PMU if obj is not None."""
  
          if obj is None:
              return
  
          for name in args:
              self._deferred_event_types.append((event_id, obj, name))
  
      def addArchEvents(self,
                        cpu=None,
                        itb=None, dtb=None,
                        icache=None, dcache=None,
                        l2cache=None):
          """Add architected events to the PMU.
  
          This method can be called multiple times with only a subset of
          the keyword arguments set. This enables event registration in
          configuration scripts to happen closer to the instantiation of
          the instrumented objects (e.g., the memory system) instead of
          a central point.
  
          CPU events should also be registered once per CPU that is
          sharing the PMU (e.g., when switching between CPU models).
          """
  
          bpred = cpu.branchPred if cpu and not isNullPointer(cpu.branchPred) \
              else None
  
          # 0x01: L1I_CACHE_REFILL
          self.addEventProbe(0x02, itb, "Refills")
          # 0x03: L2D_CACHE_REFILL
          # 0x04: L1D_CACHE
          self.addEventProbe(0x05, dtb, "Refills")
          self.addEventProbe(0x06, cpu, "RetiredLoads")
          self.addEventProbe(0x07, cpu, "RetiredStores")
          self.addEventProbe(0x08, cpu, "RetiredInsts")
          # 0x09: EXC_TAKEN
          # 0x0A: EXC_RETURN
          # 0x0B: CID_WRITE_RETIRED
          self.addEventProbe(0x0C, cpu, "RetiredBranches")
          # 0x0D: BR_IMMED_RETIRED
          # 0x0E: BR_RETURN_RETIRED
          # 0x0F: UNALIGEND_LDST_RETIRED
          self.addEventProbe(0x10, bpred, "Misses")
          self.addEventProbe(0x11, cpu, "Cycles")
          self.addEventProbe(0x12, bpred, "Branches")
          self.addEventProbe(0x13, cpu, "RetiredLoads", "RetiredStores")
          # 0x14: L1I_CACHE
          # 0x15: L1D_CACHE_WB
          # 0x16: L2D_CACHE
          # 0x17: L2D_CACHE_REFILL
          # 0x18: L2D_CACHE_WB
          # 0x19: BUS_ACCESS
          # 0x1A: MEMORY_ERROR
          # 0x1B: INST_SPEC
          # 0x1C: TTBR_WRITE_RETIRED
          # 0x1D: BUS_CYCLES
          # 0x1E: CHAIN
          # 0x1F: L1D_CACHE_ALLOCATE
          # 0x20: L2D_CACHE_ALLOCATE
  
      platform = Param.Platform(Parent.any, "Platform this device is part of.")
      eventCounters = Param.Int(31, "Number of supported PMU counters")
      pmuInterrupt = Param.Int(68, "PMU GIC interrupt number")
  