text: /*
   * Copyright 2017 NXP
   * All rights reserved.
   *
   * SPDX-License-Identifier: BSD-3-Clause
   */
  
  
  /* clang-format off */
  /*
   * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
  
  !!GlobalInfo
  
  product: Pins v3.0
  
  processor: MKV31F512xxx12
  
  package_id: MKV31F512VLL12
  
  mcu_data: ksdk2_0
  
  processor_version: 0.0.8
  
   * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
   */
  /* clang-format on */
  
  #include "fsl_common.h"
  #include "fsl_port.h"
  #include "pin_mux.h"
  
  
  
  /* clang-format off */
  /*
   * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
  
  BOARD_InitPins:
  
  - options: {callFromInitBoot: 'true', prefix: BOARD_, coreID: core0, enableClock: 'true'}
  
  - pin_list:
  
    - {pin_num: '62', peripheral: UART0, signal: RX, pin_signal: PTB16/SPI1_SOUT/UART0_RX/FTM_CLKIN0/FB_AD17/EWM_IN}
  
    - {pin_num: '63', peripheral: UART0, signal: TX, pin_signal: PTB17/SPI1_SIN/UART0_TX/FTM_CLKIN1/FB_AD16/EWM_OUT_b}
  
    - {pin_num: '10', peripheral: SPI0, signal: PCS0_SS, pin_signal: ADC0_SE4a/PTE16/SPI0_PCS0/UART2_TX/FTM_CLKIN0/FTM0_FLT3}
  
    - {pin_num: '11', peripheral: SPI0, signal: SCK, pin_signal: ADC0_SE5a/PTE17/SPI0_SCK/UART2_RX/FTM_CLKIN1/LPTMR0_ALT3}
  
    - {pin_num: '12', peripheral: SPI0, signal: SOUT, pin_signal: ADC0_SE6a/PTE18/SPI0_SOUT/UART2_CTS_b/I2C0_SDA}
  
    - {pin_num: '13', peripheral: SPI0, signal: SIN, pin_signal: ADC0_SE7a/PTE19/SPI0_SIN/UART2_RTS_b/I2C0_SCL}
  
   * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
   */
  /* clang-format on */
  
  /* FUNCTION ************************************************************************************************************
   *
   * Function Name : BOARD_InitPins
   * Description   : Configures pin routing and optionally pin electrical features.
   *
   * END ****************************************************************************************************************/
  void BOARD_InitPins(void)
  {
      /* Port B Clock Gate Control: Clock enabled */
      CLOCK_EnableClock(kCLOCK_PortB);
      /* Port E Clock Gate Control: Clock enabled */
      CLOCK_EnableClock(kCLOCK_PortE);
  
      /* PORTB16 (pin 62) is configured as UART0_RX */
      PORT_SetPinMux(PORTB, 16U, kPORT_MuxAlt3);
  
      /* PORTB17 (pin 63) is configured as UART0_TX */
      PORT_SetPinMux(PORTB, 17U, kPORT_MuxAlt3);
  
      /* PORTE16 (pin 10) is configured as SPI0_PCS0 */
      PORT_SetPinMux(PORTE, 16U, kPORT_MuxAlt2);
  
      /* PORTE17 (pin 11) is configured as SPI0_SCK */
      PORT_SetPinMux(PORTE, 17U, kPORT_MuxAlt2);
  
      /* PORTE18 (pin 12) is configured as SPI0_SOUT */
      PORT_SetPinMux(PORTE, 18U, kPORT_MuxAlt2);
  
      /* PORTE19 (pin 13) is configured as SPI0_SIN */
      PORT_SetPinMux(PORTE, 19U, kPORT_MuxAlt2);
  
      SIM->SOPT5 = ((SIM->SOPT5 &
                     /* Mask bits to zero which are setting */
                     (~(SIM_SOPT5_UART0TXSRC_MASK)))
  
                    /* UART 0 transmit data source select: UART0_TX pin. */
                    | SIM_SOPT5_UART0TXSRC(SOPT5_UART0TXSRC_UART_TX));
  }
  /***********************************************************************************************************************
   * EOF
   **********************************************************************************************************************/
  