text: /**********************************************************************/
  /*   ____  ____                                                       */
  /*  /   /\/   /                                                       */
  /* /___/  \  /                                                        */
  /* \   \   \/                                                       */
  /*  \   \        Copyright (c) 2003-2009 Xilinx, Inc.                */
  /*  /   /          All Right Reserved.                                 */
  /* /---/   /\                                                         */
  /* \   \  /  \                                                      */
  /*  \___\/\___\                                                    */
  /***********************************************************************/
  
  /* This file is designed for use with ISim build 0x7708f090 */
  
  #define XSI_HIDE_SYMBOL_SPEC true
  #include "xsi.h"
  #include <memory.h>
  #ifdef __GNUC__
  #include <stdlib.h>
  #else
  #include <malloc.h>
  #define alloca _alloca
  #endif
  extern char *STD_STANDARD;
  extern char *IEEE_P_2592010699;
  
  unsigned char ieee_p_2592010699_sub_1605435078_503743352(char *, unsigned char , unsigned char );
  unsigned char ieee_p_2592010699_sub_1690584930_503743352(char *, unsigned char );
  unsigned char ieee_p_2592010699_sub_2545490612_503743352(char *, unsigned char , unsigned char );
  
  
  int xilinxcorelib_a_3649341328_2959432447_sub_1430772697_1702280263(char *t1, int t2)
  {
      char t3[128];
      char t4[8];
      char t8[8];
      int t0;
      char *t5;
      char *t6;
      char *t7;
      char *t9;
      char *t10;
      char *t11;
      unsigned char t12;
      char *t13;
      char *t14;
      int t15;
  
  LAB0:    t5 = (t3 + 4U);
      t6 = ((STD_STANDARD) + 384);
      t7 = (t5 + 88U);
      *((char **)t7) = t6;
      t9 = (t5 + 56U);
      *((char **)t9) = t8;
      *((int *)t8) = 0;
      t10 = (t5 + 80U);
      *((unsigned int *)t10) = 4U;
      t11 = (t4 + 4U);
      *((int *)t11) = t2;
      t12 = (t2 == 0);
      if (t12 != 0)
          goto LAB2;
  
  LAB4:    t15 = (t2 - 1);
      t6 = (t5 + 56U);
      t7 = *((char **)t6);
      t6 = (t7 + 0);
      *((int *)t6) = t15;
  
  LAB3:    t6 = (t5 + 56U);
      t7 = *((char **)t6);
      t15 = *((int *)t7);
      t0 = t15;
  
  LAB1:    return t0;
  LAB2:    t13 = (t5 + 56U);
      t14 = *((char **)t13);
      t13 = (t14 + 0);
      *((int *)t13) = 0;
      goto LAB3;
  
  LAB5:;
  }
  
  unsigned char xilinxcorelib_a_3649341328_2959432447_sub_4126348946_1702280263(char *t1, int t2)
  {
      char t3[128];
      char t4[8];
      char t8[8];
      unsigned char t0;
      char *t5;
      char *t6;
      char *t7;
      char *t9;
      char *t10;
      char *t11;
      unsigned char t12;
      char *t13;
      char *t14;
  
  LAB0:    t5 = (t3 + 4U);
      t6 = ((IEEE_P_2592010699) + 3320);
      t7 = (t5 + 88U);
      *((char **)t7) = t6;
      t9 = (t5 + 56U);
      *((char **)t9) = t8;
      xsi_type_set_default_value(t6, t8, 0);
      t10 = (t5 + 80U);
      *((unsigned int *)t10) = 1U;
      t11 = (t4 + 4U);
      *((int *)t11) = t2;
      t12 = (t2 == 0);
      if (t12 != 0)
          goto LAB2;
  
  LAB4:    t6 = (t5 + 56U);
      t7 = *((char **)t6);
      t6 = (t7 + 0);
      *((unsigned char *)t6) = (unsigned char)3;
  
  LAB3:    t6 = (t5 + 56U);
      t7 = *((char **)t6);
      t12 = *((unsigned char *)t7);
      t0 = t12;
  
  LAB1:    return t0;
  LAB2:    t13 = (t5 + 56U);
      t14 = *((char **)t13);
      t13 = (t14 + 0);
      *((unsigned char *)t13) = (unsigned char)2;
      goto LAB3;
  
  LAB5:;
  }
  
  static void xilinxcorelib_a_3649341328_2959432447_p_0(char *t0)
  {
      char *t1;
      char *t2;
      unsigned char t3;
      char *t4;
      unsigned char t5;
      unsigned char t6;
      unsigned char t7;
      char *t8;
      char *t9;
      char *t10;
      char *t11;
      char *t12;
  
  LAB0:
  LAB3:    t1 = (t0 + 1616U);
      t2 = *((char **)t1);
      t3 = *((unsigned char *)t2);
      t1 = (t0 + 6552U);
      t4 = *((char **)t1);
      t5 = *((unsigned char *)t4);
      t6 = ieee_p_2592010699_sub_1690584930_503743352(IEEE_P_2592010699, t5);
      t7 = ieee_p_2592010699_sub_2545490612_503743352(IEEE_P_2592010699, t3, t6);
      t1 = (t0 + 10576);
      t8 = (t1 + 56U);
      t9 = *((char **)t8);
      t10 = (t9 + 56U);
      t11 = *((char **)t10);
      *((unsigned char *)t11) = t7;
      xsi_driver_first_trans_fast(t1);
  
  LAB2:    t12 = (t0 + 10400);
      *((int *)t12) = 1;
  
  LAB1:    return;
  LAB4:    goto LAB2;
  
  }
  
  static void xilinxcorelib_a_3649341328_2959432447_p_1(char *t0)
  {
      char *t1;
      char *t2;
      unsigned char t3;
      char *t4;
      unsigned char t5;
      unsigned char t6;
      char *t7;
      unsigned char t8;
      unsigned char t9;
      char *t10;
      unsigned char t11;
      unsigned char t12;
      unsigned char t13;
      char *t14;
      char *t15;
      char *t16;
      char *t17;
      char *t18;
  
  LAB0:
  LAB3:    t1 = (t0 + 6672U);
      t2 = *((char **)t1);
      t3 = *((unsigned char *)t2);
      t1 = (t0 + 1776U);
      t4 = *((char **)t1);
      t5 = *((unsigned char *)t4);
      t6 = ieee_p_2592010699_sub_1605435078_503743352(IEEE_P_2592010699, t3, t5);
      t1 = (t0 + 6672U);
      t7 = *((char **)t1);
      t8 = *((unsigned char *)t7);
      t9 = ieee_p_2592010699_sub_1690584930_503743352(IEEE_P_2592010699, t8);
      t1 = (t0 + 3856U);
      t10 = *((char **)t1);
      t11 = *((unsigned char *)t10);
      t12 = ieee_p_2592010699_sub_1605435078_503743352(IEEE_P_2592010699, t9, t11);
      t13 = ieee_p_2592010699_sub_2545490612_503743352(IEEE_P_2592010699, t6, t12);
      t1 = (t0 + 10640);
      t14 = (t1 + 56U);
      t15 = *((char **)t14);
      t16 = (t15 + 56U);
      t17 = *((char **)t16);
      *((unsigned char *)t17) = t13;
      xsi_driver_first_trans_fast(t1);
  
  LAB2:    t18 = (t0 + 10416);
      *((int *)t18) = 1;
  
  LAB1:    return;
  LAB4:    goto LAB2;
  
  }
  
  static void xilinxcorelib_a_3649341328_2959432447_p_2(char *t0)
  {
      char *t1;
      char *t2;
      unsigned char t3;
      char *t4;
      unsigned char t5;
      unsigned char t6;
      char *t7;
      char *t8;
      char *t9;
      char *t10;
      char *t11;
  
  LAB0:
  LAB3:    t1 = (t0 + 1456U);
      t2 = *((char **)t1);
      t3 = *((unsigned char *)t2);
      t1 = (t0 + 6792U);
      t4 = *((char **)t1);
      t5 = *((unsigned char *)t4);
      t6 = ieee_p_2592010699_sub_1605435078_503743352(IEEE_P_2592010699, t3, t5);
      t1 = (t0 + 10704);
      t7 = (t1 + 56U);
      t8 = *((char **)t7);
      t9 = (t8 + 56U);
      t10 = *((char **)t9);
      *((unsigned char *)t10) = t6;
      xsi_driver_first_trans_fast(t1);
  
  LAB2:    t11 = (t0 + 10432);
      *((int *)t11) = 1;
  
  LAB1:    return;
  LAB4:    goto LAB2;
  
  }
  
  static void xilinxcorelib_a_3649341328_2959432447_p_3(char *t0)
  {
      char *t1;
      char *t2;
      char *t3;
      char *t4;
      char *t5;
      char *t6;
      char *t7;
  
  LAB0:
  LAB3:    t1 = (t0 + 1936U);
      t2 = *((char **)t1);
      t1 = (t0 + 10768);
      t3 = (t1 + 56U);
      t4 = *((char **)t3);
      t5 = (t4 + 56U);
      t6 = *((char **)t5);
      memcpy(t6, t2, 5U);
      xsi_driver_first_trans_fast_port(t1);
  
  LAB2:    t7 = (t0 + 10448);
      *((int *)t7) = 1;
  
  LAB1:    return;
  LAB4:    goto LAB2;
  
  }
  
  static void xilinxcorelib_a_3649341328_2959432447_p_4(char *t0)
  {
      char *t1;
      char *t2;
      unsigned char t3;
      char *t4;
      char *t5;
      char *t6;
      char *t7;
      char *t8;
  
  LAB0:
  LAB3:    t1 = (t0 + 2256U);
      t2 = *((char **)t1);
      t3 = *((unsigned char *)t2);
      t1 = (t0 + 10832);
      t4 = (t1 + 56U);
      t5 = *((char **)t4);
      t6 = (t5 + 56U);
      t7 = *((char **)t6);
      *((unsigned char *)t7) = t3;
      xsi_driver_first_trans_fast_port(t1);
  
  LAB2:    t8 = (t0 + 10464);
      *((int *)t8) = 1;
  
  LAB1:    return;
  LAB4:    goto LAB2;
  
  }
  
  static void xilinxcorelib_a_3649341328_2959432447_p_5(char *t0)
  {
      char *t1;
      char *t2;
      unsigned char t3;
      char *t4;
      char *t5;
      char *t6;
      char *t7;
      char *t8;
  
  LAB0:
  LAB3:    t1 = (t0 + 2416U);
      t2 = *((char **)t1);
      t3 = *((unsigned char *)t2);
      t1 = (t0 + 10896);
      t4 = (t1 + 56U);
      t5 = *((char **)t4);
      t6 = (t5 + 56U);
      t7 = *((char **)t6);
      *((unsigned char *)t7) = t3;
      xsi_driver_first_trans_fast_port(t1);
  
  LAB2:    t8 = (t0 + 10480);
      *((int *)t8) = 1;
  
  LAB1:    return;
  LAB4:    goto LAB2;
  
  }
  
  static void xilinxcorelib_a_3649341328_2959432447_p_6(char *t0)
  {
      char *t1;
      char *t2;
      char *t3;
      char *t4;
      char *t5;
      char *t6;
      char *t7;
  
  LAB0:
  LAB3:    t1 = (t0 + 2896U);
      t2 = *((char **)t1);
      t1 = (t0 + 10960);
      t3 = (t1 + 56U);
      t4 = *((char **)t3);
      t5 = (t4 + 56U);
      t6 = *((char **)t5);
      memcpy(t6, t2, 9U);
      xsi_driver_first_trans_fast_port(t1);
  
  LAB2:    t7 = (t0 + 10496);
      *((int *)t7) = 1;
  
  LAB1:    return;
  LAB4:    goto LAB2;
  
  }
  
  
  extern void xilinxcorelib_a_3649341328_2959432447_init()
  {
  	static char *pe[] = {(void *)xilinxcorelib_a_3649341328_2959432447_p_0,(void *)xilinxcorelib_a_3649341328_2959432447_p_1,(void *)xilinxcorelib_a_3649341328_2959432447_p_2,(void *)xilinxcorelib_a_3649341328_2959432447_p_3,(void *)xilinxcorelib_a_3649341328_2959432447_p_4,(void *)xilinxcorelib_a_3649341328_2959432447_p_5,(void *)xilinxcorelib_a_3649341328_2959432447_p_6};
  	static char *se[] = {(void *)xilinxcorelib_a_3649341328_2959432447_sub_1430772697_1702280263,(void *)xilinxcorelib_a_3649341328_2959432447_sub_4126348946_1702280263};
  	xsi_register_didat("xilinxcorelib_a_3649341328_2959432447", "isim/tb_ckt_isim_beh.exe.sim/xilinxcorelib/a_3649341328_2959432447.didat");
  	xsi_register_executes(pe);
  	xsi_register_subprogram_executes(se);
  }
  