text: /* Copyright 2019 SiFive, Inc */
  /* SPDX-License-Identifier: Apache-2.0 */
  /* ----------------------------------- */
  /* ----------------------------------- */
  
  #ifndef METAL_PLATFORM_H
  #define METAL_PLATFORM_H
  
  /* From hfclk */
  #define METAL_FIXED_CLOCK__HFCLK_CLOCK_FREQUENCY 26000000UL
  
  /* From rtcclk */
  #define METAL_FIXED_CLOCK__RTCCLK_CLOCK_FREQUENCY 1000000UL
  
  /* From pclk */
  #define METAL_FIXED_CLOCK__PCLK_CLOCK_FREQUENCY 125000000UL
  
  /* From subsystem_pbus_clock */
  #define METAL_FIXED_CLOCK__SUBSYSTEM_PBUS_CLOCK_CLOCK_FREQUENCY 8333333UL
  
  /* From system_multipbus_clock */
  #define METAL_FIXED_CLOCK__SYSTEM_MULTIPBUS_CLOCK_CLOCK_FREQUENCY 8333333UL
  
  #define METAL_FIXED_CLOCK
  
  /* From clint@2000000 */
  #define METAL_RISCV_CLINT0_2000000_BASE_ADDRESS 33554432UL
  #define METAL_RISCV_CLINT0_0_BASE_ADDRESS 33554432UL
  #define METAL_RISCV_CLINT0_2000000_SIZE 65536UL
  #define METAL_RISCV_CLINT0_0_SIZE 65536UL
  
  #define METAL_RISCV_CLINT0
  #define METAL_RISCV_CLINT0_MSIP_BASE 0UL
  #define METAL_RISCV_CLINT0_MTIMECMP_BASE 16384UL
  #define METAL_RISCV_CLINT0_MTIME 49144UL
  
  /* From interrupt_controller@c000000 */
  #define METAL_RISCV_PLIC0_C000000_BASE_ADDRESS 201326592UL
  #define METAL_RISCV_PLIC0_0_BASE_ADDRESS 201326592UL
  #define METAL_RISCV_PLIC0_C000000_SIZE 67108864UL
  #define METAL_RISCV_PLIC0_0_SIZE 67108864UL
  #define METAL_RISCV_PLIC0_C000000_RISCV_MAX_PRIORITY 7UL
  #define METAL_RISCV_PLIC0_0_RISCV_MAX_PRIORITY 7UL
  #define METAL_RISCV_PLIC0_C000000_RISCV_NDEV 70UL
  #define METAL_RISCV_PLIC0_0_RISCV_NDEV 70UL
  
  #define METAL_RISCV_PLIC0
  #define METAL_RISCV_PLIC0_PRIORITY_BASE 0UL
  #define METAL_RISCV_PLIC0_PENDING_BASE 4096UL
  #define METAL_RISCV_PLIC0_ENABLE_BASE 8192UL
  #define METAL_RISCV_PLIC0_ENABLE_PER_HART 128UL
  #define METAL_RISCV_PLIC0_CONTEXT_BASE 2097152UL
  #define METAL_RISCV_PLIC0_CONTEXT_PER_HART 4096UL
  #define METAL_RISCV_PLIC0_CONTEXT_THRESHOLD 0UL
  #define METAL_RISCV_PLIC0_CONTEXT_CLAIM 4UL
  
  /* From bus_error_unit@1700000 */
  #define METAL_SIFIVE_BUSERROR0_1700000_BASE_ADDRESS 24117248UL
  #define METAL_SIFIVE_BUSERROR0_0_BASE_ADDRESS 24117248UL
  #define METAL_SIFIVE_BUSERROR0_1700000_SIZE 4096UL
  #define METAL_SIFIVE_BUSERROR0_0_SIZE 4096UL
  
  /* From bus_error_unit@1701000 */
  #define METAL_SIFIVE_BUSERROR0_1701000_BASE_ADDRESS 24121344UL
  #define METAL_SIFIVE_BUSERROR0_1_BASE_ADDRESS 24121344UL
  #define METAL_SIFIVE_BUSERROR0_1701000_SIZE 4096UL
  #define METAL_SIFIVE_BUSERROR0_1_SIZE 4096UL
  
  /* From bus_error_unit@1702000 */
  #define METAL_SIFIVE_BUSERROR0_1702000_BASE_ADDRESS 24125440UL
  #define METAL_SIFIVE_BUSERROR0_2_BASE_ADDRESS 24125440UL
  #define METAL_SIFIVE_BUSERROR0_1702000_SIZE 4096UL
  #define METAL_SIFIVE_BUSERROR0_2_SIZE 4096UL
  
  /* From bus_error_unit@1703000 */
  #define METAL_SIFIVE_BUSERROR0_1703000_BASE_ADDRESS 24129536UL
  #define METAL_SIFIVE_BUSERROR0_3_BASE_ADDRESS 24129536UL
  #define METAL_SIFIVE_BUSERROR0_1703000_SIZE 4096UL
  #define METAL_SIFIVE_BUSERROR0_3_SIZE 4096UL
  
  /* From bus_error_unit@1704000 */
  #define METAL_SIFIVE_BUSERROR0_1704000_BASE_ADDRESS 24133632UL
  #define METAL_SIFIVE_BUSERROR0_4_BASE_ADDRESS 24133632UL
  #define METAL_SIFIVE_BUSERROR0_1704000_SIZE 4096UL
  #define METAL_SIFIVE_BUSERROR0_4_SIZE 4096UL
  
  #define METAL_SIFIVE_BUSERROR0
  #define METAL_SIFIVE_BUSERROR0_CAUSE 0UL
  #define METAL_SIFIVE_BUSERROR0_VALUE 8UL
  #define METAL_SIFIVE_BUSERROR0_ENABLE 16UL
  #define METAL_SIFIVE_BUSERROR0_PLATFORM_INTERRUPT 24UL
  #define METAL_SIFIVE_BUSERROR0_ACCRUED 32UL
  #define METAL_SIFIVE_BUSERROR0_LOCAL_INTERRUPT 40UL
  
  /* From cache_controller@2010000 */
  #define METAL_SIFIVE_CCACHE0_2010000_BASE_ADDRESS 33619968UL
  #define METAL_SIFIVE_CCACHE0_0_BASE_ADDRESS 33619968UL
  #define METAL_SIFIVE_CCACHE0_2010000_SIZE 16384UL
  #define METAL_SIFIVE_CCACHE0_0_SIZE 16384UL
  
  #define METAL_SIFIVE_CCACHE0
  #define METAL_SIFIVE_CCACHE0_CONFIG 0UL
  #define METAL_SIFIVE_CCACHE0_WAYENABLE 8UL
  #define METAL_SIFIVE_CCACHE0_ECCINJECTERROR 64UL
  #define METAL_SIFIVE_CCACHE0_DIRECCFIXLOW 256UL
  #define METAL_SIFIVE_CCACHE0_DIRECCFIXHIGH 260UL
  #define METAL_SIFIVE_CCACHE0_DIRECCFIXCOUNT 264UL
  #define METAL_SIFIVE_CCACHE0_DIRECCFAILLOW 288UL
  #define METAL_SIFIVE_CCACHE0_DIRECCFAILHIGH 292UL
  #define METAL_SIFIVE_CCACHE0_DIRECCFAILCOUNT 296UL
  #define METAL_SIFIVE_CCACHE0_DATECCFIXLOW 320UL
  #define METAL_SIFIVE_CCACHE0_DATECCFIXHIGH 324UL
  #define METAL_SIFIVE_CCACHE0_DATECCFIXCOUNT 328UL
  #define METAL_SIFIVE_CCACHE0_DATECCFAILLOW 352UL
  #define METAL_SIFIVE_CCACHE0_DATECCFAILHIGH 356UL
  #define METAL_SIFIVE_CCACHE0_DATECCFAILCOUNT 360UL
  #define METAL_SIFIVE_CCACHE0_FLUSH64 512UL
  #define METAL_SIFIVE_CCACHE0_FLUSH32 576UL
  #define METAL_SIFIVE_CCACHE0_WAYMASK0 2048UL
  #define METAL_SIFIVE_CCACHE0_PMEVENTSELECT0 8192UL
  #define METAL_SIFIVE_CCACHE0_PMCLIENTFILTER 10240UL
  #define METAL_SIFIVE_CCACHE0_PMEVENTCOUNTER0 12288UL
  
  /* From error_device@14000000 */
  #define METAL_SIFIVE_ERROR0_14000000_BASE_ADDRESS 335544320UL
  #define METAL_SIFIVE_ERROR0_0_BASE_ADDRESS 335544320UL
  #define METAL_SIFIVE_ERROR0_14000000_SIZE 67108864UL
  #define METAL_SIFIVE_ERROR0_0_SIZE 67108864UL
  
  /* From error_device@3000 */
  #define METAL_SIFIVE_ERROR0_3000_BASE_ADDRESS 12288UL
  #define METAL_SIFIVE_ERROR0_1_BASE_ADDRESS 12288UL
  #define METAL_SIFIVE_ERROR0_3000_SIZE 4096UL
  #define METAL_SIFIVE_ERROR0_1_SIZE 4096UL
  
  #define METAL_SIFIVE_ERROR0
  
  /* From gpio@10060000 */
  #define METAL_SIFIVE_GPIO0_10060000_BASE_ADDRESS 268828672UL
  #define METAL_SIFIVE_GPIO0_0_BASE_ADDRESS 268828672UL
  #define METAL_SIFIVE_GPIO0_10060000_SIZE 4096UL
  #define METAL_SIFIVE_GPIO0_0_SIZE 4096UL
  
  #define METAL_SIFIVE_GPIO0
  #define METAL_SIFIVE_GPIO0_VALUE 0UL
  #define METAL_SIFIVE_GPIO0_INPUT_EN 4UL
  #define METAL_SIFIVE_GPIO0_OUTPUT_EN 8UL
  #define METAL_SIFIVE_GPIO0_PORT 12UL
  #define METAL_SIFIVE_GPIO0_PUE 16UL
  #define METAL_SIFIVE_GPIO0_DS 20UL
  #define METAL_SIFIVE_GPIO0_RISE_IE 24UL
  #define METAL_SIFIVE_GPIO0_RISE_IP 28UL
  #define METAL_SIFIVE_GPIO0_FALL_IE 32UL
  #define METAL_SIFIVE_GPIO0_FALL_IP 36UL
  #define METAL_SIFIVE_GPIO0_HIGH_IE 40UL
  #define METAL_SIFIVE_GPIO0_HIGH_IP 44UL
  #define METAL_SIFIVE_GPIO0_LOW_IE 48UL
  #define METAL_SIFIVE_GPIO0_LOW_IP 52UL
  #define METAL_SIFIVE_GPIO0_IOF_EN 56UL
  #define METAL_SIFIVE_GPIO0_IOF_SEL 60UL
  #define METAL_SIFIVE_GPIO0_OUT_XOR 64UL
  
  /* From i2c@10030000 */
  #define METAL_SIFIVE_I2C0_10030000_BASE_ADDRESS 268632064UL
  #define METAL_SIFIVE_I2C0_0_BASE_ADDRESS 268632064UL
  #define METAL_SIFIVE_I2C0_10030000_SIZE 4096UL
  #define METAL_SIFIVE_I2C0_0_SIZE 4096UL
  
  /* From i2c@10031000 */
  #define METAL_SIFIVE_I2C0_10031000_BASE_ADDRESS 268636160UL
  #define METAL_SIFIVE_I2C0_1_BASE_ADDRESS 268636160UL
  #define METAL_SIFIVE_I2C0_10031000_SIZE 4096UL
  #define METAL_SIFIVE_I2C0_1_SIZE 4096UL
  
  #define METAL_SIFIVE_I2C0
  #define METAL_SIFIVE_I2C0_PRESCALE_LOW 0UL
  #define METAL_SIFIVE_I2C0_PRESCALE_HIGH 4UL
  #define METAL_SIFIVE_I2C0_CONTROL 8UL
  #define METAL_SIFIVE_I2C0_TRANSMIT 12UL
  #define METAL_SIFIVE_I2C0_RECEIVE 12UL
  #define METAL_SIFIVE_I2C0_COMMAND 16UL
  #define METAL_SIFIVE_I2C0_STATUS 16UL
  
  /* From prci@10000000 */
  #define METAL_SIFIVE_FU740_C000_PRCI0_10000000_BASE_ADDRESS 268435456UL
  #define METAL_SIFIVE_FU740_C000_PRCI0_0_BASE_ADDRESS 268435456UL
  #define METAL_SIFIVE_FU740_C000_PRCI0_10000000_SIZE 4096UL
  #define METAL_SIFIVE_FU740_C000_PRCI0_0_SIZE 4096UL
  
  #define METAL_SIFIVE_FU740_C000_PRCI0
  #define METAL_SIFIVE_PRCI0_HFXOSCCFG 0UL
  #define METAL_SIFIVE_PRCI0_COREPLLCFG 4UL
  #define METAL_SIFIVE_PRCI0_COREPLLOUTDIV 8UL
  #define METAL_SIFIVE_PRCI0_DDRPLLCFG 12UL
  #define METAL_SIFIVE_PRCI0_DDRPLLOUTDIV 16UL
  #define METAL_SIFIVE_PRCI0_GEMGXLPLLCFG 28UL
  #define METAL_SIFIVE_PRCI0_GEMGXLPLLOUTDIV 32UL
  #define METAL_SIFIVE_PRCI0_CORECLKSELREG 36UL
  #define METAL_SIFIVE_PRCI0_DEVICESRESETN 40UL
  #define METAL_SIFIVE_PRCI0_CLKMUXSTATUS 44UL
  #define METAL_SIFIVE_PRCI0_CLTXPLLCFG 48UL
  #define METAL_SIFIVE_PRCI0_CLTXPLLOUTDIV 52UL
  #define METAL_SIFIVE_PRCI0_DVFSCOREPLL 56UL
  #define METAL_SIFIVE_PRCI0_DVFSCOREPLLOUTDIV 60UL
  #define METAL_SIFIVE_PRCI0_COREPLLSEL 64UL
  #define METAL_SIFIVE_PRCI0_HFPCLKPLLCFG 80UL
  #define METAL_SIFIVE_PRCI0_HFPCLKPLLOUTDIV 84UL
  #define METAL_SIFIVE_PRCI0_HFPCLKPLLSEL 88UL
  #define METAL_SIFIVE_PRCI0_HFPCLKDIVREG 92UL
  #define METAL_SIFIVE_PRCI0_PRCIPLLS 224UL
  #define METAL_SIFIVE_PRCI0_PROCMONCFG 240UL
  
  /* From pwm@10020000 */
  #define METAL_SIFIVE_PWM0_10020000_BASE_ADDRESS 268566528UL
  #define METAL_SIFIVE_PWM0_0_BASE_ADDRESS 268566528UL
  #define METAL_SIFIVE_PWM0_10020000_SIZE 4096UL
  #define METAL_SIFIVE_PWM0_0_SIZE 4096UL
  
  /* From pwm@10021000 */
  #define METAL_SIFIVE_PWM0_10021000_BASE_ADDRESS 268570624UL
  #define METAL_SIFIVE_PWM0_1_BASE_ADDRESS 268570624UL
  #define METAL_SIFIVE_PWM0_10021000_SIZE 4096UL
  #define METAL_SIFIVE_PWM0_1_SIZE 4096UL
  
  #define METAL_SIFIVE_PWM0
  #define METAL_SIFIVE_PWM0_PWMCFG 0UL
  #define METAL_SIFIVE_PWM0_PWMCOUNT 8UL
  #define METAL_SIFIVE_PWM0_PWMS 16UL
  #define METAL_SIFIVE_PWM0_PWMCMP0 32UL
  #define METAL_SIFIVE_PWM0_PWMCMP1 36UL
  #define METAL_SIFIVE_PWM0_PWMCMP2 40UL
  #define METAL_SIFIVE_PWM0_PWMCMP3 44UL
  
  /* From spi@10040000 */
  #define METAL_SIFIVE_SPI0_10040000_BASE_ADDRESS 268697600UL
  #define METAL_SIFIVE_SPI0_0_BASE_ADDRESS 268697600UL
  #define METAL_SIFIVE_SPI0_10040000_SIZE 4096UL
  #define METAL_SIFIVE_SPI0_0_SIZE 4096UL
  
  /* From spi@10041000 */
  #define METAL_SIFIVE_SPI0_10041000_BASE_ADDRESS 268701696UL
  #define METAL_SIFIVE_SPI0_1_BASE_ADDRESS 268701696UL
  #define METAL_SIFIVE_SPI0_10041000_SIZE 4096UL
  #define METAL_SIFIVE_SPI0_1_SIZE 4096UL
  
  /* From spi@10050000 */
  #define METAL_SIFIVE_SPI0_10050000_BASE_ADDRESS 268763136UL
  #define METAL_SIFIVE_SPI0_2_BASE_ADDRESS 268763136UL
  #define METAL_SIFIVE_SPI0_10050000_SIZE 4096UL
  #define METAL_SIFIVE_SPI0_2_SIZE 4096UL
  
  #define METAL_SIFIVE_SPI0
  #define METAL_SIFIVE_SPI0_SCKDIV 0UL
  #define METAL_SIFIVE_SPI0_SCKMODE 4UL
  #define METAL_SIFIVE_SPI0_CSID 16UL
  #define METAL_SIFIVE_SPI0_CSDEF 20UL
  #define METAL_SIFIVE_SPI0_CSMODE 24UL
  #define METAL_SIFIVE_SPI0_DELAY0 40UL
  #define METAL_SIFIVE_SPI0_DELAY1 44UL
  #define METAL_SIFIVE_SPI0_FMT 64UL
  #define METAL_SIFIVE_SPI0_TXDATA 72UL
  #define METAL_SIFIVE_SPI0_RXDATA 76UL
  #define METAL_SIFIVE_SPI0_TXMARK 80UL
  #define METAL_SIFIVE_SPI0_RXMARK 84UL
  #define METAL_SIFIVE_SPI0_FCTRL 96UL
  #define METAL_SIFIVE_SPI0_FFMT 100UL
  #define METAL_SIFIVE_SPI0_IE 112UL
  #define METAL_SIFIVE_SPI0_IP 116UL
  
  /* From teststatus@4000 */
  #define METAL_SIFIVE_TEST0_4000_BASE_ADDRESS 16384UL
  #define METAL_SIFIVE_TEST0_0_BASE_ADDRESS 16384UL
  #define METAL_SIFIVE_TEST0_4000_SIZE 4096UL
  #define METAL_SIFIVE_TEST0_0_SIZE 4096UL
  
  #define METAL_SIFIVE_TEST0
  #define METAL_SIFIVE_TEST0_FINISHER_OFFSET 0UL
  
  /* From serial@10010000 */
  #define METAL_SIFIVE_UART0_10010000_BASE_ADDRESS 268500992UL
  #define METAL_SIFIVE_UART0_0_BASE_ADDRESS 268500992UL
  #define METAL_SIFIVE_UART0_10010000_SIZE 4096UL
  #define METAL_SIFIVE_UART0_0_SIZE 4096UL
  
  /* From serial@10011000 */
  #define METAL_SIFIVE_UART0_10011000_BASE_ADDRESS 268505088UL
  #define METAL_SIFIVE_UART0_1_BASE_ADDRESS 268505088UL
  #define METAL_SIFIVE_UART0_10011000_SIZE 4096UL
  #define METAL_SIFIVE_UART0_1_SIZE 4096UL
  
  #define METAL_SIFIVE_UART0
  #define METAL_SIFIVE_UART0_TXDATA 0UL
  #define METAL_SIFIVE_UART0_RXDATA 4UL
  #define METAL_SIFIVE_UART0_TXCTRL 8UL
  #define METAL_SIFIVE_UART0_RXCTRL 12UL
  #define METAL_SIFIVE_UART0_IE 16UL
  #define METAL_SIFIVE_UART0_IP 20UL
  #define METAL_SIFIVE_UART0_DIV 24UL
  
  #endif /* METAL_PLATFORM_H*/
  