text: var struct_r_c_c___periph_c_l_k_init_type_def =
  [
      [ "I2c1ClockSelection", "struct_r_c_c___periph_c_l_k_init_type_def.html#a554df8ffb13c305a365c1e0ffc071b0d", null ],
      [ "LptimClockSelection", "struct_r_c_c___periph_c_l_k_init_type_def.html#a3affacf9a682b45a03dd86ff5230c826", null ],
      [ "Lpuart1ClockSelection", "struct_r_c_c___periph_c_l_k_init_type_def.html#a85cccba6173592abc09b69859459de55", null ],
      [ "PeriphClockSelection", "struct_r_c_c___periph_c_l_k_init_type_def.html#a82dae3f6a5ae6c184bd1b95a88d41fc2", null ],
      [ "RTCClockSelection", "struct_r_c_c___periph_c_l_k_init_type_def.html#a831cc6023077b77683871743290aa720", null ],
      [ "Usart2ClockSelection", "struct_r_c_c___periph_c_l_k_init_type_def.html#a4946a635381e80f574ed922223894e4c", null ]
  ];