text: /**
    ******************************************************************************
    * @file    stm32f1xx_hal_dma_ex.h
    * @author  MCD Application Team
    * @brief   Header file of DMA HAL extension module.
    ******************************************************************************
    * @attention
    *
    * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
    * All rights reserved.</center></h2>
    *
    * This software component is licensed by ST under BSD 3-Clause license,
    * the "License"; You may not use this file except in compliance with the
    * License. You may obtain a copy of the License at:
    *                        opensource.org/licenses/BSD-3-Clause
    *
    ******************************************************************************
    */
  
  /* Define to prevent recursive inclusion -------------------------------------*/
  #ifndef __STM32F1xx_HAL_DMA_EX_H
  #define __STM32F1xx_HAL_DMA_EX_H
  
  #ifdef __cplusplus
  extern "C" {
  #endif
  
  /* Includes ------------------------------------------------------------------*/
  #include "stm32f1xx_hal_def.h"
  
  /** @addtogroup STM32F1xx_HAL_Driver
    * @{
    */
  
  /** @defgroup DMAEx DMAEx
    * @{
    */
  
  /* Exported types ------------------------------------------------------------*/
  /* Exported constants --------------------------------------------------------*/
  /* Exported macro ------------------------------------------------------------*/
  /** @defgroup DMAEx_Exported_Macros DMA Extended Exported Macros
    * @{
    */
  /* Interrupt & Flag management */
  #if defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || \
      defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
  /** @defgroup DMAEx_High_density_XL_density_Product_devices DMAEx High density and XL density product devices
    * @{
    */
  
  /**
    * @brief  Returns the current DMA Channel transfer complete flag.
    * @param  __HANDLE__: DMA handle
    * @retval The specified transfer complete flag index.
    */
  #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
  (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TC7 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\
     DMA_FLAG_TC5)
  
  /**
    * @brief  Returns the current DMA Channel half transfer complete flag.
    * @param  __HANDLE__: DMA handle
    * @retval The specified half transfer complete flag index.
    */
  #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
  (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_HT7 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\
     DMA_FLAG_HT5)
  
  /**
    * @brief  Returns the current DMA Channel transfer error flag.
    * @param  __HANDLE__: DMA handle
    * @retval The specified transfer error flag index.
    */
  #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
  (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TE7 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\
     DMA_FLAG_TE5)
  
  /**
    * @brief  Return the current DMA Channel Global interrupt flag.
    * @param  __HANDLE__: DMA handle
    * @retval The specified transfer error flag index.
    */
  #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
  (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_GL7 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_GL1 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_GL2 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_GL3 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_GL4 :\
     DMA_FLAG_GL5)
  
  /**
    * @brief  Get the DMA Channel pending flags.
    * @param  __HANDLE__: DMA handle
    * @param  __FLAG__: Get the specified flag.
    *          This parameter can be any combination of the following values:
    *            @arg DMA_FLAG_TCx:  Transfer complete flag
    *            @arg DMA_FLAG_HTx:  Half transfer complete flag
    *            @arg DMA_FLAG_TEx:  Transfer error flag
    *         Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.
    * @retval The state of FLAG (SET or RESET).
    */
  #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\
  (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->ISR & (__FLAG__)) :\
    (DMA1->ISR & (__FLAG__)))
  
  /**
    * @brief  Clears the DMA Channel pending flags.
    * @param  __HANDLE__: DMA handle
    * @param  __FLAG__: specifies the flag to clear.
    *          This parameter can be any combination of the following values:
    *            @arg DMA_FLAG_TCx:  Transfer complete flag
    *            @arg DMA_FLAG_HTx:  Half transfer complete flag
    *            @arg DMA_FLAG_TEx:  Transfer error flag
    *         Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.
    * @retval None
    */
  #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \
  (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->IFCR = (__FLAG__)) :\
    (DMA1->IFCR = (__FLAG__)))
  
  /**
    * @}
    */
  
  #else
  /** @defgroup DMA_Low_density_Medium_density_Product_devices DMA Low density and Medium density product devices
    * @{
    */
  
  /**
    * @brief  Returns the current DMA Channel transfer complete flag.
    * @param  __HANDLE__: DMA handle
    * @retval The specified transfer complete flag index.
    */
  #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
  (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
     DMA_FLAG_TC7)
  
  /**
    * @brief  Return the current DMA Channel half transfer complete flag.
    * @param  __HANDLE__: DMA handle
    * @retval The specified half transfer complete flag index.
    */
  #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
  (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
     DMA_FLAG_HT7)
  
  /**
    * @brief  Return the current DMA Channel transfer error flag.
    * @param  __HANDLE__: DMA handle
    * @retval The specified transfer error flag index.
    */
  #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
  (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
     DMA_FLAG_TE7)
  
  /**
    * @brief  Return the current DMA Channel Global interrupt flag.
    * @param  __HANDLE__: DMA handle
    * @retval The specified transfer error flag index.
    */
  #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
  (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\
   ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\
     DMA_FLAG_GL7)
  
  /**
    * @brief  Get the DMA Channel pending flags.
    * @param  __HANDLE__: DMA handle
    * @param  __FLAG__: Get the specified flag.
    *          This parameter can be any combination of the following values:
    *            @arg DMA_FLAG_TCx:  Transfer complete flag
    *            @arg DMA_FLAG_HTx:  Half transfer complete flag
    *            @arg DMA_FLAG_TEx:  Transfer error flag
    *            @arg DMA_FLAG_GLx:  Global interrupt flag
    *         Where x can be 1_7 to select the DMA Channel flag.
    * @retval The state of FLAG (SET or RESET).
    */
  
  #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)   (DMA1->ISR & (__FLAG__))
  
  /**
    * @brief  Clear the DMA Channel pending flags.
    * @param  __HANDLE__: DMA handle
    * @param  __FLAG__: specifies the flag to clear.
    *          This parameter can be any combination of the following values:
    *            @arg DMA_FLAG_TCx:  Transfer complete flag
    *            @arg DMA_FLAG_HTx:  Half transfer complete flag
    *            @arg DMA_FLAG_TEx:  Transfer error flag
    *            @arg DMA_FLAG_GLx:  Global interrupt flag
    *         Where x can be 1_7 to select the DMA Channel flag.
    * @retval None
    */
  #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
  
  /**
    * @}
    */
  
  #endif
  
  /**
    * @}
    */
  
  /**
    * @}
    */
  
  /**
    * @}
    */
  
  #ifdef __cplusplus
  }
  #endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || */
  /* STM32F103xG || STM32F105xC || STM32F107xC */
  
  #endif /* __STM32F1xx_HAL_DMA_H */
  
  /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  