text: 
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  #include"processing_system7_v5_5_tlm.h"
  #include<string>
  
  template <int IN_WIDTH, int OUT_WIDTH>
  rptlm2xtlm_converter<IN_WIDTH, OUT_WIDTH>::rptlm2xtlm_converter(sc_module_name name):sc_module(name)
      ,target_socket("target_socket")
      ,wr_socket("init_wr_socket",OUT_WIDTH)
      ,rd_socket("init_rd_socket",OUT_WIDTH)
      ,m_btrans_conv("b_transport_converter")
      ,xtlm_bridge("tlm2xtlmbridge")
  {
      target_socket.bind(m_btrans_conv.target_socket);
      m_btrans_conv.initiator_socket.bind(xtlm_bridge.target_socket);
      xtlm_bridge.rd_socket->bind(rd_socket);
      xtlm_bridge.wr_socket->bind(wr_socket);
  }
  template <int IN_WIDTH, int OUT_WIDTH>
  void rptlm2xtlm_converter<IN_WIDTH, OUT_WIDTH>::registerUserExtensionHandlerCallback(
  		void (*callback)(xtlm::aximm_payload*,
  				const tlm::tlm_generic_payload*)) {
      xtlm_bridge.registerUserExtensionHandlerCallback(callback);
  }
  
  /***************************************************************************************
  *   Global method, get registered with tlm2xtlm bridge
  *   This function is called when tlm2xtlm bridge convert tlm payload to xtlm payload.
  *
  *   caller:     tlm2xtlm bridge
  *   purpose:    To get master id and other parameters out of genattr_extension 
  *               and use master id to AxUSER PIN of xtlm payload.
  *
  *
  ***************************************************************************************/
  
  void get_extensions_from_tlm(xtlm::aximm_payload* xtlm_pay, const tlm::tlm_generic_payload* gp)
  {
      if((xtlm_pay == NULL) || (gp == NULL))
          return;
      if((gp->get_command() == tlm::TLM_WRITE_COMMAND) && (xtlm_pay->get_awuser_size() > 0))
      {
          genattr_extension* ext = NULL;
          gp->get_extension(ext);
          if(ext == NULL)
              return;
          //Portion of master ID(master_id[5:0]) are transfered on AxUSER bits(refere Zynq UltraScale+ TRM page.no:414)
          uint32_t val = ext->get_master_id() && 0x3F;
          unsigned char* ptr = xtlm_pay->get_awuser_ptr();
          unsigned int size  = xtlm_pay->get_awuser_size();
          *ptr = (unsigned char)val;
  
      }
      else if((gp->get_command() == tlm::TLM_READ_COMMAND) && (xtlm_pay->get_aruser_size() > 0))
      {
          genattr_extension* ext = NULL;
          gp->get_extension(ext);
          if(ext == NULL)
              return;
          //Portion of master ID(master_id[5:0]) are transfered on AxUSER bits(refere Zynq UltraScale+ TRM page.no:414)
          uint32_t val = ext->get_master_id() && 0x3F;
          unsigned char* ptr = xtlm_pay->get_aruser_ptr();
          unsigned int size  = xtlm_pay->get_aruser_size();
          *ptr = (unsigned char)val;
      }
  }
  
  /***************************************************************************************
  *   Global method, get registered with xtlm2tlm bridge
  *   This function is called when xtlm2tlm bridge convert xtlm payload to tlm payload.
  *
  *   caller:     xtlm2tlm bridge
  *   purpose:    To create and add master id and other parameters to genattr_extension.
  *               Master id red from AxID PIN of xtlm payload.
  *
  *
  ***************************************************************************************/
  void add_extensions_to_tlm(const xtlm::aximm_payload* xtlm_pay, tlm::tlm_generic_payload* gp)
  {
      if(gp == NULL)
          return;
      uint8_t val = 0;
      if((gp->get_command() != tlm::TLM_WRITE_COMMAND) && (gp->get_command() != tlm::TLM_READ_COMMAND))
          return;
      //portion of master ID bits(master_id[5:0]) are derived from the AXI ID(AWID/ARID). (refere Zynq UltraScale+ TRM page.no:414,415)
      //val = (*(uint8_t*)(xtlm_pay->get_axi_id())) && 0x3F;
      genattr_extension* ext = new genattr_extension;
      ext->set_master_id(val);
      gp->set_extension(ext);    
      gp->set_streaming_width(gp->get_data_length());
      if(gp->get_command() != tlm::TLM_WRITE_COMMAND)
      {
          gp->set_byte_enable_length(0);
          gp->set_byte_enable_ptr(0);
      }
  }
  
  processing_system7_v5_5_tlm :: processing_system7_v5_5_tlm (sc_core::sc_module_name name,
      xsc::common_cpp::properties& _prop): sc_module(name)//registering module name with parent
          ,UART1_TX("UART1_TX")
          ,UART1_RX("UART1_RX")
          ,MIO("MIO")
          ,DDR_CAS_n("DDR_CAS_n")
          ,DDR_CKE("DDR_CKE")
          ,DDR_Clk_n("DDR_Clk_n")
          ,DDR_Clk("DDR_Clk")
          ,DDR_CS_n("DDR_CS_n")
          ,DDR_DRSTB("DDR_DRSTB")
          ,DDR_ODT("DDR_ODT")
          ,DDR_RAS_n("DDR_RAS_n")
          ,DDR_WEB("DDR_WEB")
          ,DDR_BankAddr("DDR_BankAddr")
          ,DDR_Addr("DDR_Addr")
          ,DDR_VRN("DDR_VRN")
          ,DDR_VRP("DDR_VRP")
          ,DDR_DM("DDR_DM")
          ,DDR_DQ("DDR_DQ")
          ,DDR_DQS_n("DDR_DQS_n")
          ,DDR_DQS("DDR_DQS")
          ,PS_SRSTB("PS_SRSTB")
          ,PS_CLK("PS_CLK")
          ,PS_PORB("PS_PORB")
      ,prop(_prop)
      {
          //creating instances of xtlm slave sockets
          //creating instances of xtlm master sockets
  
  	    char* unix_path = getenv("COSIM_MACHINE_PATH");
  	    char* tcpip_addr = getenv("COSIM_MACHINE_TCPIP_ADDRESS");
  	    char* dir_path_to_test_machine;
  	    bool unix_socket_en = false;        
  	    if (unix_path != nullptr) {
  	    	dir_path_to_test_machine = strdup(unix_path);
  	    	unix_socket_en = true;
  	    }
  	    if ((unix_socket_en == false) && (tcpip_addr != nullptr)) {
  	    	dir_path_to_test_machine = strdup(tcpip_addr);
  	    } else if (unix_socket_en == false) {
  	    	printf(
  	    			"ERROR: Environment Variables Either COSIM_MACHINE_TCPIP_ADDRESS or COSIM_MACHINE_PATH is not specified.\n 1. Specify  COSIM_MACHINE_PATH for Unix Socket Communication.\n 2. Specify COSIM_MACHINE_TCPIP_ADDRESS for TCP Socket Communication.\n");
  	    	exit(0);
  	    }
  	    std::string skt_name;
  	    if (unix_socket_en) {
  	    	skt_name.append("unix:");
  	    	skt_name.append(dir_path_to_test_machine);
  	    	skt_name.append("//qemu-rport-_cosim@0");
  	    } else {
  	    	skt_name.append(dir_path_to_test_machine);
  	    }
  
  	    const char* skt = skt_name.c_str();
          m_zynq_tlm_model = new xilinx_zynq("xilinx_zynq",skt);
  
          m_zynq_tlm_model->tie_off();
          
          m_zynq_tlm_model->rst(qemu_rst);
      }
  processing_system7_v5_5_tlm :: ~processing_system7_v5_5_tlm() {
          //deleteing dynamically created objects 
      }
      
      void processing_system7_v5_5_tlm ::start_of_simulation()
      {
      //temporary fix to drive the enabled reset pin 
          qemu_rst.write(false);
      }
  