text: /* USER CODE BEGIN Header */
  /**
    ******************************************************************************
    * @file    OSPI/OSPI_NOR_ExecuteInPlace/Inc/main.h
    * @author  MCD Application Team
    * @brief   Header for main.c module
    ******************************************************************************
    * @attention
    *
    * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
    * All rights reserved.</center></h2>
    *
    * This software component is licensed by ST under BSD 3-Clause license,
    * the "License"; You may not use this file except in compliance with the
    * License. You may obtain a copy of the License at:
    *                        opensource.org/licenses/BSD-3-Clause
    *
    ******************************************************************************
    */
  /* USER CODE END Header */
  
  /* Define to prevent recursive inclusion -------------------------------------*/
  #ifndef __MAIN_H
  #define __MAIN_H
  
  #ifdef __cplusplus
  extern "C" {
  #endif
  
  /* Includes ------------------------------------------------------------------*/
  #include "stm32l5xx_hal.h"
  
  /* Private includes ----------------------------------------------------------*/
  /* USER CODE BEGIN Includes */
  #include "stm32l562e_discovery.h"
  /* USER CODE END Includes */
  
  /* Exported types ------------------------------------------------------------*/
  /* USER CODE BEGIN ET */
  
  /* USER CODE END ET */
  
  /* Exported constants --------------------------------------------------------*/
  /* USER CODE BEGIN EC */
  /* MX25LM512ABA1G12 Macronix memory */
  /* Size of the flash */
  #define OSPI_FLASH_SIZE             26
  #define OSPI_PAGE_SIZE              256
  #define OSPI_SECTOR_SIZE            4096
  
  /* Flash commands */
  #define OCTAL_IO_READ_CMD           0xEC13
  #define OCTAL_PAGE_PROG_CMD         0x12ED
  #define OCTAL_READ_STATUS_REG_CMD   0x05FA
  #define OCTAL_SECTOR_ERASE_CMD      0x21DE
  #define OCTAL_WRITE_ENABLE_CMD      0x06F9
  #define READ_STATUS_REG_CMD         0x05
  #define WRITE_CFG_REG_2_CMD         0x72
  #define WRITE_ENABLE_CMD            0x06
  
  /* Dummy clocks cycles */
  #define DUMMY_CLOCK_CYCLES_READ     6
  #define DUMMY_CLOCK_CYCLES_READ_REG 4
  
  /* Auto-polling values */
  #define WRITE_ENABLE_MATCH_VALUE    0x02
  #define WRITE_ENABLE_MASK_VALUE     0x02
  
  #define MEMORY_READY_MATCH_VALUE    0x00
  #define MEMORY_READY_MASK_VALUE     0x01
  
  #define AUTO_POLLING_INTERVAL       0x10
  
  /* Memory registers address */
  #define CONFIG_REG2_ADDR1           0x0000000
  #define CR2_STR_OPI_ENABLE          0x01
  
  #define CONFIG_REG2_ADDR3           0x00000300
  #define CR2_DUMMY_CYCLES_66MHZ      0x07
  
  /* Memory delay */
  #define MEMORY_REG_WRITE_DELAY      40
  #define MEMORY_PAGE_PROG_DELAY      2
  /* USER CODE END EC */
  
  /* Exported macro ------------------------------------------------------------*/
  /* USER CODE BEGIN EM */
  
  /* USER CODE END EM */
  
  /* Exported functions prototypes ---------------------------------------------*/
  void Error_Handler(void);
  
  /* USER CODE BEGIN EFP */
  
  /* USER CODE END EFP */
  
  /* Private defines -----------------------------------------------------------*/
  /* USER CODE BEGIN Private defines */
  
  /* USER CODE END Private defines */
  
  #ifdef __cplusplus
  }
  #endif
  
  #endif /* __MAIN_H */
  
  /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  