text: #ifndef TRAP_H
  #define TRAP_H
  
  
  // x86 trap and interrupt constants.
  
  // Processor-defined:
  #define T_DIVIDE         0      // divide error
  #define T_DEBUG          1      // debug exception
  #define T_NMI            2      // non-maskable interrupt
  #define T_BRKPT          3      // breakpoint
  #define T_OFLOW          4      // overflow
  #define T_BOUND          5      // bounds check
  #define T_ILLOP          6      // illegal opcode
  #define T_DEVICE         7      // device not available
  #define T_DBLFLT         8      // double fault
  // #define T_COPROC      9      // reserved (not used since 486)
  #define T_TSS           10      // invalid task switch segment
  #define T_SEGNP         11      // segment not present
  #define T_STACK         12      // stack exception
  #define T_GPFLT         13      // general protection fault
  #define T_PGFLT         14      // page fault
  // #define T_RES        15      // reserved
  #define T_FPERR         16      // floating point error
  #define T_ALIGN         17      // aligment check
  #define T_MCHK          18      // machine check
  #define T_SIMDERR       19      // SIMD floating point error
  
  // These are arbitrarily chosen, but with care not to overlap
  // processor defined exceptions or interrupt vectors.
  #define T_SYSCALL       0x80      // system call
  #define T_DEFAULT      500      // catchall
  
  #define T_IRQ0          32      // IRQ 0 corresponds to int T_IRQ
  
  #define IRQ_TIMER        0
  #define IRQ_KBD          1
  #define IRQ_CASCADE      2
  #define IRQ_COM1         4
  #define IRQ_IDE         14
  #define IRQ_ERROR       19
  #define IRQ_SPURIOUS    31
  
  
  /* 8259A interrupt controller ports. */
  #define	INT_M_CTL	0x20	/* I/O port for interrupt controller         <Master> */
  #define	INT_M_CTLMASK	0x21	/* setting bits in this port disables ints   <Master> */
  #define	INT_S_CTL	0xA0	/* I/O port for second interrupt controller  <Slave>  */
  #define	INT_S_CTLMASK	0xA1	/* setting bits in this port disables ints   <Slave>  */
  #define EOI         0x20
  
  
  #define IO_TIMER1       0x040           // 8253 Timer #1
  
  // Frequency of all three count-down timers;
  // (TIMER_FREQ/freq) is the appropriate count
  // to generate a frequency of freq Hz.
  
  #define TIMER_FREQ      1193182
  #define TIMER_DIV(x)    ((TIMER_FREQ+(x)/2)/(x))
  
  #define TIMER_MODE      (IO_TIMER1 + 3) // timer mode port
  #define TIMER_SEL0      0x00    // select counter 0
  #define TIMER_RATEGEN   0x04    // mode 2, rate generator
  #define TIMER_16BIT     0x30    // r/w counter 16 bits, LSB first
  
  
  
  #define	INT_VECTOR_IRQ0			0x20
  #define	INT_VECTOR_IRQ8			0x28
  #endif // TRAP_H
  