text: /******************************************************************************
  *
  * Copyright (C) 2016 Xilinx, Inc. All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
  * in the Software without restriction, including without limitation the rights
  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  * copies of the Software, and to permit persons to whom the Software is
  * furnished to do so, subject to the following conditions:
  *
  * The above copyright notice and this permission notice shall be included in
  * all copies or substantial portions of the Software.
  *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  * THE SOFTWARE.
  *
  *
  *
  ******************************************************************************/
  /*****************************************************************************/
  /**
  *
  * @file xcsi2txss_hw.h
  * @addtogroup csi2txss_v1_1
  * @{
  *
  * This header file contains identifiers and register-level core functions (or
  * macros) that can be used to access the Xilinx MIPI CSI2 Tx Subsystem core.
  *
  * For more information about the operation of this core see the hardware
  * specification and documentation in the higher level driver
  * xcsi2tx.h file.
  *
  * <pre>
  * MODIFICATION HISTORY:
  *
  * Ver Who  Date     Changes
  * --- --- -------- ------------------------------------------------------------
  * 1.0 sss 07/14/16 Initial release
  * 1.2 vsa 02/28/18 Add Frame End Generation feature
  * </pre>
  *
  ******************************************************************************/
  #ifndef XCSI2TXSS_HW_H_
  #define XCSI2TXSS_HW_H_		/**< Prevent circular inclusions
  				  *  by using protection macros */
  
  #ifdef __cplusplus
  extern "C" {
  #endif
  
  /***************************** Include Files *********************************/
  
  #include "xil_io.h"
  
  /**************************** Type Definitions *******************************/
  
  
  /***************** Macros (Inline Functions) Definitions *********************/
  #define XCSI2TXSS_ISR_ALLINTR_MASK	XCSI2TX_ISR_ALLINTR_MASK
  #define XCSI2TXSS_LCSTAT_VC0_IER_MASK	XCSITX_LCSTAT_VC0_IER_MASK
  #define XCSI2TXSS_LCSTAT_VC1_IER_MASK	XCSITX_LCSTAT_VC1_IER_MASK
  #define XCSI2TXSS_LCSTAT_VC2_IER_MASK	XCSITX_LCSTAT_VC2_IER_MASK
  #define XCSI2TXSS_LCSTAT_VC3_IER_MASK	XCSITX_LCSTAT_VC3_IER_MASK
  
  /*****************************************************************************/
  /**
  *
  * This function reads a value from a MIPI CSI2 Tx Subsystem register.
  * A 32 bit read is performed. If the component is implemented in a smaller
  * width, only the least significant data is read from the register. The most
  * significant data will be read as 0.
  *
  * @param	BaseAddress is the base address of the XCsi2Tx core instance.
  * @param	RegOffset is the register offset of the register (defined at
  *		the top of this file).
  *
  * @return	The 32-bit value of the register.
  *
  * @note		None.
  *
  ******************************************************************************/
  static inline u32 XCsi2TxSs_ReadReg(UINTPTR BaseAddress, u32 RegOffset)
  {
  	return Xil_In32(BaseAddress + RegOffset);
  }
  
  /*****************************************************************************/
  /**
  *
  * This function writes a value to a MIPI CSI2 Tx Subsystem register.
  * A 32 bit write is performed. If the component is implemented in a smaller
  * width, only the least significant data is written.
  *
  * @param	BaseAddress is the base address of the XCsi2Tx core instance.
  * @param	RegOffset is the register offset of the register (defined at
  *		the top of this file) to be written.
  * @param	Data is the 32-bit value to write into the register.
  *
  * @return	None.
  *
  * @note		None.
  *
  ******************************************************************************/
  static inline void XCsi2TxSs_WriteReg(UINTPTR BaseAddress, u32 RegOffset,
  								u32 Data)
  {
  	Xil_Out32(BaseAddress + RegOffset, Data);
  }
  /************************** Function Prototypes ******************************/
  
  
  /************************** Variable Declarations ****************************/
  
  
  #ifdef __cplusplus
  }
  #endif
  
  #endif /* end of protection macro */
  /** @} */
  