text: /*
   * ESPRESSIF MIT License
   *
   * Copyright (c) 2019 <ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD>
   *
   * Permission is hereby granted for use on all ESPRESSIF SYSTEMS products, in which case,
   * it is free of charge, to any person obtaining a copy of this software and associated
   * documentation files (the "Software"), to deal in the Software without restriction, including
   * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense,
   * and/or sell copies of the Software, and to permit persons to whom the Software is furnished
   * to do so, subject to the following conditions:
   *
   * The above copyright notice and this permission notice shall be included in all copies or
   * substantial portions of the Software.
   *
   * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
   * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
   * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
   * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
   * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
   * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
   *
   */
  
  #ifndef _ES8311_H
  #define _ES8311_H
  
  #include "media_hal.h"
  #include "esxxx_common.h"
  
  /*
   *   ES8311_REGISTER NAME_REG_REGISTER ADDRESS
   */
  #define ES8311_RESET_REG00              0x00  /*reset digital,csm,clock manager etc.*/
  
  /*
   * Clock Scheme Register definition
   */
  #define ES8311_CLK_MANAGER_REG01        0x01 /* select clk src for mclk, enable clock for codec */
  #define ES8311_CLK_MANAGER_REG02        0x02 /* clk divider and clk multiplier */
  #define ES8311_CLK_MANAGER_REG03        0x03 /* adc fsmode and osr  */
  #define ES8311_CLK_MANAGER_REG04        0x04 /* dac osr */
  #define ES8311_CLK_MANAGER_REG05        0x05 /* clk divier for adc and dac */
  #define ES8311_CLK_MANAGER_REG06        0x06 /* bclk inverter and divider */
  #define ES8311_CLK_MANAGER_REG07        0x07 /* tri-state, lrck divider */
  #define ES8311_CLK_MANAGER_REG08        0x08 /* lrck divider */
  /*
   * SDP
   */
  #define ES8311_SDPIN_REG09              0x09 /* dac serial digital port */
  #define ES8311_SDPOUT_REG0A             0x0A /* adc serial digital port */
  /*
   * SYSTEM
   */
  #define ES8311_SYSTEM_REG0B             0x0B /* system */
  #define ES8311_SYSTEM_REG0C             0x0C /* system */
  #define ES8311_SYSTEM_REG0D             0x0D /* system, power up/down */
  #define ES8311_SYSTEM_REG0E             0x0E /* system, power up/down */
  #define ES8311_SYSTEM_REG0F             0x0F /* system, low power */
  #define ES8311_SYSTEM_REG10             0x10 /* system */
  #define ES8311_SYSTEM_REG11             0x11 /* system */
  #define ES8311_SYSTEM_REG12             0x12 /* system, Enable DAC */
  #define ES8311_SYSTEM_REG13             0x13 /* system */
  #define ES8311_SYSTEM_REG14             0x14 /* system, select DMIC, select analog pga gain */
  /*
   * ADC
   */
  #define ES8311_ADC_REG15                0x15 /* ADC, adc ramp rate, dmic sense */
  #define ES8311_ADC_REG16                0x16 /* ADC */
  #define ES8311_ADC_REG17                0x17 /* ADC, volume */
  #define ES8311_ADC_REG18                0x18 /* ADC, alc enable and winsize */
  #define ES8311_ADC_REG19                0x19 /* ADC, alc maxlevel */
  #define ES8311_ADC_REG1A                0x1A /* ADC, alc automute */
  #define ES8311_ADC_REG1B                0x1B /* ADC, alc automute, adc hpf s1 */
  #define ES8311_ADC_REG1C                0x1C /* ADC, equalizer, hpf s2 */
  /*
   * DAC
   */
  #define ES8311_DAC_REG31                0x31 /* DAC, mute */
  #define ES8311_DAC_REG32                0x32 /* DAC, volume */
  #define ES8311_DAC_REG33                0x33 /* DAC, offset */
  #define ES8311_DAC_REG34                0x34 /* DAC, drc enable, drc winsize */
  #define ES8311_DAC_REG35                0x35 /* DAC, drc maxlevel, minilevel */
  #define ES8311_DAC_REG37                0x37 /* DAC, ramprate */
  /*
   *GPIO
   */
  #define ES8311_GPIO_REG44               0x44 /* GPIO, dac2adc for test */
  #define ES8311_GP_REG45                 0x45 /* GP CONTROL */
  /*
   * CHIP
   */
  #define ES8311_CHD1_REGFD               0xFD /* CHIP ID1 */
  #define ES8311_CHD2_REGFE               0xFE /* CHIP ID2 */
  #define ES8311_CHVER_REGFF              0xFF /* VERSION */
  #define ES8311_CHD1_REGFD               0xFD /* CHIP ID1 */
  
  #define ES8311_MAX_REGISTER             0xFF
  
  typedef enum {
      ES8311_MIC_GAIN_MIN = -1,
      ES8311_MIC_GAIN_0DB,
      ES8311_MIC_GAIN_6DB,
      ES8311_MIC_GAIN_12DB,
      ES8311_MIC_GAIN_18DB,
      ES8311_MIC_GAIN_24DB,
      ES8311_MIC_GAIN_30DB,
      ES8311_MIC_GAIN_36DB,
      ES8311_MIC_GAIN_42DB,
      ES8311_MIC_GAIN_MAX
  } es8311_mic_gain_t;
  
  /*
   * @brief Initialize ES8311 codec chip
   *
   * @param codec_cfg  configuration of ES8311
   *
   * @return
   *      - ESP_OK
   *      - ESP_FAIL
   */
  esp_err_t es8311_init(media_hal_config_t *media_hal_conf);
  
  /**
   * @brief Deinitialize ES8311 codec chip
   *
   * @return
   *     - ESP_OK
   *     - ESP_FAIL
   */
  esp_err_t es8311_deinit(void);
  
  esp_err_t es8311_powerup(void);
  
  esp_err_t es8311_powerdown(void);
  
  /**
   * @brief Control ES8311 codec chip
   *
   * @param mode codec mode
   * @param ctrl_state start or stop decode or encode progress
   *
   * @return
   *     - ESP_FAIL Parameter error
   *     - ESP_OK   Success
   */
  esp_err_t es8311_ctrl_state(media_hal_codec_mode_t mode, media_hal_sel_state_t ctrl_state);
  
  /**
   * @brief Configure ES8311 codec mode and I2S interface
   *
   * @param mode codec mode
   * @param iface I2S config
   *
   * @return
   *     - ESP_FAIL Parameter error
   *     - ESP_OK   Success
   */
  //esp_err_t es8311_codec_config_i2s(audio_hal_codec_mode_t mode, audio_hal_codec_i2s_iface_t *iface);
  
  /**
   * @brief  Set voice volume
   *
   * @param volume:  voice volume (0~100)
   *
   * @return
   *     - ESP_OK
   *     - ESP_FAIL
   */
  int es8311_set_volume(int volume);
  
  /**
   * @brief Get voice volume
   *
   * @param[out] *volume:  voice volume (0~100)
   *
   * @return
   *     - ESP_OK
   *     - ESP_FAIL
   */
  int es8311_get_volume(int *volume);
  
  /**
   * @brief Configure ES8311 I2S format
   *
   * @param mod:  set ADC or DAC or both
   * @param cfg:   ES8388 I2S format
   *
   * @return
   *     - ESP_OK
   *     - ESP_FAIL
   */
  esp_err_t es8311_config_format(media_hal_codec_mode_t mode, media_hal_format_t fmt);
  
  /**
   * @brief Configure ES8311 data sample bits
   *
   * @param mode:  set ADC or DAC or both
   * @param bit_per_sample:  bit number of per sample
   *
   * @return
   *     - ESP_OK
   *     - ESP_FAIL
   */
  esp_err_t es8311_set_bits_per_sample(media_hal_codec_mode_t mode, media_hal_bit_length_t bits_per_sample);
  
  /**
   * @brief  Start ES8311 codec chip
   *
   * @param mode:  set ADC or DAC or both
   *
   * @return
   *     - ESP_OK
   *     - ESP_FAIL
   */
  esp_err_t es8311_start(es_module_t mode);
  
  /**
   * @brief  Stop ES8311 codec chip
   *
   * @param mode:  set ADC or DAC or both
   *
   * @return
   *     - ESP_OK
   *     - ESP_FAIL
   */
  esp_err_t es8311_stop(es_module_t mode);
  
  int es8311_set_mute(int enable);
  
  int es8311_get_mute(int *mute);
  
  esp_err_t es8311_set_mic_gain(es8311_mic_gain_t gain_db);
  
  void es8311_read_all();
  #endif
  