text: /* Chipcon */
  /* Product = CC430Fx13x */
  /* Chip version = A   (HW Rev. 0x10) */
  /* Crystal accuracy = 10 ppm */
  /* X-tal frequency = 26 MHz */
  /* RF output power = 0 dBm */
  /* RX filterbandwidth = 58.035714 kHz */
  /* Deviation = 5 kHz */
  /* Datarate = 1.199484 kBaud */
  /* Modulation = (1) GFSK */
  /* Manchester enable = (0) Manchester disabled */
  /* RF Frequency = 868.299866 MHz */
  /* Channel spacing = 199.951172 kHz */
  /* Channel number = 0 */
  /* Optimization = - */
  /* Sync mode = (3) 30/32 sync word bits detected */
  /* Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX */
  /* CRC operation = (1) CRC calculation in TX and CRC check in RX enabled */
  /* Forward Error Correction = (0) FEC disabled */
  /* Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word. */
  /* Packetlength = 255 */
  /* Preamble count = (2)  4 bytes */
  /* Append status = 1 */
  /* Address check = (0) No address check */
  /* FIFO autoflush = 0 */
  /* Device address = 0 */
  /* GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet */
  /* GDO2 signal selection = (41) CHIP_RDY */
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_FSCTRL1  0x06
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_FSCTRL0  0x00
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_FREQ2    0x21
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_FREQ1    0x65
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_FREQ0    0x6A
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_MDMCFG4  0xF5
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_MDMCFG3  0x83
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_MDMCFG2  0x13
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_MDMCFG1  0x22
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_MDMCFG0  0xF8
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_CHANNR   0x00
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_DEVIATN  0x15
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_FREND1   0x56
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_FREND0   0x10
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_MCSM0    0x18
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_FOCCFG   0x16
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_BSCFG    0x6C
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_AGCCTRL2 0x03
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_AGCCTRL1 0x40
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_AGCCTRL0 0x91
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_FSCAL3   0xE9
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_FSCAL2   0x2A
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_FSCAL1   0x00
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_FSCAL0   0x1F
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_FSTEST   0x59
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_TEST2    0x81
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_TEST1    0x35
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_TEST0    0x09
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_FIFOTHR  0x47
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_IOCFG2   0x29
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_IOCFG0   0x06
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_PKTCTRL1 0x04
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_PKTCTRL0 0x05
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_ADDR     0x00
  #define SRFS6_868_GFSK_1P2K_SENS_H_SMARTRF_SETTING_PKTLEN   0xFF
  #define SRFS6_868_GFSK_1P2K_SENS_H_GLOBAL_ID 9
  