text: #pragma once 
  #include <Register/Utility.hpp>
  namespace Kvasir {
  //General purpose timers
      namespace Tim13Cr1{    ///<control register 1
          using Addr = Register::Address<0x40001c00,0xfffffc78,0x00000000,unsigned>;
          ///Clock division
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(9,8),Register::ReadWriteAccess,unsigned> ckd{}; 
          ///Auto-reload preload enable
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(7,7),Register::ReadWriteAccess,unsigned> arpe{}; 
          ///Update request source
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(2,2),Register::ReadWriteAccess,unsigned> urs{}; 
          ///Update disable
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(1,1),Register::ReadWriteAccess,unsigned> udis{}; 
          ///Counter enable
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(0,0),Register::ReadWriteAccess,unsigned> cen{}; 
      }
      namespace Tim13Dier{    ///<DMA/Interrupt enable register
          using Addr = Register::Address<0x40001c0c,0xfffffffc,0x00000000,unsigned>;
          ///Capture/Compare 1 interrupt              enable
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(1,1),Register::ReadWriteAccess,unsigned> cc1ie{}; 
          ///Update interrupt enable
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(0,0),Register::ReadWriteAccess,unsigned> uie{}; 
      }
      namespace Tim13Sr{    ///<status register
          using Addr = Register::Address<0x40001c10,0xfffffdfc,0x00000000,unsigned>;
          ///Capture/Compare 1 overcapture              flag
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(9,9),Register::ReadWriteAccess,unsigned> cc1of{}; 
          ///Capture/compare 1 interrupt              flag
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(1,1),Register::ReadWriteAccess,unsigned> cc1if{}; 
          ///Update interrupt flag
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(0,0),Register::ReadWriteAccess,unsigned> uif{}; 
      }
      namespace Tim13Egr{    ///<event generation register
          using Addr = Register::Address<0x40001c14,0xfffffffc,0x00000000,unsigned>;
          ///Capture/compare 1              generation
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(1,1),Register::ReadWriteAccess,unsigned> cc1g{}; 
          ///Update generation
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(0,0),Register::ReadWriteAccess,unsigned> ug{}; 
      }
      namespace Tim13Ccmr1Output{    ///<capture/compare mode register (output          mode)
          using Addr = Register::Address<0x40001c18,0xffffff80,0x00000000,unsigned>;
          ///Capture/Compare 1              selection
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(1,0),Register::ReadWriteAccess,unsigned> cc1s{}; 
          ///Output compare 1 fast              enable
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(2,2),Register::ReadWriteAccess,unsigned> oc1fe{}; 
          ///Output Compare 1 preload              enable
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(3,3),Register::ReadWriteAccess,unsigned> oc1pe{}; 
          ///Output Compare 1 mode
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(6,4),Register::ReadWriteAccess,unsigned> oc1m{}; 
      }
      namespace Tim13Ccmr1Input{    ///<capture/compare mode register (input          mode)
          using Addr = Register::Address<0x40001c18,0xffffff00,0x00000000,unsigned>;
          ///Input capture 1 filter
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(7,4),Register::ReadWriteAccess,unsigned> ic1f{}; 
          ///Input capture 1 prescaler
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(3,2),Register::ReadWriteAccess,unsigned> ic1psc{}; 
          ///Capture/Compare 1              selection
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(1,0),Register::ReadWriteAccess,unsigned> cc1s{}; 
      }
      namespace Tim13Ccer{    ///<capture/compare enable          register
          using Addr = Register::Address<0x40001c20,0xfffffff4,0x00000000,unsigned>;
          ///Capture/Compare 1 output              Polarity
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(3,3),Register::ReadWriteAccess,unsigned> cc1np{}; 
          ///Capture/Compare 1 output              Polarity
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(1,1),Register::ReadWriteAccess,unsigned> cc1p{}; 
          ///Capture/Compare 1 output              enable
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(0,0),Register::ReadWriteAccess,unsigned> cc1e{}; 
      }
      namespace Tim13Cnt{    ///<counter
          using Addr = Register::Address<0x40001c24,0xffff0000,0x00000000,unsigned>;
          ///counter value
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(15,0),Register::ReadWriteAccess,unsigned> cnt{}; 
      }
      namespace Tim13Psc{    ///<prescaler
          using Addr = Register::Address<0x40001c28,0xffff0000,0x00000000,unsigned>;
          ///Prescaler value
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(15,0),Register::ReadWriteAccess,unsigned> psc{}; 
      }
      namespace Tim13Arr{    ///<auto-reload register
          using Addr = Register::Address<0x40001c2c,0xffff0000,0x00000000,unsigned>;
          ///Auto-reload value
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(15,0),Register::ReadWriteAccess,unsigned> arr{}; 
      }
      namespace Tim13Ccr1{    ///<capture/compare register 1
          using Addr = Register::Address<0x40001c34,0xffff0000,0x00000000,unsigned>;
          ///Capture/Compare 1 value
          constexpr Register::FieldLocation<Addr,Register::maskFromRange(15,0),Register::ReadWriteAccess,unsigned> ccr1{}; 
      }
  }
  