text: #include "hls_design_meta.h"
  const Port_Property HLS_Design_Meta::port_props[]={
  	Port_Property("ap_clk", 1, hls_in, -1, "", "", 1),
  	Port_Property("ap_rst_n", 1, hls_in, -1, "", "", 1),
  	Port_Property("m_axi_gmem_out_AWVALID", 1, hls_out, 0, "m_axi", "VALID", 1),
  	Port_Property("m_axi_gmem_out_AWREADY", 1, hls_in, 0, "m_axi", "READY", 1),
  	Port_Property("m_axi_gmem_out_AWADDR", 32, hls_out, 0, "m_axi", "ADDR", 1),
  	Port_Property("m_axi_gmem_out_AWID", 1, hls_out, 0, "m_axi", "ID", 1),
  	Port_Property("m_axi_gmem_out_AWLEN", 8, hls_out, 0, "m_axi", "LEN", 1),
  	Port_Property("m_axi_gmem_out_AWSIZE", 3, hls_out, 0, "m_axi", "SIZE", 1),
  	Port_Property("m_axi_gmem_out_AWBURST", 2, hls_out, 0, "m_axi", "BURST", 1),
  	Port_Property("m_axi_gmem_out_AWLOCK", 2, hls_out, 0, "m_axi", "LOCK", 1),
  	Port_Property("m_axi_gmem_out_AWCACHE", 4, hls_out, 0, "m_axi", "CACHE", 1),
  	Port_Property("m_axi_gmem_out_AWPROT", 3, hls_out, 0, "m_axi", "PROT", 1),
  	Port_Property("m_axi_gmem_out_AWQOS", 4, hls_out, 0, "m_axi", "QOS", 1),
  	Port_Property("m_axi_gmem_out_AWREGION", 4, hls_out, 0, "m_axi", "REGION", 1),
  	Port_Property("m_axi_gmem_out_AWUSER", 1, hls_out, 0, "m_axi", "USER", 1),
  	Port_Property("m_axi_gmem_out_WVALID", 1, hls_out, 0, "m_axi", "VALID", 1),
  	Port_Property("m_axi_gmem_out_WREADY", 1, hls_in, 0, "m_axi", "READY", 1),
  	Port_Property("m_axi_gmem_out_WDATA", 128, hls_out, 0, "m_axi", "DATA", 1),
  	Port_Property("m_axi_gmem_out_WSTRB", 16, hls_out, 0, "m_axi", "STRB", 1),
  	Port_Property("m_axi_gmem_out_WLAST", 1, hls_out, 0, "m_axi", "LAST", 1),
  	Port_Property("m_axi_gmem_out_WID", 1, hls_out, 0, "m_axi", "ID", 1),
  	Port_Property("m_axi_gmem_out_WUSER", 1, hls_out, 0, "m_axi", "USER", 1),
  	Port_Property("m_axi_gmem_out_ARVALID", 1, hls_out, 0, "m_axi", "VALID", 1),
  	Port_Property("m_axi_gmem_out_ARREADY", 1, hls_in, 0, "m_axi", "READY", 1),
  	Port_Property("m_axi_gmem_out_ARADDR", 32, hls_out, 0, "m_axi", "ADDR", 1),
  	Port_Property("m_axi_gmem_out_ARID", 1, hls_out, 0, "m_axi", "ID", 1),
  	Port_Property("m_axi_gmem_out_ARLEN", 8, hls_out, 0, "m_axi", "LEN", 1),
  	Port_Property("m_axi_gmem_out_ARSIZE", 3, hls_out, 0, "m_axi", "SIZE", 1),
  	Port_Property("m_axi_gmem_out_ARBURST", 2, hls_out, 0, "m_axi", "BURST", 1),
  	Port_Property("m_axi_gmem_out_ARLOCK", 2, hls_out, 0, "m_axi", "LOCK", 1),
  	Port_Property("m_axi_gmem_out_ARCACHE", 4, hls_out, 0, "m_axi", "CACHE", 1),
  	Port_Property("m_axi_gmem_out_ARPROT", 3, hls_out, 0, "m_axi", "PROT", 1),
  	Port_Property("m_axi_gmem_out_ARQOS", 4, hls_out, 0, "m_axi", "QOS", 1),
  	Port_Property("m_axi_gmem_out_ARREGION", 4, hls_out, 0, "m_axi", "REGION", 1),
  	Port_Property("m_axi_gmem_out_ARUSER", 1, hls_out, 0, "m_axi", "USER", 1),
  	Port_Property("m_axi_gmem_out_RVALID", 1, hls_in, 0, "m_axi", "VALID", 1),
  	Port_Property("m_axi_gmem_out_RREADY", 1, hls_out, 0, "m_axi", "READY", 1),
  	Port_Property("m_axi_gmem_out_RDATA", 128, hls_in, 0, "m_axi", "DATA", 1),
  	Port_Property("m_axi_gmem_out_RLAST", 1, hls_in, 0, "m_axi", "LAST", 1),
  	Port_Property("m_axi_gmem_out_RID", 1, hls_in, 0, "m_axi", "ID", 1),
  	Port_Property("m_axi_gmem_out_RUSER", 1, hls_in, 0, "m_axi", "USER", 1),
  	Port_Property("m_axi_gmem_out_RRESP", 2, hls_in, 0, "m_axi", "RESP", 1),
  	Port_Property("m_axi_gmem_out_BVALID", 1, hls_in, 0, "m_axi", "VALID", 1),
  	Port_Property("m_axi_gmem_out_BREADY", 1, hls_out, 0, "m_axi", "READY", 1),
  	Port_Property("m_axi_gmem_out_BRESP", 2, hls_in, 0, "m_axi", "RESP", 1),
  	Port_Property("m_axi_gmem_out_BID", 1, hls_in, 0, "m_axi", "ID", 1),
  	Port_Property("m_axi_gmem_out_BUSER", 1, hls_in, 0, "m_axi", "USER", 1),
  	Port_Property("stream_in_V_TDATA", 64, hls_in, 2, "axis", "in_data", 1),
  	Port_Property("stream_in_V_TVALID", 1, hls_in, 2, "axis", "in_vld", 1),
  	Port_Property("stream_in_V_TREADY", 1, hls_out, 2, "axis", "in_acc", 1),
  	Port_Property("s_axi_control_AWVALID", 1, hls_in, -1, "", "", 1),
  	Port_Property("s_axi_control_AWREADY", 1, hls_out, -1, "", "", 1),
  	Port_Property("s_axi_control_AWADDR", 5, hls_in, -1, "", "", 1),
  	Port_Property("s_axi_control_WVALID", 1, hls_in, -1, "", "", 1),
  	Port_Property("s_axi_control_WREADY", 1, hls_out, -1, "", "", 1),
  	Port_Property("s_axi_control_WDATA", 32, hls_in, -1, "", "", 1),
  	Port_Property("s_axi_control_WSTRB", 4, hls_in, -1, "", "", 1),
  	Port_Property("s_axi_control_ARVALID", 1, hls_in, -1, "", "", 1),
  	Port_Property("s_axi_control_ARREADY", 1, hls_out, -1, "", "", 1),
  	Port_Property("s_axi_control_ARADDR", 5, hls_in, -1, "", "", 1),
  	Port_Property("s_axi_control_RVALID", 1, hls_out, -1, "", "", 1),
  	Port_Property("s_axi_control_RREADY", 1, hls_in, -1, "", "", 1),
  	Port_Property("s_axi_control_RDATA", 32, hls_out, -1, "", "", 1),
  	Port_Property("s_axi_control_RRESP", 2, hls_out, -1, "", "", 1),
  	Port_Property("s_axi_control_BVALID", 1, hls_out, -1, "", "", 1),
  	Port_Property("s_axi_control_BREADY", 1, hls_in, -1, "", "", 1),
  	Port_Property("s_axi_control_BRESP", 2, hls_out, -1, "", "", 1),
  	Port_Property("interrupt", 1, hls_out, -1, "", "", 1),
  };
  const char* HLS_Design_Meta::dut_name = "circ_buff_write_128";
  