text: #ifndef _GRAPHICS_DESCRIPTORS_H_
  #define _GRAPHICS_DESCRIPTORS_H_
  
  #include "CommonInclude.h"
  
  namespace wiGraphics
  {
  	struct VertexShader;
  	struct PixelShader;
  	struct HullShader;
  	struct DomainShader;
  	struct GeometryShader;
  	struct ComputeShader;
  	struct BlendState;
  	struct RasterizerState;
  	struct DepthStencilState;
  	struct VertexLayout;
  	struct Texture;
  
  	enum SHADERSTAGE
  	{
  		VS,
  		HS,
  		DS,
  		GS,
  		PS,
  		CS,
  		SHADERSTAGE_COUNT
  	};
  	enum PRIMITIVETOPOLOGY
  	{
  		UNDEFINED_TOPOLOGY,
  		TRIANGLELIST,
  		TRIANGLESTRIP,
  		POINTLIST,
  		LINELIST,
  		PATCHLIST,
  	};
  	enum COMPARISON_FUNC
  	{
  		COMPARISON_NEVER,
  		COMPARISON_LESS,
  		COMPARISON_EQUAL,
  		COMPARISON_LESS_EQUAL,
  		COMPARISON_GREATER,
  		COMPARISON_NOT_EQUAL,
  		COMPARISON_GREATER_EQUAL,
  		COMPARISON_ALWAYS,
  	};
  	enum DEPTH_WRITE_MASK
  	{
  		DEPTH_WRITE_MASK_ZERO,
  		DEPTH_WRITE_MASK_ALL,
  	};
  	enum STENCIL_OP
  	{
  		STENCIL_OP_KEEP,
  		STENCIL_OP_ZERO,
  		STENCIL_OP_REPLACE,
  		STENCIL_OP_INCR_SAT,
  		STENCIL_OP_DECR_SAT,
  		STENCIL_OP_INVERT,
  		STENCIL_OP_INCR,
  		STENCIL_OP_DECR,
  	};
  	enum BLEND
  	{
  		BLEND_ZERO,
  		BLEND_ONE,
  		BLEND_SRC_COLOR,
  		BLEND_INV_SRC_COLOR,
  		BLEND_SRC_ALPHA,
  		BLEND_INV_SRC_ALPHA,
  		BLEND_DEST_ALPHA,
  		BLEND_INV_DEST_ALPHA,
  		BLEND_DEST_COLOR,
  		BLEND_INV_DEST_COLOR,
  		BLEND_SRC_ALPHA_SAT,
  		BLEND_BLEND_FACTOR,
  		BLEND_INV_BLEND_FACTOR,
  		BLEND_SRC1_COLOR,
  		BLEND_INV_SRC1_COLOR,
  		BLEND_SRC1_ALPHA,
  		BLEND_INV_SRC1_ALPHA,
  	}; 
  	enum COLOR_WRITE_ENABLE
  	{
  		COLOR_WRITE_DISABLE = 0,
  		COLOR_WRITE_ENABLE_RED = 1,
  		COLOR_WRITE_ENABLE_GREEN = 2,
  		COLOR_WRITE_ENABLE_BLUE = 4,
  		COLOR_WRITE_ENABLE_ALPHA = 8,
  		COLOR_WRITE_ENABLE_ALL = (((COLOR_WRITE_ENABLE_RED | COLOR_WRITE_ENABLE_GREEN) | COLOR_WRITE_ENABLE_BLUE) | COLOR_WRITE_ENABLE_ALPHA)
  	};
  	enum BLEND_OP
  	{
  		BLEND_OP_ADD,
  		BLEND_OP_SUBTRACT,
  		BLEND_OP_REV_SUBTRACT,
  		BLEND_OP_MIN,
  		BLEND_OP_MAX,
  	};
  	enum FILL_MODE
  	{
  		FILL_WIREFRAME,
  		FILL_SOLID,
  	};
  	enum CULL_MODE
  	{
  		CULL_NONE,
  		CULL_FRONT,
  		CULL_BACK,
  	};
  	enum INPUT_CLASSIFICATION
  	{
  		INPUT_PER_VERTEX_DATA,
  		INPUT_PER_INSTANCE_DATA,
  	};
  	enum USAGE
  	{
  		USAGE_DEFAULT,
  		USAGE_IMMUTABLE,
  		USAGE_DYNAMIC,
  		USAGE_STAGING,
  	};
  	enum TEXTURE_ADDRESS_MODE
  	{
  		TEXTURE_ADDRESS_WRAP,
  		TEXTURE_ADDRESS_MIRROR,
  		TEXTURE_ADDRESS_CLAMP,
  		TEXTURE_ADDRESS_BORDER,
  		TEXTURE_ADDRESS_MIRROR_ONCE,
  	};
  	enum FILTER
  	{
  		FILTER_MIN_MAG_MIP_POINT,
  		FILTER_MIN_MAG_POINT_MIP_LINEAR,
  		FILTER_MIN_POINT_MAG_LINEAR_MIP_POINT,
  		FILTER_MIN_POINT_MAG_MIP_LINEAR,
  		FILTER_MIN_LINEAR_MAG_MIP_POINT,
  		FILTER_MIN_LINEAR_MAG_POINT_MIP_LINEAR,
  		FILTER_MIN_MAG_LINEAR_MIP_POINT,
  		FILTER_MIN_MAG_MIP_LINEAR,
  		FILTER_ANISOTROPIC,
  		FILTER_COMPARISON_MIN_MAG_MIP_POINT,
  		FILTER_COMPARISON_MIN_MAG_POINT_MIP_LINEAR,
  		FILTER_COMPARISON_MIN_POINT_MAG_LINEAR_MIP_POINT,
  		FILTER_COMPARISON_MIN_POINT_MAG_MIP_LINEAR,
  		FILTER_COMPARISON_MIN_LINEAR_MAG_MIP_POINT,
  		FILTER_COMPARISON_MIN_LINEAR_MAG_POINT_MIP_LINEAR,
  		FILTER_COMPARISON_MIN_MAG_LINEAR_MIP_POINT,
  		FILTER_COMPARISON_MIN_MAG_MIP_LINEAR,
  		FILTER_COMPARISON_ANISOTROPIC,
  		FILTER_MINIMUM_MIN_MAG_MIP_POINT,
  		FILTER_MINIMUM_MIN_MAG_POINT_MIP_LINEAR,
  		FILTER_MINIMUM_MIN_POINT_MAG_LINEAR_MIP_POINT,
  		FILTER_MINIMUM_MIN_POINT_MAG_MIP_LINEAR,
  		FILTER_MINIMUM_MIN_LINEAR_MAG_MIP_POINT,
  		FILTER_MINIMUM_MIN_LINEAR_MAG_POINT_MIP_LINEAR,
  		FILTER_MINIMUM_MIN_MAG_LINEAR_MIP_POINT,
  		FILTER_MINIMUM_MIN_MAG_MIP_LINEAR,
  		FILTER_MINIMUM_ANISOTROPIC,
  		FILTER_MAXIMUM_MIN_MAG_MIP_POINT,
  		FILTER_MAXIMUM_MIN_MAG_POINT_MIP_LINEAR,
  		FILTER_MAXIMUM_MIN_POINT_MAG_LINEAR_MIP_POINT,
  		FILTER_MAXIMUM_MIN_POINT_MAG_MIP_LINEAR,
  		FILTER_MAXIMUM_MIN_LINEAR_MAG_MIP_POINT,
  		FILTER_MAXIMUM_MIN_LINEAR_MAG_POINT_MIP_LINEAR,
  		FILTER_MAXIMUM_MIN_MAG_LINEAR_MIP_POINT,
  		FILTER_MAXIMUM_MIN_MAG_MIP_LINEAR,
  		FILTER_MAXIMUM_ANISOTROPIC,
  	};
  	enum FORMAT
  	{
  		FORMAT_UNKNOWN,
  		FORMAT_R32G32B32A32_TYPELESS,
  		FORMAT_R32G32B32A32_FLOAT,
  		FORMAT_R32G32B32A32_UINT,
  		FORMAT_R32G32B32A32_SINT,
  		FORMAT_R32G32B32_TYPELESS,
  		FORMAT_R32G32B32_FLOAT,
  		FORMAT_R32G32B32_UINT,
  		FORMAT_R32G32B32_SINT,
  		FORMAT_R16G16B16A16_TYPELESS,
  		FORMAT_R16G16B16A16_FLOAT,
  		FORMAT_R16G16B16A16_UNORM,
  		FORMAT_R16G16B16A16_UINT,
  		FORMAT_R16G16B16A16_SNORM,
  		FORMAT_R16G16B16A16_SINT,
  		FORMAT_R32G32_TYPELESS,
  		FORMAT_R32G32_FLOAT,
  		FORMAT_R32G32_UINT,
  		FORMAT_R32G32_SINT,
  		FORMAT_R32G8X24_TYPELESS,
  		FORMAT_D32_FLOAT_S8X24_UINT,
  		FORMAT_R32_FLOAT_X8X24_TYPELESS,
  		FORMAT_X32_TYPELESS_G8X24_UINT,
  		FORMAT_R10G10B10A2_TYPELESS,
  		FORMAT_R10G10B10A2_UNORM,
  		FORMAT_R10G10B10A2_UINT,
  		FORMAT_R11G11B10_FLOAT,
  		FORMAT_R8G8B8A8_TYPELESS,
  		FORMAT_R8G8B8A8_UNORM,
  		FORMAT_R8G8B8A8_UNORM_SRGB,
  		FORMAT_R8G8B8A8_UINT,
  		FORMAT_R8G8B8A8_SNORM,
  		FORMAT_R8G8B8A8_SINT,
  		FORMAT_R16G16_TYPELESS,
  		FORMAT_R16G16_FLOAT,
  		FORMAT_R16G16_UNORM,
  		FORMAT_R16G16_UINT,
  		FORMAT_R16G16_SNORM,
  		FORMAT_R16G16_SINT,
  		FORMAT_R32_TYPELESS,
  		FORMAT_D32_FLOAT,
  		FORMAT_R32_FLOAT,
  		FORMAT_R32_UINT,
  		FORMAT_R32_SINT,
  		FORMAT_R24G8_TYPELESS,
  		FORMAT_D24_UNORM_S8_UINT,
  		FORMAT_R24_UNORM_X8_TYPELESS,
  		FORMAT_X24_TYPELESS_G8_UINT,
  		FORMAT_R8G8_TYPELESS,
  		FORMAT_R8G8_UNORM,
  		FORMAT_R8G8_UINT,
  		FORMAT_R8G8_SNORM,
  		FORMAT_R8G8_SINT,
  		FORMAT_R16_TYPELESS,
  		FORMAT_R16_FLOAT,
  		FORMAT_D16_UNORM,
  		FORMAT_R16_UNORM,
  		FORMAT_R16_UINT,
  		FORMAT_R16_SNORM,
  		FORMAT_R16_SINT,
  		FORMAT_R8_TYPELESS,
  		FORMAT_R8_UNORM,
  		FORMAT_R8_UINT,
  		FORMAT_R8_SNORM,
  		FORMAT_R8_SINT,
  		FORMAT_A8_UNORM,
  		FORMAT_R1_UNORM,
  		FORMAT_R9G9B9E5_SHAREDEXP,
  		FORMAT_R8G8_B8G8_UNORM,
  		FORMAT_G8R8_G8B8_UNORM,
  		FORMAT_BC1_TYPELESS,
  		FORMAT_BC1_UNORM,
  		FORMAT_BC1_UNORM_SRGB,
  		FORMAT_BC2_TYPELESS,
  		FORMAT_BC2_UNORM,
  		FORMAT_BC2_UNORM_SRGB,
  		FORMAT_BC3_TYPELESS,
  		FORMAT_BC3_UNORM,
  		FORMAT_BC3_UNORM_SRGB,
  		FORMAT_BC4_TYPELESS,
  		FORMAT_BC4_UNORM,
  		FORMAT_BC4_SNORM,
  		FORMAT_BC5_TYPELESS,
  		FORMAT_BC5_UNORM,
  		FORMAT_BC5_SNORM,
  		FORMAT_B5G6R5_UNORM,
  		FORMAT_B5G5R5A1_UNORM,
  		FORMAT_B8G8R8A8_UNORM,
  		FORMAT_B8G8R8X8_UNORM,
  		FORMAT_R10G10B10_XR_BIAS_A2_UNORM,
  		FORMAT_B8G8R8A8_TYPELESS,
  		FORMAT_B8G8R8A8_UNORM_SRGB,
  		FORMAT_B8G8R8X8_TYPELESS,
  		FORMAT_B8G8R8X8_UNORM_SRGB,
  		FORMAT_BC6H_TYPELESS,
  		FORMAT_BC6H_UF16,
  		FORMAT_BC6H_SF16,
  		FORMAT_BC7_TYPELESS,
  		FORMAT_BC7_UNORM,
  		FORMAT_BC7_UNORM_SRGB,
  		FORMAT_AYUV,
  		FORMAT_Y410,
  		FORMAT_Y416,
  		FORMAT_NV12,
  		FORMAT_P010,
  		FORMAT_P016,
  		FORMAT_420_OPAQUE,
  		FORMAT_YUY2,
  		FORMAT_Y210,
  		FORMAT_Y216,
  		FORMAT_NV11,
  		FORMAT_AI44,
  		FORMAT_IA44,
  		FORMAT_P8,
  		FORMAT_A8P8,
  		FORMAT_B4G4R4A4_UNORM,
  		FORMAT_FORCE_UINT = 0xffffffff,
  	};
  	enum GPU_QUERY_TYPE
  	{
  		GPU_QUERY_TYPE_EVENT,				// has the GPU reached this point?
  		GPU_QUERY_TYPE_OCCLUSION,			// how many samples passed depthstencil test?
  		GPU_QUERY_TYPE_OCCLUSION_PREDICATE, // are there any samples that passed depthstencil test
  		GPU_QUERY_TYPE_TIMESTAMP,			// retrieve time point of gpu execution
  		GPU_QUERY_TYPE_TIMESTAMP_DISJOINT,	// timestamp frequency information
  	};
  	enum INDEXBUFFER_FORMAT
  	{
  		INDEXFORMAT_16BIT,
  		INDEXFORMAT_32BIT,
  	};
  
  	// Flags ////////////////////////////////////////////
  	enum CLEAR_FLAG
  	{
  		CLEAR_DEPTH = 0x1L,
  		CLEAR_STENCIL = 0x2L,
  	};
  	enum BIND_FLAG
  	{
  		BIND_VERTEX_BUFFER = 0x1L,
  		BIND_INDEX_BUFFER = 0x2L,
  		BIND_CONSTANT_BUFFER = 0x4L,
  		BIND_SHADER_RESOURCE = 0x8L,
  		BIND_STREAM_OUTPUT = 0x10L,
  		BIND_RENDER_TARGET = 0x20L,
  		BIND_DEPTH_STENCIL = 0x40L,
  		BIND_UNORDERED_ACCESS = 0x80L,
  	};
  	enum CPU_ACCESS
  	{
  		CPU_ACCESS_WRITE = 0x10000L,
  		CPU_ACCESS_READ = 0x20000L,
  	};
  	enum RESOURCE_MISC_FLAG
  	{
  		RESOURCE_MISC_SHARED = 0x2L,
  		RESOURCE_MISC_TEXTURECUBE = 0x4L,
  		RESOURCE_MISC_DRAWINDIRECT_ARGS = 0x10L,
  		RESOURCE_MISC_BUFFER_ALLOW_RAW_VIEWS = 0x20L,
  		RESOURCE_MISC_BUFFER_STRUCTURED = 0x40L,
  		RESOURCE_MISC_TILED = 0x40000L,
  	};
  	enum RESOURCE_STATES
  	{
  		RESOURCE_STATE_COMMON = 0,
  		RESOURCE_STATE_VERTEX_AND_CONSTANT_BUFFER = 0x1,
  		RESOURCE_STATE_INDEX_BUFFER = 0x2,
  		RESOURCE_STATE_RENDER_TARGET = 0x4,
  		RESOURCE_STATE_UNORDERED_ACCESS = 0x8,
  		RESOURCE_STATE_DEPTH_WRITE = 0x10,
  		RESOURCE_STATE_DEPTH_READ = 0x20,
  		RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE = 0x40,
  		RESOURCE_STATE_PIXEL_SHADER_RESOURCE = 0x80,
  		RESOURCE_STATE_STREAM_OUT = 0x100,
  		RESOURCE_STATE_INDIRECT_ARGUMENT = 0x200,
  		RESOURCE_STATE_COPY_DEST = 0x400,
  		RESOURCE_STATE_COPY_SOURCE = 0x800,
  		RESOURCE_STATE_RESOLVE_DEST = 0x1000,
  		RESOURCE_STATE_RESOLVE_SOURCE = 0x2000,
  		RESOURCE_STATE_GENERIC_READ = (((((0x1 | 0x2) | 0x40) | 0x80) | 0x200) | 0x800),
  		RESOURCE_STATE_PRESENT = 0,
  		RESOURCE_STATE_PREDICATION = 0x200,
  		RESOURCE_STATE_VIDEO_DECODE_READ = 0x10000,
  		RESOURCE_STATE_VIDEO_DECODE_WRITE = 0x20000,
  		RESOURCE_STATE_VIDEO_PROCESS_READ = 0x40000,
  		RESOURCE_STATE_VIDEO_PROCESS_WRITE = 0x80000
  	};
  
  	// Structs /////////////////////////////////////////////
  
  	struct ViewPort
  	{
  		float TopLeftX = 0.0f;
  		float TopLeftY = 0.0f;
  		float Width = 0.0f;
  		float Height = 0.0f;
  		float MinDepth = 0.0f;
  		float MaxDepth = 1.0f;
  	};
  	struct VertexLayoutDesc
  	{
  		static const UINT APPEND_ALIGNED_ELEMENT = 0xffffffff; // automatically figure out AlignedByteOffset depending on Format
  
  		char* SemanticName = nullptr;
  		UINT SemanticIndex = 0;
  		FORMAT Format = FORMAT_UNKNOWN;
  		UINT InputSlot = 0;
  		UINT AlignedByteOffset = APPEND_ALIGNED_ELEMENT;
  		INPUT_CLASSIFICATION InputSlotClass = INPUT_CLASSIFICATION::INPUT_PER_VERTEX_DATA;
  		UINT InstanceDataStepRate = 0;
  	};
  	struct SampleDesc
  	{
  		UINT Count = 1;
  		UINT Quality = 0;
  	};
  	struct TextureDesc
  	{
  		UINT Width = 0;
  		UINT Height = 0;
  		UINT Depth = 0;
  		UINT ArraySize = 1;
  		UINT MipLevels = 1;
  		FORMAT Format = FORMAT_UNKNOWN;
  		SampleDesc SampleDesc;
  		USAGE Usage = USAGE_DEFAULT;
  		UINT BindFlags = 0;
  		UINT CPUAccessFlags = 0;
  		UINT MiscFlags = 0;
  	};
  	struct SamplerDesc
  	{
  		FILTER Filter = FILTER_MIN_MAG_MIP_POINT;
  		TEXTURE_ADDRESS_MODE AddressU = TEXTURE_ADDRESS_CLAMP;
  		TEXTURE_ADDRESS_MODE AddressV = TEXTURE_ADDRESS_CLAMP;
  		TEXTURE_ADDRESS_MODE AddressW = TEXTURE_ADDRESS_CLAMP;
  		float MipLODBias = 0.0f;
  		UINT MaxAnisotropy = 0;
  		COMPARISON_FUNC ComparisonFunc = COMPARISON_NEVER;
  		float BorderColor[4] = { 0.0f,0.0f,0.0f,0.0f };
  		float MinLOD = 0.0f;
  		float MaxLOD = FLT_MAX;
  	};
  	struct RasterizerStateDesc
  	{
  		FILL_MODE FillMode = FILL_SOLID;
  		CULL_MODE CullMode = CULL_NONE;
  		bool FrontCounterClockwise = false;
  		INT DepthBias = 0;
  		float DepthBiasClamp = 0.0f;
  		float SlopeScaledDepthBias = 0.0f;
  		bool DepthClipEnable = false;
  		bool MultisampleEnable = false;
  		bool AntialiasedLineEnable = false;
  		bool ConservativeRasterizationEnable = false;
  		UINT ForcedSampleCount = 0;
  	};
  	struct DepthStencilOpDesc
  	{
  		STENCIL_OP StencilFailOp = STENCIL_OP_KEEP;
  		STENCIL_OP StencilDepthFailOp = STENCIL_OP_KEEP;
  		STENCIL_OP StencilPassOp = STENCIL_OP_KEEP;
  		COMPARISON_FUNC StencilFunc = COMPARISON_NEVER;
  	};
  	struct DepthStencilStateDesc
  	{
  		bool DepthEnable = false;
  		DEPTH_WRITE_MASK DepthWriteMask = DEPTH_WRITE_MASK_ZERO;
  		COMPARISON_FUNC DepthFunc = COMPARISON_NEVER;
  		bool StencilEnable = false;
  		UINT8 StencilReadMask = 0xff;
  		UINT8 StencilWriteMask = 0xff;
  		DepthStencilOpDesc FrontFace;
  		DepthStencilOpDesc BackFace;
  	};
  	struct RenderTargetBlendStateDesc
  	{
  		bool BlendEnable = false;
  		BLEND SrcBlend = BLEND_SRC_ALPHA;
  		BLEND DestBlend = BLEND_INV_SRC_ALPHA;
  		BLEND_OP BlendOp = BLEND_OP_ADD;
  		BLEND SrcBlendAlpha = BLEND_ONE;
  		BLEND DestBlendAlpha = BLEND_ONE;
  		BLEND_OP BlendOpAlpha = BLEND_OP_ADD;
  		UINT8 RenderTargetWriteMask = COLOR_WRITE_ENABLE_ALL;
  	};
  	struct BlendStateDesc
  	{
  		bool AlphaToCoverageEnable = false;
  		bool IndependentBlendEnable = false;
  		RenderTargetBlendStateDesc RenderTarget[8];
  	};
  	struct GPUBufferDesc
  	{
  		UINT ByteWidth = 0;
  		USAGE Usage = USAGE_DEFAULT;
  		UINT BindFlags = 0;
  		UINT CPUAccessFlags = 0;
  		UINT MiscFlags = 0;
  		UINT StructureByteStride = 0; // needed for typed and structured buffer types!
  		FORMAT Format = FORMAT_UNKNOWN; // only needed for typed buffer!
  	};
  	struct GPUQueryDesc
  	{
  		GPU_QUERY_TYPE Type = GPU_QUERY_TYPE_EVENT;
  	};
  	struct GPUQueryResult
  	{
  		BOOL	result_passed = FALSE;
  		UINT64	result_passed_sample_count = 0;
  		UINT64	result_timestamp = 0;
  		UINT64	result_timestamp_frequency = 0;
  		BOOL	result_disjoint = FALSE;
  	};
  	struct GraphicsPSODesc
  	{
  		const VertexShader*			vs = nullptr;
  		const PixelShader*			ps = nullptr;
  		const HullShader*			hs = nullptr;
  		const DomainShader*			ds = nullptr;
  		const GeometryShader*		gs = nullptr;
  		const BlendState*			bs = nullptr;
  		const RasterizerState*		rs = nullptr;
  		const DepthStencilState*	dss = nullptr;
  		const VertexLayout*			il = nullptr;
  		PRIMITIVETOPOLOGY			pt = TRIANGLELIST;
  		UINT						numRTs = 0;
  		FORMAT						RTFormats[8] = {};
  		FORMAT						DSFormat = FORMAT_UNKNOWN;
  		SampleDesc					sampleDesc; 
  		UINT						sampleMask = 0xFFFFFFFF;
  	};
  	struct ComputePSODesc
  	{
  		const ComputeShader*	cs = nullptr;
  	};
  	struct IndirectDrawArgsInstanced
  	{
  		UINT VertexCountPerInstance = 0;
  		UINT InstanceCount = 0;
  		UINT StartVertexLocation = 0;
  		UINT StartInstanceLocation = 0;
  	};
  	struct IndirectDrawArgsIndexedInstanced
  	{
  		UINT IndexCountPerInstance = 0;
  		UINT InstanceCount = 0;
  		UINT StartIndexLocation = 0;
  		INT BaseVertexLocation = 0;
  		UINT StartInstanceLocation = 0;
  	};
  	struct IndirectDispatchArgs
  	{
  		UINT ThreadGroupCountX = 0;
  		UINT ThreadGroupCountY = 0;
  		UINT ThreadGroupCountZ = 0;
  	};
  	struct SubresourceData
  	{
  		const void *pSysMem = nullptr;
  		UINT SysMemPitch = 0;
  		UINT SysMemSlicePitch = 0;
  	};
  	struct Rect
  	{
  		LONG left = 0;
  		LONG top = 0;
  		LONG right = 0;
  		LONG bottom = 0;
  	};
  
  }
  
  #endif // _GRAPHICS_DESCRIPTORS_H_
  