text: /*
   ***************************************************************************
   * Ralink Tech Inc.
   * 4F, No. 2 Technology 5th Rd.
   * Science-based Industrial Park
   * Hsin-chu, Taiwan, R.O.C.
   *
   * (c) Copyright, Ralink Technology, Inc.
   *
   * All rights reserved. Ralink's source code is an unpublished work and the
   * use of a copyright notice does not imply otherwise. This source code
   * contains confidential trade secret material of Ralink Tech. Any attemp
   * or participation in deciphering, decoding, reverse engineering or in any
   * way altering the source code is stricitly prohibited, unless the prior
   * written consent of Ralink Technology, Inc. is obtained.
   ***************************************************************************
   */
  
  #ifndef __RALINK_GPIO_H__
  #define __RALINK_GPIO_H__
  
  #include <asm/rt2880/rt_mmap.h>
  
  /*
   * ioctl commands
   */
  #define	RALINK_GPIO_SET_DIR		0x01
  #define RALINK_GPIO_SET_DIR_BIT		0x20
  #define RALINK_GPIO_SET_DIR_IN		0x11
  #define RALINK_GPIO_SET_DIR_OUT		0x12
  #define	RALINK_GPIO_READ		0x02
  #define	RALINK_GPIO_WRITE		0x03
  #define	RALINK_GPIO_SET			0x21
  #define	RALINK_GPIO_CLEAR		0x31
  #define	RALINK_GPIO_READ_BIT		0x04
  #define	RALINK_GPIO_WRITE_BIT		0x05
  #define	RALINK_GPIO_READ_BYTE		0x06
  #define	RALINK_GPIO_WRITE_BYTE		0x07
  #define	RALINK_GPIO_READ_INT		0x02 //same as read
  #define	RALINK_GPIO_WRITE_INT		0x03 //same as write
  #define	RALINK_GPIO_SET_INT		0x21 //same as set
  #define	RALINK_GPIO_CLEAR_INT		0x31 //same as clear
  #define RALINK_GPIO_ENABLE_INTP		0x08
  #define RALINK_GPIO_DISABLE_INTP	0x09
  #define RALINK_GPIO_REG_IRQ		0x0A
  #define RALINK_GPIO_RISING_EDGE_ENA_INT	0x0B
  #define RALINK_GPIO_LED_SET		0x41
  
  #define FLASH_MAX_RW_SIZE		0x100
  
  
  /*
   * Address of RALINK_ Registers
   */
  #define RALINK_SYSCTL_ADDR		RALINK_SYSCTL_BASE	// system control
  #define RALINK_REG_GPIOMODE		(RALINK_SYSCTL_ADDR + 0x60)
  
  #define RALINK_IRQ_ADDR			RALINK_INTCL_BASE
  #define RALINK_REG_INTENA		(RALINK_IRQ_ADDR + 0x34)
  #define RALINK_REG_INTDIS		(RALINK_IRQ_ADDR + 0x38)
  
  #define RALINK_PRGIO_ADDR		RALINK_PIO_BASE // Programmable I/O
  #define RALINK_REG_PIOINT		(RALINK_PRGIO_ADDR + 0)
  #define RALINK_REG_PIOEDGE		(RALINK_PRGIO_ADDR + 0x04)
  #define RALINK_REG_PIORENA		(RALINK_PRGIO_ADDR + 0x08)
  #define RALINK_REG_PIOFENA		(RALINK_PRGIO_ADDR + 0x0C)
  #define RALINK_REG_PIODATA		(RALINK_PRGIO_ADDR + 0x20)
  #define RALINK_REG_PIODIR		(RALINK_PRGIO_ADDR + 0x24)
  #define RALINK_REG_PIOSET		(RALINK_PRGIO_ADDR + 0x2C)
  #define RALINK_REG_PIORESET		(RALINK_PRGIO_ADDR + 0x30)
  #define RALINK_REG_PIOTOGGLE		(RALINK_PRGIO_ADDR + 0x34)
  #define RALINK_REG_PIO3924INT		(RALINK_PRGIO_ADDR + 0x38)
  #define RALINK_REG_PIO3924EDGE		(RALINK_PRGIO_ADDR + 0x3C)
  #define RALINK_REG_PIO3924RENA		(RALINK_PRGIO_ADDR + 0x40)
  #define RALINK_REG_PIO3924FENA		(RALINK_PRGIO_ADDR + 0x44)
  #define RALINK_REG_PIO3924DATA		(RALINK_PRGIO_ADDR + 0x48)
  #define RALINK_REG_PIO3924DIR		(RALINK_PRGIO_ADDR + 0x4C)
  #define RALINK_REG_PIO3924SET		(RALINK_PRGIO_ADDR + 0x54)
  #define RALINK_REG_PIO3924RESET		(RALINK_PRGIO_ADDR + 0x58)
  #define RALINK_REG_PIO3924TOGGLE	(RALINK_PRGIO_ADDR + 0x5C)
  #define RALINK_REG_PIO5140INT		(RALINK_PRGIO_ADDR + 0x60)
  #define RALINK_REG_PIO5140EDGE		(RALINK_PRGIO_ADDR + 0x64)
  #define RALINK_REG_PIO5140RENA		(RALINK_PRGIO_ADDR + 0x68)
  #define RALINK_REG_PIO5140FENA		(RALINK_PRGIO_ADDR + 0x6C)
  #define RALINK_REG_PIO5140DATA		(RALINK_PRGIO_ADDR + 0x70)
  #define RALINK_REG_PIO5140DIR		(RALINK_PRGIO_ADDR + 0x74)
  #define RALINK_REG_PIO5140SET		(RALINK_PRGIO_ADDR + 0x7C)
  #define RALINK_REG_PIO5140RESET		(RALINK_PRGIO_ADDR + 0x80)
  #define RALINK_REG_PIO5140TOGGLE	(RALINK_PRGIO_ADDR + 0x84)
  
  
  /*
   * Values for the GPIOMODE Register
   */
  #ifdef CONFIG_RALINK_RT2880
  #define RALINK_GPIOMODE_I2C		0x01
  #define RALINK_GPIOMODE_UARTF		0x02
  #define RALINK_GPIOMODE_SPI		0x04
  #define RALINK_GPIOMODE_UARTL		0x08
  #define RALINK_GPIOMODE_JTAG		0x10
  #define RALINK_GPIOMODE_MDIO		0x20
  #define RALINK_GPIOMODE_SDRAM		0x40
  #define RALINK_GPIOMODE_PCI		0x80
  #elif defined (CONFIG_RALINK_RT3052) || defined (CONFIG_RALINK_RT2883)
  #define RALINK_GPIOMODE_I2C		0x01
  #define RALINK_GPIOMODE_SPI		0x02
  #define RALINK_GPIOMODE_UARTF		0x1C
  #define RALINK_GPIOMODE_UARTL		0x20
  #define RALINK_GPIOMODE_JTAG		0x40
  #define RALINK_GPIOMODE_MDIO		0x80
  #define RALINK_GPIOMODE_SDRAM		0x100
  #define RALINK_GPIOMODE_RGMII		0x200
  #endif
  
  // if you would like to enable GPIO mode for other pins, please modify this value
  // !! Warning: changing this value may make other features(MDIO, PCI, etc) lose efficacy
  #define RALINK_GPIOMODE_DFT		(RALINK_GPIOMODE_UARTF)
  
  /*
   * bit is the unit of length
   */
  #define RALINK_GPIO_NUMBER		24
  #define RALINK_GPIO_DATA_MASK		0x00FFFFFF
  #define RALINK_GPIO_DATA_LEN		24
  #define RALINK_GPIO_DIR_IN		0
  #define RALINK_GPIO_DIR_OUT		1
  #define RALINK_GPIO_DIR_ALLIN		0
  #define RALINK_GPIO_DIR_ALLOUT		0x00FFFFFF
  
  /*
   * structure used at regsitration
   */
  typedef struct {
  	unsigned int irq;		//request irq pin number
  	pid_t pid;			//process id to notify
  } ralink_gpio_reg_info;
  
  #define RALINK_GPIO_LED_LOW_ACT		1
  #define RALINK_GPIO_LED_INFINITY	4000
  typedef struct {
  	int gpio;			//gpio number (0 ~ 23)
  	unsigned int on;		//interval of led on
  	unsigned int off;		//interval of led off
  	unsigned int blinks;		//number of blinking cycles
  	unsigned int rests;		//number of break cycles
  	unsigned int times;		//blinking times
  } ralink_gpio_led_info;
  
  
  #define RALINK_GPIO_0			0x00000001
  #define RALINK_GPIO_1			0x00000002
  #define RALINK_GPIO_2			0x00000004
  #define RALINK_GPIO_3			0x00000008
  #define RALINK_GPIO_4			0x00000010
  #define RALINK_GPIO_5			0x00000020
  #define RALINK_GPIO_6			0x00000040
  #define RALINK_GPIO_7			0x00000080
  #define RALINK_GPIO_8			0x00000100
  #define RALINK_GPIO_9			0x00000200
  #define RALINK_GPIO_10			0x00000400
  #define RALINK_GPIO_11			0x00000800
  #define RALINK_GPIO_12			0x00001000
  #define RALINK_GPIO_13			0x00002000
  #define RALINK_GPIO_14			0x00004000
  #define RALINK_GPIO_15			0x00008000
  #define RALINK_GPIO_16			0x00010000
  #define RALINK_GPIO_17			0x00020000
  #define RALINK_GPIO_18			0x00040000
  #define RALINK_GPIO_19			0x00080000
  #define RALINK_GPIO_20			0x00100000
  #define RALINK_GPIO_21			0x00200000
  #define RALINK_GPIO_22			0x00400000
  #define RALINK_GPIO_23			0x00800000
  #define RALINK_GPIO(x)			(1 << x)
  
  #endif
  