text: /**
    ******************************************************************************
    * @file    stm32l1xx_hal_spi_ex.c
    * @author  MCD Application Team
    * @version V1.1.3
    * @date    04-March-2016
    * @brief   Extended SPI HAL module driver.
    *    
    *          This file provides firmware functions to manage the following 
    *          functionalities SPI extension peripheral:
    *           + Extended Peripheral Control functions
    *  
    ******************************************************************************
    * @attention
    *
    * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
    *
    * Redistribution and use in source and binary forms, with or without modification,
    * are permitted provided that the following conditions are met:
    *   1. Redistributions of source code must retain the above copyright notice,
    *      this list of conditions and the following disclaimer.
    *   2. Redistributions in binary form must reproduce the above copyright notice,
    *      this list of conditions and the following disclaimer in the documentation
    *      and/or other materials provided with the distribution.
    *   3. Neither the name of STMicroelectronics nor the names of its contributors
    *      may be used to endorse or promote products derived from this software
    *      without specific prior written permission.
    *
    * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
    * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
    * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
    * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
    * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
    * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
    * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
    * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
    * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    *
    ******************************************************************************
    */
  
  /* Includes ------------------------------------------------------------------*/
  #include "stm32l1xx_hal.h"
  
  /** @addtogroup STM32L1xx_HAL_Driver
    * @{
    */
  
  /** @addtogroup SPI
    * @{
    */
  #ifdef HAL_SPI_MODULE_ENABLED
  
  /* Private typedef -----------------------------------------------------------*/
  /* Private define ------------------------------------------------------------*/
  /* Private macro -------------------------------------------------------------*/
  /* Private variables ---------------------------------------------------------*/
  /* Private function prototypes -----------------------------------------------*/
  /* Private functions ---------------------------------------------------------*/
  
  /** @addtogroup SPI_Exported_Functions
    * @{
    */
  
  /** @addtogroup SPI_Exported_Functions_Group1
   *
    * @{
    */
  
  /**
    * @brief  Initializes the SPI according to the specified parameters 
    *         in the SPI_InitTypeDef and create the associated handle.
    * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
    *                the configuration information for SPI module.
    * @retval HAL status
    */
  HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
  {
    /* Check the SPI handle allocation */
    if(hspi == NULL)
    {
      return HAL_ERROR;
    }
  
    /* Check the parameters */
    assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
    assert_param(IS_SPI_MODE(hspi->Init.Mode));
    assert_param(IS_SPI_DIRECTION_MODE(hspi->Init.Direction));
    assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
    assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
    assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
    assert_param(IS_SPI_NSS(hspi->Init.NSS));
    assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
    assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
    assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
    assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation));
    assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
  
    if(hspi->State == HAL_SPI_STATE_RESET)
    {
      /* Allocate lock resource and initialize it */
      hspi->Lock = HAL_UNLOCKED;
  
      /* Init the low level hardware : GPIO, CLOCK, NVIC... */
      HAL_SPI_MspInit(hspi);
    }
    
    hspi->State = HAL_SPI_STATE_BUSY;
  
    /* Disble the selected SPI peripheral */
    __HAL_SPI_DISABLE(hspi);
  
    /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
    /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
    Communication speed, First bit and CRC calculation state */
    hspi->Instance->CR1 = (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize |
                           hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
                           hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit  | hspi->Init.CRCCalculation);
  
    /* Configure : NSS management */
    hspi->Instance->CR2 = (((hspi->Init.NSS >> 16) & SPI_CR2_SSOE) | hspi->Init.TIMode);
  
    /*---------------------------- SPIx CRCPOLY Configuration ------------------*/
    /* Configure : CRC Polynomial */
    hspi->Instance->CRCPR = hspi->Init.CRCPolynomial;
  
  #if defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
    /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
    CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
  #endif
  
    hspi->ErrorCode = HAL_SPI_ERROR_NONE;
    hspi->State = HAL_SPI_STATE_READY;
    
    return HAL_OK;
  }
  
  /**
    * @}
    */
  
  /**
    * @}
    */
  
  #endif /* HAL_SPI_MODULE_ENABLED */
  /**
    * @}
    */
  
  /**
    * @}
    */
  
  /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  