text: /*	$OpenBSD: icu.h,v 1.1 2004/02/01 05:09:49 drahn Exp $	*/
  /*	$NetBSD: icu.h,v 1.1 2002/02/10 12:26:01 chris Exp $	*/
  
  /*-
   * Copyright (c) 1990 The Regents of the University of California.
   * All rights reserved.
   *
   * This code is derived from software contributed to Berkeley by
   * William Jolitz.
   *
   * Redistribution and use in source and binary forms, with or without
   * modification, are permitted provided that the following conditions
   * are met:
   * 1. Redistributions of source code must retain the above copyright
   *    notice, this list of conditions and the following disclaimer.
   * 2. Redistributions in binary form must reproduce the above copyright
   *    notice, this list of conditions and the following disclaimer in the
   *    documentation and/or other materials provided with the distribution.
   * 3. Neither the name of the University nor the names of its contributors
   *    may be used to endorse or promote products derived from this software
   *    without specific prior written permission.
   *
   * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   * SUCH DAMAGE.
   *
   *	@(#)icu.h	5.6 (Berkeley) 5/9/91
   */
  
  /*
   * AT/386 Interrupt Control constants
   * W. Jolitz 8/89
   */
  
  #ifndef	_ARM32_ISA_ICU_H_
  #define	_ARM32_ISA_ICU_H_
  
  #ifndef	_LOCORE
  
  /*
   * Interrupt "level" mechanism variables, masks, and macros
   */
  extern	unsigned imen;		/* interrupt mask enable */
  
  #define SET_ICUS()	{		\
  	outb(IO_ICU1 + 1, imen);	\
  	outb(IO_ICU2 + 1, imen >> 8);	\
  }
  
  #endif /* !_LOCORE */
  
  /*
   * Interrupt enable bits -- in order of priority
   */
  #define	IRQ_SLAVE	2
  
  /*
   * Interrupt Control offset into Interrupt descriptor table (IDT)
   */
  #define	ICU_OFFSET	32		/* 0-31 are processor exceptions */
  #define	ICU_LEN		16		/* 32-47 are ISA interrupts */
  
  #endif /* !_ARM32_ISA_ICU_H_ */
  