text: /** @file reg_tcram.h
  *   @brief TCRAM Register Layer Header File
  *   @date 11-Dec-2018
  *   @version 04.07.01
  *   
  *   This file contains:
  *   - Definitions
  *   - Types
  *   .
  *   which are relevant for the System driver.
  */
  
  /* 
  * Copyright (C) 2009-2018 Texas Instruments Incorporated - www.ti.com 
  * 
  * 
  *  Redistribution and use in source and binary forms, with or without 
  *  modification, are permitted provided that the following conditions 
  *  are met:
  *
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  *    notice, this list of conditions and the following disclaimer.
  *
  *    Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the 
  *    documentation and/or other materials provided with the   
  *    distribution.
  *
  *    Neither the name of Texas Instruments Incorporated nor the names of
  *    its contributors may be used to endorse or promote products derived
  *    from this software without specific prior written permission.
  *
  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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  */
  
  
  #ifndef __REG_TCRAM_H__
  #define __REG_TCRAM_H__
  
  /* USER CODE BEGIN (0) */
  /* USER CODE END */
  
  #include "sys_common.h"
  
  /* USER CODE BEGIN (1) */
  /* USER CODE END */
  
  /* Tcram Register Frame Definition */
  /** @struct tcramBase
  *   @brief TCRAM Wrapper Register Frame Definition
  *
  *   This type is used to access the TCRAM Wrapper Registers.
  */
  /** @typedef tcramBASE_t
  *   @brief TCRAM Wrapper Register Frame Type Definition
  *
  *   This type is used to access the TCRAM Wrapper Registers.
  */
  
  typedef volatile struct tcramBase
  {
      uint32 RAMCTRL;		    /* 0x0000 */
      uint32 RAMTHRESHOLD;      /* 0x0004 */
      uint32 RAMOCCUR;			/* 0x0008 */
      uint32 RAMINTCTRL;		/* 0x000C */
      uint32 RAMERRSTATUS;		/* 0x0010 */
      uint32 RAMSERRADDR;		/* 0x0014 */
      uint32   rsvd1;			/* 0x0018 */
      uint32 RAMUERRADDR;		/* 0x001C */
      uint32   rsvd2[4U];		/* 0x0020 */
      uint32 RAMTEST;			/* 0x0030 */
      uint32   rsvd3;			/* 0x0034 */
      uint32 RAMADDRDECVECT;	/* 0x0038 */
      uint32 RAMPERADDR;        /* 0x003C */
  } tcramBASE_t;
  
  #define tcram1REG ((tcramBASE_t *)(0xFFFFF800U))
  #define tcram2REG ((tcramBASE_t *)(0xFFFFF900U))
  
  /* USER CODE BEGIN (2) */
  /* USER CODE END */
  
  #endif
  