text: /**************************************************************************//**
   * @file     main.c
   * @version  V1.00
   * @brief    Use PDMA0 channel 0 to transfer data from memory to memory with stride and repeat.
   *
   * @copyright SPDX-License-Identifier: Apache-2.0
   * @copyright Copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
   ******************************************************************************/
  #include <stdio.h>
  #include "NuMicro.h"
  
  /*---------------------------------------------------------------------------------------------------------*/
  /* Macro, type and constant definitions                                                                    */
  /*---------------------------------------------------------------------------------------------------------*/
  static uint32_t PDMA_TEST_LENGTH = 16;
  
  /*---------------------------------------------------------------------------------------------------------*/
  /* Global variables                                                                                        */
  /*---------------------------------------------------------------------------------------------------------*/
  __attribute__((aligned)) static uint8_t au8SrcArray[256];
  __attribute__((aligned)) static uint8_t au8DestArray[256];
  static uint32_t volatile g_u32IsTestOver = 0;
  
  void PDMA0_IRQHandler(void);
  void SYS_Init(void);
  void UART0_Init(void);
  
  /**
   * @brief       DMA IRQ
   *
   * @param       None
   *
   * @return      None
   *
   * @details     The DMA default IRQ, declared in startup_M2354.s.
   */
  void PDMA0_IRQHandler(void)
  {
      uint32_t status = PDMA_GET_INT_STATUS(PDMA0);
  
      if(status & PDMA_INTSTS_ABTIF_Msk)    /* abort */
      {
          /* Check if channel 0 has abort error */
          if(PDMA_GET_ABORT_STS(PDMA0) & PDMA_ABTSTS_ABTIF0_Msk)
              g_u32IsTestOver = 2;
          /* Clear abort flag of channel 0 */
          PDMA_CLR_ABORT_FLAG(PDMA0, PDMA_ABTSTS_ABTIF0_Msk);
      }
      else if(status & PDMA_INTSTS_TDIF_Msk)      /* done */
      {
          /* Check transmission of channel 0 has been transfer done */
          if(PDMA_GET_TD_STS(PDMA0) & PDMA_TDSTS_TDIF0_Msk)
              g_u32IsTestOver = 1;
          /* Clear transfer done flag of channel 0 */
          PDMA_CLR_TD_FLAG(PDMA0, PDMA_TDSTS_TDIF0_Msk);
      }
      else
          printf("unknown interrupt !!\n");
  }
  
  void SYS_Init(void)
  {
  
      /*---------------------------------------------------------------------------------------------------------*/
      /* Init System Clock                                                                                       */
      /*---------------------------------------------------------------------------------------------------------*/
  
      /* Enable HIRC clock */
      CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);
  
      /* Wait for HIRC clock ready */
      CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
  
      /* Set core clock to 96MHz */
      CLK_SetCoreClock(96000000);
  
      /* Enable UART0 module clock */
      CLK_EnableModuleClock(UART0_MODULE);
  
      /* Select UART0 module clock source as HIRC and UART0 module clock divider as 1 */
      CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL2_UART0SEL_HIRC, CLK_CLKDIV0_UART0(1));
  
      /* Enable PDMA0 clock source */
      CLK_EnableModuleClock(PDMA0_MODULE);
  
      /*---------------------------------------------------------------------------------------------------------*/
      /* Init I/O Multi-function                                                                                 */
      /*---------------------------------------------------------------------------------------------------------*/
  
      /* Set multi-function pins for UART0 RXD and TXD */
      SYS->GPA_MFPL = (SYS->GPA_MFPL & (~(UART0_RXD_PA6_Msk | UART0_TXD_PA7_Msk))) | UART0_RXD_PA6 | UART0_TXD_PA7;
  
  }
  
  void UART0_Init(void)
  {
  
      /* Configure UART0 and set UART0 baud rate */
      UART_Open(UART0, 115200);
  }
  
  
  
  int main(void)
  {
  
      /* Unlock protected registers */
      SYS_UnlockReg();
  
      /* Init System, IP clock and multi-function I/O */
      SYS_Init();
  
      /* Lock protected registers */
      /* If user want to write protected register, please issue SYS_UnlockReg() to unlock protected register. */
      SYS_LockReg();
  
      /* Init UART for printf */
      UART0_Init();
  
      printf("\n\nCPU @ %dHz\n", SystemCoreClock);
      printf("+------------------------------------------------------------------+ \n");
      printf("|    PDMA Memory to Memory Driver Sample Code (Stride_Repeat)      | \n");
      printf("+------------------------------------------------------------------+ \n");
  
  
      /*------------------------------------------------------------------------------------------------------
  
                           au8SrcArray                         au8DestArray
                           ---------------------------   -->   ---------------------------
                         /| [0]  | [1]  |  [2] |  [3] |       | [0]  | [1]  |  [2] |  [3] |\
                          | [4]  | [5]  |  [6] |  [7] |       | [8]  | [9]  | [10] | [11] |
                          | [8]  | [9]  | [10] | [11] |       |      |      |      |      |
                          |      |      |      |      |       |      |      |      |      |
                          |      |      |      |      |       |            ...            |
                          |      |      |      |      |       |      |      |      |      |
                          |      |      |      |      |       |      |      |      |      |
         PDMA_TEST_LENGTH |            ...            |       | [51] | [50] | [49] | [48] | PDMA_TEST_LENGTH
                          |      |      |      |      |       | [59] | [58] | [57] | [56] |
                          |      |      |      |      |       |  [4] |  [5] |  [6] |  [7] |
                          |      |      |      |      |       | [12] | [13] | [14] | [15] |
                          |      |      |      |      |       |      |      |      |      |
                          | [52] | [53] | [54] | [55] |       |            ...            |
                          | [56] | [57] | [58] | [59] |       |      |      |      |      |/
                         \| [60] | [61] | [62] | [63] |       | [60] | [61] | [62] | [63] |
                           ---------------------------         ---------------------------
                           \                         /         \                         /
                                 32bits(one word)                     32bits(one word)
  
        PDMA transfer configuration:
  
          Channel = 0
          Operation mode = basic mode
          Request source = PDMA_MEM(memory to memory)
          transfer done and table empty interrupt = enable
  
          Transfer count = PDMA_TEST_LENGTH
          Transfer width = 32 bits(one word)
          Source address = au8SrcArray
          Source address increment size = 32 bits(one word)
          Destination address = au8DestArray
          Destination address increment size = 32 bits(one word)
          Transfer type = burst transfer
  
          Stride Setting:
          Destination stride count = 1
          Source stride count = 2
          Transfer count of per stride = 1
  
          Repeat Setting:
          Destination address interval count = PDMA_TEST_LENGTH/2
          Source address interval count = 1
          Repeat count = 1
  
          Total transfer length = PDMA_TEST_LENGTH * 32 bits
      ------------------------------------------------------------------------------------------------------*/
      /* Open Channel 0 */
      PDMA_Open(PDMA0, 1 << 0);
      /* Transfer count is PDMA_TEST_LENGTH, transfer width is 32 bits(one word) */
      PDMA_SetTransferCnt(PDMA0, 0, PDMA_WIDTH_32, PDMA_TEST_LENGTH);
      /* Set source address is au8SrcArray, destination address is au8DestArray, Source/Destination increment size is 32 bits(one word) */
      PDMA_SetTransferAddr(PDMA0, 0, (uint32_t)au8SrcArray, PDMA_SAR_INC, (uint32_t)au8DestArray, PDMA_DAR_INC);
      /* Destination stride count is 1, Source stride count is 2, Transfer count of per stride is 1 */
      PDMA_SetStride(PDMA0, 0, 1, 2, 1);
      /* Destination address interval count is 1, Source address interval count is 2, Repeat count is 1 */
      PDMA_SetRepeat(PDMA0, 0, PDMA_TEST_LENGTH / 2, 1, 1);
      /* Request source is memory to memory */
      PDMA_SetTransferMode(PDMA0, 0, PDMA_MEM, FALSE, 0);
      /* Transfer type is burst transfer and burst size is 1 */
      PDMA_SetBurstType(PDMA0, 0, PDMA_REQ_BURST, PDMA_BURST_1);
  
      /* Enable interrupt */
      PDMA_EnableInt(PDMA0, 0, PDMA_INT_TRANS_DONE);
  
      /* Enable NVIC for PDMA0 */
      NVIC_EnableIRQ(PDMA0_IRQn);
      g_u32IsTestOver = 0;
  
      /* Generate a software request to trigger transfer with PDMA0 channel 2  */
      PDMA_Trigger(PDMA0, 0);
  
      /* Waiting for transfer done */
      while(g_u32IsTestOver == 0);
  
      /* Check transfer result */
      if(g_u32IsTestOver == 1)
          printf("test done...\n");
      else if(g_u32IsTestOver == 2)
          printf("target abort...\n");
  
      /* Close channel 2 */
      PDMA_Close(PDMA0);
  
      while(1);
  }
  
  /*** (C) COPYRIGHT 2020 Nuvoton Technology Corp. ***/
  