text: /*
   * (C) Copyright 2008-2010
   * Gražvydas Ignotas <notasas@gmail.com>
   *
   * Configuration settings for the OMAP3 Pandora.
   *
   * This program is free software; you can redistribute it and/or
   * modify it under the terms of the GNU General Public License as
   * published by the Free Software Foundation; either version 2 of
   * the License, or (at your option) any later version.
   *
   * This program is distributed in the hope that it will be useful,
   * but WITHOUT ANY WARRANTY; without even the implied warranty of
   * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
   * GNU General Public License for more details.
   *
   * You should have received a copy of the GNU General Public License
   * along with this program; if not, write to the Free Software
   * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
   * MA 02111-1307 USA
   */
  
  #ifndef __CONFIG_H
  #define __CONFIG_H
  
  /*
   * High Level Configuration Options
   */
  #define CONFIG_OMAP		1	/* in a TI OMAP core */
  #define CONFIG_OMAP34XX		1	/* which is a 34XX */
  #define CONFIG_OMAP3_PANDORA	1	/* working with pandora */
  #define CONFIG_OMAP_GPIO
  
  #define CONFIG_SDRC	/* The chip has SDRC controller */
  
  #include <asm/arch/cpu.h>	/* get chip and board defs */
  #include <asm/arch/omap3.h>
  
  /*
   * Display CPU and Board information
   */
  #define CONFIG_DISPLAY_CPUINFO		1
  #define CONFIG_DISPLAY_BOARDINFO	1
  
  /* Clock Defines */
  #define V_OSCK			26000000	/* Clock output from T2 */
  #define V_SCLK			(V_OSCK >> 1)
  
  #define CONFIG_MISC_INIT_R
  
  #define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
  #define CONFIG_SETUP_MEMORY_TAGS	1
  #define CONFIG_INITRD_TAG		1
  #define CONFIG_REVISION_TAG		1
  
  #define CONFIG_OF_LIBFDT		1
  
  /*
   * Size of malloc() pool
   */
  #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
  #define CONFIG_SYS_MALLOC_LEN		(1024 * 1024 + CONFIG_ENV_SIZE)
  
  /*
   * Hardware drivers
   */
  
  #define CONFIG_SYS_CONSOLE_IS_IN_ENV	1
  #define CONFIG_SYS_DEVICE_NULLDEV	1
  
  /* USB */
  #define CONFIG_MUSB_UDC			1
  #define CONFIG_USB_OMAP3		1
  #define CONFIG_TWL4030_USB		1
  
  /* USB device configuration */
  #define CONFIG_USB_DEVICE		1
  #define CONFIG_USB_TTY			1
  
  /*
   * NS16550 Configuration
   */
  #define V_NS16550_CLK			48000000	/* 48MHz (APLL96/2) */
  
  #define CONFIG_SYS_NS16550
  #define CONFIG_SYS_NS16550_SERIAL
  #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
  #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
  
  /*
   * select serial console configuration
   */
  #define CONFIG_CONS_INDEX		3
  #define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
  #define CONFIG_SERIAL3			3
  
  /* allow to overwrite serial and ethaddr */
  #define CONFIG_ENV_OVERWRITE
  #define CONFIG_BAUDRATE			115200
  #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600, \
  					115200}
  #define CONFIG_GENERIC_MMC		1
  #define CONFIG_MMC			1
  #define CONFIG_OMAP_HSMMC		1
  #define CONFIG_DOS_PARTITION		1
  
  /* commands to include */
  #include <config_cmd_default.h>
  
  #define CONFIG_CMD_EXT2		/* EXT2 Support			*/
  #define CONFIG_CMD_FAT		/* FAT support			*/
  
  #define CONFIG_CMD_I2C		/* I2C serial bus support	*/
  #define CONFIG_CMD_MMC		/* MMC support			*/
  #define CONFIG_CMD_NAND		/* NAND support			*/
  #define CONFIG_CMD_CACHE	/* Cache control		*/
  
  #undef CONFIG_CMD_FLASH		/* flinfo, erase, protect	*/
  #undef CONFIG_CMD_FPGA		/* FPGA configuration Support	*/
  #undef CONFIG_CMD_IMI		/* iminfo			*/
  #undef CONFIG_CMD_IMLS		/* List all found images	*/
  #undef CONFIG_CMD_NET		/* bootp, tftpboot, rarpboot	*/
  #undef CONFIG_CMD_NFS		/* NFS support			*/
  
  #define CONFIG_SYS_NO_FLASH
  #define CONFIG_HARD_I2C			1
  #define CONFIG_SYS_I2C_SPEED		100000
  #define CONFIG_SYS_I2C_SLAVE		1
  #define CONFIG_DRIVER_OMAP34XX_I2C	1
  
  /*
   * TWL4030
   */
  #define CONFIG_TWL4030_POWER		1
  #define CONFIG_TWL4030_LED		1
  
  /*
   * Board NAND Info.
   */
  #define CONFIG_NAND_OMAP_GPMC
  #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
  							/* to access nand */
  #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
  							/* to access nand */
  							/* at CS0 */
  #define GPMC_NAND_ECC_LP_x16_LAYOUT	1
  
  #define CONFIG_SYS_MAX_NAND_DEVICE	1	/* Max number of NAND */
  						/* devices */
  
  #ifdef CONFIG_CMD_NAND
  #define CONFIG_CMD_MTDPARTS
  #define CONFIG_MTD_PARTITIONS
  #define CONFIG_MTD_DEVICE
  #define CONFIG_CMD_UBI
  #define CONFIG_CMD_UBIFS
  #define CONFIG_RBTREE
  #define CONFIG_LZO
  
  #define MTDIDS_DEFAULT			"nand0=nand"
  #define MTDPARTS_DEFAULT		"mtdparts=nand:512k(xloader),"\
  					"1920k(uboot),128k(uboot-env),"\
  					"10m(boot),-(rootfs)"
  #else
  #define MTDPARTS_DEFAULT
  #endif
  
  /* Environment information */
  #define CONFIG_BOOTDELAY		1
  
  #define CONFIG_EXTRA_ENV_SETTINGS \
  	"usbtty=cdc_acm\0" \
  	"loadaddr=0x82000000\0" \
  	"bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \
  		"rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \
  	"mtdparts=" MTDPARTS_DEFAULT "\0" \
  
  #define CONFIG_BOOTCOMMAND \
  	"if mmc rescan && fatload mmc1 0 ${loadaddr} autoboot.scr || " \
  			"ext2load mmc1 0 ${loadaddr} autoboot.scr; then " \
  		"source ${loadaddr}; " \
  	"fi; " \
  	"ubi part boot && ubifsmount ubi:boot && " \
  		"ubifsload ${loadaddr} uImage && bootm ${loadaddr}"
  
  #define CONFIG_AUTO_COMPLETE	1
  /*
   * Miscellaneous configurable options
   */
  #define CONFIG_SYS_LONGHELP		/* undef to save memory */
  #define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
  #define CONFIG_SYS_PROMPT		"Pandora # "
  #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
  /* Print Buffer Size */
  #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
  					sizeof(CONFIG_SYS_PROMPT) + 16)
  #define CONFIG_SYS_MAXARGS		16	/* max number of command */
  						/* args */
  /* Boot Argument Buffer Size */
  #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
  /* memtest works on */
  #define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
  #define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
  					0x01F00000) /* 31MB */
  
  #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0) /* default load */
  								/* address */
  
  /*
   * OMAP3 has 12 GP timers, they can be driven by the system clock
   * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
   * This rate is divided by a local divisor.
   */
  #define CONFIG_SYS_TIMERBASE		OMAP34XX_GPT2
  #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
  #define CONFIG_SYS_HZ			1000
  
  /*-----------------------------------------------------------------------
   * Physical Memory Map
   */
  #define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
  #define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
  #define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1
  
  #define CONFIG_SYS_TEXT_BASE		0x80008000
  #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
  #define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
  #define CONFIG_SYS_INIT_RAM_SIZE	0x800
  #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
  					CONFIG_SYS_INIT_RAM_SIZE - \
  					GENERATED_GBL_DATA_SIZE)
  
  /*-----------------------------------------------------------------------
   * FLASH and environment organization
   */
  
  /* **** PISMO SUPPORT *** */
  
  /* Configure the PISMO */
  #define PISMO1_NAND_SIZE		GPMC_SIZE_128M
  #define PISMO1_ONEN_SIZE		GPMC_SIZE_128M
  
  #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */
  
  #if defined(CONFIG_CMD_NAND)
  #define CONFIG_SYS_FLASH_BASE		PISMO1_NAND_BASE
  #endif
  
  /* Monitor at start of flash */
  #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
  
  #define CONFIG_ENV_IS_IN_NAND		1
  #define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */
  
  #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
  #define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
  #define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET
  
  #define CONFIG_SYS_CACHELINE_SIZE	64
  
  #endif				/* __CONFIG_H */
  