The number of transistors on semiconductor chips will grow exponentially in the coming decades— this 1965 forecast made future Intel co-founder Gordon Moore famous. Far less attention was paid to another statement that could also be found in his article for the magazine Electronics: “It may prove to be more economical to build large systems out of smaller functions, which are separately packaged and interconnected.”
Researchers and semiconductor manufacturers around the world are currently moving forward with this idea. They intend to distribute the numerous functions in the increasingly complex chips to smaller integrated circuits (ICs) that operate in concert. Experts call them chiplets—mini-ICs that can be connected to a complete system much like building blocks. They can each perform sub-functions of an overall system and can, for example, be used as a central processing unit (CPU), graphics processor (GPU), memory, digital interface to the outside world, or Wi-Fi transmitter and receiver.
Until recently, the trend was heading in the opposite direction
For decades, semiconductor manufacturers have integrated more and more functions on one and the same semiconductor board (known as a die) into highly complex systems-on-a-chip (SoC)—all thanks to Moore’s Law. However, companies are now encountering their limits, because the probability of defects increases as the dies get bigger, thereby greatly reducing the yield of functioning chips in production. That makes it very difficult to produce large SoCs economically—especially if the very latest manufacturing processes involving immense investment costs are being used to obtain a yield that is already relatively low to begin with.
“The issue of chiplets has been gaining momentum for several years now.” Dr. Michael Schiffer, Head of the Wafer Level System Integration department at the Fraunhofer Institute for Reliability and Microintegration IZM
“That’s why about 15 years ago we started looking for new approaches,” says Dr. Michael Schiffer, Head of the Wafer Level System Integration department at the Fraunhofer Institute for Reliability and Microintegration IZM in Berlin. “The issue has been gaining momentum for several years now because today, we have the technologies needed to connect chiplets to each other and because semiconductor manufacturers are now reaching their limits in terms of scrap costs.” Chiplets can solve the problem: If the functions of an SoC are distributed to smaller units, the yield on functioning ICs increases again.
Chiplets can solve the problem
If the functions of an SoC are distributed to smaller units, the yield on functioning ICs increases again. Chiplets have other advantages too. If each of them specializes in a single function, the optimum technology can be used for the production of each and every one: For example, you could use state-of-the-art manufacturing processes with the smallest transistors for the high-performance CPU and GPU chiplets, while simpler digital interface chiplets could be produced using older—and cheaper—processes. The same applies to the materials used: Silicon is the best choice for CPU and GPU dies, while gallium arsenide, silicon-germanium, or silicon carbide is the best choice for high-frequency and high-performance chiplets; indium phosphide is most suited to optoelectronic components. “This maximizes the performance of the individual chiplets and improves their efficiency,” says Schiffer.
However, the specialized mini-chips must be connected to form a complete system. For this purpose, a silicon interposer, as it is known, is generally used as a location for the chiplets. Either the interposer is a thin silicon plate, into which only copper tracks are inserted for the electrical connection of the chips, or the silicon interposer itself can contain an electronic circuit that actively conducts the chiplet signals, thereby significantly reducing lag times. “Glass is also a potential material for high-frequency applications while organic substances are also conceivable as a material for the interposer, but these cannot compete with silicon interposers in terms of structure sizes,” explains Schiffer.
However, the potential of the chiplet idea can only be fully exploited if the components made by different manufacturers can be combined into a complete system without any problems. In the future, the Universal Chiplet Interconnect Express (UCIe) communication standard plans to make this possible—similar to Peripheral Component Interconnect Express (PCIe), which today is used to connect diverse peripheral devices such as hard disks or graphics cards to the chip set of a processor in a PC. UCIe is backed by chip developers such as AMD, ARM, Intel, Google Cloud, Meta, Microsoft, Qualcomm, and Samsung, as well as TSMC, which is the world’s largest contract manufacturer of semiconductors. As an alternative, the Open Compute Project (OCP) has introduced the Bunch of Wires (BoW) standard. Members of the OPC include operators of large data centers such as Google, Meta, and Microsoft.
Chiplet standard for vehicles
“Both standards are designed for the exchange of very large amounts of data,” says Andy Heinig, Group Manager System Integration at the Fraunhofer Institute for Integrated Circuits IIS in Dresden. “For automotive applications, however, additional analog interfaces would be needed in order to be able to assemble, say, a radar from different chiplets.”
Together with OEMs and suppliers, the researchers at IIS intend to develop a standard that is tailor-made for use in vehicles. Although a standard has yet to be established, it is clear to Heinig that chiplets will play an important role in vehicles in the future: “Autonomous driving in particular needs a huge amount of processing power, although the exact requirements will depend largely on the level of automation being aimed for. In the future, OEMs could design the electronics optimally for their individual models or for the different equipment variants by using chiplets.”
“Additional analog interfaces are needed for automotive applications.” Andy Heinig, Group Manager System Integration at the Fraunhofer Institute for Integrated Circuits
This scalable modular system also caters perfectly to the car manufacturers’ platform concept. Prof. Steffen Paul, head of the Communication Electronics Working Group at the University of Bremen, is investigating how such a vehicle system might look in tandem with industrial and academic project partners. As he, too, stresses: “Chiplets mean that system configurations can be flexibly adapted to the requirements of vehicles.” His team demonstrates this using the example of a 77-gigahertz radar for autonomous driving. The analog part is divided into several chiplets, which work both as an oscillator and as a transmitter/receiver, and are housed on a silicon interposer. Depending on the required number of antennas, two or four transceiver chiplets are integrated into the system.
The digital part that processes the signals can consist of up to eight chiplets—depending on the complexity of the evaluation algorithms used. In addition to the greater flexibility attained by combining different calculation engines, Professor Paul sees another advantage in the chiplet approach: Improved protection of intellectual property. “Partitioning the functions into smaller units makes it much more difficult for competitors to determine how the overall system works. In addition, critical functions such as encryption can be developed separately on a chiplet – in a high-security area and kept separate from the development of the remaining logic,” explains the expert.
Key factor for the future
“Chiplets are currently used in markets such as data centers, mobile devices, networks, and storage,” says Tom Hackenberg, Principal Analyst for Computing and Software at technology consulting firm Yole Intelligence. “With the emergence of powerful heterogeneous processors in driver assistance systems, however, they are becoming a key factor in future electronic systems in vehicles. That’s why many car chip manufacturers support the standardization of the chiplet.” Once more, one of Gordon Moore’s predictions may have hit the bullseye.
Text first published in the Porsche Engineering Magazine, issue 1/2023
Text: Christian Buck
Illustrations: Oriana Fenwick
Copyright: All images, videos and audio files published in this article are subject to copyright. Reproduction in whole or in part is not permitted without the written consent of Dr. Ing. h.c. F. Porsche AG. Please contact email@example.com for further information.
Idadi ya transistors kwenye chips semiconductor kukua exponentially katika miongo ijayo. utabiri huu 1965 alifanya baadaye Intel mwanzilishi mwenza Gordon Moore maarufu. "Hata hivyo, katika makala yake ya kwanza katika jarida la Electronics, alisema: ""Inaweza kuwa na ufanisi zaidi kujenga mifumo mikubwa kutoka kwa kazi ndogo, ambazo zimefungwa kando na kuunganishwa.""" Kwa hivyo, ni muhimu kuamua jinsi ya kuunganisha kazi nyingi katika chips ndogo na ndogo, na kuifanya iwe rahisi kwa circuit ya pamoja. Wataalamu huziita chiplets - mini-ICs ambazo zinaweza kuunganishwa na mfumo kamili kama vile vitalu vya ujenzi. Kila moja inaweza kufanya kazi ndogo ya mfumo wa jumla na inaweza, kwa mfano, kutumika kama kitengo cha usindikaji wa kati (CPU), processor ya picha (GPU), kumbukumbu, kiunganishi cha dijiti kwa ulimwengu wa nje, au transmitter na mpokeaji wa Wi-Fi. Hadi hivi karibuni, mwenendo ulikuwa ukielekea upande ule mwingine Kwa miongo kadhaa, watengenezaji wa semiconductor wameunganisha kazi zaidi na zaidi kwenye bodi moja ya semiconductor ( inayojulikana kama kufa) katika mifumo tata sana kwenye chip (SoC) - yote shukrani kwa Sheria ya Moore. Hata hivyo, makampuni sasa ni kukutana na mipaka yao, kwa sababu uwezekano wa kasoro huongezeka kama dies kupata kubwa, na hivyo sana kupunguza mavuno ya chips kazi katika uzalishaji. Hiyo inafanya kuwa vigumu sana kuzalisha SoCs kubwa kiuchumi - hasa kama michakato ya hivi karibuni ya utengenezaji inayohusisha gharama kubwa za uwekezaji zinatumiwa kupata mavuno ambayo tayari ni ya chini kuanza na. "Mfano wa ""wafer"" ni wafer-level system integration (WLS) na ""wafer-level system integration"" (WLS) na ""wafer-level system integration"" na ""wafer-level system integration"" na ""wafer-level system integration"" na ""wafer-level system integration"" na ""wafer-level system integration"" na ""wafer-level system integration"" na ""wafer-level system integration"" na ""wafer-level system integration"" na ""wafer-level system integration"" na ""wafer-level system integration"" na ""wafer-level system integration"" na ""wafer-level system integration"" na ""wafer-level system integration"" na ""wafer-level system integration"" na ""wafer-level system integration""" "Swali hilo limekuwa likipata kasi kwa miaka kadhaa sasa kwa sababu leo tuna teknolojia zinazohitajika kuunganisha chips kwa kila mmoja na kwa sababu wazalishaji wa semiconductor sasa wanafikia mipaka yao kwa suala la gharama za taka. ""Chiplets inaweza kutatua tatizo: Kama kazi za SoC zimesambazwa kwa vitengo vidogo, mavuno ya kazi ya ICs huongezeka tena." Chiplets inaweza kutatua tatizo: Kama kazi ya SoC ni kusambazwa kwa vitengo ndogo, mavuno juu ya kazi ICs huongezeka tena. Chiplets zina faida nyinginezo pia. Ikiwa kila moja yao ni maalumu katika kazi moja, teknolojia bora inaweza kutumika kwa ajili ya uzalishaji wa kila mmoja: Kwa mfano, unaweza kutumia hali ya sanaa ya viwanda na transistors ndogo kwa ajili ya utendaji wa juu CPU na GPU chipsets, wakati rahisi digital interface chipsets inaweza kuzalishwa kwa kutumia zamani na nafuu michakato. Kwa mfano, silicon ni bora kwa ajili ya CPU na GPU, wakati gallium arsenide, silicon germanium, au silicon carbide ni bora kwa ajili ya high-frequency na high-utendaji chips. "Hii huongeza utendaji wa chiplets za mtu binafsi na kuboresha ufanisi wao", anasema Schiffer. Hata hivyo, vipande vidogo-vidogo vya kipekee lazima viunganishwe ili kufanyiza mfumo kamili. Kwa kusudi hili, interposer silicon, kama inavyojulikana, ni kawaida kutumika kama eneo kwa chiplets. Interposer ni sahani nyembamba ya silicon, ambayo ina nyimbo za shaba tu zilizowekwa kwa uhusiano wa umeme wa chips, au interposer ya silicon yenyewe inaweza kuwa na mzunguko wa elektroniki ambao huongoza ishara za chip, na hivyo kupunguza muda wa kuchelewesha. <unk> Kioo pia ni nyenzo ya uwezekano kwa ajili ya maombi ya masafa ya juu wakati vitu vya kikaboni pia ni conceivable kama nyenzo kwa interposer, lakini hizi haziwezi kushindana na silicon interposers katika suala la ukubwa wa muundo, <unk> anaelezea Schiffer. Hata hivyo, uwezo wa wazo la chiplet unaweza tu kutumiwa kikamilifu kama vipengele vilivyotengenezwa na wazalishaji tofauti vinaweza kuunganishwa katika mfumo kamili bila matatizo yoyote. Kwa sasa, kiwango cha mawasiliano cha Universal Chiplet Interconnect Express (UCI) kinafanya kazi kama vile Peripheral Component Interconnect Express (PCI), ambayo hutumiwa kuunganisha vifaa mbalimbali vya pembeni kama vile diski ngumu au kadi za picha kwenye seti ya chips ya processor katika PC. UCIe inasaidiwa na watengenezaji wa chip kama vile AMD, ARM, Intel, Google Cloud, Meta, Microsoft, Qualcomm, na Samsung, pamoja na TSMC, ambayo ni mtengenezaji mkubwa wa mkataba wa semiconductors ulimwenguni. Kama mbadala, Open Compute Project (OCP) imeanzisha kiwango cha Bunch of Wires (BoW). OPC inajumuisha waendeshaji wa vituo vikubwa vya data kama vile Google, Meta, na Microsoft. "Kama ilivyoelezwa katika ripoti ya utafiti wa hivi karibuni, ""kiwango cha chip kwa ajili ya magari ni iliyoundwa kwa ajili ya kubadilishana kiasi kikubwa sana cha data,"" anasema Andy Heinig, Group Manager System Integration katika Fraunhofer Taasisi ya Integrated Circuits IIS katika Dresden." "Kwa matumizi ya magari, hata hivyo, interfaces za ziada za analog zinahitajika ili kuweza kukusanya, kwa mfano, rada kutoka kwa chips tofauti. "" Pamoja na OEMs na wauzaji, watafiti wa IIS wanakusudia kuendeleza kiwango ambacho ni maalum kwa matumizi katika magari." Ingawa kiwango bado haijaanzishwa, ni wazi kwa Heinig kwamba chipsets itacheza jukumu muhimu katika magari katika siku zijazo: Kuendesha gari kwa kujitegemea hasa inahitaji kiasi kikubwa cha nguvu ya usindikaji, ingawa mahitaji halisi yatategemea sana kiwango cha automatisering inayolenga. "Kama vile, ""Manufacturers inaweza kubuni elektroniki optimally kwa ajili ya mifano yao binafsi au kwa ajili ya aina mbalimbali ya vifaa kwa kutumia chipsets."" - Andy Heining, Group Manager System Integration katika Fraunhofer Taasisi ya Integrated Circuits." Profesa Steffen Paul, mkuu wa Kikundi cha Kazi cha Elektroniki ya Mawasiliano katika Chuo Kikuu cha Bremen, anachunguza jinsi mfumo kama huo wa gari unaweza kuonekana pamoja na washirika wa mradi wa viwanda na kitaaluma. "Kama yeye pia anasisitiza: ""Chiplets inamaanisha kwamba miundo ya mfumo inaweza kubadilishwa kwa urahisi kulingana na mahitaji ya magari,"" timu yake inaonyesha hii kwa kutumia mfano wa rada ya 77 GHz kwa kuendesha gari kwa kujitegemea." Analog sehemu imegawanywa katika chiplets kadhaa, ambayo kazi wote kama oscillator na kama transmitter-mpokeaji, na ni makazi juu ya silicon interposer. Kulingana na idadi inayohitajika ya antena, chipsets mbili au nne za transceiver zimeunganishwa katika mfumo. Sehemu ya digital ambayo mchakato ishara inaweza kuwa na hadi nane chiplets - kulingana na utata wa algorithms tathmini kutumika. Mbali na kubadilika zaidi kunakofikiriwa kwa kuchanganya injini tofauti za hesabu, Profesa Paul anaona faida nyingine katika mbinu ya chiplet: Ulinzi ulioboreshwa wa mali ya akili. <unk>Kugawanya kazi katika vitengo vidogo hufanya iwe vigumu zaidi kwa washindani kuamua jinsi mfumo wa jumla unavyofanya kazi. Aidha, kazi muhimu kama vile encryption inaweza maendeleo tofauti juu ya chiplet <unk> katika eneo la usalama wa juu na kuweka tofauti na maendeleo ya mantiki iliyobaki, <unk> anaelezea mtaalam. "Chiplets zinatumiwa sasa katika masoko kama vile vituo vya data, vifaa vya rununu, mitandao, na kuhifadhi,"" anasema Tom Hackenberg, Mchambuzi Mkuu wa Kompyuta na Programu katika kampuni ya ushauri wa teknolojia ya Yole Intelligence." <unk>Kwa kuibuka kwa processors nguvu heterogeneous katika mifumo ya msaada dereva, hata hivyo, wao ni kuwa sababu muhimu katika mifumo ya baadaye ya elektroniki katika magari. Hiyo ni kwa nini wazalishaji wengi wa chip ya gari kusaidia standardization ya chiplet. Kwa mara nyingine tena, moja ya Gordon Moore's utabiri inaweza kuwa hit bullseye. "Msemo huu ulichapishwa kwa mara ya kwanza katika jarida la Porsche Engineering Magazine, toleo la 1 2023, na picha za Christian Buck, Oriana Fenwick, na picha zote, video na faili za sauti zilizochapishwa katika makala hii zina haki za uchapaji.""" Uzalishaji wa jumla au sehemu hauruhusiwi bila idhini ya maandishi ya Dk. Ing. H.C.F. Porsche AG Tafadhali wasiliana na email@example.com kwa habari zaidi.