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# Positive & Negative Logic Notes | EduRev

## Electrical Engineering (EE) : Positive & Negative Logic Notes | EduRev

The document Positive & Negative Logic Notes | EduRev is a part of the Electrical Engineering (EE) Course Digital Electronics.
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## Negative Logic

In Digital Electronics it is usual to explain the operation of a circuit theoretically in terms of 1 and 0, but the actual gates are really just specialised analogue circuits. As explained in Module 3.3, the outputs normally thought of as 1s and 0s are really ranges of voltage and current, 1 and 0 are no more than convenient names given to these voltages and currents. It is also usually assumed that logic 1 refers to the higher of the two voltage ranges − but that need not be so! Also logic 1 is normally the active state of an output, and logic 0 is the inactive state, but this is not always what is required.

The source current available from an open collector gate output when it is at logic 1 is very small, compared to the current the gate will sink when its output transistor is turned on, giving an output of logic 0.

It is quite reasonable therefore, to drive some output device, such as a lamp or relay for example, using the higher current available from a logic 0 output, as shown in Fig. 3.4.4.

In negative logic it is assumed that the active state is the low voltage state and that this is called logic 1. What this does to the familiar truth tables used in positive logic is to replace all the logic 1s (previously assumed to be the active state) with logic 0s and vice versa.

The effect of this reversal of logic states can be seen in Table 3.4.1. The X column for the positive AND gate is as would be expected; a logic 1 when both A and B are 1, otherwise logic 0s. However using negative logic on the same physical AND gate, simply swapping the 1s and 0s in both the input and output columns has changed the X output column from three 0s and a 1, to three 1s and a 0, so that X = 1 whenever A or B is 1. The AND gate has been transformed to an OR gate!

Using negative logic will change the function of any of the six two input logic gates, if you want to see what happens, try re-writing the truth tables for AND, OR, NAND, NOR, XOR, and XNOR in a similar manner to Table 3.4.1. However, negative logic is not widely used and so unless a logic circuit is actually described as using negative logic, it can be assumed that positive logic is being applied.

## Negative Logic and the Wired OR Circuit

Fig. 3.4.5 shows how the wired AND circuit shown in Fig. 3.4.2 is made to work as the wired OR in Fig. 3.4.3. The only physical change is that the two AND gates have been replaced by two NAND gates; this has the effect of inverting the inputs of the ‘invisible’ wired AND gate. According to,De Morgan's Theorem, this has the effect of converting an AND gate into a NOR gate.

To implement negative logic however, and change the invisible AND gate to an OR gate, both the inputs and the outputs must be inverted, changing all the 1s to 0s and 0s to 1s. The inversion ‘bubble’ is shown at the output of the wired OR gate because the active state of the output is chosen to be the low voltage output normally called the logic 0 inactive state, but now using negative logic as shown in Fig. 3.4.5, the low voltage output is considered to be the ‘active logic 1’ state using negative logic.

If positive logic is used however, and logic the low voltage output from the invisible wired AND gate called the inactive logic 0 state, the output of the wired gate is logic of the circuit is that of a wired NOR gate.

## Buffers

Buffers in digital electronics are special gates inserted between one circuit and another to reduce any unwanted interaction between the two. The gates in buffer ICs typically have high impedance inputs and low impedance outputs, giving larger fan out factors than standard gates. Another common use is to enable a logic circuit having a low voltage and/or low current output to drive a circuit or output device requiring higher voltage or current than is available for standard logic ICs.

## Open Collector Buffers

Typical ICs using buffered output gates are shown in Fig. 3.4.6. Buffered inverters and non-inverters are common, but there are also gates with other logic functions that have buffered outputs, including some open collector gates, such as the74HC03 Quad 2 input NAND with open drain from  NXP Semiconductors.

Open collector buffers such as the  SN74LS06 Hex inverter buffer/driver IC, and the non-inverting buffer SN7407 from Texas instruments, allow devices such as lamps, motors and relays for example, that normally require higher currents and voltages, to be driven directly from a low voltage logic circuit.

Fig 3.4.6 Open Collector/Drain Buffer ICs

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## Digital Electronics

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