Information about and access to available third party content are provided via a primary service provider programming guide. A primary service provider may allow its customers/subscribers to access third party content through the systems of the primary service provider upon selection of a given third party content item from the primary service provider programming guide. The third party content may be provided as a full screen overlay over content presently being displayed and viewed from the primary service provider, or the third party content may be provided via a picture-in-picture inset either on the full screen or inside the displayed programming guide. Third party content offered via the primary service provider programming guide may be based on a recommendation of content in view of preferences and profile information for the customer/subscriber.

With the advent of video distribution systems, it has become possible to deliver video content over Internet protocol (IP) to a variety of devices such as IP set-top boxes and associated television systems, mobile devices (telephones, tablet computers, laptop computers, etc.), smart televisions, and the like. In a typical setting, content service providers, such as cable television service providers or other television content service providers may provide a programming guide for presenting information about available content and for allowing customers/subscribers to select available content from the programming guide for display and viewing.
Oftentimes, third party service providers allow customers/subscribers of a primary service provider to access third party content via the systems of the primary service provider. For example, a cable television service provider may allow its customers/subscribers to access and consume content from a third party news service, sports entertainment service or video service through the systems of the cable television service provider by providing the customer/subscriber links to the content of the third party service provider such that selection of the links allows the customer/subscriber to access the third party content from the primary service provider systems. A significant drawback to such third party access, however, is an inability of the customer/subscriber to see available third party content in the same programming guide as offered by the primary service provider. In addition, once a customer/subscriber does access a given third party content item, the customer/subscriber typically is navigated away from the primary service provider content and/or programming guide which gives a less integrated and less satisfactory experience.
It is with respect to these and other considerations that the present invention has been made.

Providing third party content information and third party content access via a primary service provider programming guide


The present invention provides a pipelined computer which processes variable-length data without using branch instructions for speedy execution of a variable-length data-handling software instruction. Upon receiving a variable-length data-handling instruction from an instruction supply unit 1, an instruction division unit 2 divides the instruction into a plurality of derived micro instructions that handle fixed-length data. A reservation station 5 sends the derived micro instructions to an execution unit 6 and a redundant instruction detection unit 9 in a sequence in which the derived micro instructions were generated during the division. The redundant instruction detection unit 9 monitors the remaining derived micro instructions. An instruction deletion control unit 8 deletes redundant micro instructions in the reservation station 5. An instruction end operation unit 7 sets the state of the redundant derived micro instructions in the reorder buffer 4 to xe2x80x9cexecution completed statexe2x80x9d.

The present invention relates to a pipelined computer, and more particularly to a pipelined computer executing variable-length data-handling instructions.
One of the known techniques for this is, for example, a method for executing load instructions repeatedly to implement variable-length data-handling instructions while checking data lengths on a micro instruction level. For example, assume an instruction pipeline such as the one shown in FIG. 8.
An instruction supply unit 1 analyzes a software instruction fetched from main storage or instruction cache memory (not shown in the figure) and supplies a micro instruction corresponding to the software instruction. At this time, the instruction supply unit 1 appends an identifier (hereafter called xe2x80x9cmicro tagxe2x80x9d) to the micro instruction to identify it.
A register rename unit 3 checks if there is a register hazard (conflict) between the micro instruction sent from the instruction supply unit 1 and the preceding micro instructions. If necessary, the register rename unit 3 renumbers the resource register (register renaming) to prevent the register hazard.
A reorder buffer 4 stores therein the micro instructions sent from the register rename unit 3 until execution of the stored micro instructions are completed. The reorder buffer 4 also has two fields for each stored micro instruction: one is a field where the execution result of the stored micro instruction is stored and the other is a field where a flag indicating whether the execution of the stored micro instruction is completed is stored. Based on the contents of the execution completion field, the execution results of the completed micro instructions are written into software visible registers in the order in which the execution results were stored in the buffer (hereinafter, this write processing is called xe2x80x9cgraduatexe2x80x9d). Upon completion of storing the execution result into the software visible register, the registered entry is released and the processing of the micro instruction is completed.
A reservation station 5 stores therein the micro instructions sent from the reorder buffer 4. A check is made for the resources to be used by the micro instructions in the buffer. Micro instructions whose resources are made available are sent sequentially to an execution unit 6 for execution. That is, from the reservation station 5, the micro instructions are sent to the execution unit 6 for execution, not in the order in which they were issued, but in the order in which required resources are made available.
The execution unit 6 executes a micro instruction received from the reservation station 5. When the execution of the micro instruction is finished, the execution unit 6 sends the execution result and execution completion notification to the reorder buffer 4 to inform that the micro instruction has been completed.
FIG. 9 is the timing diagram of the instruction pipeline shown in FIG. 8. In the description below, assume that the system comprises one load/store unit, one register operation unit that performs register-to-register operation, and one branch unit. Assume that, from the time the instruction is fetched from memory to the time the execution result of the instruction is written into reorder buffer 4, the load store unit requires nine stages, the register operation unit requires seven stages, and that the branch unit requires six stages. Also assume that up to four instructions may be stored in the reorder buffer 4 at the same time and that up to four instructions may be graduated from the reorder buffer 4.
In FIG. 9, a micro instruction loads data from memory while calculating the data length. Each time the load instruction (load) loads data from memory, the subtraction instruction (sub) subtracts the length value of xe2x80x9c8xe2x80x9d from the data length to calculate the remaining data length. The branch instruction (bra) checks this remaining data length and, when it becomes xe2x80x9c0xe2x80x9d or smaller, ends the variable-length data processing and executes a branch. This operation is repeated for the maximum length of variable-length data. The and instruction is used to wait for the condition to be satisfied.
The four micro instructions fetched in T1 are register-renamed in T2 and stored in the reorder buffer 4 in T3. The micro instructions are stored in the reservation station 5 in T4 and then sent to the execution unit 6 in T5. The bra instruction at instruction (3) is put in the wait state in the reservation station 5 to check the execution result of the preceding sub instruction at instruction (2). In T6, when the execution result of the sub instruction at instruction (2) is determined, the bra instruction is sent to the branch unit.
When the bra instruction at instruction (3) sent to the branch unit detects that the operation result of the sub instruction at instruction (2) is xe2x80x9c0xe2x80x9d, it fetches an instruction at the branch destination in T8. The and instruction at instruction (7), which is the instruction at the branch destination, is fetched in T8 and graduated in T15.
Because the conventional method described above performs data processing while checking the data length with the use of micro instructions, there are more pipe stages as the operation clock speed increases. Therefore, when a branch is xe2x80x9ctakenxe2x80x9d, it takes long to fetch the target instruction at the destination address. This means that, even if the operation clock speed is increased, the instructions require more clocks if there are many branch instructions, making it difficult to enhance instruction performance in proportion to the clock speed.
The present invention seeks to solve the problems associated with the prior art described above. It is an object of the present invention to provide a pipelined computer which is capable of handling variable-length data without having to use branch instructions and which increases the speed of a variable-length data-handling software instruction.
According to one aspect of the present invention, the pipelined computer according to the present invention comprises an instruction division unit which divides a variable-length data-handling instruction into a predetermined number of fixed-length data-handling instructions; and an execution unit which executes said fixed-length data-handling instructions, received from said instruction division unit, in a sequence of generation during the division.

Pipeline computer dividing a variable-length data-handling instruction into fixed-length data-handling instructions


An apparatus for scrubbing and mopping a surface, comprising in combination, a scrub brush, including a supporting block and bristles carried by the block, to project toward the surface for scrubbing that surface; the first structure for attaching an elongated handle to the block to extend in a first direction from the block; and second structure for attaching a mop to the block, with mop strands extending in generally parallel relation with that surface and in mopping contact therewith, as the bristles project to simultaneously engage that surface, for simultaneous mopping and scrubbing of that surface, as the handle extends at an angle to the surface to displace the block, bristles and mop parallel to the surface.

This invention relates generally to treatment such as cleaning of surfaces, and more particularly, to improvements in apparatus for scrubbing and mopping of surfaces by force application, as via an elongated handle.
Many surfaces to be cleaned contain interstices, cracks or crevices, in which dirt particles become embedded, or otherwise build up. Examples are cracks between tiles forming tiled surfaces, cracks and crevices in marble, clay, concrete, or synthetic material flooring, and surface interstices in many different types of floors. It is extremely efficient to remove such embedded or built up dirt particles using conventional mopping apparatus and/or procedure. It becomes necessary to scrub such surfaces, using a brush or brushes having bristles that can reach and remove the embedded soil or dirt particles.
In the past, it was known to provide for scrubbing and mopping of floor surfaces, using elongated handled equipment; however, such equipment lacked the unusually advantageous improvements in structure, functions and results, as are now enabled and produced by the present invention, and meeting needs for improved and more effective use and operation, as will appear.


Memory device is described that utilizes a reduced number of sense amplifiers to sense the data bits of a selected column page. The sense amplifiers are multiplexed and the read data values latched, allowing the sense amplifiers to sense the next set of data lines from the selected column page before the currently latched values have been read out. A specialized decoder and a latch control circuit allows there to be no gaps or latencies while reading data from the memory due to reloading the read latches or in multiplexing the sense amplifiers. The design allows there to be no gaps or latencies while reading data from the memory due to reloading the read latches or multiplexing the sense amplifiers to sense a following set of data bit lines.

Memory devices are typically provided as internal storage areas in the computer. The term memory identifies data storage that comes in the form of integrated circuit chips. There are several different types of memory used in modern electronics, one common type is RAM (random-access memory). RAM is characteristically found in use as main memory in a computer environment. RAM refers to read and write memory; that is, you can both write data into RAM and read data from RAM. This is in contrast to ROM, which permits you only to read data. Most RAM is volatile, which means that it requires a steady flow of electricity to maintain its contents. As soon as the power is turned off, whatever data was in RAM is lost.
Computers almost always contain a small amount of read-only memory (ROM) that holds instructions for starting up the computer. Unlike RAM, ROM cannot be written to. An EEPROM (electrically erasable programmable read-only memory) is a special type non-volatile ROM that can be erased by exposing it to an electrical charge. EEPROM comprise a large number of memory cells having electrically isolated gates (floating gates). Data is stored in the memory cells in the form of charge on the floating gates. Charge is transported to or removed from the floating gates by specialized programming and erase operations, respectively.
Yet another type of non-volatile memory is a Flash memory. A Flash memory is a type of EEPROM that can be erased and reprogrammed in blocks instead of one byte at a time. A typical Flash memory comprises a memory array, which includes a large number of memory cells. Each of the memory cells includes a floating gate field-effect transistor capable of holding a charge. The data in a cell is determined by the presence or absence of the charge in the floating gate. The cells are usually grouped into sections called "erase blocks." Each of the cells within an erase block can be electrically programmed in a random basis by charging the floating gate. The charge can be removed from the floating gate by a block erase operation, wherein all floating gate memory cells in the erase block are erased in a single operation.
Both RAM and ROM random access memory devices have memory cells that are typically arranged in an array of rows and columns. During operation, a row (page) is accessed and then memory cells can be randomly accessed on the page by providing column addresses. This access mode is referred to as page mode access. To read or write to multiple column locations on a page requires the external application of multiple column addresses. To increase access time, a burst mode access has been implemented. The burst mode uses an internal column address counter circuit to generate additional column addresses. The address counter begins at an externally provided address and advances in response to an external clock signal or a column address strobe signal.
Two common types of Flash memory array architectures are the "NAND" and "NOR" architectures, so called for the logical form in which the basic memory cell configuration arranged in each. In the NOR array architecture, the floating gate memory cells of the memory array are arranged in a matrix. The gates of each floating gate memory cell of the array matrix are coupled by rows to word select lines (word lines) and their drains are coupled to column bit lines. The source of each floating gate memory cell is typically coupled to a common source line. The NOR architecture floating gate memory array is accessed by a row decoder activating a row of floating gate memory cells by selecting the word line coupled to their gates. The row of selected memory cells then place their stored data values on the column bit lines by flowing a differing current if in a programmed state or not programmed state from the coupled source line to the coupled column bit lines.
A NAND array architecture also arranges its array of floating gate memory cells in a matrix such that the gates of each floating gate memory cell of the array are coupled by rows to word lines. However each memory cell is not directly coupled to a source line and a column bit line. Instead, the memory cells of the array are arranged together in strings, typically of 8 to 16 each, where the memory cells in the string are coupled together in series, source to drain, between a common source line and a column bit line. The NAND architecture floating gate memory array is then accessed by a row decoder activating a row of floating gate memory cells by selecting the word select line coupled to their gates. In addition, the word lines coupled to the gates of the unselected memory cells of each string are also driven. However, the unselected memory cells of each string are typically driven by a higher gate voltage so as to operate them as pass transistors and allowing them to pass current in a manner that is unrestricted by their stored data values. Current then flows from the source line to the column bit line through each floating gate memory cell of the series coupled string, restricted only by the memory cells of each string that are selected to be read. Thereby placing the current encoded stored data values of the row of selected memory cells on the column bit lines.
A synchronous DRAM (SDRAM) is a type of DRAM that can run at much higher clock speeds than conventional DRAM memory. SDRAM synchronizes itself with a CPU's bus and is capable of running at 100 MHZ or 133 MHZ, about three times faster than conventional FPM (Fast Page Mode) RAM, and about twice as fast EDO (Extended Data Output) DRAM and BEDO (Burst Extended Data Output) DRAM. An extended form of SDRAM that can transfer a data value on the rising and falling edge of the clock signal is called double data rate SDRAM (DDR SDRAM, or simply, DDR). SDRAM's can be accessed quickly, but are volatile. Many computer systems are designed to operate using SDRAM, but would benefit from non-volatile memory. A synchronous Flash memory has been designed that allows for a non-volatile memory device with an SDRAM interface. Although knowledge of the function and internal structure of a synchronous Flash memory is not essential to understanding the present invention, a detailed discussion is included in U.S. patent application Ser. No. 09/627,682 filed Jul. 28, 2000 and titled, "Synchronous Flash Memory."
Memory devices generally have a minimum read latency time that a requesting device must wait after sending the memory device the row and column address before the data is available to be read. This minimum latency is typically due to the time required by the sense amplifiers to read the data values from the memory array that has been selected by the row and column address decoders. Additionally, other delay components are also incorporated in the minimum read latency. These are typically due to such items as the delay of the column address decoding and coupling the sensed data to the external data lines through the data buffer. As these other delay components are typically small, it is common practice to equate the minimum read latency to the minimum sensing time of the sense amplifiers of the memory device.
To minimize read latency for burst accesses and/or subsequent read requests, which will often occur within the same selected row or column "page", memory devices will typically sense all the data bits of a selected column page at once. This is generally accomplished by incorporating a large number of sense amplifiers into the memory device, allowing all the data bits of the selected column page to be read in parallel. Because of the large number of sense amplifiers, a large data bus is usually also incorporated to couple the sense amplifiers to the memory array and to the internal data buffer of the memory device. The large number of sense amplifiers and large internal data bus to pre-read the other data words of the column page are particularly important for the operation of memory devices capable of burst mode access, where sequentially addressed data words are read from the memory device on each following clock cycle after the initial request and the read latency delay.
The large number of sense amplifiers and their coupled internal memory bus can significantly increase the circuit space requirements of the memory device on the integrated circuit substrate that it is manufactured on. Generally, the larger the space required for an integrated circuit design the fewer the number of copies of the design can be placed on a substrate wafer as it is processed and later "diced" into individual "dies," each die having a single circuit copy on it. This lowers the typical device yield of a substrate wafer, defined as the number of unflawed devices produced from a substrate wafer, by increasing the probability of a given device containing a flaw due to the larger die size. The reduced number of dies that are yielded from a substrate wafer and the increased odds of any single die containing a flaw have the effect of increasing the production cost of the resulting memory device.
Additionally, the increased number of simultaneously active sense amplifiers in an individual memory device also increases the amount of power consumption of the device by increasing the amount of current required while it is engaged in a read operation. The increased current consumption of the memory device increases the inherent level of electronic noise that is seen internal to the memory device and externally in the circuitry that surround it, increasing the probability of a noise induced read or logic error. The noise levels of a memory device often require the designer to utilize higher voltages to operate the circuit and mitigate the possibility of such an error, further increasing device power consumption and possible device feature sizes.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for alternative circuits and methods of reading memory arrays that minimize the number of sense amplifiers and the size of the internal data bus.

This patent is subject to a terminal disclaimer.

Memory decoder and data bus for burst page read


A BBQ or fireplace lighter, including a child resistant device to prevent operation by children, and in particular, small children. In one embodiment, the device is in the form of a pivotally mounted lever having a notch engaging a plate in the trigger, locking the trigger from operation. The trigger release mechanism includes a button extending out of the lighter housing immediately behind the trigger guard for operation by a finger while the trigger is operated by the index or another finger. A second embodiment is comprised of a trigger guard plate having a thumb tab extending out of the top of the housing mounted on a rotatable hub. The guard plate engages and obstructs operation of the trigger. A spring biases the guard plate against the trigger to prevent operation, but can be rotated out of the way by rotating the thumb tab to a stop position moving trigger guard plate out of engagement of the trigger, allowing operation of the BBQ or fireplace lighter. A third embodiment has a button extending out the top of the housing with a stop disk engaging a keyhole slot in the trigger preventing operation until the button is pushed down.

1. Field of the Invention
This invention relates to disposable barbecue (BBQ) and fireplace lighters and more particularly, relates to child resistant safety devices for such lighters.
2. Background Information
There are a variety of disposable BBQ and fireplace lighters presently available on the market. These devices generally have a reservoir containing an ignition fluid in the handle, and generate electric spark to ignite the fluid which turns into a gas at a nozzle tip into a flame when a trigger is operated. An electrical spark is usually created by a piezoelectric cartridge, or similar device in the handle of the lighter.
These lighters have an elongate handle and nozzle to keep the flame well away from the user. The elongate construction allows the user to safely use the flame to ignite BBQs, fireplaces, etc. without getting near the flame. Unfortunately, these devices have the appearance of a toy to children who could accidentally start a fire, or injure themselves by improper use.
To ignite the flame, the trigger is operated, allowing ignition fluid such as propane to flow to the nozzle tip. Almost simultaneously, as the trigger reaches the end of its travel, a spark is generated by a piezoelectric cartridge and the ignition fluid erupts into a flame at the tip of the nozzle. A regulator is usually provided to regulate the size of the flame by regulating the flow of ignition fluid. The flame is then conveniently used to ignite a BBQ, fireplace, candles, etc., or any other place where a match would be used.
Various attempts have been made to incorporate child resistance into BBQ lighters and similar devices, such as cigarette lighters and the like. They are usually in the form of devices which prevent the flow of ignition fluid, or lock the trigger. The purpose of these devices is making them convenient to use, while at the same time, providing sufficient resistance to prevent or to deter use by children. Locking the trigger is somewhat effective, but children can often "solve the riddle", and easily unlock the trigger. Also, a user must remember to relock the trigger after use, which is another inconvenience.
Therefore, it is one object of the present invention to provide a BBQ and fireplace lighter with improved child resistance safety device.
Yet another object of the present invention is to provide a BBQ and fireplace lighter with a trigger release button that automatically relocks the trigger when released.
Another object of the present invention is to provide a trigger release button behind the trigger, for easy operation with one hand.
Yet another object of the present invention is to provide a trigger release button that is pushed up with the middle finger to release the trigger, allowing operation by an index finger.
Still another object of the present invention is to provide a BBQ or fireplace lighter having a trigger release button that is simple and easy for adults to operate, but difficult for manipulation by children.
Yet another object of the present invention is to provide a BBQ or fireplace lighter having a trigger release button with a trigger engaging abutment and an integrally formed leaf spring holding a abutment in engagement with the trigger.
Still another object of the present invention is to provide BBQ or fireplace lighter having a trigger release lever that includes a guard plate, blocking operation of the trigger.
Yet another object of the present invention is to provide a BBQ or fireplace lighter having a trigger release lever with a thumb tab to swivel a blocking trigger guard plate away from the trigger, allowing operation of the lighter.

Child resistant barbecue and fireplace lighter

Unit 1, 11/F, Wah Lai Ind. Centre, 10-14 Kwei Tei Street


An oral dosage form, including 65 mg of minocycline, an amount of lactose monohydrate, and an amount of hydroxypropylmethylcellulose. The hydroxypropylmethylcellulose is hydroxypropylmethylcellulose that is about 8.9+/−0.2% hydroxypropoxylated. An oral dosage form, including 115 mg of minocycline, an amount of lactose monohydrate, and an amount of hydroxypropylmethylcellulose. The hydroxypropylmethylcellulose is hydroxypropylmethylcellulose that is about 8.9+/−0.2% hydroxypropoxylated.

1. Field of the Invention
The present disclosure relates to certain low dose forms of weight-based dosing of minocycline, preferably minocycline hydrochloride, in a slow, continuous or extended release delivery vehicle to form oral dosage units that provide for the effective treatment of acne with reduced or almost negligible side effects. The present disclosure also relates to the method for treating acne with reduced or almost negligible side effects by the use of such dosage forms based on a person's weight.
2. Description of the Related Art
Acne affects large patient populations, and is a common inflammatory skin disorder that usually localizes in sebaceous areas of the body, including on the face, back and chest.
Oral tetracycline-class antibiotics are frequently used in the treatment of acne. Tetracycline-class antibiotics are known to have some side effects. These side effects include vestibular side effects or symptoms such as vertigo, dizziness or blurred vision. These effects are sometimes disabling. See, Gould & Brookler, Arch. Otolarang. Vol. 96, p. 291 (1972); Williams et al., Lancet, Sep. 28, 1974, p. 144-45; Fanning & Gump, Arch. Intern. Med., Vol. 136, pp. 761-62 (1976). Headache and general malaise, along with gastrointestinal symptoms such as the diarrhea, nausea, gas, or cramps, may also occur. Dry nose and dry mouth are also occasionally encountered.
One oral tetracycline-class antibiotic used in the treatment of acne is minocycline hydrochloride. Oral dosage forms of minocycline hydrochloride are available commercially under various trade names.
The dosing schedule used most frequently for treating acne using currently available immediate-release oral dosage forms is 100 mg of minocycline (free base equivalent) administered twice daily, see Leyden, J. Cutis 2006; 78 (suppl 4):4-5. However, some patients experience adverse effects with currently available immediate-release oral dosage forms, leading to reduced rates of patient compliance. See Stewart, M. et al., Cutis 2006; 78 (suppl 4):11-20.
Although the development of slowly dissolving forms of minocycline hydrochloride was a significant advance in the art, there remains a long-felt need for treatments that are effective in suppressing acne but are associated with fewer adverse effects than those associated with the various oral dosage forms of minocycline hydrochloride. Such a need is addressed in the present assignees corresponding pending applications that address weight based dosing, as well as certain commercial 45/90/135 mg dose forms.

Method for the treatment of acne and certain dosage forms thereof


A cloud file event server transmits file events necessary to synchronize a file system of a file share client. A tree queue director circuit receives file events and stores each one into a tree data structure which represents the hierarchical paths of files within the file share client. An event normalization circuit sorts the file events stored at each node into sequential order and moots file events which do not have to be performed because a later file event makes them inconsequential. A thread scheduling circuit assigns a resource to perform file events at a first node in a hierarchical path before assigning one or more resources to a second node which is a child of the first node until interrupted by the tree queue director circuit or until all file events in the tree data structure have been performed.

The present invention concerns backup and restore operations in a network based service, ie. a plurality of apparatus in a cloud coupled to agents controlling client processors. Because of network transmission of packets, the parts of files being restored do not necessarily arrive in convenient order and may be more efficiently delivered as bulk aggregations of parts from unrelated files.
Conventionally, a series of events is recorded in non/-transitory computer readable storage, in an embodiment, ADD, REMOVE, MODIFY, and RENAME. Each event has a watermark too, which requires committing in the watermark order, yet restoring the actual files to disk and retrieving the parts over a network doesn't necessarily have to be in the order of commitment.
Problem: How do you intelligently restore file events with threads controlling a processor, without having the threads conflict?
A cloud file event server is communicatively coupled through intermittent channels to a plurality of file share clients. The cloud file event server stores the superset of all files among the file share clients. Although in a degenerate case a client may have a set of files which are not shared with any other client, a common and more useful configuration occurs when there are a plurality of clients which share a set of files but which may be divergent from one another due to unilateral file events. These file events are uniquely watermarked and may be ordered in sequence. The conventional solution for resynchronizing a file share client with a cloud file event server is to download those file events missing from the file share client and transform the file system of the file share client in watermark order. The user experience however of single threaded operation could be improved.
What is needed is a way to use multi-threaded resources to transform a file system of a file share client without conflict, deadlock, file corruption, data loss, and with improved performance.

Organizing file events by their hierarchical paths for multi-threaded synch and parallel access system, apparatus, and method of operation


A method, apparatus, and means for silently customizing software within a multi-platform environment. A software grouping is copied from a control server to a software source server and de-serialized. The software grouping is customized by the control server passing user information to the software source server, where the information is then stored in a response file inside of the software grouping. The response file is then used to remotely customize the installation of the software grouping on workstations.

1. Field of the Invention
The present invention relates generally to a method and apparatus for remotely customizing the installation of software on a computer system from a second computer system running a different operating system.
2. Description of Related Art
Typically, to install products that require custom user information, users must install the product on each machine, and then, after the installation, provide the user information to the product through some type of interface. This procedure is problematic for customers with many systems that require identical information because they have to manually launch and interact with interfaces on every system they install. Additionally, while some current programs allow remote installation, those machines must be running the same operating system for the remote system to be able to customize the installation.
A typical business computer configuration would include a computer system running the Windows operating system, connected to a series of HP-UX systems running the Unix operating system. The HP-UX operating system uses Software Distributor as its standard method for packaging and installing software. Software Distributor packages can only be built on HP-UX systems, can be converted to a single binary file, and cannot accept any user input during the installation process.
Software Distributor has four levels of software grouping: bundle, product, subproduct, and fileset. The basic unit of software distribution is the product. A product can contain both subproducts and filesets. Filesets are the atomic units of software distribution, and they contain a set of files and control scripts. Subproducts contain filesets and are used to conveniently manage logical subsets of a single product. Bundles are collections of products or filesets that may be installed as a unit. A depot is a collection of one or more bundles and or products.
To install a software grouping via Software Distributor on to the HP-UX systems, the user would have to log on to each of the HP-UX systems, install the software grouping, customizing each installation the same way on each system. There is not currently a supported way to customize a Software Distributor software grouping from an operating system other than HP-UX.
Customers can customize a Software Distributor bundle after it is installed. This is typically achieved by including documentation with the software product that instructs the user to fill out a configuration file or run an interactive script after the installation completes. This is problematic because customers may not read the documentation so they will not know to perform the configuration steps. This is also problematic and error-prone for customers who install the software on many systems because they have to spend a lot of time entering the same information over and over again on every system that is installed.
Software Distributor's "swask" command can be used to customize a Software Distributor bundle before it is installed. Unfortunately, its use is discouraged because the Software Distributor's user interface does not support the command. To customize software groupings this way, users have to know about this obscure Software Distributor command and understand the command-line syntax of Software Distributor commands. Even with use of the "swask" command, the user would have to execute it on a HP-UX machine, not the Windows machine.

Method, apparatus and means for silently customizing software within a multi-platform environment

Hewlett-Packard Development Company, L.P.


A method for programming of a plurality of programmable devices arranged in a JTAG boundary scan chain takes advantage of knowledge of a target system. The method speeds device programming and reduces system memory requirements. Raw data is extracted from high-level files. The raw data is stored in the target system. JTAG boundary scan chain information is coded into device programming software. Alternatively, the JTAG chain information is stored as data in the target system. The device programming software treats JTAG I/O registers of the programmable devices as concatenated shift registers. Data packets are assembled that include, for example, a byte of programming information, for each of the devices. The packets are shifted through into the JTAG chain. Bytes of the packet are aligned with, and loaded into, respective devices. Optionally, the validity of data loaded is checked by comparing it to the stored raw data. Invalid data is reprogrammed.

The invention is related to the art of programmable devices and more specifically to the art of programming programmable devices in-system. The invention will be described in reference to devices that are compliant with "IEEE Standard 1149.1-1990, IEEE Standard Test Access Port and Boundary Scan Architecture", published by the Institute of Electrical and Electronics Engineers and incorporated herein by reference in its entirety. However, those of ordinary skill in the art will understand that the invention can be applied wherever devices can be programmed over a serial chain.
Many devices, such as, for example, complex programmable logic devices CPLDs, microprocessors, micro-controllers, coprocessors, programmable controllers, sequencers, graphics controllers, memories such as DRAMS, SRAMS, EPROMS, serial EPROMS, flash memories, programmable logic devices (PLDs), and field programmable gate arrays (FPGAs) can be programmed in-system via associated JTAG (Joint Test Action Group) ports (see IEEE Standard 1149.1-1990). Many of these devices are based on non-volatile technologies and therefore, need only be programmed or configured once. According to the IEEE Standard 1149.1-1990, multiple devices can be chained through these ports so that a plurality of devices on a JTAG chain can be accessed for programming and validation. This protocol facilitates in-system programming.
In-system programming of devices is preferable to pre-programming of such devices, before they are installed into a system, because of the apparent disadvantages of pre-programming. For example, pre-programming involves more handling steps. Each extra handling step increases the risk of damaging a device, due to, for example, electro-static discharge (ESD), pins bending, and pin breakage. Pre-programming equipment represents increased capital expenditure. Where similar devices are programmed in different ways, pre-programming requires extra steps or procedures to ensure that only devices programmed appropriately are installed in associated locations in the target system. Of course, extra manufacturing steps require extra manpower and, therefore, additional manufacturing costs.
In-system programming eliminates these disadvantages and has additional advantages. At initial power-up, at the end of a target system manufacturing process in a system designed for self in-system programming, an on-board processor can run a JTAG query and determine that associated programmable devices on a JTAG boundary scan chain are blank. The detection of blank devices triggers an automatic programming procedure. Since the devices are already installed in the system and since the programming procedure programs the devices according to their location in the system, it is guaranteed that a device in a given location is programmed or configured with the appropriate information for that location.
One advantage of this procedure is that the devices need only be handled once, to install them in the system. This is in contrast to procedures that rely on pre-programming, wherein devices must be installed in a programming device, removed from the programming device and then installed in very specific locations in the system based on the programming the devices received.
Another advantage of in-system programmability is that devices can be easily reprogrammed even after they are sold and installed out in the field. For example, as will be described in greater detail below, by updating the contents of a non-volatile memory including programming or configuring information used by the programming procedure, the devices can be automatically updated without the need for extra programming equipment and without returning the system to the factory.
Referring to FIG. 1, currently available systems 110 and related techniques for self-programming in-system devices in target systems 112 include using a development tool to generate an industry standard, high level file referred to as a JEDEC file 114. The JEDEC file 114 contains information about how a device is to be programmed or configured. In the case of, for example, CPLDs, a Serial Vector Format (SVF) file 118 is generated from the JEDEC file using a conversion utility. For example, the device manufacturer (e.g. Xilinx) provides a utility called "jtagprog" 122. The SVF file 118 defines how a JTAG TAP controller of a processor 126 is to be manipulated and what data is to be transferred to a device during programming. The SVF file 118 is substantially ASCII text. The SVF file format is useful where in-system programming is done with and external device temporarily connected to a target system 112. In in-system self-programming environments, the information contained in the SVF files would have to be included in the target system 112. However, the ASCII text format of SVF files is not very efficient and would require too many target system resources (e.g. memory or storage space). Therefore, it has become common to compress SVF files to a format called Xilinx Serial Vector Format (XSVF) 130 using another utility. For example, one manufacturer provides a utility called "svf2xsvf" 134 to perform this transformation. XSVF files are in a compressed binary format, which can be more easily stored in target system hardware. Before storage into an EPROM, for example, the XSVF files 130 may be converted into yet another format, such as, for example, Intel Hex. Each device 140 to be programmed in and by the target system 112 must have its own associated XSVF file 130. Therefore, the required storage space can still be prohibitive.
With currently available self programming, in-system technology, a target system processor 126, such as a microprocessor or a micro-controller, then uncompresses or decodes the XSVF file and executes equivalent routines to those of the temporarily connected SVF based external device.
In-system programming or configuration can be triggered by an external demand or could be triggered by some internal event such as hardware power-up and initialization. In order to ensure that devices are programmed correctly, they are often re-programmed at every power-up. This can create a problematic delay in device operation and devices are reprogrammed even when reprogramming is not required. Alternatively, a verification type SVF file can be generated and stored for execution on the target system. However, again due to the memory requirements needed to store these verification SVF files, it is often not practical to store them on the non-volatile memory of the target system and verification is not performed.
One way to verify that the devices in a target system have already been programmed and, therefore, do not need to be programmed is to examine the value stored in a particular location in the device and compare it to a verifying value. For example, many devices include a User Register that can be loaded with a version number, checksum, or other verification or identification information. Whenever an associated value stored in, for example the non-volatile memory of the target system, does not match the value programmed in, for example, the User Register of the programmable device, the programmable device can be selectively reprogrammed. If the value stored in the User Register matches or otherwise correlates to the associated value stored in the non-volatile memory of the target system, the device is determined to have been programmed correctly and re-programming is avoided.
A problem with User Register or similar schemes is that the device might have been partially programmed such that the user register information has been programmed into the device, but the rest of the data was not. In this case, when the device's user register is accessed, its value will match, but the device can be non-functional.
Another problem with currently available self-programming, in-system programming or configuration technology is the time it takes to program each device. For example, in an exemplary target system using an 80C51 microcontroller running at 16 Mhz, it takes approximately 13 seconds to program an XC95144XL CPLD. It is not unusual to find four or more of these devices in a target system. With currently available in-system self-programming technology, the devices are programmed one at a time. So, if a target system includes four devices, it will take approximately 52 seconds to program four devices. This is problematic in a manufacturing environment, for example, because no device testing or other procedures can be performed while device programming or configuration is taking place. In a field environment, where re-programming is used instead of device verification, the user must wait during a boot-up period before being able to use the target system. This can be annoying is some instances, and make the target system unusable in others.
For the foregoing reasons, it has been desired to provide a method of in-system programming or configuration that has a reduce demand on target system resources, improves device programming or configuration speed and provides a method of thorough verification that does not place an undue burden on system resources.

Concurrent in-system programming of programmable devices


A powertrain control apparatus that controls a powertrain including a lock-up clutch, which connects an engine, in which fuel supply may be cut off, directly to an automatic transmission. The control apparatus includes an output unit, a control unit, and a setting unit. The output unit outputs an instruction to lower engagement pressure for the lock-up clutch from a value at which the lock-up clutch is engaged to a value at which the lock-up clutch is disengaged. The control unit resumes the fuel supply to the engine when a predetermined lag time has elapsed since the instruction is output. The setting unit sets the lag time so that the lag time is shorter when a temperature of a combustion chamber of the engine is a first temperature than when the temperature of the combustion chamber of the engine is a second temperature which is higher than the first temperature.

1. Field of the Invention
The invention relates to a powertrain control apparatus and method. More particularly, the invention relates to a powertrain that includes a lock-up clutch that connects an engine directly to an automatic transmission.
2. Field of the Invention
A conventional automatic transmission is connected to an engine via a fluid coupling such as a torque converter. The torque converter transmits the driving force to the transmission through the fluid (e.g., oil) that circulates in the torque converter. Therefore, the rotational speed of the input shaft of the torque converter differs from the rotational speed of the output shaft of the torque converter. This may decrease the efficiency of transmitting the driving force. Accordingly, a lock-up clutch that mechanically connects the input shaft to the output shaft of the torque converter is generally provided.
To improve fuel efficiency, when the vehicle speed is equal to or above a predetermined speed while the vehicle is decelerating, the fuel supply is cut off, that is, fuel injection is stopped. If the vehicle speed decreases to the predetermined speed while the fuel supply is cut off, the fuel injection resumes (i.e., the fuel supply resumes). After the fuel supply resumes, engine speed increases. Therefore, if the lock-up clutch is engaged when the fuel injection resumes, a shock may occur, and drivability may deteriorate, Accordingly, the powertrain is controlled so that the lock-up clutch is disengaged when the fuel supply resumes.
Japanese Patent Application Publication No. 2004-137963 (JP-A 2004-137963) describes a control apparatus for controlling a vehicle during deceleration, which resumes fuel injection after disengaging the lock-up clutch. The control apparatus described in JP-A2004-137963 controls a vehicle in which a lock-up clutch is controlled and fuel supply is cut off when the operation amount of an accelerator pedal is zero to decelerate the vehicle. The control apparatus includes a vehicle-speed detection portion, an accelerator-pedal operation amount detection portion, an initial-value setting portion, a disengagement lag-time measurement portion, a vehicle-speed change portion, a disengagement control portion, a disengagement confirmation portion, and a fuel-supply control portion. The vehicle-speed detection portion detects a vehicle speed. The accelerator-pedal operation amount detection portion detects the operation amount of an accelerator pedal. The initial-value setting portion sets in advance the initial value of a disengagement vehicle speed at which the lock-up clutch is disengaged, on the assumption that a disengagement lag time is long. The disengagement lag time is the lag time between when an instruction signal is output to disengage the lock-up clutch, and when the lock-up clutch is actually disengaged. The disengagement lag-time measurement portion measures the disengagement lag time, when the lock-up clutch is disengaged. The vehicle-speed change portion decreases the set disengagement vehicle speed based on the measured disengagement lag time. The disengagement control portion outputs the instruction signal to disengage the lock-up clutch when the operation amount of the accelerator pedal is zero, and the detected vehicle speed is lower than or equal to the set disengagement vehicle speed. The disengagement confirmation portion confirms whether the lock-up clutch is disengaged. The fuel-supply control portion resumes the fuel supply after the lock-up clutch is actually disengaged.
The described control apparatus sets the initial value of the disengagement vehicle speed on the assumption that the disengagement lag time is long, and decreases the set disengagement vehicle speed as the disengagement lag time decreases. This increases the range of vehicle speed in which the lock-up clutch is engaged when the operation amount of the accelerator pedal is zero. The control apparatus also stops the fuel supply cutoff when the lock-up clutch is actually disengaged. Therefore, it is possible to improve fuel efficiency, to avoid stalling the engine, and to avoid a shock when the fuel supply resumers regardless of the disengagement lag time.
Even if the time required to disengage the lock-up clutch is constant, after the fuel supply resumes, engine speed may increase quickly in some cases, and may not increase quickly in other cases. However, JP-A 2004-137963 focuses attention only on the time required to disengage the lock-up clutch. The time from when the fuel supply resumes until when the engine speed starts increasing is not considered. Therefore, when the fuel supply resumes after the lock-up clutch is actually disengaged as in JP-A 2004-137963, if the engine speed does not increase quickly after the fuel supply resumes, the engine speed may drop, which may cause the engine to stall.


A trash receptacle securing system is provided and comprises a trash receptacle having an open top and a closed bottom. At least one aperture is formed in the closed bottom of the trash receptacle. A weighted mounting base is provided having a top surface and a bottom surface. At least one nub is formed on the top surface of the weighted mounting base with the nub receivable within the at least one aperture and releasably contactable with the closed bottom of the trash receptacle. A foot release pedal moves the at least one nub in a generally outward direction within the at least one aperture and out of contact with the closed bottom of the trash receptacle. Upon activation of the foot release pedal, the trash receptacle is separable from the weighted mounting base.

1. Field of the Invention
This invention relates generally to a trash receptacle securing system and, more particularly, the invention relates to a trash receptacle securing system providing garbage and recycling receptacles together with a specially designed mounting base that maintains the trash receptacle firmly in place.
2. Description of the Prior Art
As useful and necessary as outside garbage and recycling receptacles are, their use does present a couple of drawbacks. Particularly, even when these bins are loaded down with trash and other items, they can easily be knocked over. All it takes is a particularly strong gust of wind to send the container spiraling down the street, its contents sprung free from their confines to litter the landscape. The resulting mess is obviously an unpleasant job for the homeowner, who has to retrieve the rubbish strewn all over the yard and the street. Not only can it be annoying and frustrating to chase down the can and subsequently pick up the mess, but bulky, errant refuse can also present a safety hazard for oncoming traffic. If a car is forced to swerve out of the way of a garbage bag or a collection of empty milk jugs, an accident could possibly result. Outside receptacles are not only susceptible to wind. Large, stray animals searching for a quick meal can easily tip over these containers, sending the lid flying and leaving behind a backyard mess for homeowners. In addition to the risk of errant garbage, the receptacle lid itself can be irretrievably lost, resulting in people having to shell out money for replacement bins.


A multicomponent homogeneous polymer of (a) from about 30 to about 90 wt. % of a N-vinyl lactam, (b) from about 5 to about 30 wt. % of a quaternized and/or non-quaternized aminoalkylacrylic -ester and/or -amide, (c) from about 0.5 to about 30 wt. % of an unsaturated monomer selected from the group consisting of an acrylic ester or amide having a C.sub.4 to C.sub.22 alkyl group, a C.sub.4 to C.sub.22 .alpha.-olefin, a C.sub.4 to C.sub.22 vinyl ether (VE) and a vinyl ester of a C.sub.2 to C.sub.22 carboxylic acid and (d) from about 1 to about 30 wt. % of an unsubstituted acrylic or methacrylic acid and/or an unsubstituted amide of said acrylic or methacrylic acid and optionally, (e) up to 20 wt. % of a mono- or di-functional polysiloxane; all monomers combined to form a 100% polymer composition of randomly distributed monomers for use in personal care formulations, particularly as a hair fixative where the clear, colorless and conditioning film forming properties of the polymer produces a silky, lustrous appearance to the hair and long lasting styling hold.

1. Field of the Invention
This invention is directed to homogeneous N-vinyl lactam polymers of a component system involving at least four monomers in predetermined concentrations and in random distribution in the polymer structure to more uniformly diffuse the individual properties of each monomer.
2. Description of the Prior Art
Many synthetic polymers containing vinyl lactams are employed in hair and skin care applications of the prior art. Patents pertaining to this art are U.S. Pat. Nos. 3,914,403; 3,954,960; 4,039,734*; 4,057,533; 4,210,161; 4,223,009*; 4,586,518; 4,764,363; 4,834,968; 4,842,850; 4,902,499; 4,906,459; 4,923,694*; 4,963,348; 4,983,770; 5011,895; 5,015,708; 5,126,124*; 5,158,762*; 5,275,809*; 5,502,136; 5,523,369; 5,609,836; 5,609,865; WO 91/15186; WO 91/15185; EPA 412704 A2; EPA 412707 A1 and JP 57126409.
* cited in a parent case
In addition to the parent cases of the present application, several U.S. patents disclose the use of a N-vinyl lactam, an alkylaminoalkyl (meth)acrylate or (meth)acrylamide as a polymer suitable for use in pharmaceutical and cosmetic arts, particularly for use in hair spray compositions. These patents are U.S. Pat. Nos. 3,910,862; 4,923,694; 5,045,617; 5,321,110; 5,492,988 and 5,637,296 and of these only U.S. Pat. No. 5,492,988; together with U.S. Pat. No. 5,684,105 and the above parent applications disclose a polymer having a homogeneous structure. However, the homogeneous polymers of the prior art lack the essential fourth monomer unit of the present invention which provides strong hair hold, hair body building and quick drying properties to the hair without sacrificing shine or soft, silky appearance.
The homogeneous polymer structure is achieved only by the method disclosed in said parent applications and in U.S. Pat. Nos. 5,492,988 and 5,684,105 whose teachings are incorporated herein by reference. The homogeneous polymerization process generally comprises monitoring the feed rate of the more active monomer species with the rate of consumption of the less active monomer species.
In accordance with the above discussion, it is an object of this invention to provide a new, clear and colorless polymer of homogeneous structure having additional benefits for cosmetic and personal care formulations.
Another object is to provide a hair body building homogeneous polymer for use in a hair fixative mousse or gel composition which polymer is quick drying and provides a firm but soft film for a more natural appearance.
Another object relates to the ability to adjust the degree of hair body and hold by the use of a clear homogeneous polymer.
Still another object is to provide a polymer having random distribution of monomer units in the polymer so as to substantially and uniformly distribute the properties of the individual monomers throughout the polymer while still maintaining clarity.
These and other benefits and uses of the present invention will become apparent from the following description and disclosure.

Personal care composition containing a clear homogeneous polymer of an N-vinyl lactam


Selected amines are effective for prophylaxis and treatment of diseases, such as angiogenesis mediated diseases. The invention encompasses novel compounds, analogs, prodrugs and pharmaceutically acceptable salts thereof, pharmaceutical compositions and methods for prophylaxis and treatment of diseases and other maladies or conditions involving, cancer and the like. The subject invention also relates to processes for making such compounds as well as to intermediates useful in such processes.

Protein kinases represent a large family of proteins which play a central role in the regulation of a wide variety of cellular processes, maintaining control over cellular function. A partial list of such kinases includes ab1, Akt, bcr-ab1, B1k, Brk, Btk, c-kit, c-met, c-src, CDK1, CDK2, CDK3, CDK4, CDK5, CDK6, CDK7, CDK8, CDK9, CDK10, cRaf1, CSF1R, CSK, EGFR, ErbB2, ErbB3, ErbB4, Erk, Fak, fes, FGFR1, FGFR2, FGFR3, FGFR4, FGFR5, Fgr, flt-1, Fps, Frk, Fyn, Hck, IGF-1R, INS-R, Jak, KDR, Lck, Lyn, MEK, p38, PDGFR, PIK, PKC, PYK2, ros, tie, tie2, TRK, Yes, and zap70. Inhibition of such kinases has become an important therapeutic target.
Certain diseases are known to be associated with deregulated angiogenesis, for example ocular neovascularisation, such as retinopathies (including diabetic retinopathy), age-related macular degeneration, psoriasis, hemangioblastoma, hemangioma, arteriosclerosis, inflammatory disease, such as a rheumatoid or rheumatic inflammatory disease, especially arthritis (including rheumatoid arthritis), or other chronic inflammatory disorders, such as chronic asthma, arterial or post-tumor cells stimulates the growth of blood capillaries and the proliferation of tumor endothelium in a paracrine manner and through the improved blood supply, accelerate tumor growth. Increased VEGF expression could explain the occurrence of cerebral edema in patients with glioma. Direct evidence of the role of VEGF as a tumor angiogenesis factor in vivo is shown in studies in which VEGF expression or VEGF activity was inhibited. This was achieved with anti-VEGF antibodies, with dominant-negative VEGFR-2 mutants which inhibited signal transduction, and with antisense-VEGF RNA techniques. All approaches led to a reduction in the growth of glioma cell lines or other tumor cell lines in vivo as a result of inhibited tumor angiogenesis.
Angiogenesis is regarded as an absolute prerequisite for tumors which grow beyond a diameter of about 1–2 mm; up to this limit, oxygen and nutrients may be supplied to the tumor cells by diffusion. Every tumor, regardless of its origin and its cause, is thus dependent on angiogenesis for its growth after it has reached a certain size.
Three principal mechanisms play an important part in the activity of angiogenesis inhibitors against tumors: 1) Inhibition of the growth of vessels, especially capillaries, into avascular resting tumors, with the result that there is no net tumor growth owing to the balance that is achieved between cell death and proliferation; 2) Prevention of the migration of tumor cells owing to the absence of blood flow to and from tumors; and 3) Inhibition of endothelial cell proliferation, thus avoiding the paracrine growth-stimulating effect exerted on the surrounding tissue by the endothelial cells which normally line the vessels. See R. Connell and J. Beebe, Exp. Opin. Ther. Patents, 11, 77–114 (2001).
VEGF's are unique in that they are the only angiogenic growth factors known to contribute to vascular hyperpermeability and the formation of edema. Indeed, vascular hyperpermeability and edema that is associated with the expression or administration of many other growth factors appears to be mediated via VEGF production.
Inflammatory cytokines stimulate VEGF production. Hypoxia results in a marked upregulation of VEGF in numerous tissues, hence situations involving infarct, occlusion, ischemia, anemia, or circulatory impairment typically invoke VEGF/VPF-mediated responses. Vascular hyperpermeability, associated edema, altered transendothelial exchange and macromolecular extravasation, which is often accompanied by diapedesis, can result in excessive matrix deposition, aberrant stromal proliferation, fibrosis, etc. Hence, VEGF-mediated hyperpermeability can significantly contribute to disorders with these etiologic features. As such, regulators of angiogenesis have become an important therapeutic target.
Schipper U.S. Pat. No. 3,226,394, issued Dec. 28, 1965, describes anthranilamides as CNS depressants. Japanese patent JP2000256358 describes pyrazole derivatives that block the calcium release-activated calcium channel. EP application 9475000, published Oct. 6, 1999, describes compounds as PGE2 antagonists. PCT publication WO96/41795, published Dec. 27, 1996, describes benzamides as vasopressin antagonists. WO01/29009 describes aminopyridines as KDR inhibitors. WO01/30745 describes anthranilic acids as cGMP phosphodiesterase inhibitors. WO00/02851, published Jan. 20, 2000 describes arylsulfonylamnoaryl amides as guanylate cyclase activators. WO98/45268 describes nicotinamide derivatives as PDE4 inhibitors. WO98/24771 describes benzamides as vasopressin antagonists.
U.S. Pat. No. 5,532,358, issued Jul. 2, 1996, describes the preparation of 2-(cyclopropylamino)-N-(2-methoxy-4-methyl-3-pyridinyl)-3-pyridinecarboxamide as an intermediate for HIV inhibitors. Triazine-substituted amines are described for their aggregating ability (J. Amer. Chem. Soc., 115, 905–16 (1993). Substituted imidazolines were tested for their antidepressant activity in Ind. J. Het. Chem., 2, 129–32 (1992). N-(4-Pyridyl)anthranilic amides were described in Chem Abstr. 97:109837 (1981). PCT publication WO99/32477, published 1, Jul. 1999, describes anthranilamides as anti-coagulants. U.S. Pat. No. 6,140,351 describes anthranilamides as anti-coagulants. PCT publication WO99/62885, published 9, Dec. 1999, describes 1-(4-aminophenyl)pyrazoles as antiinflammatories. PCT publication WO00/39111, published 6, Jul. 2000, describes amides as factor Xa inhibitors. PCT publication WO0/39117, published Jul. 6, 2000, describes heteroaromatic amides as factor Xa inhibitors. PCT publication WO00/27819, published May 18, 2000, describes anthranilic acid amides as VEGF inhibitors. PCT publication WO00/27820 published 18, May 2000, describes N-aryl anthranilic acid amides as VEGF inhibitors. 7-Chloroquinolinylamines are described in FR2168227 as antiinflammatories. WO001/55114, published Aug. 2, 2001, describes nicotinamides for the treatment of cancer. WO01/55115, published 2, Aug. 2001, describes nicotinamides for the treatment of apoptosis. WO01/85715, published 15, Nov. 2001, describes substituted pyridines and pyrimidines as anti-angiogenesis agents. PCT publication WO01/85691 published 15, Nov. 2001, describes anthranilic amides as VEGF inhibitors. PCT publication WO01/85671 published 15, Nov. 2001, describes anthranyl amides as VEGF inhibitors. PCT publication WO01/81311 published 1, Nov. 2001, describes anthranilic amides as VEGF inhibitors. However, compounds of the current invention have not been described as inhibitors of angiogenesis such as for the treatment of cancer.

Substituted amine derivatives and methods of use


A fluid-filled bladder for an article of footwear is disclosed that includes a sealed outer barrier and a tensile member. The barrier is substantially impermeable to a fluid contained by the bladder, and the tensile member is located within the barrier and bonded to opposite sides of the barrier. The tensile member defines a flexion area that promotes flexing of a first portion of the bladder with respect to a second portion of the bladder. The flexion area is an area where the tensile member is absent, and the flexion area may have the configuration of a space, aperture, or indentation, for example.

1. Field of the Invention
The present invention relates to a fluid-filled bladder suitable for footwear applications. The invention concerns, more particularly, a fluid-filled bladder having a tensile member with flexion areas that enhance the overall flexibility of the bladder.
2. Description of Background Art
A conventional article of athletic footwear includes two primary elements, an upper and a sole structure. The upper provides a covering for the foot that securely receives and positions the foot with respect to the sole structure. In addition, the upper may have a configuration that protects the foot and provides ventilation, thereby cooling the foot and removing perspiration. The sole structure is secured to a lower surface of the upper and is generally positioned between the foot and the ground. In addition to attenuating ground reaction forces and absorbing energy (i.e., imparting cushioning), the sole structure may provide traction and control foot motion, such as over pronation. Accordingly, the upper and the sole structure operate cooperatively to provide a comfortable structure that is suited for a wide variety of ambulatory activities, such as walking and running. The general features and configuration of the sole structure are discussed in greater detail below.
The sole structure of athletic footwear generally exhibits a layered structure that includes a comfort-enhancing insole, a resilient midsole formed from a polymer foam, and a ground-contacting outsole that provides both abrasion-resistance and traction. Suitable polymer foam materials for the midsole include ethylvinylacetate or polyurethane that compress resiliently under an applied load to attenuate ground reaction forces and absorb energy. Conventional foam materials are resiliently compressible, in part, due to the inclusion of a plurality of open or closed cells that define an inner volume substantially displaced by gas. That is, the foam includes bubbles formed in the material that enclose the gas. Following repeated compressions, however, the cell structure may deteriorate, thereby resulting in decreased compressibility of the foam. Thus, the force attenuation and energy absorption characteristics of the midsole may decrease over the lifespan of the footwear.
One way to overcome the drawbacks of utilizing conventional foam materials is disclosed in U.S. Pat. No. 4,183,156 to Rudy, hereby incorporated by reference, in which cushioning is provided by inflatable inserts formed of elastomeric materials. The inserts include a plurality of tubular chambers that extend substantially longitudinally throughout the length of the footwear. The chambers are in fluid communication with each other and jointly extend across the width of the footwear. U.S. Pat. No. 4,219,945 to Rudy, hereby incorporated by reference, discloses an inflated insert encapsulated in a foam material. The combination of the insert and the encapsulating material functions as a midsole. An upper is attached to the upper surface of the encapsulating material and an outsole or tread member is affixed to the lower surface.
Such bladders are generally formed of an elastomeric material and are structured to have an upper or lower surface that encloses one or more chambers therebetween. The chambers are pressurized above ambient pressure by inserting a nozzle or needle connected to a fluid pressure source into a fill inlet formed in the bladder. After the chambers are pressurized, the fill inlet is sealed, for example, by welding, and the nozzle is removed.
Bladders of this type have been manufactured by a two-film technique, in which two separate sheets of elastomeric film are formed to exhibit the overall peripheral shape of the bladder. The sheets are then welded together along their respective peripheries to form a sealed structure, and the sheets are also welded together at predetermined interior areas to give the bladder a desired configuration. That is, the interior welds provide the bladder with chambers having a predetermined shape and size at desired locations. Such bladders have also been manufactured by a blow-molding technique, wherein a liquefied elastomeric material is placed in a mold having the desired overall shape and configuration of the bladder. The mold has an opening at one location through which pressurized air is provided. The pressurized air forces the liquefied elastomeric material against the inner surfaces of the mold and causes the material to harden in the mold, thereby forming a bladder with the desired shape and configuration.
Another type of prior art bladder suitable for footwear applications is disclosed in U.S. Pat. Nos. 4,906,502 and 5,083,361, both to Rudy, and both hereby incorporated by reference. This type of bladder is formed as a fluid pressurized and inflated structure that comprises a hermetically sealed outer barrier layer which is securely fused substantially over the entire outer surfaces of a tensile member having the configuration of a double-walled fabric core. The tensile member is comprised of first and second outer fabric layers that are normally spaced apart from one another at a predetermined distance. Connecting or drop yarns, potentially in the form of multi-filament yarns having many individual fibers, extend internally between the proximal or facing surfaces of the respective fabric layers. The filaments of the drop yarns form tensile restraining means and are anchored to the respective fabric layers. A suitable method of manufacturing the double walled fabric structure is double needle bar Raschel knitting.
U.S. Pat. Nos. 5,993,585 and 6,119,371, both issued to Goodwin et al., and both hereby incorporated by reference, disclose a bladder utilizing a tensile member, but without a peripheral seam located midway between the upper and lower surfaces of the bladder. Instead, the seam is located adjacent to the upper surface of the bladder. Advantages in this design include removal of the seam from the area of maximum sidewall flexing and increased visibility of the interior of the bladder, including the connecting yarns. The process utilized to form a bladder of this type involves the formation of a shell, which includes a lower surface and a sidewall, with a mold. A tensile member is placed on top of a covering sheet, and the shell, following removal from the mold, is placed over the covering sheet and tensile member. The assembled shell, covering sheet, and tensile member are then moved to a lamination station where radio frequency energy fuses opposite sides of the tensile member to the shell and covering sheet and fuses a periphery of the shell to the covering sheet. The bladder is then pressurized by inserting a fluid so as to place the connecting yarns in tension.
While the cushioning benefits of bladders in articles of footwear are well documented, the prior art bladders with a tensile member having the configuration of a double-walled fabric core are generally considered to be relatively inflexible. The present invention relates, therefore, to a more flexible fluid-filled bladder with a tensile member.

Flexible fluid-filled bladder for an article of footwear


A shower curtain assembly 10 which encloses a shower enclosure 20 and can be selectively and vertically raised or lowered. The shower curtain assembly 10 includes a support structure 11 which engages a pair of walls 24, 25 defining the shower enclosure 20, an elongated member 9 which is held by said support structure 11, a curtain 13 which is attached to said elongated member 9, and a weighted bottom member 14 which is attached to the bottom of curtain 13 and which selectively and sealingly engages the bottom surface of the shower enclosure 20.

The present invention generally relates to a shower curtain assembly and, more particularly, to a shower curtain assembly that is easy to install, which allows the shower curtain to be vertically raised and lowered and which has a weighted bottom member which selectively engages and seals the bottom of the shower stall, thereby preventing water from escaping the shower stall.
Shower curtain assemblies are generally used in bathrooms which contain a bathtub or a shower stall. Shower curtain assemblies generally include a mounting rod, which extends between the walls on either side of the shower enclosure; a fabric curtain; and a series of rings, which connect the fabric curtain to the mounting rod, and allow the curtain to move freely across the length of the rod.
One of the primary purposes of a shower curtain assembly is to prevent water from escaping the shower enclosure. Prior shower curtain assemblies attempt to prevent water from escaping by substantially covering the opening of the shower enclosure. When the shower curtain is in a xe2x80x9cclosedxe2x80x9d position, water spray travels down the length of the shower curtain to the bottom of the shower enclosure and flows out of the shower drain. Shower curtains are also intended to prevent water escaping from the shower enclosure around the sides of the shower curtains. Particularly, water spray reaches the walls defining the shower enclosure and the sides of the shower curtain are intended to prevent this water spray from escaping outside of the shower enclosure.
A shower curtain is generally hung from a rail installed near the top of the shower entrance, at a length that allows it to be xe2x80x9ctuckedxe2x80x9d into the shower tub. Particularly, the shower curtain can be moved horizontally to either side of the shower entrance, allowing the user to enter the shower enclosure. After entering, the user is required to move the shower curtain again, in the reverse direction of the previous movement. Invariably, the shower curtain moves too far, creating a gap between the wall and the shower curtain. After some adjustment, the curtain is positioned so that it is in close proximity to the wall on either side, but typically, the curtain cannot be positioned close enough to the wall to prevent water from escaping from the shower enclosure.
One of the drawbacks of these prior shower curtains is that the bottoms of the curtains have little or no means to sealingly engage or contact the tub, thereby allowing water to escape from the shower enclosure. For example and without limitation, the bottom of these shower curtains can move outside of the shower enclosure during use, thereby undesirably allowing water to run down the curtain and outside of the shower enclosure. This condition creates a hazard, as the water may accumulate on the floor outside the shower enclosure, creating a risk of a fall when a user exits the enclosure. Additionally, the water may damage the surrounding floors and walls.
Another drawback to these shower curtains is their inability to prevent water from escaping the shower enclosure from xe2x80x9caroundxe2x80x9d the shower curtain sides. Depending on the size of the shower curtain, a large or small amount of material may accumulate at the sides of the shower enclosure. This accumulation of material is generally ineffective in preventing water from escaping. The movement of the shower curtain on the elongated rod compounds this problem. The shower curtain inevitably slides too far in one direction, resulting in an open space, where water is free to escape the shower enclosure.
Yet another drawback to these shower curtains is their inability to allow complete access to the shower enclosure. These shower curtains must slide to either end of the shower enclosure, on the elongated support rod. At either end, the shower curtain material accumulates and does not allow entry at that end. The shower user must enter the enclosure through the remaining space available in the entrance, however small that space may be.
There is therefore a need for a shower curtain assembly which overcomes the drawbacks of the prior art and which substantially prevents water from escaping the shower enclosure. There is further a need for a shower curtain assembly which overcomes the disadvantages of the prior art and which may be vertically retracted, allowing full access to the shower enclosure and then deployed to sealingly engage the bottom of the entrance to the shower enclosure.
Applicant""s invention addresses these drawbacks associated with prior shower curtain assemblies and provides a new and useful shower curtain assembly having improved operability and water sealing characteristics.
It is therefore a first non-limiting advantage of the present invention to provide a shower curtain assembly which overcomes the previously delineated disadvantages of the prior art and selectively seals a shower enclosure.
A second non-limiting advantage of the invention is that it provides a shower curtain assembly which overcomes the previously delineated disadvantages of the prior art and which allows the shower curtain to be raised or lowered vertically, thereby enabling the entire shower enclosure to be utilized.
A third non-limiting advantage of the invention is that it provides a shower curtain assembly which overcomes the previously delineated disadvantages of the prior art and includes a magnetic, weighted bottom member which selectively and sealingly engages the bottom of the shower enclosure, thereby preventing water from escaping.
A fourth non-limiting advantage of the invention is that it provides a shower curtain assembly which overcomes the previously delineated disadvantages of the prior art and which includes a mechanism for selectively raising and lowering the shower curtain by the use of at least one cord which is attached to the mechanism.
A fifth non-limiting advantage of the invention is that it provides a shower curtain assembly which overcomes the previously delineated disadvantages of the prior art and includes a shower curtain which is supported by an elongated support member which includes an integrated raising/lowering mechanism and which is also resistant to mildew and bacteria.
According to one aspect of the present invention a shower curtain assembly is provided and selectively seals a shower enclosure. The shower curtain assembly includes an elongated member which is adapted to be coupled to a top portion of a shower enclosure; a fabric material which is coupled to said elongated member and which is adapted to selectively enclose said shower enclosure; a weighted bottom member which is substantially coextensive with said elongated member, which is coupled to said fabric material and which provides tension to said fabric material, said bottom member having a generally flat bottom surface which selectively and sealingly engages a horizontal surface which defines a bottom of said shower enclosure, thereby substantially preventing water from escaping from said shower enclosure; and at least one cord which is attached to said weighted bottom member and which passes through said fabric material, said at least one cord being effective to selectively and vertically raise and lower said bottom member and said fabric material.
According to a second aspect of the present invention a shower curtain assembly is provided. The shower curtain assembly is designed to be installed in a shower enclosure by an elongated member, which can selectively be adapted to fit various shower enclosures. The elongated member supports the operating mechanism which allows the shower curtain to be vertically raised and lowered. The operating mechanism further allows the shower curtain to be selectively stopped at any position and held in place, until the user selectively allows the curtain to be repositioned.
According to the third non-limiting aspect of the present invention, a shower curtain assembly is provided. The shower curtain assembly includes a magnetic and/or weighted bottom member which selectively seals the bottom surface of the shower enclosure. The bottom member is designed to prevent water from escaping from the tub enclosure and to ensure a xe2x80x9ccleanxe2x80x9d look to the shower curtain and enclosure combination.
Further objects, features, and advantages of the present invention will become apparent from a consideration of the following description and the subjoined claims, when taken in conjunction with the accompanying drawings.


A circuit for outputting reference voltage includes: a detecting unit, a feedback unit and an output unit which are respectively connected with an external power source, wherein a plurality of field effect transistors (FETs) are provided in the detecting unit, wherein the detecting unit is for detecting foundry corners of the FETs therein, the feedback unit is for feeding back and comparing a detecting result of the detecting unit, and outputting information after feeding back and comparing, and the output unit is for outputting reference voltage corresponding to the foundry corners of the FETs to an external output terminal. The reference voltage outputted by the circuit for outputting reference voltage of the present invention is capable of varying with foundry corners of the FETs, and achieves compensating for foundry corners of the FETs.

1. Field of Invention
The present invention relates to the field of an integrated circuit, and more particularly to a circuit for outputting reference voltage.
2. Description of Related Arts
The circuit for outputting reference voltage is mainly used for providing a stable voltage outputted, and the voltage outputted thereof serves as a reference for other circuits. The circuit for outputting reference voltage has characteristics of having temperature compensation, little affection by power source and temperature, high precision and etc., and thus is widely applied in structures of various circuits.
As is well known, the circuit for outputting reference voltage comprises a plurality of field effect transistors (FETs). However, the output voltage of the circuit for outputting reference voltage usually is not varying with foundry corner of the FETs; while in some special circuits such as oscillator, because the foundry corner of the FETs has a great effect on the frequency of the oscillator, it is usually necessary for compensating the foundry corner, so as to output a constant frequency thereby. In this situation, the conventional circuits for outputting reference voltage are not capable of meeting the requirements. Therefore, it is necessary to provide a circuit for outputting reference voltage having output voltage capable of varying with the foundry corner of the FETs. Furthermore, in order to avoid the output voltage from being affected by temperature, the circuit should have temperature compensation as well. In addition, the foundry corner of the FETs refers to parameter variation of the FETs in the manufacture process of the FETs due to position differences on one wafer, or between wafers of different batches.

Circuit for outputting reference voltage

IPGoal Microelectronics (Sichuan) Co., Ltd.


A method for controlling multiple voltages in a power supply includes providing a plurality of DC to DC power converters. Each power converter includes a pulse width modulator controller having a control pin. The method also includes when a voltage supply to the power controllers reads a particular level. After the particular level is met, the method includes providing a respective rising ramp control signal to each respective control pin of the pulse width modulator controller such that each respective power converter generates desired voltage level over time characteristics.

Power supplies are required in most every electronic device used today. An example use of a power supply is in an Ethernet switch. Such power supplies often require multiple different power levels for various portions of the Ethernet switch. A given power level is sometimes referred to as a power rail. Such power supplies often receive one voltage level as an input, such as 12 volts and generate numerous different power levels through a plurality of power converters.
It is known that in such a power supply problems arise if the voltage levels generated by each of the power converters rise to their full level, or drop to zero upon termination, such that particular differential voltage levels between any two of the power rails reach undesired levels. Thus, techniques have been developed for both controlling the order at which power rails come up to power or terminate power, referred to as voltage sequencing, as well as controlling the relative voltage differential between any two power rails, referred to a voltage tracking. Various approaches include series element control, shunt element control, clamp diodes, enabling a lower voltage rail in response to a power good signal, and feedback based control. Each of these methods has disadvantages.
Series element control involves a voltage tracking controller, large series pass field effect transistors, and a set of multiple power supplies. The voltage tracking controller senses the output voltage and linearly controls the gate voltage to the series pass field effect transistors. This requires the series pass field effect transistors to be able to pass the entire load of the power rail with minimal voltage drop. This approach can be expensive, reduce reliability, generate heat, and consume board real estate.
Shunt element control involves monitoring a voltage delta between two rails and linearly controlling the gate from a field effect transistor shorting the two rails. The field effect transistor must be capable of handling large currents associated with shorting high current rails. Power is dissipated only during start up and shut down, unlike the series element method.
The use of clamp diodes involves simply attaching a Schottky diode between power rails. If the higher voltage rail falls below the lower rail, the load of the lower rail is increased to bring the rails down together. This approach has a problem of possible overloading of the lower voltage supply, causing undue stress. It also requires diodes large enough to clamp the rails together. The diodes are physically large and costly.
In the fourth approach, a power good signal may be used to enable a lower voltage rail. This solution is suitable for voltage sequencing, but not useful for voltage tracking. A large number of small logical elements is required.
In a feedback based control approach, a resistor divider is used off of a higher voltage rail to generate a reference for the lower voltage rail pulse width modulator. A lower voltage reference ramps up or down to follow the upper rail. This feature does not accommodate voltage margining.

Method and system for voltage tracking and sequencing in a power supply