A method of accessing a wireless network and associated computer system. The computer includes a memory, a wired network media access circuit for accessing a wired network, and a wireless network media access circuit, connected to the wired network media access circuit through a specific interface, for accessing a wireless network. A transmission memory space and a receiving memory space are allocated in the memory. According to a descriptor, the wired network media access circuit can access a control data and a packet data stored in the memory space allocated in the memory. The control data is for controlling the wireless network media access circuit, and for reflecting statuses of transmission and receiving of packet data.

1. Field of the Invention
The present invention method relates to wireless network access and a related computer system, and more particularly, the present invention provides a method of controlling wireless network access through a wired network access interface and a related computer system.
2. Description of the Prior Art
In a modern information-age society, networks allow large amounts of data, information, multimedia and knowledge, in a form of digital electronic signals, to be transferred and exchanged. This promotes greater interpersonal communication, accumulation of experience, knowledge exchange, and technological advancement. Thus, networks have already become a foundation of the modern information-age society. Wired networks already having a broad, almost universal, foundation, wireless networks are now also rapidly being developed. Wired networks are typically more stable, and can ensure safety and privacy of information; wireless networks, on the other hand, break free from the chains of wired transmission, allowing users to access information sources at any time, in any place, in a mobile and portable way. As wired and wireless networks each have their respective peculiarities, it has become a priority of information technologists to allow users to access both types of networks at a lower cost and with more effective resources for a networked device.
Please refer to FIG. 1, which is a functional block diagram of a computer system 10 of the prior art. The computer system 10 is designed with a central processing unit CPU0, a Northbridge chip NB0, a Southbridge chip SB0, memory 12, a graphics accelerator card 16, a display 18, a peripheral device P0, and a storage device M0. In order to access a wired network 22A and a wireless network 22B, the computer 10 can be designed with a wired network card 20A and a wireless network card 20B. The wired network card 20A is compatible with the IEEE802.3 wired network specification. The central processing unit CPU0 is used to control operation of the computer 10; the Northbridge chip NB0 electrically connects the central processing unit CPU0, the memory 12, and the graphics accelerator card 16, and is used to manage a rapid information exchange between the three. The memory 12 is used to store, in a volatile fashion, information and programs needed while the central processing unit CPU0 is operating. The central processing unit CPU0 uses the graphics card 16 to process image data, and to send the image to the display 18, which then displays the image. The Southbridge chip SB0 connects the Northbridge chip to a plurality of buses (such as PCI, IDE, or USB). The peripheral device P0 (such as a sound card), the non-volatile storage device M0 (such as a CDROM drive or a hard disk drive), the wired network card 20A and the wireless network card 20B are on the buses. The Southbridge chip SB0 primarily manages lower-speed information transfer between the central processing unit CPU0 and the devices connected to the buses.
The wired network card 20A could be a network card that conforms to the IEEE802.3 local area network (LAN) specification. The wired network card 20A is designed with a media access circuit MAC1 and a physical layer circuit PHY1. The wireless network card 20B, on the other hand, could be a network card that complies with the IEEE 802.11 wireless local area network (WLAN) specification. The wireless network card 20B is also designed with a media access circuit MAC2 and a physical layer circuit PHY2. Under the open system interconnection (OSI) architecture, the media access circuit MAC1 and the media access circuit MAC2 are used to respectively implement respective media access control layers for the wired and wireless networks. When the computer 10 is used to access network resources, the media access circuits MAC1,2 can use the corresponding physical layer circuits PHY1,2 to acquire digital information, process the information, and send the information to the computer. Information that the computer 10 sends to the network is packaged by the media access circuit MAC1,2. The media access circuit MAC1,2 also arranges a physical location for the packaged information to access the network, and sends the packaged information to the physical layer circuit PHY1,2. Similarly, the media access circuit MAC1,2 unpacks information received by the physical layer circuit PHY1,2 from the network.
The physical layer circuits PHY1,2 of the wired and wireless network cards 20A,B are respectively used for providing wired and wireless physical layer functionality. Information to be sent to the network, after being processed by the media access circuit MAC1,2, is sent to the corresponding physical layer circuit PHY1,2, which converts the information to a signal suitable for transmission, and transmits the signal. The physical layer circuit PHY1,2 can also receive signals from the network and unpack or demodulate the signals to acquire information contained in the signals, then send the information to the corresponding media access circuit MAC1,2. The physical layer circuit PHY1 used for wired network access is connected to other computers on the wired network 22A (such as other terminals or a server) through a network cable 23. The physical layer circuit PHY2 used for wireless network access further comprises a baseband circuit and a radio frequency (RF) circuit. The baseband circuit performs digital processing on information received from the media access circuit MAC2, then the RF circuit wirelessly transmits the information. RF wireless frequency signals received from the wireless network are received by the RF circuit. Then, the baseband circuit converts the demodulated signal to electronic information that is sent to the media access circuit MAC2.
When the computer 10 accesses network resources, all network cards work with a driver program stored in the memory 12. The driver program manages data transfer between the computer 10 and the network. Taking the wired network card 20A as an example, when the computer 10 starts accessing the wired network 22A, the wired network driver 26A in the memory 12 establishes a plurality of ordered descriptors TxA (with individual descriptors indicated as TxA (1) through TxA(n1)) and a corresponding ordered descriptors RxA (with individual descriptors indicated as RxA(1) through RxA(m1)). The driver program 26A then allocates free space in the memory 12, such as a data transmission allocation DTA and a data reception allocation DRA. Each descriptor TxA,RxA is a pointer used to keep track of a corresponding memory allocation address to which it points. When the computer 10 sends a large amount of information to the wired network 22A, the computer 10 uses the wired network driver 26A to store the information to the data transmission allocation DTA and sets a descriptor TxA (such as TxA(1)) to point to the memory space. When the media access circuit MAC1 of the wired network card 20A begins transfer of the information to the wired network 22A, the media access circuit MAC1 uses the descriptor TxA in the memory 12 to find the information stored in the data transmission allocation DTA, and reads the information from the data transmission allocation DTA. Then, the media allocation circuit MAC1 adds a header and a footer (such as a frame check sequence (FCS)) to package the information, then uses the physical layer circuit PHY1 to send the packaged information to the wired network 22A. If a single data transmission allocation DTA is not enough to completely store the information, the information is broken up and stored in a plurality of data transmission allocations DTA, and a plurality of descriptors TxA point to the respective data transmission allocations DTA. For example, if the information is to be stored in three different data transmission allocations DTA, the wired network driver 26A arranges three linked descriptors TxA(1), TxA(2), and TxA(3) to point to the three allocations DTA, and adds "continue" flags to the first two descriptors TxA(1) and TxA(2) to tell the media access circuit MAC1 that after processing this allocation DTA, the next allocation DTA must also be processed. And, a "stop" flag is added to the third descriptor TxA(3) to tell the media access circuit MAC1 not to access further allocations, i.e. those pointed to by TxA(4) and above, after finishing with the current allocation. Through the method described above, the media access circuit MAC1 can correctly access the data transmission allocations DTA, pointed to by the descriptors TxA(1), TxA(2) and TxA(3), to read the information in the memory 12 to be transmitted to the wired network 22A. In practical application, the media access circuit MAC1 has a direct memory access (DMA) engine that allows the media access circuit MAC1 to directly access the information stored in the memory 12, saving resources of the central processing unit CPU0 and increasing information access speeds and efficiency.
Similar to the system described above for managing data transmission, the wired network driver 26A also allocates the descriptors RxA in memory 12 for managing received information. Each descriptor RxA has a pointer pointing to a corresponding data reception allocation DRA. When the wired network card 20A receives information transmitted to the computer 10 through the wired network 22A, the wired network card 20A also works with the wired network driver 26A to store the unpacked information to the allocation DRA, and similarly sets a descriptor RxA (such as RxA(1)) to point to the allocation DRA. In this way, the central processing unit CPU0 can read the information received from the wired network 22A from the allocation DRA that is pointed to by the descriptor RxA(1). Similar to the transmission control system, if the wired network card 20A must store the received information in a plurality of allocations DRA, the wired network card 20A also works with the wired network driver 26A to set a plurality of descriptors RxA to point to the corresponding allocations DRA. Preferably, the descriptor TxA and the descriptor RxA are both set to types corresponding to an architecture of the transmitted or received data. Taking the descriptor TxA as an example, as information to be sent to the wired network 22A is sequentially stored to different allocations DTA, the wired network driver 26A accordingly sets each descriptor TxA(1), TxA(2), and so on, to point to different allocations DTA. The wired network card 20A also accesses each allocation DTA pointed to by a pointer according to the sequence of the descriptors TxA(1), TxA(2), and so on. This happens until the last descriptor TxA(n1) is reached, at which point, the wired network driver 26A loops back to the first descriptor TxA(1), and continues to set the descriptors TxA(1), TxA(2) in sequence to point to following allocations DTA of the stored transmitted information. The media access circuit MAC1 of the wired network 22A also accesses each allocation DTA pointed to by the descriptors TxA according to the looped sequence. The descriptors RxA are also used in the looped style described above.
As with the principles described above for access of the wired network 22A, the prior art computer 10 also uses a wireless network driver 26B with the wireless network card 20B to allocate a plurality of descriptors TxB (indicated individually as TxB(1) through TxB(n2)) and a plurality of descriptors RxB (indicated individually as RxB(1) through RxB(m2)) for pointing to a data transmission allocation DTB and a data reception allocation DRB. Information to be sent to the wireless network 22B is stored in the memory allocation DTB pointed to by the descriptors TxB, and information received from the wireless network 22B is stored in the memory allocation DRB pointed to by the descriptors RxB. For the computer 10 to access the wireless network, the media access circuit MAC2 and the central processing unit CPU0 use the descriptors TxB and RxB to access the information sent to the wireless network, and received from the wireless network, stored in the memory 12.
Although the wired network card 20A and the wireless network card 20B both use descriptors to manage network-accessible information, the descriptors used to access the wired network (TxA and RxA) and the descriptors used to access the wireless network (TxB and RxB) have different information structures. To accommodate special demands of the wireless network, the descriptors TxB and RxB used for accessing the wireless network must further indicate a particular status of the wireless network. For example, because the wireless network 22B and the computer 10 are not connected by a physical network cable, when the computer 10 transmits a large amount of wireless information to the wireless network 22B, the computer 10 has no way of confirming that the information sent wirelessly by the wireless, network card 20B has already been received smoothly by another computer on the wireless network 22B. At this time, the central processing unit CPU0 requests that the wireless network 22B send to the computer 10 an acknowledgement of data having been received completely. In practice, when the central processing unit CPU0 uses the wireless network driver 26B to store the information to the memory allocation DTB, the central processing unit CPU0 arranges the descriptor TxB to point to the memory allocation DTB, and the descriptor TxB indicates the acknowledgement required by the wireless network 22B. When the media access circuit MAC2 of the wireless network card 20B accesses the information according to the descriptor TxB, the media access circuit MAC2 uses the descriptor TxB to know to request acknowledgement from the wireless network 22B. In this way, when the media access circuit MAC2 packages the information, the media access circuit MAC2 adds acknowledgement information to the head of the packet. The packet is then sent to the physical layer PHY2, and the physical layer PHY2 sends the packet wirelessly to the wireless network 22B.
Practically speaking, in an architecture such as IEEE 802.11, aside from the acknowledgement request, there are a number of settings that are different from those of the wired network. For example, as information is transmitted wirelessly, in addition to the transmitter and the receiver, any third party that can receive wireless signals could intercept the wirelessly transmitted information. In order to ensure that the information content does not leak, the IEEE 802.11 architecture provides a wired-equivalent privacy (WEP) mode, which encrypts transmitted and received information at both ends, and maintains basic information security. The central processing unit CPU0 also uses the descriptors TxB and RxB to govern whether or not the media access circuit MAC2 uses WEP to access network resources. Also, in order to adapt to a portable nature of computers employing the wireless network architecture, in the wireless network architecture, each computer connects to the network at an access point. More specifically, when the computer 10 accesses information on the wireless network 22B, the computer 10 establishes contact to get a basic service set (BSS) organized by an access point. The basic service set can comprise a plurality of computers, all connected wirelessly to the BSS through connection to the access point. A physical wireless network address of the access station could act as a basic service set identification (BSSID). When a first computer in a first basic service set connects to a second computer of a second BSS, the first computer first contacts an access point of the first BSS. The access point of the first BSS connects to an access point of the second BSS through a distribution system service (DSS), then connects to the second computer through the second access point, allowing the first computer to contact the second computer. In the wireless connection process just described, each computer must make contact with a respective access point, enter/exit the BSS, access the DSS through the access point, etc. And all of these matters occur between the computers and the access points with the help of management and control framework information, such as BSSID's, acknowledgements, and beacons. In the prior art architecture of FIG. 1, many internal control and management signals must be produced between hardware internal to the computer 10, and are made known to the central processing unit CPU0 and the media access circuit MAC2 through the descriptors TxB and RxB. In contrast, in wired network access, because data transfer has a safe path through network cables, the access control system can be relatively simple, and the descriptors used by the wired network need not be as complicated as their wireless counterparts. Thus, the two types of descriptors used in the prior art are certainly not similar, and cannot share software and hardware resources.
Due to the above-mentioned differences in accessing the wired network 22A and the wireless network 22B, the descriptors TxB and RxB used for wireless network access and the descriptors TxA and RxA used for wired network access are neither similar nor compatible. And, when the prior art computer 10 needs to simultaneously access both wired and wireless network resources, the wired network driver 26A and the wireless network driver 26B must individually allocate descriptors used by both the wired network and the wireless network. In a modern, highly networked information society, networking power has already become a fundamental computer requirement. Effectively integrating wired and wireless network access capabilities, and simplifying wireless and wired network access control systems has also become a goal of information industry research and development. However, in the prior art, integration of wired and wireless network access is not possible because the forms of the respective descriptors are different. Similarly, as the descriptors allocated by the wired and wireless network drivers are not compatible, the media access circuits MAC1 and MAC2, which must get information related to network access from the descriptors, are difficult to integrate as simplified circuits.

Method for controlling wireless network access through wired network access interface and associated computer system


In order to realize a practical data warehouse system with the use of a network in a distributed environment, for example, data collectors (101 and 102) for creating/managing each replica of server data for clients (103 and 104) as shown in FIG. 1 are connected to a network (113). A data collector holds a data request condition given from a user via a client and negotiates with a server (114, 122) which supplies data according to such resources as a storage unit, a CPU, etc. usable by the data collector, thereby the range and quality of the data for which a replica is to be created can be adjusted. For query processing, a part or the whole of a query from a client is processed with the use of a replica (123) created in the data collector. Queries which cannot be processed with any replica in the data collector are transferred to the server. Because a replica created in the data collector can be used to process a query from a client device such a way, the server load can be reduced.

The present invention relates to a data warehouse system of the type used in a distributed network computing environment (hereafter, to be referred to as a distributed environment) and a method for processing queries in the system; as well as, a method and an apparatus for collecting data for the query processings, and a method and an apparatus for charging each of the queries.
Now that lower cost computing systems have become widespread, highly reliable software programs have been developed for those systems, and more efficient social systems have been in demand to cope with such systems and programs, various types of information can be used on-line. For example, various business data including sales information of shops, products management information, and customers' information have come to be processed by computers in company activities. Recently, in order to meet the demand that such data handled in computers and used in the core operations in companies should also be used effectively for other purposes, for example, for sales trend researches of respective products, analysis of customers' interests, etc., the use of data warehouse systems has become very popular. How to compose and use such a data warehouse is described in, for example, "Building the Data Warehouse Second Edition" written by W. H. Inmon, John Wiley & Sons, Inc., ISBNo-471-1,4161-5, second chapter. A data warehouse, as the name represents, is used for storing and managing a mass of data for core operations in companies. Such data warehouses are coming into widespread use more and more.
In recent years, it has come to be understood that new and useful information, which has been neglected in the past, is available from data accumulated and managed in such data warehouses by analyzing the data from various new points of view. Thus, analysis of sales data in a super-market may reveal a relationship between two commodities that seem to have no relationship, for example, "A not insignificant number of men on the way to their home after work tend to buy diapers together with their canned/bottled beer on weekends". Based on this information, putting diapers near canned/bottled beers may significantly increase the sales of those items. Such a method for finding useful information from available data that has been neglected is referred to as data mining.
Along with the widespread use of computers, the progress of network techniques represented by the Internet is also remarkable. One of such network techniques is described in, for example, "Client/Server Programming with JAVA and CORBA Second Edition" written by Robert Orfali and Dan Harkey and published by John Wiley & Sons, Inc., ISBN0-471-24578-X (first chapter). According to the network technique, various types of information can be used now through networks using the distributed frameworks represented by CORBA (Common Object Request Broker Architecture). This trend is now making rapid progress.
Under such circumstances, it would be natural for an attempt to be made for obtaining useful information with the good use of such a method as data mining, thereby integrating data in databases and warehouses existing on networks. A method for making an integrated access to data bases is described in, for example, "Federated Database Systems for Managing Distributed, Heterogeneous, and Autonomous Database" written by A. Sheth and J. Larson and published by ACM Computer Surveys, Vol. 22, No.3, pp. 183–236 and "Multidatabase Interdependencies in Industry" written by A. Sheth and G. Karabatis and published by Proc. of 1993 ACM Sigmod, Vol.22, pp. 483–486, etc. As described in the above publishings, conventionally, studies of heterogeneous databases, federated databases, multi-databases, etc. have been popular mainly in learned societies and many methods for integrating at least two databases have been discussed. Most of those methods, however, have been focused only on how to integrate heterogeneous data taking the heterogeneity among data into consideration.
If an attempt is made to build a data warehouse system in a distributed environment, therefore, the attempt will be confronted with many performance problems because of the mass of data which has to be handled, and because more complicated queries to those data warehouses are needed than the conventional database retrieval processings. As for the amount of data to be handled, a data warehouse of several TB (tera bytes: 1012 bytes) has already been built as of March 1998. A preferred example of such a complicated query processing is described in "TPC BENCHMARK D (Decision Support) Standard Specification" (Revision 1.2.2, Transaction Processing Performance Council). The benchmark is widely accepted in the concerned fields because it is a typical model of complicated data mining queries in a data warehouse. For example, if a series of the TPC-D queries are issued for a mass of data (1 TB), it will take a long time, such as from several tens of minutes to a few hours, even when the fastest computer in the world as of May of 1998 is used.
A general usage type of a data warehouse system is, as shown in FIG. 11, a client server type in which data is accumulated and managed in a storage unit 1105, and in which a client 1101 asks a server 1102 for a query processing, the client 1101 receives the processing result.
For the usage of a client server type data warehouse system in a distributed environment, however, a large number of clients of diverse characteristics 1401 to 1402 may query the servers 1403 to 1405 of an unspecified number of data warehouses and databases, etc. via a network 1405 and obtain the result (1407) as shown in FIG. 14. It will thus be expected that the processing of an analysis request from a client will be delayed. This is because the server's capacity cannot cope with complicated query processings as described above in response to a large number of requests from clients.
To analyze data in a plurality of servers, the following method is usually used. At first, a module 1202 as shown in FIG. 12 is built as an extension of a client server type data warehouse system. The module 1202 transfers a query 1207 from a client 1201 to servers 1205 to 1206 via a network 1204 with the use of the server location information 1203, and then the processing result 1208 is sent back to the client 1201. For example, the Virtual Data Warehouse System (VDW) of INTERSOLV Co., Inc. is one of the preferred examples using such a method. Because a VDW manages server locations, a client can handle the data in those servers without knowing them. In this case, however, just like the client server type data warehouse system in the distributed environment described above, it would be difficult to accept the VDW as a preferred example of data warehouse systems in such a distributed environment, because each server in the system is overloaded when in processing queries from many clients.
The Japanese Patent laid-Open publication No.8286960 discloses a method for processing queries to a plurality of databases or data warehouses in a distributed environment. According to this method, queries are transferred to cluster servers, thereby reducing the processing load of each server. Each cluster server then transfers a query to a proper database according to the query content and integrates the results from the database and sends it back to the client. In this method, because queries are transferred to servers after all, it is impossible to reduce the load of each server.
As for reducing the server's load and shortening the processing time, there is also another method as shown in FIG. 13, for example. According to this method, data items 1307 to 1308 are copied from the servers 1305 to 1306 into the module 1309 at the client side (steps 1311 and 1312) and a query 1313 is issued for the copy 1310 so as to obtain the result 1314. Hereafter, the copy 1310 of the data in this server will be referred to as a replica. If query processing is executed for a replica, query processings in the servers 1305 to 1306 can be avoided, thereby the load of each server can be reduced. In addition, accesses to the servers via a network can also be avoided, thereby the query processing time can be shortened.
In spite of this, if a simple copy method is employed to create replicas from a plurality of servers in a distributed environment, a large scale storage unit 1315 is indispensable for storing those replicas at each client side. For example, if a client tries to integrate 10 servers, each of which has about 300 GB (giga bytes: 109 bytes), the user must also provide a storage unit of 3 TB (3 00 GB×10 servers in a simple calculation), and so the present technique will not actually be effective to prepare such a large scale storage unit at the client side. In addition, because a mass of data is transferred from a server to the client via a network when a replica is created, this will increase the load on the network significantly. If the data in the server is updated after a replica is created, the replica that was created by using the server's data must also be updated; and, thereby the cost of the updating will also be increased to an extent which cannot be disregarded, since this updating cost is proportional to the size of the replica. This method will not be a preferred example for data warehouse systems in a distributed environment.
On the other hand, there is another method proposed for reducing the load of each server and for shortening the query processing time by caching queries and the processing results so that the cached results are reused for new queries. The method is disclosed in "A Predicate-based Caching Scheme for Client-Server Database Architectures" written by A. Keller and J. Basu" (The VLDB Journal, Vol. 5, No.1, pp. 35–47). This method is effective to reduce the load of each server and shorten the query processing time if the reusage rate of query processing results is high. Yet, the ratio between the object data amount and the scale of the storage unit prepared by a client is too large to improve the reusage rate of the cached data of each data warehouse system in the distributed environment.
The Japanese Patent laid-Open publication No.9297702 discloses an information processing apparatus/system, as well as a controlling method used respectively for getting files from servers via a network and supply the files to users. This method, however, will not be able to shorten the response time to the first query from a client. This is because the system creates a replica when receiving a file reference request from a user and if a query is issued from the user, the searching must be directed to a server at first. In addition, because this method creates a replica for each file, it is difficult to create a replica for each record or an object matching with the query condition of a database.
There are two methods for propagating updating of data in a server to each client (corresponding to the data collector to be described later in accordance with this invention), i.e., the push method controlled by each server and the pull method controlled by each client. In the push method, each server transmits data to each client at fixed intervals (for example, every hour) or each time the data in each server is updated. In the pull method, each client accesses a server and obtains data from the server at fixed intervals or as needed. The push method in which data is delivered to respective clients has been a problem in that the load of each server is increased. In the push method, in which each server sends the data by broadcast or multicast, and only the clients that need the object data receive it, a problem also arises in that it is difficult for each client to obtain data at a proper timing. Therefore, when only the push method is employed, it is difficult to deliver data efficiently in a distributed environment. On the other hand, in the case of the pull method, in the case when data in a server is updated, the client data is also updated immediately, so that each client must check the data in the server frequently. Accordingly, in a server in which many clients issue processing requests frequently, the load of the server for processing those requests rises too high to cope with them. It will thus be found that it is difficult to deliver data efficiently only with the use of the pull method in a distributed environment. A combination usage of the push and pull methods is described in "Update Monitoring: The CQ Project" written by C. Pu and L. Liu (Lecture Notes in Computer Science, Vol. 1368, ISSN 0302–9743, pp. 396–411 (hereafter, to be referred to as CQ). In this CQ project, each query including a trigger condition from a client is registered in the CQ server and data is transferred with the pull method at first under the control of the client, but the push method is used for the second time and after under the control of the server according to the trigger condition included in the query. The CQ project cannot specify the push and pull methods for each query, so that the push method has come to be used for transferring data after all under the control of the server. Thus, the method cannot avoid a problem of an increase of the load of the server.
In the case of a method for transferring queries to each server, if a large number of clients try to access many servers including databases, data warehouses, etc. through a network so as to get useful information with the use of integrated data in those servers, then the method is confronted with a problem that each of those servers is overloaded. Significant dependency of the method on the network and an increase of the response time to each query have also been other problems. The method of creating replicas at each client side has been confronted with such problems as an increase of the load on the network due to the transfer of a mass of data, an increase of the capacity of the storage unit at the client side, and an increase of the updating cost of replicas. In addition, in the case of a method for using a cache, the method has been confronted with such problems as reduction of the reusability of cached data. This is why it has been difficult to build data warehouse systems efficiently in a distributed environment.

Data warehouse system and query processing method used in the system, and data collecting method and apparatus for the method, and charging method and apparatus in the system


A wiring harness system and installation method is provided for customizing a truck chassis to a provide quick and easy addition and repair of electrical features on a completed heavy-duty truck body. The system and method add the existing wires of the chassis, without the need for cutting or disconnecting anything on the chassis. A primary harness connects to the body builder plug and upfitter plug of the chassis and extends along the frame rails to the rear of the truck. One or more extension harnesses can be plugged into the connectors on the primary harness, with various electrical features of the truck body being plugged into the extension harnesses or the primary harness.

Heavy duty trucks are used for miscellaneous work by city, state and federal workers, as well as private businesses. These municipal and private trucks often are customized to add desired features for operation and safety, such as spotlights and strobe lights, as well as conventional brake lights, turn signals, parking lights, to light the work area and to make the trucks readily visible to other vehicles on the roads.
It is common for the municipality or private business to order a new truck from the manufacturer with only the frame, cab, engine and wheels, and minimal electrical wiring. That vehicle is then driven or transported to someone who will customize the vehicle for the particular intended use by adding wiring and a body with lights and other components. To legally drive these incomplete vehicles, the truck manufacturer must install a rear set of lights including stop, turn, and reverse or back up signals. These lights plug directly into an existing wire harness or connector installed at the truck factory.
In the conventional process for customizing a truck or chassis from municipal use, the existing connector for the manufacturer is unplugged and the manufacturer's lights and light harness are removed completely. Then, a junction box is installed near the rear of the chassis, and new wiring for the various lights and additional electrical components are installed. This new wiring process for customizing the vehicle can take 24-40 hours, since each accessory, such as spotlights and strobe lights, requested by the municipality or private owner requires a separate terminal within the junction box and its own separate wires, all of which must be soldered for proper electrical connection.
Similarly, customization of the manufacturer's chassis to add a dump body requires the original connector to be unplugged and the manufacturer's lights and light harness removed. Then, the original wiring harness is cut several inches behind the connector. Then, each wire must be tested to determine its function, which requires that each signal be manually turned on with a test light connected to the wires, one at a time. After testing, another set of wires is soldered so as to branch from the existing harness, and strung to the corner posts for the stop, turn, taillight, clearance lights and any other additional lighting on the dump body. This process for customizing a dump body on the chassis can take 1-2 hours.
Thus, the conventional customizing process for these vehicles is labor intensive. Also, the junction box used in municipal vehicles and the like is not weather tight, which leads to issues such as the moisture, freezing, electrical shorting, and wire corrosion. These issues can be minimized in the short term by heat shrink, which adds additional time and costs, and does not last indefinitely. Also, when problems arise, and repairs are needed, diagnosis is more difficult due to the amount of wires and connections in the junction box. The location of the junction box underneath the frame is also inconvenient. Furthermore, if additional accessories are needed after the initial customization, connecting more wires to the junction box is difficult. Similarly, replacing an accessory and/or existing wires is difficult and time consuming due to the junction box location and its compact, crowded structure.
While customizing a dump body is generally easier than a municipal body, similar difficulties exist when future repairs and replacements are needed. Cutting and replacing wiring also risks damage to the electrical components or features. Rather than cutting the wires, the entire harness can be replaced, though this also adds time and costs to the repairs.
Conventional wiring harnesses commonly use bullet style connections. However, the female bullet connector can expand and become less secure after the male bullet pin is retracted or removed for repairs or other steps in the customization or installation process. These types of connections are sensitive and can lead to safety issues while the vehicle is being driven, particularly as the vehicle ages.
More particularly, when a truck arrives for customization, it includes a cab, suspension with tires, frame rails, the engine, and the transmission. This is an incomplete vehicle which the municipality private company has ordered for conversion into the desired end vehicle. These trucks typically are class 6, 7, 9 or 8 category vehicles. The manufacturer's stripped down truck includes wiring only for their rear lights so that the truck dealer can legally drive the truck to the site for customization.
For a municipal vehicle, the customization process begins by measuring the length of wires needed to run from the body builder plug located below the cab at the rear of the cab to the rear of the truck frame rails. The installer normally cuts the wire length longer than needed so as to avoid splicing of a short wire length. The extra length adds additional costs, for example of $2.00-$3.00 per foot. Typically, a Carol Vutron style bundled wire is used, wherein up to 10 individual wires are grouped together and sealed in a casing.
Then, the casing seal of the Carol Vutron wire bundle is cut back to expose the individual wires, which are color coded for different functions. Selected individual wires from the bundle are stripped of installation and inserted into a crimp pin, which is then plugged into the body builder plug of the vehicle.
The upfitter switch of the incomplete truck must also be wired, though the conventional Carol Vutron loom normally is too big (i.e. 14-gauge wires) to fit into the upfitter switch plug. Therefore, the installer normally uses individual wires from wire spools (i.e. 16 gauge), and spirals the wire together before placing a split plastic loom over the looped wires to provide partial protection from the elements. The wires and plastic loom form an extension harness, with the ends of the wires extending beyond the loom for insertion into the upfitter switch plug inside the truck cab.
Next, the mechanic or installer solders the wires at the remote end of the extension harness to the wires in the Carol Vutron harness, then heat shrinks or otherwise provides a weather pact connector at the junction of bare wires.
Then, the mechanic can run the Carol Vutron wiring loom along the frame rails of the truck for connection to a junction box located at the rear of the rails. The casement or seal of the Carol Vutron loom is stripped a short distance so that the individual wires can be fed into the junction box. Normally, a heat shrink is applied to the wires adjacent the junction box port to minimize water and dirt migration into the junction box, though a complete seal from water and dirt is usually impossible, leading to corrosion of the terminals inside the junction box.
The next step is to connect the wires to the terminals inside the junction box and ground all the terminals with numerous jumper wires. Due the numerous wires in the junction box, it can be difficult to track which wire was intended for each function. Also, there is no standardization for the junction box wires because the Carol Vutron harness and other harnesses that are available do not have the same colors of wires that the truck manufacturer's use, so that different mechanics may wire the box differently with each light having different colored wires making future failures or problems difficult to diagnose. The wire ends must be soldered at the junction box terminals. Then, wires must be run from each electrical feature, such as strobe lights, left and right turn signals, parking, license plate, back up lights, spot lights, etc. into the junction box for connection for the terminals. For example, if a customer has one stop/turn/taillight, one strobe light, and two clearance lights in each rear corner post of a dump truck body, seven wires, including ground wires, must be run from each corner post into the junction box. Remote ends of these wires also must be soldered for connections to the lights, and heat shrunk for weather resistance.
Thus, the convention prior art junction box created numerous issues and required an enormous amount of time to properly wire all the internal terminals and route the wires to their respective lighting features. This prior art process also wasted substantial wiring, since the junction box was located at the rear of the truck rails, while some truck lights are at the opposite front end of the truck.
Therefore, a primary objective of the present invention is the provision of a method to simplify customized wiring to accommodate lights and electrical accessories on heavy duty trucks and vehicles such as to save time and costs.
Another objective of the present invention is the provision of a wire harness kit which utilizes a primary harness and secondary harness sections which can be quickly and easily installed for various needs and applications.
Still another objective of the present invention is the provision of a wire harness kit for use in customizing a manufacturer's truck chassis to add lights and other features, which allows for quick and easy repairs of select sections of the harness kit.
Another objective of the present invention is the provision of a method of wiring a truck chassis which utilizes a harness that plugs into the body builder plug or the upfitter plug of the truck chassis.
Yet another objective of the present invention is the provision wire harnesses for adding accessories to a truck chassis using male and female quick connectors.
A further objective of the present invention is a provision of a method of adding lights and electrical features for a truck chassis without cutting the original chassis wires, without use of a junction box, and without direct connection to the truck battery.
Still another objective of the present invention is the provision of a weather resistant wire harnessing kit for customizing heavy duty vehicles and equipment.
A further objective of the present invention is a wire harness system and method of installation on a vehicle chassis which is economical and durable over an extended life.
These and other objectives will become apparent from the following description of the invention.


A biopsy forceps device includes a tension member and an end effector including first and second jaws movable between an open configuration, in which the jaws are separated from one another to receive target tissue therebetween, and a closed configuration, in which cutting edges of the jaws are moved toward one another to cut a portion of the target tissue. The jaws define a tissue receiving space therebetween to house the cut tissue. The jaws are pivotable relative to one another, each of the jaws including a serrated cutting edge extending therealong, the end effector further including a tension member attachment including a proximal end coupled to the tension member. The attachment is movably coupled to the jaws so that distal movement of the attachment moves the jaws to the open configuration while proximal movement thereof moves the jaws to the closed configuration.

Tissue samples are often examined to determine the presence of a pathological disorder. Endoscopic biopsy forceps may be used in conjunction with an endoscope for taking certain tissue samples from the human body for analysis. Often, the samples must be obtained from deep within the body at locations that are difficult to access using standard forceps jaws (e.g., tissue from areas accessible only via tortuous biliary paths). In certain cases, the quality or amount of tissue easily accessible by a physician using standard forceps may not be sufficient for pathologists to make an accurate diagnosis. Furthermore, forceps jaws are often difficult to maneuver as needed to obtain bites tangential to an axis along which the forceps are inserted to the target area. Thus, improved endoscopic biopsy forceps which can easily navigate tortuous paths while increasing tissue anchoring and increasing depth of tissue penetration are desirable.

Biopsy forceps with serrated cutting jaws


An apparatus and method of multi-stage network for iterative network are disclosed. The apparatus has M stages, and each stage uses N multiplexers to transmit N codeword partitions simultaneously. Every starting terminal, either the output port of memories, soft-in soft-out decoders, or multiplexers, has two paths to couple with two different multiplexers at next stage. One path connects the source to the first data port of one multiplexer; the other connects the source to the second data port of another multiplexer. The two multiplexers will be controlled with the same 1-bit signal, so each source has only one valid path to next stage. The invention can guarantee that the transmission of N data blocks is free from contention.

1. Field of the Invention
The present invention generally relates to a multi-stage network, and more particularly relates to an apparatus of multi-stage network for iterative decoding and method thereof.
2. Description of the Prior Art
FIG. 1 is a conventional communication system. The data in data source 11 transmitted through channel 14, wherein the data are interfered to cause incorrect data. For receiver getting correct data, Forward Error Correction technique is used to process data. The turbo encoder 12 is an example of such technique. The encoded data are modulated in modulator 13, and then they are sent to receiver via channel 14. The receiver receives data and demodulates them on demodulator 15, and then a turbo decoder 16 decodes data to obtain correct data 17. Thus the communication system with turbo decoder can reduce the error probability of data due to channel 14.
The turbo decoder has good capabilities for error correction in above mentioned communication system. The memories, interleavers, and SISO decoders are the main components in a turbo decoder. The received data will be stored in memories initially, and they are sent to the component soft-in soft-out (SISO) decoders to get some estimated value of the received codeword. It is a tendency to achieve high throughput by dividing a codeword into several partitions, letting these partitions be stored in multiple memories, and decoding these partitions simultaneously on multiple soft-in soft-out (SISO) decoders. However, conventional interleavers can not support this parallel architecture because they lead to some collisions while accessing the received data from memories, passing the data to parallel SISO decoders, and writing the decoding results back to memories.
Some contention-free interleavers are proposed to solve the collision problem. It is trivial to use an appropriate network 22 as the data bus to connect the multiple soft-in soft-out (SISO) decoders 21 and multiple memories 23 for each contention-free interleaver. The interconnection depends on the characteristics of different contention-free interleavers. As the number of the parallel components increases, the complexity of the network also increases. Although a fully-connected network can support all possible interconnections for various interleavers, it has some difficulties in implementation, such as hardware loading, control signal generation, and routing complexity. A low-complexity network which supports the required interconnection patterns is preferred.
The present invention provides a simple apparatus of network for iterative decoding, especially for the application of high parallel architectures. Moreover, two embodiments for the parallel architectures are given.

Apparatus of multi-stage network for iterative decoding and method thereof


A multi-output distribution amplifier includes a forward amplifier and a reverse amplifier and multiple outputs. The forward and reverse paths are separated utilizing low and high pass filters. The geometric mean frequency between the respective pass bands of the high and low pass filters is known as the crossover frequency. A circuit for providing a 180 degree phase reversal such as a balun transformer is connected in series with one (in a dual output arrangement) or half the reverse paths of an arrangement involving three or more forward or reverse paths to improve crossover isolation. For example, in a typical dual output distribution arrangement where the amplifiers are not padded, close to 20 dB of crossover isolation improvement is accomplished by simply connecting a balun transformer in series with one or the other of the low pass filters connected to one or the other forward direction output. At a minimum, a 6 dB improvement can be achieved.

A. Technical Field
This invention relates to the field of forward and reverse path distribution amplifiers and, in particular, to improving signal performance at the crossover between forward and reverse path frequency bands using circuitry providing a 180 degree phase reversal.
B. Description of the Relevant Art
With the emphasis recently placed on reverse path capability within, for example, cable television signal distribution systems to provide high speed modem, telecommunications and other reverse path applications, so-called loop gain in the forward and reverse sections of a cable television distribution amplifier has become an issue. Loop gain, that is, gain, within a circuit loop within an amplifier in the forward and reverse path can become a factor and cause amplifier "singing" or undesirable signal oscillations. It is important at the crossover frequency between the forward and reverse pass bands that the loop gain be less than 1. One known method for minimizing the possibility of undesirable oscillation is to filter the forward frequencies within the reverse path and to filter the reverse frequencies within the forward path. This method causes the maximum loop gain to occur at the geometric mean of the forward and reverse frequency bands (the crossover frequency) where rejection is obtained by the skirts of the suggested filters. But minimizing the loop gain at the crossover frequency places severe requirements on the filters which must roll off very rapidly to insure good crossover isolation.
Gris, U.S. Pat. Nos. 5,068,630; 5,126,702 and 5,343,158 has recognized that by providing a transformer device within a circuit having high and low pass paths, phase cancellation can occur. In particular, in Gris '630, a low-pass path through a multiple coupler includes a phase inverter transformer to enable recombination of low-pass and high pass signals without any distortion. Gris '702 shows in FIGS. 3-7 several applications of phase inverters to provide the capability of signals in each of a high- and low-pass path without distortion. Finally, Gris '158 shows the application of a phase inverter TA at column 4, line 15-25, for example, where the two signals are exactly equal, if properly balanced, and after inversion, the two signals are exactly opposite each other and cancel each other out at point 6 of FIG. 1.
While Gris et al. '158 relates to a cable television distribution amplifier, Gris relies on the component values in each leg of paths 7, 5, 6 and 7, 3, 4, 6 to be perfectly balanced and match each other which may be difficult with temperature variations and the like expected in distribution amplifiers which are used outdoors and may experience internal temperatures on the order of 95 degrees Centigrade. Moreover, Gris et al. '158 is concerned with recombining low-pass and high-pass paths at a recombination point and not with crossover compensation in a plurality of loops of a multiple output distribution amplifier. Consequently, while it is known to use phase reversal to advantage for phase cancellation, there remains a problem of improving crossover compensation at crossover frequency in a loop of a distribution amplifier having multiple outputs where the high pass/low pass frequency bands overlap.

Phase cancellation in a multi-output distribution amplifier at crossover frequency


A line-of-sight measurement device includes: an imaging unit that images a face of a subject; a light illumination unit that illuminates light to an eye of the subject; a camera coordinate system eyeball center coordinate calculation unit that estimates coordinates of an eyeball center, from a face image imaged by the imaging unit; a pupil center calculation unit that estimates coordinates of an apparent pupil center, from a pupil center position on the face image; an eyeball position orientation estimation unit that calculates an optical axis vector toward the pupil center from the eyeball center on the basis of the coordinates of the eyeball center and the apparent pupil center; a corneal reflection image calculation unit that obtains coordinates of a corneal reflection image on the basis of the coordinates of the eyeball center, the optical axis vector, and a predetermined eyeball model; and an image coordinate calculation unit that estimates image coordinates of a corneal reflection image on the face image, from the coordinates of the corneal reflection image.

In the related art, there is a known method of calculating eye motion by capturing a Purkinje image moving in parallel with the eye motion through a video camera or a CCD camera since the center of curvature of the cornea and the center of rotation of the eyeball are different ("Biological Measurement and Neuropsychology" (Makoto Noshiro, Chapter 3 in http://www.ieice-hbkb.org/files/S3/S3gun_10 hen_03.pdf)). A method of using an image obtained by reflection from the front surface of the cornea is a corneal reflection method.
There is a known technique capable of detecting a corneal reflection image in distinction from reflection of glasses by using a plurality of light sources or by changing a projection pattern over time (for example, JP 2014-188322A and JP 2017-1111746A).
In JP 2014-188322A, an infrared light pattern is used, and in JP 2017-1111746A, a plurality of light sources are used.
As in the technique described in "Biological Measurement and Neuropsychology" (Makoto Noshiro, Chapter 3 in http://www.ieice-hbkb.org/files/S3/S3gun_10 hen_03.pdf), in a method of using a single light source, it is difficult to distinguish between disturbance light reflected on glasses and a corneal reflection image.
In addition, the techniques described in JP 2014-188322A and JP 2017-1111746A require a device for using a plurality of light sources and light projection patterns in order to obtain a corneal reflection image. As a result, there is an increase in costs for the device.
Thus, a need exists for a line-of-sight measurement device which is not susceptible to the drawback mentioned above.


A feeder uses vortex flow to facilitate the dissolving of a chlorine-containing water treatment chemical. A feeder inlet receives water which is directed to a chamber by a conduit. A vortex flow in the chamber receives amounts of the chemical from a reservoir. Chlorine-containing water exits through an outlet.

(1) Field of the Invention
This invention relates to water treatment, and more particularly to feeders for introducing treatment chemicals into a recirculating water stream from a swimming pool or the like.
(2) Brief Description of the Art
If untreated, swimming pool water provides an hospitable forum for the growth of bacteria, algae, and other undesirable and potentially unhealthful organisms. It, accordingly, has become common practice to treat pool water on both periodic and continuous bases with treatment chemicals to kill/control such organisms.
Such treatment is typically undertaken via the introduction of chlorine into the pool water at levels effective to kill or control the unwanted organisms. The chlorine source may be in liquid form or may be in a solid form which is then dissolved in the pool water. Among solid sources of chlorine are calcium hypochlorite (cal hypo), dichloroisocyanuric acid (dichlor), and trichloroisocyanuric acid (trichlor).
A variety of feeders exist to deliver chlorine from solid chemical tablets and the like. It is known to utilize a floating erosion dispenser, also known as a xe2x80x9cfloaterxe2x80x9d or xe2x80x9cfeederxe2x80x9d, to provide a continuous release of the chemical. The floater contains the solid chemical and provides a controlled exposure of the chemical to the pool water which in turn controls the speed with which the water erodes the solid chemical to introduce chlorine to the pool water. Exemplary floaters are disclosed in U.S. Pat. No. 4,917,868 and U.S. Design Pat. Nos. 297,857 and 309,493. It is also known to pump pool water through an external feeder which may be incorporated in a circulation system that also provides filtering of the pool water. Among such systems are intermittent spray systems, erosion systems, and partial periodic immersion systems. Examples of such systems are shown in U.S. Pat. Nos. 5,932,093, 5,928,608, 5,441,711, 5,427,748, 5,419,355, 5,384,102, 5,133,381, and 4,208,376, and U.S. Reissue Pat. No. 33,861. As additional background, U.S. Pat. Nos. 5,112,521 and 5,004,549 disclose various solid calcium hypochlorite compositions.
Obtaining proper dissolution of the treatment chemical and avoiding undesirable deposits or residues have posed problems in feeder design. Particular problems exist with the use of commercial calcium hypochlorite pellets which produce calcium carbonate deposits. See e.g., U.S. Pat. No. 6,045,706.
The introduction of treatment chemical to a vortex flow can encourage the dissolution of such chemical via mechanisms which may include the physical agitation provided by the flow and the increased time available for dissolving provided by the flow. The ability to have a relatively continuous flow of water with a more intermittent introduction of chemical may help resist formation of deposits and may provide for a less complex, more economical, feeder construction. Deposits can further be minimized via the introduction of appropriate jets of fresh water at strategic locations where buildup might otherwise occur.
Accordingly, in one aspect the invention is directed to a device for introducing a chemical into a flow of water and having first and second chambers. At least the first nozzle directs water from the flow into the first chamber so as to produce a vortex flow of a body of water in the first chamber. A surface separates the first chamber from the second chamber and defines an outlet for overflow from the first chamber to the second chamber. A second chamber outlet directs water from the second chamber. A reservoir of the chemical has a reservoir outlet positioned to direct the chemical from the reservoir into the body of water in the first chamber. The dissolving of the chemical in the water in the body is encouraged by the vortex flow and the water containing the dissolved chemical is evacuated through the second chamber outlet.
In various implementations of the invention, a second nozzle may direct water from the flow toward a bottom of the first chamber so as to provide a flushing action at the first chamber bottom. A third nozzle bypassing the first chamber may direct additional water from the flow toward the second chamber outlet so as to provide a flushing action at the second chamber outlet. A first float valve may control flow through the first, second and third nozzles and may be positioned to restrict flow when a second chamber water level exceeds a first height. A second float valve may control flow through the second chamber outlet and be positioned to restrict flow when the second chamber water level falls below a second height, lower than the first height. The first, second and third nozzles may be formed as flat fans nozzles. The first and second nozzles may be fed by a common conduit extending along the majority of flow length from the first float valve to the first and second nozzles. The surface may be formed as a reduced height portion of a rim of a wall separating the first chamber from the second chamber. The first nozzle may direct water substantially tangential to an inner surface of the wall. The chemical may consist essentially of calcium hypochloride, dichlorocyanuric acid, trichlorocyanuric acid, or combinations thereof. The water flow may be recirculating flow to/from a swimming pool and the chemical may consist essentially of granular calcium hypochlorite. The first nozzle may have dimensions effective to carry a water flow rate of between 0.2 gpm and 1.0 gpm (0.8 and 3.8 liters/minute), and more preferably between 0.6 gpm and 0.9 gpm (2.3 and 3.40 liters/minute), at 40 psi (0.28 MPa).
The feeder may be incorporated in a pool water treatment system along with at least one pump, a filter, and a conduit network coupling the feeder, pump, and filter to a swimming pool for filtering and chlorinating a recirculating flow of water to/from the pool.
Another aspect of the invention is directed to a device for introducing chlorine from a chlorine-containing pool treatment chemical into a flow of water to/from a swimming pool. An inlet received water from the flow and a nozzle directs received water into a chamber so as to produce a vortex flow of a body of water in the chamber. An opening above the vortex flow receives amounts of the treatment chemical from a reservoir. An outlet returns chlorine-containing water to the flow.
Another aspect of the invention relates to a method for introducing treatment chemical into a body of water at a controlled rate. A feeder is provided having an inlet and an outlet and containing a solid chemical in a chemical reservoir. A flow of water from the body is caused to enter the feeder through the inlet and exit through the outlet to return to the body. A vortex of the water is introduced in a chamber of the feeder. The chemical is dispensed from the reservoir into the vortex. The dispensed chemical is permitted to dissolve in the water in the vortex. The combined flow of water and dissolved chemical is directed from the chamber to the outlet.
In various implementations, the directing may comprise permitting an overflow of water and dissolved chemical from the vortex into a second chamber and passing the overflow to the outlet. Water may be passed from a flow through a conduit bypass in the first chamber so as to provide a flushing action at an outlet of the second chamber, optionally coincident with the feeder outlet. The overflow may represent between 50 and 90% of a total overflow through the feeder. Dispensing may occur at a regular interval. The flow may be continuous and the dispensing may be intermittent. The vortex may be produced by introducing at least a portion of the flow to the chamber with a tangential velocity component of at least 30 fps at a location at least 1 inch from a central axis of the chamber.
The details of one or more embodiments of the invention are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the invention will be apparent from the description and drawings, and from the claims.


An integrated motorized pump (1) comprising an impeller (2) mounted on an axle (3), two magnetic drives (6) electromagnetically coupled to an electric motor (7), a casing (8) with a flowing space (9), an inlet channel (10) and an (11). The impeller (2) has circumferential arrayed magnetic means (13) magnetized in the direction parallel to the axle (3). The electric motor (7) comprising said impeller (2) as a rotor, and two stator plates (20). The stator plates (20) are covered with a liquid tight coating and comprise circumferential arrayed coils (21) etched on circuit board metal layers (22). Each magnetic drive (6) comprises a stator (14) with circumferential arrayed coil windings (16) and two magnetized disks (15). The magnetized disks (15) are mounted on the axle (3) perpendiculary to it and have a circumferential carry of radially extending poles (17).

During normal operation many electronic components generate significant amounts of heat. If this heat is not continuously removed, the component may overheat resulting in damage and/or reduction in operating performance. In order to avoid such problems cooling devices are often used in conjunction with these components.
One such cooling device is a fan assisted heat sink. In such a device a heat sink is formed from a material, such as aluminum, which readily conducts heat. The heat sink is usually placed on top of and in physical contact with the component. At some point, however, the amount of heat energy to be dissipated by air coolers exceeds their ability and liquid cooling would apply.
At this point, a liquid cooled heat sink is utilized or a combination of the fan assisted heat sink and the liquid cooled heat sink (see U.S. Pat. No. 6,263,957). A liquid can absorb large amounts of heat energy at low temperature gradients. To produce this type of heat sink for the new generation PC the cooling device must be relatively small. The pump has a separate electrical motor drive in the above mentioned patent, and the sizes of this device are relatively large.
It is known from another prior art (see U.S. Pat. No. 5,007,806), the liquid pump combines the electric motor and pump in a single unit. The sizes of this unit are relative large for use in a liquid cooled heat sink. Also, it is very important to have very reliable motorized pump that would realize the sealless design. In addition, many of existing magnetic driven sealless pumps have slippage capabilities.
It would be desirable to provide a combination of pump/motor for cooling apparatus that would overcome these disadvantages associated with well known devices.


A computer-implemented method for discovering network attack paths is provided. The method includes a computer generating scoring system results based on analysis of vulnerabilities of nodes in a network configuration. The method also includes the computer applying Bayesian probability to the scoring system results and selected qualitative risk attributes wherein output accounts for dependencies between vulnerabilities of the nodes. The method also includes the computer applying a weighted-average algorithm to the output yielding at least one ranking of nodes in order of likelihood of targeting by an external attacker.

1. Field
The present disclosure relates generally to identifying and managing network security vulnerabilities and, in particular, to ranking potential attack paths to networks by likelihood of attack based on probability analysis and consideration of non-quantitative factors.
2. Background
Within an enterprise network, multiple security risks exist that may not be easily understood or prioritized. An enterprise network may include many thousands of network objects or nodes. Nodes, depending on their location in a network and their associated access rights, may present different opportunities for ingress to the network, movement within the network, and access to network and enterprise assets. Because of their number of connections, some nodes may offer broader access into and within a network than other nodes that may be otherwise similar. Two nodes may as standalone or isolated devices be of similar attractiveness and ease of access but may be of very different attractiveness to attackers because of their connections and potential as gateways.
Sophisticated attackers may seek entrance points of enterprise networks that lead to the widest access in the network or lead to the most valuable or most proximate assets. Some attackers may target specific assets accessible in a network. Other attackers may seek access for purely exploratory or destructive purposes without specific targets in mind at the outset.
Of further importance to the magnitude of the risks themselves may be the timing or imminence of outcomes associated with the risks. Some risks may require immediate attention while others may wait. Two risks may be of apparent equal magnitude in terms of the damages suffered if security is breached and attackers are successful. The two risks may also present similar costs to investigate and resolve. However, the two risks may upon analysis be determined not equal based on their different timings. A failure and incurrence of damages or liability may in fact be truly imminent for one risk whereas the same event associated with a second risk similar or identical to the first risk may have a more distant time horizon. Correctly projecting these time horizons may promote an enterprise to better manage such situations presenting similar risks with different time frames.
An enterprise managing a large network may have limited resources with which to manage network security risks. The enterprise may seek to direct its resources to the greatest risks with the most imminent time frame. A large concentration of potential security problems may originate from a relatively small number of sources. A challenge for the enterprise may be to correctly identify the small number of sources as well as identify those sources whose risks are not as great or not as imminent. An enterprise may successfully identify several or more paths of attack into its network but may not have the resource to immediately mitigate all of those paths of attack. Choosing which to mitigate immediately while leaving the other until later may be a critical decision. Security managers seek to direct their resources and effort to mitigation of risks that matter most in their environment.
Security resource management processes are traditionally subjective, manual, time-intensive, and static. Traditional processes do not account for the dynamic nature of adversarial behavior and attack scenarios. Traditional processes may also be ad-hoc in nature. Further, previous practices may not consider dependencies between vulnerabilities. Two risks may appear similar in terms of likelihood of realization and magnitude of consequences. However, realization of a first risk may be contingent upon realization of at least one other risk or event occurring whereas a second risk may be realized without the involvement of outside actors or events and not affected by any other contingencies. Traditional processes may be unable to recognize and take account of such differences.
Traditional processes may also include network monitoring tools that may feature real-time monitoring of network activity. Such real-time monitoring may utilize rule sets and thresholds for determining if a type of network traffic is abnormal or may potentially be a network attack in process. These monitoring tools may mark such potentially dangerous traffic for review by a security analyst.
Existing approaches may also not reflect qualitative factors such as business impact or certification impact of a problem. In addition, some network nodes or objects may have some risk mitigation already in place. Traditional approaches may be unable to recognize risk mitigation already in place. Further, current tools may be limited to recognizing of vulnerabilities based on a certain hardware and software configuration and patch level.
Enterprises routinely take over other enterprises which may require absorbing or integrating the target entity's data processing infrastructure. The target entity's infrastructure may have vulnerabilities that would become part of the acquiring enterprise's infrastructure if not detected and mitigated. Traditional approaches may be limited to performing network configuration scans to determine patching levels, for example, of the target entity's network components. Further, there may be less information available than desired about the target entity's infrastructure. Merging or absorbing an outside infrastructure may introduce new risks to the acquiring enterprise or compound existing risks. Thus, effective new techniques for discovering network attack paths and successfully projecting their likelihood and timing are desirable.

System and method for discovering optimal network attack paths


Higher speed data transactions between a host computer's system memory and a plurality of slow peripheral devices are accomplished by providing distributed DMA functions along with distributed pre-fetch buffers. The first I/O device accesses the host bus via a first DMA channel and a first pre-fetch buffer, the second I/O device accesses the host bus via a second DMA channel and a second pre-fetch buffer, and the third I/O device accesses the host bus via a third DMA channel and a third pre-fetch buffer. In a first DMA transaction, the first pre-fetch buffer is filled with data being transferred between the first I/O device and the host system memory. While the data are transferred between the pre-fetch buffer and either the first I/O device or the system memory, the second pre-fetch buffer is being filled pursuant to a second DMA transaction between the second I/O device and the system memory. This strategy increases the speed of successive DMA transactions between a plurality of I/O devices and the host computer system's memory.

1. Field of the Invention.
The present invention relates to the transfer of data within a computer system from a relatively slow peripheral I/O device through a high speed data bus to a system memory.
2. Description of the Related Art.
Typical small computer systems incorporate a microprocessor, various kinds of memory, one or more buses, and a number of devices that transfer data over the buses between themselves, the memory and the microprocessor. A common configuration of computer system provides a central processing unit (CPU) such as a microprocessor coupled to a cache or other local memory and to a memory controller by a local processor bus. The memory controller is connected to the system memory over a memory bus and provides controlled access to the system memory for the microprocessor as well as for other devices in the computer system over the system bus of the computer system. Frequently, data communications between the microprocessor and other devices within the computer system are mediated by the system memory, so that the transfer of data from the various devices to the system memory is an important aspect of the operation of small computer systems. Data transfers between the system memory and other devices of the computer require that the system bus arbiter recognize the device request for a memory transaction and cause the microprocessor to relinquish control of the bus to the device for the memory transaction. The system bus may have different configurations, but is typically a high speed, synchronous bus having a configuration and architecture like that of the peripheral component interface (PCI) bus. A particular implementation of such a small computer system having a PCI bus and which illustrates a variety of conventional aspects of data transfers, including bus control and arbitration, is described in U.S. Pat. No. 5,450,551 to Amini, et al., which is hereby incorporated by reference.
The PCI bus architecture places significant restrictions on the types of devices that can couple to the bus. Devices connected to the PCI bus generally should be, for example, thirty-two bit devices that have bus mastering capabilities. Examples of such devices include Winchester-type hard disk drives and graphics controllers. Such bus mastering devices include internally the registers and logic required for performing direct memory access (DMA) and so need not rely on the bus mastering capabilities of a system DMA. Present day small computer systems also incorporate comparatively slow peripheral I/O devices that must perform transactions with the memory but which cannot be directly interfaced to the PCI or other system bus of the computer system. These PCI incompatible devices operate at slower data rates than the PCI bus and do not have the bus mastering capabilities required for direct connection to the PCI bus. Examples of PCI incompatible devices include controllers for floppy disk drives as well as other I/O devices like parallel ports and infrared data ports.
It has generally been necessary to provide a separate I/O bus, such as an ISA bus, in addition to the PCI bus within the computer system to be shared by the lower speed I/O devices that cannot directly couple to the PCI bus. The devices coupled to the ISA bus are separated from the system PCI bus by a bus bridge, which preferably includes a DMA controller to control the memory I/O (storage and reading) transactions between the devices connected to the ISA bus and the system memory over the PCI bus. A conventional configuration of a DMA system for coupling peripheral I/O devices on an ISA bus to a PCI system bus is shown in FIG. 1. Various peripheral I/O devices, collectively indicated by 10 in FIG. 1, are coupled to the ISA bus 20 via a standard bus bridge 30 to the PCI system bus 40. The peripheral I/O devices may include, for example, a floppy disk controller 12, a parallel port controller 14 and an infrared port controller 16. Other peripheral devices might also be provided. Access to the shared ISA bus 20 by the various peripheral I/O devices 10 is controlled by the DMA controller 32, which is provided along with a buffer memory 34 on the standard I/O bridge 30 coupled between the ISA bus 20 and PCI bus 40. Conventionally, the DMA controller includes both the logic for arbitrating requests for bus access as well as the logic for communicating control signals for the bus transactions to the peripheral I/O devices.
Typically, the DMA controller 32 on the bridge 30 is of the 8237 type and includes eight thirty-two bit channels for transferring data. When one of the I/O devices 10 wishes to gain access through the PCI bus 40 to the system memory, or otherwise to access the PCI bus 40, the I/O device 10 issues a DMA request (DREQ) to the DMA controller 32. The DMA controller 32 issues a request to the PCI bus arbiter for bus access. When the DMA controller 32 is granted control of the bus, the DMA controller 32 signals (DACK) the appropriate I/O device 10 and initiates a transfer of data from the I/O device 10 through the ISA bus 20 and through the bridge 30 to the PCI bus 40. The PCI bus provides the data to its destination, for example, to a memory controller for storage in the system memory or to another device connected to the PCI bus 40 (neither shown).
The particular order of transactions described here may proceed in a slightly different manner to accommodate both the slow nature of the I/O devices 10, and also to accommodate the very different speeds and protocols on the ISA bus 20 and the PCI bus 40. Often, a buffer memory 34 is provided on the bridge to temporarily store the data that is being transferred from the PCI bus 40 to the I/O devices 10 and also to temporarily store the data that is being transferred from the active one of the I/O devices 10 over the ISA bus 20, through the bridge 30 and onto the PCI bus 40. Thus, the buffer memory 34 may be filled, under the direction of the DMA controller 32, during a data transfer operation from the system memory over the PCI bus 40 to the target one of the I/O devices 10. This is due to the PCI bus providing data to the buffer memory 34 at a much faster rate than the data can be transferred from the buffer 34 over the ISA bus 20 to the I/O devices 10.
For the transfer of data from the system bus to the peripheral I/O device, the simple description of DMA control set forth above may be practiced without reducing the performance of the computer system. The transfer of data from the I/O device 10 to the system memory over the PCI bus 40, however, can be further optimized from the basic DMA control sequence describe above to improve the performance of the computer system. In particular, the order of control signals might be varied from the described ordering of operations, or at least some delays might be inserted between some operations, to provide better system performance. To this end, the peripheral I/O device 10 might issue a DMA request to the DMA controller 32, which might not immediately issue a request for bus control. It might instead be preferred for the DMA controller to delay issuing a request for the bus until after the I/O device has transferred to the buffer memory 34 all of the data to be transferred, or at least a sufficient quantity of data to fill the buffer memory, before the DMA controller 32 issues a request to the PCI bus arbiter for bus control. This strategy will reduce the amount of time dedicated by the PCI bus to waiting for data from the I/O device. Thus, one function of the bridge in the FIG. 1 system is to provide improved device performance by providing a buffer to equilibrate the speeds of the PCI and ISA buses. Another function of the bridge 30 is to accommodate and translate between the different protocols and timings of the PCI and ISA buses.
The transfer of data between the system memory and slow peripheral I/O devices is a source of performance and reliability problems in small computer systems, since most of the computer system operates at a much higher data rate than these peripheral devices. The architecture described above places all of the peripheral I/O devices on a shared data bus and conducts DMA operations completely and in sequence. This means that peripheral I/O devices that have comparatively high data transfer rates occasionally will be queued behind slower peripheral I/O devices awaiting a DMA transaction, substantially negating the advantage of the higher data transfer rates. It would is desirable to provide a system in which higher speed peripheral I/O devices can better avoid delays caused by DMA transactions involving slower peripheral I/O devices. Conventional methods of interfacing slow peripheral I/O devices to the host computer system are further undesirable as requiring space on the system motherboard to provide a generally incompatible and obsolete shared I/O bus.

Distributed pre-fetch buffer for multiple DMA channel device


An apparatus compensates for an attenuation of a signal on a telephone line in a communication system connected to the telephone line via a transformer. A photo coupler detects a loop current at a primary winding of the transformer. A controller generates switching control signals corresponding to an output of the photo coupler based on a predetermined switching table, and controls an overall operation of the communication system by receiving coding data. A level amplifier having different gains amplifies a signal at a secondary winding of the transformer by the gain corresponding to the switching control signal. A coder codes an output from the level amplifier to generate the coding data.

1. Field of the Invention
The present invention relates to a communication system connected to a telephone line, and more particularly to a technique for amplifying a signal on a telephone line according to a loop current detected from the telephone line.
2. Description of the Related Art
In general, communication systems such as a telephone, a facsimile machine, a digital telephone answering device (TAD), a digital speakerphone, etc. are connected to a telephone line. Further, it is well known that a signal intensity at the terminals connected to the telephone line is dependent on the distance from a switching system. Since an impedance of the common telephone line made of copper varies according to the length thereof, the relative current with respect to a constant DC current, i.e., the loop current, also varies according to the distance between the communication system and the switching system. The variation of the loop current corresponds to a variation of the distance. From this, it can be understood that a variation of the signal intensity according to the distance from the switching system is proportional to the variation of the loop current. Therefore, a user of the telephone distanced far away from the switching system can hardly hear the called party. In order to solve such problem, it is necessary to compensate for an attenuation of the signal on the telephone line.
The Feiner et al., Terry, Martin, and Eberhardt et al. patents, U.S. Pat. Nos. 4,228,323, 4,453,037, 4,002,852, and 4,453,038, entitled respectively Variable Loop Length Compensated Barrier Circuit, Loop Length Compensation Circuit, Electronic Telephone Network, and Circuit Arrangement For Producing Control Means From Line Current, each disclose telephone systems in which the amplification is varied according to the measured loop current. However, none of these patents teaches or suggests the use of a switching table as in the present invention.
The following additional patents each disclose features in common with the present invention but are not as pertinent as the patents discussed above: U.S. Pat. No. 3,903,378 to Lee et al, entitled Arrangement For Controlling The Gain Of Two-Way Amplifiers In Accordance With Loop Lengths, U.S. Pat. No. 5,321,746 to Bader, entitled Adjustable Gain Range Current Mirror, and U.S. Pat. No. 4,720,856 to Pace et al, entitled Control Circuit Having A Direct Current Control Loop For Controlling The Gain Of An Attenuator.

Technique for compensating for signal attenuation on a telephone line


Systems, devices, features, and methods for obtaining, enhancing, or using data for or with a geographic database, such as a navigation database, are disclosed. For example, one method includes receiving input to enable a probe sensor that is associated with a device used by a being with a physical disability. Geographic data is collected via the probe sensor when the device is in use by the being with the physical disability. The collected geographic data is provided to a data collection facility to develop data corresponding to a geographic and/or navigation database.

The present invention relates to collecting, generating, storing, and/or using data and, more particularly, to geographic probe data and uses thereof.
Navigation systems or devices may provide useful guidance or route information. For example, an end user navigation device may provide a display of a route and/or directions from an origin to a desired destination. Such navigation devices may use or rely on a geographic database that includes geographic data records representing a geographic region.
For example, in regards to vehicle navigation, road data segments or links and node data records corresponding to respective real-world roads and intersections are stored in a geographic database. These road segments and node data are retrieved when forming a navigation route from one place to another. As time goes on, new and different roads are built and/or existing structures may be modified. To accommodate for the changes as well as for general enhancement purposes, geographic databases are updated time to time.
However, such updates may involve a map developer driving and collecting geographic data of new streets or modified streets, or the map developer may rely on third party information. Time and cost may limit how much geographic data and types of data to be collected or provided. For example, data collection or acquisition may be focused on traditional streets and paths, which may not include data corresponding to handicapped or physical disability accessible paths or ways. Or, such collection of data corresponding to handicapped or physical disability accessible paths or ways may be time consuming or not as cost effective.

This patent is subject to a terminal disclaimer.

Physical disability probes for geographic information


Examples of a method of forming an integrated circuit device with an interfacial layer disposed between a channel region and a gate dielectric are provided herein. In some examples, the method includes receiving a workpiece having a substrate and a fin having a channel region disposed on the substrate. An interfacial layer is formed on the channel region of the fin, and a gate dielectric layer is formed on the interfacial layer. A first capping layer is formed on the gate dielectric layer, and a second capping layer is formed on the first capping layer. An annealing process is performed on the workpiece configured to cause a first material to diffuse from the first capping layer into the gate dielectric layer. The forming of the first and second capping layers and the annealing process may be performed in the same chamber of a fabrication tool.

The semiconductor integrated circuit (IC) industry has experienced rapid growth. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. However, each iteration of size reduction presents greater challenges to both design and manufacturing. Through advances in these areas, increasingly complex designs are being fabricated with precision and reliability.
For example, the materials and techniques used to form a gate structure of a transistor have continued to evolve. At a high level, a gate structure may include a conductor and a gate dielectric that separates the conductor from a channel region of the transistor. One common gate dielectric is silicon oxide. While thinning a silicon oxide gate dielectric improves channel current and improves a transistor's switching speed, a thinner gate dielectric is also more susceptible to tunneling and has a greater gate leakage. For these reasons and others, silicon oxide gate dielectrics have been replaced, in part, by high-k dielectric materials for better transistor performance. However, high-k dielectric materials may be difficult to fabricate and prone to defects, particularly where they interface with other materials.

Gate structures having interfacial layers

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.


A flip top container used to store a smoking pipe and smoking material. Pivots mount a side lever and the top lid to the container's body while side panels mounted on the body define two sides of the smoking material chamber. A first biasing spring on the lid engages the top of a stored pipe and acts to raise the lid while a second biasing spring on the lever acts to pivot the lever into engagement with the closed lid top and keep it in that position. When the lever is depressed it pivots on its pin to release the engaged lid which then flips upward by virtue of its biased spring. Complementarily shaped engaged stepped surfaces on the ends of the lever and lid assist in maintaining the lid closed and locked when access to the container is not desired.

Persons who smoke like to have the necessary ingredients stored in a single container to permit their easy transport and use. When pipes are used for the smoking implement various types of containers have been used to store and transport the pipe and the necessary associated smoking material. The present invention relates to one such container wherein a pipe is stored in a container whose lid can be opened by flipping a lever to expose and permit easy access to the pipe and its tobacco.


Provided is a method for detecting the degree of toxicity of toxic materials within a sample. The method includes contacting sub-mitochondrial particles having competent mitochondrial enzyme formed from the inner membranes of mitochondria, an electron donor which transmits electrons to the electron transfer system of the sub-mitochondrial particles, and a sample which will be tested; adding tris-2,2′-bipyridyl-ruthenium (II) ion to the reaction mixture; and measuring electrical variables of the reaction mixture. Also, provided is an apparatus and kit for detecting the presence of toxic materials within a sample.

1. Field of the Invention
The present invention relates to a method and apparatus for detecting presence of toxic materials within a sample.
2. Description of the Related Art
Use of mitochondria or sub-mitochondrial particles is well known as a biological analysis instrument for detecting the presence of toxic materials within environmental samples. For example, U.S. Pat. No. 4,808,517 discloses (a) suspension of sub-mitochondrial particles having competent mitochondrial enzyme formed from inner membranes of mitochondria, (b) an analysis medium including a substrate in which either a substrate or enzyme reaction product thereof may be detected using a spectroscopic detection method when the analysis medium is transformed by mitochondrial enzymes, and (c) a process of mixing environmental samples in a common vessel. Such a method of analyzing toxic materials within an environmental sample includes determining influences of the sample on enzyme activity within the suspension including sub-mitochondrial particles by measuring the changes in the substrate using spectroscopic measurement.
In U.S. Patent Application Publication No. 2003/0059839, a tris-bipyridyl-ruthenium complex ((Ru(bpy)3(II)) is used to induce electrochemiluminescence ("ECL") by acting as an ECL label. ECL is light emission caused by the response of an electrically stimulated species. Thus, a species which is induced to emit ECL is called an ECL label or an ECL active species.
Conventional methods are mostly used for detecting optical signals. However, methods of analyzing toxic materials by detecting signals other than optical signals are still unknown in the art.

Method for detecting presence of toxic material within sample


A tunable circuit (10) for a capacitively tunable capacitor device (12) is provided. The tunable circuit (10) comprises a tunable circuit element (14) and a non-tunable dielectric element (16) coupled to the tunable circuit element (16). A tunable capacitor device (12) and a method for increasing the figure of merit in a tunable capacitor device (12) are also provided.

Tunable RF devices such as filters, phase shifters, and oscillators are typically built using semiconductor diodes, so called varactors, in which the capacitance is controlled via external bias. While the main line varactors are inexpensive and robust, they are only suitable for applications up to 10 GHz. Above this frequency, the energy dissipated in such varactors is prohibitively high (low quality factor Q). In some GaAs varactors, the range of operation is extended to much higher frequencies. The high cost of manufacturing for such devices, however, makes them impractical for most applications.
Recently, tunable dielectrics, such as Balium Strontium Titanate (BST), have been employed as the active elements in tunable capacitor devices and are becoming increasingly important for a large number of microwave applications. Utilizing a tunable dielectric element in tunable capacitance devices, especially at frequencies over 20 GHz, has been shown to increase the figure of merit (performance vs. noise) of the tunable capacitor device with a lower cost than other conventional technologies. BST thin film and especially BST/MgO thick and thin films composites have demonstrated unparalleled performance at high MW frequencies up to 60 GHz. They also have low power requirements, but need voltages in some applications. Thus, incorporation of the tunable dielectric elements provides high performance at low cost.
While the figure of merit of the tunable dielectric devices can be sufficiently high, such as those with composite materials, the voltage requirements of these devices are typically too high (300V). The standard employed for the lower frequency applications typically designs for tuning voltages in the range of 20–40 V. There is a pressing need to develop lower voltage tunable devices with a high figure of merit so as to achieve high levels of performance at microwave frequencies, i.e., this requires the amount of tuning to be maximized and the amount of loss to be minimized, while satisfying industry requirements for the low operating voltages.

Tunable circuit for tunable capacitor devices