A first mathematical expression indicating a dependence of SER on an information storage node diffusion layer area at the same information storage node voltage Vn is derived with a use of a result of measuring a relationship between SER and the information storage node diffusion layer area of a storage circuit or an information holding circuit composed of MISFET using a plurality of information storage node voltages Vn as a parameter. Then, a second mathematical expression is derived from the measurement result by substituting a relationship indicating a dependence of SER on an information storage node voltage at the same information storage node diffusion layer area Sc into the first mathematical expression. SER can be calculated by substituting a desired information storage node diffusion layer area and a desired information storage node voltage of a storage circuit or an information holding circuit into the second mathematical expression.

1. Field of the Invention
The present invention relates to a semiconductor integrated circuit including a storage circuit or an information holding circuit composed of a transistor, a soft error rate calculation method and a program of the same, and a design method and a design apparatus of the same.
2. Description of Related Art
A soft error is one of the problems caused by scaling process of recent semiconductor devices. In a narrow sense, a soft error of semiconductor devices is a temporal defect that causes the "inversion" of information due to the loss of charges that are accumulated in a storage node by radiation. Combined with the trend for low-voltage circuit design, the soft error will become a serious problem.
One measure against this problem is to improve the resistance to soft errors by adding a capacitance to a storage node. However, with the recent development of small memory cells, it is difficult to add a large capacitance in a simple process. In addition, it is unable to add a capacitance that is large enough to prevent soft errors to a high-speed SRAM because of the operation speed.
Besides the addition of a capacitance, another measure against to soft errors is to optimize the impurity concentration profile of a cell node diffusion layer or a substrate (well). One method for optimizing the impurity concentration profile of a cell node diffusion layer or a substrate (well) is to reduce electrons and positive holes to enter a cell node diffusion layer. A typical method is to form a well or a barrier layer in a well. However, a considerable amount of prototyping is required to determine the optimization conditions.
In the present circumstances, products are manufactured by combining various kinds of such measures, rather than employing any one of them. Therefore, a soft error rate SER cannot be determined until prototyping a product or TEG (Test Element Group).
The trend for SER of released SRAM varies by publisher. For example, P. Hazucha, et al., "Neutron Soft Error Rate Measurements in a 90-nm CMOS Process and Scaling Trends in SRAM from 0.25-μm to 90-nm Generation", 2003 IEEE International Electron Devices Meeting TECHNICAL DIGEST, pp. 523-526 (FIG. 16) (Document 1) describes that SER deteriorates (e.g. FIT value increases) by scaling process when a comparison is made per unit bit rate in each generation. On the other hand, Soon-Moon Jung, et al., "Soft Error Immune 0.46 μm2 SRAM Cell with MIM Node Capacitor by 65 nm CMOS Technology for Ultra High Speed SRAM", 2003 IEEE International Electron Devices Meeting Technical Digest, pp. 289-292 (FIG. 9) (Document 2) and Ethan H. Cannon, et al., "SRAM SER in 90, 130 and 180 nm Bulk and SOI Technologies", 2004 IEEE International Reliability Physics Symposium, pp. 300-304 (FIG. 1) (Document 3) describe that SER generally improves (e.g. FIT value decreases) by scaling process. The reason of such a difference is probably a difference in voltage (node voltage) setting and cell size in SRAM in each generation.
In this background, it becomes increasingly important to accurately estimate SER of a scaling process device during the design phase. Simulation has been used for the estimation of SER.
Generally, the soft error simulation requires product process information, mask layout information, circuit information, nuclear reaction model and soon, and therefore there is a problem that it is only engineers with a good knowledge of a simulator (i.e. those who developed a simulator) who can use the simulator. An example of the simulation is described in Japanese Unexamined Patent Application Publication No. 2004-251813 (Ibe et al.). Ibe et al. discloses a technique of performing a simulation and feeding back a simulation result to product design, and a method of evaluating the simulation.
Further, there is a technique of performing a simulation using specific information as a parameter and putting results into a table, so that SER can be calculated simply by inputting a parameter. For example, Y. Tosaka, et al., "Simple Method for Estimating Neutron-Induced Soft Error Rates Based on Modified BGR Model", IEEE Electron Device Letters, VOL. EDL-20, NO. 2, pp 89-91, 1999 (Document 4) describes table model data using a MBGR method.
The use of the table model that is described in the above document enables easy calculation of SER with a calculator or the like. However, when using this table model, it is necessary to obtain, by simulation, a value (sensitive depth) d that is calculated from the relationship of cell size and depth with charges (critical charges) Qc required for the inversion of a cell node and a depletion layer W taken into consideration. Therefore, under the present circumstances, the use of a simulator is still needed in order to estimate SER during the design phase. Further, the verification of the accuracy of simulation is also needed. If SER can be estimated accurately without the use of a simulation during the phase of system design, it would be possible to take measures against soft errors in a system and thus offer convenience.

Soft error rate calculation method and program, integrated circuit design method and apparatus, and integrated circuit


A network emulation device and method in a terminal of an IEEE 802.16 communication system supporting IPv6 communications based on a Neighbor Discovery (ND) protocol are provided. The terminal includes an IPv6 module for performing an ND mechanism to search for a neighbor terminal or a router, a MAC module for communicating based on the IEE 802.16 standard, and a network emulation module provided between the IPv6 module and the MAC module for analyzing a ND message received from the IPv6 module and discarding the ND message or generating a response message for the ND message according to the message type. The network emulation module converts a broadcast ND message to a unicast message and provides the unicast message to a corresponding network device if network information needed to internally generate the response message is not collected.

1. Field of the Invention
The present invention relates generally to a wireless communication system. More particularly, the present invention relates to an emulation device and method for supporting Internet Protocol version 6 (IPv6) over an Institute of Electrical and Electronics Engineers (IEEE) 802.16/Wireless Broadband (WiBro) communication network.
2. Description of the Related Art
A broadband wireless communication network technology known as World Interoperability for Microwave Access (WiMax) has recently been adopted as the IEEE 802.16 standard by the IEEE, and a version of WiMax for mobile access, WiBro has been also adopted as IEEE 802.16e. Hence, commercial deployment of portable Internet communication services based on these standards has accelerated.
However, since the IEEE 802.16/802.16e standards are different from the existing radio access technologies including IEEE 802.11x or 3G, IPv4 or IPv6 cannot be directly applied to an IEEE 802.11 network.
For IPv6, a Neighbor Discovery (ND) protocol providing broadcast or multicast message exchanges in the processes of address resolution, router discovery, duplicate address detection, and auto configuration, which are performed by broadcast or multicast, is a requisite to a terminal. However, the IEEE 802.16 network is a point-to-multipoint network and the terminal cannot broadcast or multicast. Therefore, the ND protocol of IPv6 cannot work well.
Accordingly, there is a need for an improved emulation device and method that supports Internet Protocol version 6 (IPv6).

Emulation device and method for supporting IPv6 in WiBro terminal


A pixel defining layer, a display substrate and manufacturing method thereof, and a display apparatus are provided. The pixel defining layer includes: a lyophilic material layer disposed on a base substrate, and a lyophobic material layer disposed at a side of the lyophilic material layer away from the base substrate. An orthographic projection of a surface of the lyophobic material layer close to the base substrate on the base substrate is within an orthographic projection of a surface of the lyophilic material layer away from the base substrate on the base substrate. The lyophilic material layer is made of a lyophilic material having attractability to a solution with organic electroluminescent materials dissolved, and the lyophobic material layer is made of a lyophobic material having repellency to the solution with organic electroluminescent materials dissolved. The pixel defining layer reduces the influence on the uniformity of the films.

An organic light-emitting diode (OLED) display panel includes an anode, a hole injection layer, a hole transporting layer, an organic material film layer, an electron transporting layer, an electron injection layer, a cathode and so on. The organic material film layer may be manufactured through an ink-jet printing technology. When the ink-jet printing technology is used to manufacture the organic material film layer, a pixel defining layer needs to be formed on a base substrate first, and then a solution dissolved with organic light-emitting materials is sprayed on the base substrate on which the pixel defining layer is formed, so as to form the organic material film layer. Here, the pixel defining layer is used to define a plurality of pixel regions on the base substrate.

Pixel defining layer, display substrate and manufacturing method thereof, and display apparatus


A compression monitoring system for a reciprocating engine includes a controller configured to terminate combustion within a combustion chamber of the reciprocating engine while a crankshaft of the reciprocating engine is rotating. The controller is also configured to receive an input signal from a sensor indicative of vibration within a cylinder extending from the combustion chamber while the crankshaft is rotating and the combustion is terminated. Furthermore, the controller is configured to determine a magnitude of the vibration within a frequency range and to determine a maximum pressure within the cylinder based on the magnitude of the vibration within the frequency range. The controller is also configured to output an output signal indicative of the maximum pressure within the cylinder and/or control operation of the reciprocating engine based on the maximum pressure within the cylinder.

The present disclosure relates generally to a compression monitoring system for a reciprocating engine.
Reciprocating engines generally include one or more cylinders and a piston disposed within each cylinder. Each piston is coupled to a crankshaft by a connecting rod. In addition, certain reciprocating engines include at least one intake valve and at least one exhaust valve for each cylinder. The intake valve(s) are configured to control the flow of a fuel/air mixture into the cylinder, and the exhaust valve(s) are configured to control the flow of exhaust out of the cylinder. In certain reciprocating engines, each piston compresses the fuel/air mixture within the cylinder after the fuel/air mixture is provided to the cylinder by the intake valve(s). Effectively compressing the fuel/air mixture prior to ignition increases the efficiency of the reciprocating engine.
However, after extended operational use of the engine, the compression within at least one cylinder may be reduced due to formation of undesirable flow path(s) (e.g., leaks) at the cylinder(s). For example, worn piston rings may enable fluid flow between the piston and the cylinder, worn valve(s) and/or valve seat(s) may enable fluid flow through the valve(s) while the valve(s) are closed, or a worn head gasket may enable fluid to flow between the engine block and the head. Reduced compression may be identified during an inspection of the engine. For example, the spark plug(s) may be removed, a pressure sensor may be coupled to each spark plug opening, and the crankshaft may be driven to rotate while the pressure sensor(s) monitor the pressure within the cylinder(s). Accordingly, this inspection process may be significantly time-consuming. As a result, operation of the engine may be interrupted for a significant period of time.

Compression monitoring system for a reciprocating engine


An integrated LED warning and vehicle lamp has a base configured to replace an existing vehicle lamp by reception into the lamp's reflector shell. The integrated warning and vehicle lamp includes first and second arrays of LEDs arranged on a support projecting from the base. One array is used to reproduce the vehicle signal and the second array provides a warning light signal. A collimator organizes light from one or more LED in a direction aligned with the intended direction of light emission from the vehicle lamp. An interface electrical circuit connects one array of LEDs to the vehicle electrical system. A warning signal electrical circuit energizes the other array to produce a variety of warning signals and/or illumination patterns.

The use of emergency vehicle signal devices for increasing the visibility of public service vehicles is well known in the art. Vehicles using such devices include emergency, police, municipal, and construction vehicles, among others. The most widely employed type of visual warning system is the roof-mounted light bar. Such a light bar includes a plurality of light generators arranged on a support that spans from side-to-side, and either rests upon or is spaced above, the roof of the emergency vehicle. While such light bars accomplish the purpose of producing a wide variety of highly visible light radiation patterns to warn the public of the presence of an emergency vehicle, prior art light bars possess certain inherent disadvantages. For example, such prior light bars tend to increase vehicle wind resistance, increase fuel consumption and produce turbulence that results in interior noise at high speeds. A traditional light bar also increases vehicle height, which may limit access to certain areas, or present the possibility of damage to property or the light bar itself where there is limited overhead clearance. Arguably the most significant drawback to a roof-mounted light bar in the context of law enforcement vehicles is that the presence of a light bar conspicuously identifies the nature of the vehicle.
The prior art discloses aerodynamic light bars, low profile light bars and light bars mounted against the inside of vehicle windows that address some of the disadvantages of traditional roof mounted light bars. Other alternative configurations include various combinations of grill or bumper-mounted warning lights, headlight flashers, warning lights mounted inside the vehicle on the dashboard, sun visors or rearview mirror, and warning lights integrated with the externally mounted rearview mirrors. With respect to warning lights placed inside the vehicle, vision at night can be problematic, due to reflection of the light into the interior of the vehicle.
Another approach to providing an inconspicuous warning light is to place a strobe warning lamp in the reflector shells for the front and rear corner signal/running lamps. This has typically been accomplished by drilling a second opening in the reflector and installing a strobe base and bulb to project into the shell. One drawback of this procedure is the need to modify parts of the vehicle. Further, the strobe lamp cannot be arranged at the focus of the reflector and is thus rendered significantly less effective in its warning function. Strobe-type lamps are known to be relatively short lived and require frequent maintenance.
The use of LED's in warning and signaling lights is well known. Older models of LED's produced limited quantities of light over a relatively narrow viewing angle centered around an optical axis of the LED. These LED's were typically massed in compact arrays to fill the given illuminated area and provide the necessary light output. Modern LED's produce significantly greater luminous flux per component, permitting fewer LED's to produce the luminous flux required for many warning and signaling applications. It is known to arrange a small number of high-output LED's in a light fixture and provide each high-output LED with an internally reflecting collimating lens. The collimating lens gathers light from the LED into a collimated beam centered on the LED optical axis. Such an arrangement typically does not fill the light fixture, resulting in an undesirable appearance consisting of bright spots arranged against an unlit background. Light-spreading optical features on the outside lens/cover are sometimes employed to improve the appearance of the light fixture.
There is a continuing need for a new and improved emergency vehicle signal light that provides high visibility for an emergency vehicle while overcoming the disadvantages discussed above. The emergency vehicle light is preferably energy efficient and requires little or no maintenance.


A method for reading various registers of a computer system without changing the emulator software. Address register 22, data memory I/O 30 and control register 26 surrounding D-MEM (data memory) 14 are configured as registers of a master/slave latching circuit in which serial scanning is possible, and are sequentially scanned during one scanning pass (1). Data memory I/O register 30 is connected to D-BUS (data bus) 10. External I/O registers RG1, RG2, . . . RGn are respectively connected to D-BUS (data bus) 10 and mapped in the I/O space. An IN'/OUT' instruction which can transfer data between data memory I/O register 30 and each external I/O register RG1 (i=1, 2, . . . , n) is generated.

An in-circuit emulator is used for testing or debugging software for a computer system, such as a microcomputer, or for checking hardware operation. The target system software or hardware is checked or debugged by running a program (target program) in the computer system which becomes the emulation target (target system), by detecting the pattern of arbitrary execution information with a trace function during the execution, or by checking the state of each part within the system by interrupting the target program at break points with a break function.
Many emulators read out the contents or information in the main registers (e.g., accumulator or memory I/O register, etc.) within the target system by a scanning pass system to check the state of each part within the system at the break point.
A scanning pass system will be explained with reference to FIGS. 4-6. In FIG. 4, target system 100 is, for example, a microprocessor or DSP (digital signal processor) with various registers. Of the various registers, the registers of the main parts of the system, for example, the registers of the address system, the registers of the control system, and registers (I/O register) of the data system which reads or writes data by specifying a register name together with a program instruction, such as the memory I/O register or accumulator register, etc., are scanned during scanning passes (1), (2), (3), . . .
The structure of a register scanned during a scanning pass is shown in FIG. 5. As one possible example, the register has 4 bit positions. Each bit element of this type of register is composed of a master/slave latch circuit (flip-flops) FF0-FF3 in which serial scanning is possible as shown in FIG. 6.
In FIG. 6, flip-flop FFi in each step (digit) is composed of slave latch circuit LS which holds the data and master latch circuit LM which receives the data.
In the regular mode, determination of input data in master latch circuit LM and change in the output data in slave latch circuit LS are executed by synchronizing with phase shifted master clock MCLOCK and slave clock SCLOCK provided respectively to input gate circuits GM and GS. Therefore, while data is being input to master latch circuit LM, slave latch circuit LS holds and outputs the data of the previous cycle, receives the data from the master side at the data input port (gate circuit GS) of slave latch circuit LS which opens simultaneously with the closing of data input port (gate circuit GM) of master latch circuit LM, and the output data is updated. In the regular mode, the other (scan use) input gate circuit GT of master latch circuit LM is closed. Therefore, the register in FIG. 6 operates as a parallel in/parallel out type register.
During the scanning pass mode, feeding of master clock MCLOCK stops, gate circuit GM closes, and instead test clock TCLOCK is fed to gate circuit GT. Thus, data from the scan in input terminal is input to master latch circuit LM by synchronizing with test clock TCLOCK, then this data is input to slave latch circuit LS by synchronizing with slave clock SCLOCK, and is output to flip-flop (FFi+1) in the next step. In this way, the register in FIG. 6 operates as a serial in/serial out type register in the scanning pass mode.
As noted above, each register connected to the scanning bus is formed to input and output the data in parallel in the regular mode and to serially input and output the data in the scanning pass mode.
Generally, multiple scanning passes are provided within one computer system and one or more registers are connected in series on each scanning pass. For example, in target system 100 shown in FIG. 4, two registers RA1 and RA2 are connected in series on first scanning pass (1), three registers RB1, RB2, and RB3 are connected in series on second scanning pass (2), and two registers RC1 and RC2 are connected in series on third scanning pass (3). Both terminals of each scanning pass (1), (2), (3), . . . are connected to emulator 110 via data input/output terminals 106 and 108 and multiplexers 102 and 104. The number and arrangement of the registers and scanning passes shown in FIG. 4 are just one example, which is used for the sake of explanation.
When the program in target system 100 is stopped at a prescribed break point in the emulation, information expressing the system state at this point in time is held in registers RA1, RA2, . . . Emulator 110 successively selects scanning passes (1), (2), (3), . . . by switching mutliplexers 102 and 104, feeds test clock pulse TCLOCK and slave clock pulse SCLOCK to each register on the selected scanning pass, then sequentially reads the contents of each register to the outside of target system 100, then latches the contents by moving serially during the scanning pass. Emulator 110 knows ahead of time the order of the registers during each scanning pass, so that a series of serial data included with each scanning pass is separated for each register and the content (information) of each register is displayed on the screen of display 112 at the break point.
In the custom design of a computer system, the main part of the system is designed by the manufacturer as the core and the remainder is left to the customer. In this case, each register within the core is scanned during one of the scanning passes as described above. On the other hand, there are times when the customer uses register RX outside the core as one of the system elements (FIG. 4) and desires to monitor the register contents during emulation. Normally, multiple I/O registers are prepared outside the core and are selected by the customer.
Conventionally, when there was such a specification request from the customer, selected I/O register Rx outside the core was scanned during one of the scanning passes, and during the emulation, the contents of the register Rx were read by sequentially scanning during the scanning pass which includes the core register.
However, when register Rx outside the core is included in the scanning pass, in addition to the requirement of making even this register Rx into a register composed of a master/slave type latch circuit which can be serially scanned, the software on the emulator 110 side must be changed since the layout and the arrangement pattern of the register change during the scanning pass which includes the register Rx. Moreover, the register arrangement pattern changes arbitrarily during one of the scanning passes for each request specified by the customer, so that there was the problem of changing or developing emulator software each time; thus, the design efficiency was low.
The present invention was conceived in light of the problems, and it aims to provide a method which can read various registers within a computer system being emulated without changing the emulator software.
Another objective of the present invention is to provide a method which can read or write from an emulator with respect to a register not included in the scanning pass within the computer system.

Method of monitoring registers during emulation


Oblique web multiple surface panel boards are disclosed made of aromatic polycarbonates (PC), consisting of at least two boards arranged parallel to one another at a given distance apart and joined together by webs arranged between them, one portion of the webs connecting the upper and lower board in zigzag formation, viewed in cross-section, while the other portion of the webs is attached to the upper or lower board at the junctions of the oblique webs and extends perpendicularly towards the opposite board.

The present invention relates to oblique web multiple surface panels, in particular webbed double surface board panels of aromatic polycarbonates or webbed multiple surface board panels in general. These consist of at least two parallel panels joined together by webs extending in particular arrangements.
The most frequent of the known panels is the webbed double panel in which the webs extend perpendicularly to the plane of the panel at regular spaced apart distances so that, when viewed in cross-section, a row of adjacent rectangular chambers is formed.
Owing to the anisotropic character of such boards with respect to their flexural strength, other geometrical forms such as, for example, the so-called framework geometry such as marketed under the trademark DEGLAS and VEDRIL have been developed in particular for products fabricated of PMMA (polymethyl methacrylate).
In these geometrical forms, the webs enclose an angle of about 45.degree. with respect to the horizontal plane of the panel, thus providing for reduced tension forces and increased rigidity for a given weight per unit area due to improved transmission of transverse forces.
As a result of these measures, the supporting elements located between the two major parallel surfaces of the panel may be arranged further apart so that there is a saving in the amount of material necessary to form the supporting construction and a saving in the time required for its installation.
A construction similar to the PMMA framework geometries has not hitherto been realized for polycarbonate webbed panels.
The only known construction is a so-called X-board 16 mm in thickness in which two 45.degree. webs per chamber are incorporated in the geometry in addition to the vertical webs.
Due to the additional oblique webs, this board has a weight per unit area of 3.3 kg/m.sup.2, which is substantially higher than that of standard 16 mm PC webbed boards (about 2.7 to 3.0 kg/m.sup.2).
It is not possible simply to apply the geometries which have been found satisfactory for the production of PMMA boards to boards made of polycarbonates due to the differences in the properties of the materials (e.g. modulus of elasticity).
Under heavy loads, the boards buckle before the maximum load is reached.

Oblique web multiple surface panels fabricated of aromatic polycarbonates


Methods of forming T-gate structures on a substrate are provided that use only UV-sensitive photoresists. Such methods provide T-gate structures using two lithographic steps using a single wavelength of radiation.

The present invention relates generally to the manufacture of electronic devices. More particularly, the present invention relates to the fabrication of T-gate structures used in the manufacture of electronic devices.
A T-gate is a gate conductor structure for a semiconductor device in which the top of the gate conductor structure is wider than the base of the gate conductor structure. Such T-gates include, without limitation, structures that are substantially T-shaped, mushroom-shaped, and Y-shaped.
In general, gate structures such as T-gates have been advantageously used in several technologies. For example, metal semiconductor field effect transistors ("MESFETs"), high electron mobility transistors ("HEMTs") (variant of gallium arsenide field effect transistor technology) mainly used in satellite broadcasting receivers, high speed logic circuits and power modules have employed gate structures with bases smaller than the contact area. These types of gate structures are required in field effect transistors for operation in ultra-high frequency ranges. The narrow base of a T-gate structure provides a short channel length which results in increased speed and decreased power consumption. Parasitic resistances and capacitances that limit device speed are also reduced. The top portion of a T-gate is made wide so that the conductance of the T-gate remains high, for example, for high switching speeds.
Recent advances in CMOS transistor architecture make use of T-gate structures where the polysilicon gate electrode is narrowed in the gate regions and wider on top of the gate. This is due to the ever increasing demand for scaling down semiconductor devices and scaling down power consumption requirements.
Electron-beam ("e-beam") is the most commonly used technique for T-gate fabrication. FIGS. 1A-1D illustrate a process for forming a T-gate using e-beam. Typically, substrate 1 is coated with a layer of first poly(methyl methacrylate)-based photoresist 2, a layer of second poly(methyl methacrylate)-based photoresist 3, and a layer of third poly(methyl methacrylate)-based photoresist 4. Photoresist layers 2 to 4 are then exposed to e-beam and developed to provide a patterned photoresist stack having generally T-shaped profile 5 as shown in FIG. 1B. A layer of a conductive material 6 is then deposited on the entire surface inclusive of the surface of substrate 1 exposed by the patterning of the photoresist layers, see FIG. 1C. Photoresist layers 2 to 4 are then removed, lifting-off the conductive material layer on the surface of photoresist layer 4 in the process, to provide T-gate structure 7 on substrate 1 as shown in FIG. 1D.
However, such e-beam techniques suffer from certain drawbacks. For example, e-beam lithography suffers from poor linewidth control in the multi-layered stacks used in typical T-gate processes because the exposing e-beam must pass through relatively thick resist films (e.g., about one micron). Further, e-beam exposure is a direct write process which is both slow and expensive.
Other methods of forming T-gates have been developed. Certain of these methods utilize a number of sacrificial inorganic layers which require various etching steps and harsher removal processes than photoresist-based processes. Other methods utilize multiple photoresist layers, however, these multiple photoresist layers are imaged at different wavelengths. For example, U.S. Pat. No. 6,387,783 (Furukawa et al.) disclose a process for forming T-gates using a hybrid first photoresist that is imaged using x-rays and a second photoresist that is imaged using I-line radiation. The use of such different wavelengths requires different exposure tools, which increase the costs and complexity of the process. Accordingly, a need exists for improved methods of forming T-gate structures.


The presently disclosed subject matter includes a method and system of planning autonomous mission, the mission being executed by one or more autonomous agents. A generic mission template is obtained, the generic mission template being constructed from a plurality of mission-objects and defines logical connections between the plurality of mission-objects, wherein each mission-object is configured to logically represent a respective type of mission-element; one or more mission-object in the generic mission template are associated with a respective real world mission-element, thereby generating a specific mission plan; with the help of a processor an agent-specific mission plan is generated for the one or more agents, based on the generic mission template and the specific mission plan, wherein an agent specific mission plan comprises tasks assigned to a respective designated agent and is compatible with the technical requirement of the respective designated agent.

Autonomous systems are systems which can perform desired tasks without continuous human guidance. The degree of autonomy of different systems may vary and different systems can be autonomous in different ways. Some systems can have limited autonomy confined to limited tasks while others can be fully autonomous. As used herein the term "autonomous mission" includes any mission that includes the operation of an autonomous system.
The term "autonomous system" as used herein includes any kind of physical, virtual or other agent which can perform tasks based on a predefined logic without or with some limited degree of human intervention. Accordingly, the term "autonomous system" may refer to mechanical assembly or a component thereof designed for autonomously performing specific tasks such as, for example: a domestic robot designed for cleaning houses, an autonomous excavator designed for autonomously removing soil, a space exploration vehicle, an autonomous unmanned aerial vehicle (UAV) with an onboard autonomous surveillance camera, an unmanned surface vehicle (USV) on a shore patrol mission, a submersible autonomous vehicle, or machinery of a factory assembly line designed for completing one or more tasks (e.g. painting and/or inspecting a passing product), etc.
Additionally, the term "autonomous system" may also include any virtual intelligent agent (or a machine in which such a virtual intelligent agent is embedded) which exhibits a machine with autonomous capabilities. For example, autonomous system may refer to an agent embedded within a regular aircraft providing the aircraft with autonomous capabilities. For instance, enabling the aircraft to autonomously fly to a desired location and drop a load at that location without, or with limited intervention of the pilot.
In order to complete complex autonomous missions, many times, the cooperation and/or resource-sharing between several autonomous systems are required. The autonomous behavior which is needed for completing such missions can be achieved for example, through the combined effort of a plurality of autonomous systems, each system configured for completing one or more specific tasks. For example, an unmanned ground vehicle (UGV) which navigates to a specific location using coordinates provided by a UAV targeting that UGV with an electro optic payload and directing the UGV to its destination.
Each autonomous system participating in the mission is designed and specifically programmed with its specific instructions in order to accomplish its specific tasks. To this end, autonomous mission plans, which contain instructions to the participating autonomous systems in an autonomous mission, are often hardcoded or loaded into an autonomous mission computer which controls the operation of the autonomous system.
In general autonomous missions can be divided into two virtual layers of information: the physical layer and the tactical (or logical) layer. The physical layer defines "where" the mission will take place, or in other words the physical environment in which the system will operate. The tactical layer defines how the system will behave, or in other words what will be the decision-logic used for determining the various courses of action made by the system during its operation.
However, in practice information belonging to both layers is interwoven into the mission in different ways. In some cases missions are mostly terrain-driven where mission planning is almost exclusively map-based and decisions are based on the platform position and status. In other cases missions are time or event-driven, causing the platform to behave according to inputs from external sources. In any case the decision logic of an autonomous system is tied to the expected geographical conditions and/or an expected external input of a specific mission.
Missions which are closely tied to a certain geographical outset and/or to certain external input can perform well in the expected scenario but are almost useless for reuse or modification purposes. An autonomous system designed for performing a task in one specific environment cannot be easily converted to perform a different task in different geographical conditions and/or based on different external input. Often, the decision-logic is created en masse with the geographic pattern, and the two are so inherently intertwined such that any attempt to separate these virtual layers will result in the de-facto re-planning of the mission. Furthermore, due to the strong connection between the two intertwined physical and logical layers, modifying a task assigned to an autonomous system, in real-time during the execution of a mission, when the system is active—is practically impossible. This problem becomes more complicated where a number of autonomous robots coordinate, each performing specific tasks, in order to complete a desired mission. Instead, different autonomous systems are specifically reprogrammed and adapted to the new tasks, a process which is cumbersome and time consuming.

Planning and monitoring of autonomous-mission


A method and a surgical guidance system (20) direct an instrument to a target (40) located inside a patient (22). The surgical guidance system (20) includes a fixation frame (28), a first arc member (36), a second arc member (38), and first (78) and second (84) electromagnetic (EM) radiative sources. The first arc member (36) and the second arc member (38) are adjustably coupled to rotate about a common axis (48) and are adjusted in response to a target address and at least three marker addresses so that the target (40) is located at the center point of a virtual sphere defined by the arc members. A first electromagnetic (EM) radiative beam (80) and a second electromagnetic (EM) radiative beam (86) are projected from the system (20) and intersect at a line. The line forms a trajectory (146) along which an instrument can be directed to the target (40).

A number of frame and frameless stereotactic systems have been developed to assist surgeons during various procedures that require an instrument to travel to a target within a body. Typically, a surgeon analyzes images of the body (e.g., CT scans, MRI scans, or PET scans) to determine the location of the target and to determine a desirable trajectory along which the instrument should travel during the surgical procedure.
Frameless stereotactic systems do not require the body to be mechanically fixed directly to a reference frame or other device during the surgical procedure. In addition, frameless stereotactic systems are generally less invasive and allow a surgeon to move a surgical instrument in any desired direction without being restricted by cumbersome mechanical structures. As such, frameless stereotactic systems often reduce the amount of patient trauma associated with certain surgical procedures while providing the surgeon with an adequate amount of positional freedom during surgery.
Conventionally, stereotactic systems attempt to determine the precise location of the surgical instrument relative to a reference point within a coordinate system. Some frameless stereotactic systems utilize sophisticated optical, RF, magnetic, audio, or other methodologies to generate a three dimensional reference volume around the surgical area. Typically, the surgical instrument carries a system-compatible emitter or sensor, and the position of the instrument is determined relative to a number of reference points to facilitate precise location analysis anywhere within the reference volume.
Many surgical procedures require the surgeon to approach a target along a predetermined trajectory. As such, knowledge of the precise location of the surgical instrument within the entire field of operation may not be useful to the surgeon. In other words, the surgeon may primarily need guidance to the predetermined target rather than knowledge of the exact location of the instrument at all times.
Some conventional stereotaxic systems utilize software programs and realtime position feedback techniques to precisely locate the instrument. The data generated by such systems may be difficult to interpret unless the operator is very familiar with the particular system. Thus, surgeons and medical technicians may require extensive training before they can efficiently operate these systems. The complex software and extensive training increases the expense of such systems and results in reluctance by the surgeons to use such systems. Thus, these systems do not get widespread use.
Frameless stereotactic systems may also employ a number of sensitive electronic components. Due to the precision and sensitivity of the electronic components, complex and time consuming calibration and set-up procedures are needed. These procedures may involve the patient prior to commencement of the surgery. This approach may lengthen the amount of time that the patient is under anesthesia thereby increasing the medical risks to the patient.
Other frameless stereotactic systems that precisely locate and orient the instrument may overly restrict the amount of positional freedom available to the surgeon during free-hand surgery. For example, a surgeon may desire to change the trajectory to a target during surgery. A change in the trajectory may be desired to avoid critical or eloquent areas of the brain to the maximum extent possible to prevent permanent brain damage or excessive bleeding. In such a situation, a surgeon may desire to select new surgical entry point. These stereotactic systems may not be able to provide guidance along a new trajectory without extensive, time consuming recalibration and realignment.

Method and system for directing an instrument to a target


A method for reducing or maintaining the level of adipose tissue formation in a mammal includes the step of administering a pantethine composition to the mammal in an amount and for a period of time sufficient to achieve a desired body weight. Compositions useful in carrying out the method include an adipose modulating amount of the pantethine component and a pharmaceutically acceptable carrier.

In humans, excessive adiposity, or body weight, is a problem bordering on obsession in certain populations, particularly in Western cultures. Popular weight loss methods extend from behavioral regimes to pharmaceutical therapies, encompassing a vast spectrum of diets, diet aids, exercise programs and alleged miracle cures. However, among these methods, very few are specifically directed toward modulating the known biochemical processes of adipose synthesis and metabolism.
According to one prevailing hypothesis, most mammals (including humans) produce adipose tissue through adipose tissue lipoprotein lipase (ATLPL) hydrolysis of fatty acids from the triglycerides of circulating triglyceride-rich lipoprotein. The released fatty acids are taken up by adipocytes, converted to triglycerides, and stored. Thus, the so-called "lipoprotein lipase hypothesis" holds that ATLPL particulates in the preferential production of adipose tissue from excess fat calories (see, e.g., Isselbacher et al. "Harrison's Principles of Internal Medicine", Vol. 1, Part 5, p. 448 (McGraw-Hill, 1994)). Hypertriglyceremia and hyperlipoproteinemia conditions have been associated with obesity through excessive hepatic secretion of triglycerides in response to increased levels of free fatty acids in plasma (id. at p. 449).
To date, the common pharmaceutical approaches to weight management have been principally palliative, involving administration of anorexiants (generally amphetamine-like agents to suppress appetite) or thyroid hormone (where obesity is related to hyperthyroidism) (id. at p. 551). Neither approach is targeted to the biochemical pathways associated with adipose formation.
In contrast, research regarding the pharmaceutical control of excessive lipid levels in serum and body organs (particularly the liver and vessels of the cardiovascular system) has been extensive in recent years. For example, since about 1980, pharmaceutical hypolipidic agents began to be tested in animals and humans for their effect on circulating levels of lipids and cholesterol for treatment of diseases of the liver and cardiovascular system. One such hypolipidic agent studied is pantethine, a disulfide linked pantetheine dimer in which each dimeric unit includes pantothenic acid (vitamin B.sub.3) linked to .beta.-mercaptoethylene. Pantethine has a molecular weight of 554.7 g/mol and has the following structure: ##STR1## Pantethine is an intermediate in the metabolic pathway for biosynthesis of acetyl coenzyme A (CoA).
Pantethine has been used clinically and/or experimentally to deliver cysteamine to reduce plasma and pituitary prolactin in humans (Jeitner and Oliver, J. Endocrinol., 124: 397-402, 1990), to reduce total serum cholesterol and triglyceride levels in human patients suffering from, or at risk for, cardiac disease (Arsenic et al., Acta. Biomed. Ateneo Parmense, 58: 143-152, 1987; U.S. Pat. No. 4,571,401 to Picciola et al.), to limit hepatic lipid storage in chickens (Hsu et al, Poult. Sci., 66: 280-286, 1987), to limit hepatic fibrosis in humans (U.S. Pat. No. 4,937,266 to Tomikawa et al.), and to inhibit phase separation of ocular lens proteins for treatment of cataract conditions. Pantethine has also been shown to be atoxic in animals and humans (see, e.g., Donati et al., Clin. Nephrol., 25: 70-74, 1986; Arsenic et al., supra). A pantetheine derivative, pantetheine-S-sulfonic acid, has been employed to improve lipid metabolism (U.S. Pat. No. 4,568,683 to Suga et al.).
However, to date, pantethine per se has not been widely used to treat abnormal lipid accumulation and metabolism in humans (Harrison's Principals of Internal Medicine, supra at pages 450 and 1112-1113), and has not been suggested as a possible pharmaceutical agent of use in the control of excessive adipose deposition in animals or humans.
A continuing need exists for effective compositions and treatment regimens for the control of excessive adipose deposition in mammals.

Methods and compositions for reducing or maintaining body weight in a mammal


A communications system has two transmission circuits, each transmitting a multiplexed signal in both ways. A repeating installation used therein selects either one of the two transmission circuits and terminates management information contained in a signal which flows through a transmission circuit selected by the selecting unit. The repeating installation sets the other non-selected transmission circuit to be in a high impedance state. The selection and termination are commonly performed for the two transmission circuits, and the repeating installation further extracts the management information transmitted and outputs the management information to be outputted. The management information includes a section overhead having management information concerning a repeating section of the communications system, and the repeating installation does not terminate management information concerning a multiplex section. One of the two transmission circuits includes a spare transmission circuit.

1. Field of the Invention
The present invention relates to an optical communications network, and in particular to a repeating installation used in a synchronous optical communications network.
Recently, as a hierarchy providing a wideband service, an SDH (Synchronous Digital Hierarchy) has been internationally standardized. A SONET (Synchronous Optical NETwork), which is used in a North America, is one example of such a hierarchy.
2. Description of the Related Art
FIG. 1 shows a block diagram of an example of a SONET transmission system. A repeating installation, ADM (Add/Drop Multiplexer) is provided between two apparatuses which comprise line terminated equipment (LTE) LTE1 and LTE2 which face each other in a point-to-point network arrangement. Each of the line terminated equipment LTE1 and LTE2 forms a higher-order group optical interface (input and output interface) for a multiplexed optical signal OC-N (`OC` being an abbreviation of Optical Container and `N` being an arbitrary number). For example, OC-12 has a transmission rate of 622.08 Mbps. The line terminated equipment LTE1 and LTE2 are connected with each other, via the repeating installation ADM, using two both-way optical transmission circuits L1 and L2. Either circuit (optical fibers) of the two optical transmission circuits L1 and L2 is used as a currently used circuit and the other one is used as a spare circuit. The repeating installation ADM has functions of extraction and insertion of a service signal (terminating function), in addition to functions of regenerative repeating, extraction and insertion for a main signal (terminating function). The service signal contains various monitoring and control information and is used for maintaining and monitoring a telephone line, for maintenance persons to communicate with each other, and SONET transmission system. Such a service signal is transmitted in use of a section overhead SOH or a line overhead LOH contained in a transmission signal.
In a SONET, the section overhead SOH is used for managing a repeating section between repeating installations, and the line overhead LOH is used for managing a multiplex section between line terminated equipment. As will be described later, the section overhead SOH has an arrangement of 3 rows by 9 columns and the line overhead LOH has an arrangement of 5 rows by 9 columns. The section overhead SOH and line overhead LOH are added at the top of a multiplexed digital signal. A path overhead for managing a path between multiplexing apparatuses is also used for maintenance and monitoring.
FIG. 2 shows a block diagram of part of the above-mentioned repeating installation ADM. Interfaces INF1 and INF2 are provided for the transmission circuits L1 and L2 from the line terminated equipment LTE1, respectively. Interfaces INF3 and INF4 are provided for the transmission circuits L1 and L2 from the line terminated equipment LTE2, respectively. In FIG. 2, circuits for extracting overheads SOH and LOH (service signal) in the interfaces IF1, IF2, IF3 and IF4 are indicated, and circuits for inserting the overheads SOH and LOH are omitted. Outputs of the interfaces INF1 and INF2 are integrated through a high impedance control unit C, and similarly outputs of the interfaces INF3 and INF4 are integrated through a high impedance control unit C. The high impedance control unit C of either one of the interfaces INF1 and INF2 is set to be at a high impedance, and the high impedance control unit C of either one of the interfaces INF3 and INF4 is set to be at a high impedance. Accordingly, the overheads SOH and LOH outputted by either one of the interfaces INF1 and INF2 are extracted, and the overheads SOH and LOH outputted by either one of the interfaces INF3 and INF4 are extracted. Because the same signal is transmitted in the currently used circuit and spare circuit, it is enough that the overheads SOH and LOH of the signal is transmitted via either one of the two circuits.
As a repeating installation similar to the above-described repeating installation ADM, there is a regenerator (REG). As shown in FIG. 3, the regenerator REG, similar to the repeating installation ADM, is provided between the line terminated equipment LTE1 and LTE2. Further, the regenerator REG may be provided between the repeating installations ADM. Different from the repeating installation ADM, the regenerator REG does not have the functions of extracting and inserting a main signal and line overhead LOH.
FIG. 4 shows a block diagram of part of the above-described regenerator REG. As shown in the figure, interfaces INF11 through INF14 are provided for respective lines of two transmission circuits. Different from the repeating installation ADM, the regenerator REG does not necessarily perform repeating on both the currently used circuit and the spare circuit. For example, shown in FIG. 5, the regenerator REG performs repeating on either one of the currently used circuit and the spare circuit between the line terminated equipment LTE1 and LTE2, and on either one of the currently used circuit and the spare circuit between the line terminated equipment LTE3 and LTE4, Accordingly, different from an arrangement shown in FIG. 2, the regenerator REG does not have the high impedance control unit C. Specifically, as shown in FIG. 4, the section overheads are extracted from all of the four lines of the two transmission circuits. Further, as described above, the regenerator REG does not extract and cause the line overheads to pass therethrough.
FIG. 6 shows a block diagram of part of a regenerator REG in the related art. The regenerator REG shown in the figure has higher-order group interface units 10, which are provided for the four lines of the two transmission circuits, and overhead processing mechanism 12 which has overhead processing units 12a, 12b, 12c and 12d. Section overheads SOH extracted in the higher-order group interface units 10 are sent to and terminated in the overhead processing units 12a, 12b, 12c and 12d, respectively. Main signals indicated by bold lines in FIG. 6 pass through the higher-order interface units 10 (it being regenerative repeating and the main signals not being terminated there.)
However, in the regenerator in the related art shown in FIG. 6, the overhead processing units 12a through 12d are provided for the respective lines of the transmission circuits and thus prevent the installation from being miniaturized, decreasing power consumption and decreasing cost.


A heat treatment apparatus and control method enabling the apparatus to settle down an internal temperature of a treating vessel to a target temperature accurately and quickly. The heat treatment apparatus includes a furnace body with a heater on an inner circumferential surface thereof, the treating vessel disposed inside the furnace body, a cooling medium supply blower and cooling medium release blower each connected to the furnace body, and a temperature sensor provided inside the treating vessel. A signal from the temperature sensor is sent to a heater output computing unit and blower output computing unit included in a controller. The heater output computing unit determines a heater output level based on a heater output numerical model and the signal from the temperature sensor. The blower output computing unit determines a blower output level based on a blower output numerical model and the signal from the temperature sensor.

1. Field of the Invention
The present invention relates to a vertical-type heat treatment apparatus.
2. Description of the Related Art
During the manufacture of semiconductor devices, various types of heat treatment apparatuses are used to conduct oxidizing, diffusing, chemical vapor deposition (CVD), annealing, and/or other heat treatment processes, upon materials to be heat-treated, such as semiconductor wafers. Among these apparatuses is known a vertical-type heat treatment apparatus capable of heat-treating a large number of sheets at a time. This conventional vertical-type heat treatment apparatus includes a quartz-made treating vessel having an opening in its lower portion, a lid for blocking/unblocking the opening in the treating vessel, a holder provided on the lid, for holding in a vertical direction at predetermined spatial intervals, a plurality of objects to be processed, and a furnace body surrounding the treating vessel and including a heater to heat the target materials after loading of the materials into the treating vessel.
JP-A-2002-305189, for example, proposes another vertical-type heat treatment apparatus, which is equipped with an air blower to forcibly air-cool a treating vessel by supplying air to the inside of a furnace body including a heater. The blower has been used for rapidly cooling wafers and the treating vessel after heat treatment.
Heat treatment processes include heat-treating wafers in a low-temperature region of, for example, 100 to 500° C., for a purpose such as forming a layer of a low dielectric constant. During the heat treatment in the low-temperature region, it becomes important how fast the furnace interior can be heated up or cooled down to a predetermined heat-treating temperature. An existing heat-treatment apparatus proposed for low-temperature applications includes a metallic treating chamber, not a quartz-made treating vessel, to obtain faster thermal response. However, if reaction products, by-products, or other substances are likely to stick to the furnace interior during the heat treatment, the use of a quartz-made treating vessel easier to clean and replace than a metallic treating chamber is necessary for reasons associated with the apparatus configuration. Additionally, although energy saving in the apparatus is achievable by using a heater having high heat-insulating performance, the use of the heater deteriorates the furnace in the controllability of internal temperature. In this case, it also becomes important how fast the furnace interior can be heated up or cooled down to a predetermined heat-treating temperature, and this issue also applies to temperatures other than those of the low-temperature region discussed above.


A method and system for delivering digital files in a peer-to-peer network comprising a plurality of nodes including at least one server is disclosed. The network includes a plurality of files that are available for accessibility by the nodes in which respective fingerprints are computed for each of the files based on content of the files. The method and system include partitioning each of the files into a plurality of file chunks, and assigning an error detecting code to each of the chunks. The file is then transmitted to a first node from at least one other node by transmitting the chunks of the file to the first node. The method and system further include computing a new error detecting code upon receipt of each chunk by the first node, and comparing the new error detecting code to the assigned error detecting code to verify that each chunk has been transmitted correctly, whereby the entire contents of the file does not have to be received before the first node discovers that the file is corrupt. In a further embodiment of the present invention, the method and system include determining the bandwidth contributed by each node that successfully transmitted a chunk of the file, and paying an owner of each node a fee based on the contributed bandwidth.

U.S. patent application Ser. No. 09/883,064, filed Jun. 15, 2001, assigned to the assignee of the present application, discloses a technique for accessing information in a peer-to-peer network. Each file accessible in the peer-to-peer network is assigned a respective hash ID or fingerprint ID which is used to describe the contents of that file. A conventional hash or fingerprinting algorithm analyzes the contents of a selected file and generates a unique hash ID or fingerprint ID that is used for identifying the specific contents of that file. The hashing algorithm is designed such that no two files having different file content will have the same hash ID. However, files having identical file content will have the same hash ID.
Files in the peer-to-peer network are then identified and/or accessed based upon their associated hash ID values. In this way it is possible to identify identical files stored in the peer-to-peer network which have different file names and/or other metadata descriptors. Additionally, since the content of all files having the same hash ID will be identical, an automated process may be used to retrieve the desired content from one or more of the identified files. For example, a user may elect to retrieve a desired file (having an associated hash ID) which may be stored at one or more remote locations in the peer-to-peer network. Rather than the user having to select a specific location for accessing and retrieving the desired file, an automated process may use the hash ID (associated with the desired file) to automatically select one or more remote locations for retrieving the desired file.
The automated process may choose to retrieve the entire file contents of the desired file from a specific remote location, or may choose to receive selected portions of the file contents of the desired file from different remote locations in the peer-to-peer network. Further, if an error occurs during the file transfer process, resulting in a partial file transfer, the automated process may be configured to identify the portion(s) of the desired file which were not retrieved, and automatically select at least one different remote location for retrieving the remaining contents of the desired file.
Although retrieving portions of the file from different remote locations may speed the file transfer process, one disadvantage of the process is that it cannot be determined if the file is corrupt until all the portions of the file are received. For example, assume a user is downloading a movie and the movie is being retrieved in multiple portions from multiple locations. Only after all the portions of the movie are retrieved is an attempt made to reassemble the movie and generate a new fingerprint ID. The new fingerprint ID is then compared with the known fingerprint ID, and the movie is determined to be corrupt if there is no match. Certain portions of the file may also be corrupted by a hacker who intentionally sends corrupt file portions (e.g. a virus) to the unsuspecting user downloading the file. In either case, spending the time to download the entire contents of the file before determining it is corrupt is a waste of the user's time and network bandwidth.
An additional disadvantage is that the peer nodes in a peer-to-peer network may be of different configurations and may have disparate network connection capabilities. In a public peer-to-peer network, for example, some peers may be home PC's with 56 k modem connections, while others may be high-speed corporate workstation with T3 connections. Consequently, some nodes in the network may be less reliable than others. With the current scheme for retrieving files in the network, there is currently no easy process for determining which peer nodes are producing the file transfer errors. Therefore, it is difficult to increase the overall reliability of the peer-to-peer network. An additional problem current peer-to-peer networks, is that there is no incentive to induce users to donate their peer devices to the network to serve files to other users.
Accordingly, what is needed is an improved method and system for distributing digital files in a peer-to-peer network. The method and system should reduce the impact of file transfer errors, weed out unreliable peer nodes, and reward users who allow their peer devices to serve files, thereby increasing bandwidth of the network. The present invention addresses such needs.

Method and system for delivering files in digital file marketplace


A circuit for generating a moving image tracking cursor in a camera, including a pickup for converting optical information into an electrical signal, a video signal processor for separating the picked-up signal into luminance and color signal, a filter for filtering only a high-band component of the separated luminance signal, a converter for converting the filtered signal into a digital signal, a detector for receiving the digital signal by predetermined intervals of picture, dividing the receiving signal by a plurality of subscreens, and integrating it by the subscreens, a motion forecasting circuit for calculating the difference between a current signal output from the converter and a precedingly detected signal, a cursor generator for variably designating the location of cursor in the subscreen where the largest integration is detected proportionally to the predicted amount of movement of the object, and a signal converter for mixing the cursor signal and a composite video signal.

The present invention relates to a circuit for generating a moving image tracking cursor in a camera, and more particularly to a circuit for generating a moving image tracking cursor which can generate a cursor while tracking a moving object to be photographed.
Usually, the center of a picture to be photographed is indicated by a crossed hair in a video camera. The crossed hair is, however, simply dependent upon a mechanical method for indicating the center's location.
According to the method, the crossed hair is marked on the glass of an electronic view finder (EVF) screen, or is displayed after a picture's center is found by counting horizontal sync signals.
However, the former has a problem in that the location of the crossed hair does not correspond to the picture's center. The latter can locate the crossed hair at the exact center of the picture. However, neither method is capable of displaying the crossed hair in accordance with the movement of an object to be photographed, by tracking it.
Accordingly, in the above conventional methods, when taking a picture of a moving object, the user must fit the crossed mark to the object's center by moving the camera, so that the horizontal and vertical balance of a picture is not precisely maintained and the object to be photographed is difficult to track.

Circuit for generating moving image tracking cursor


A technique for implementing read-copy update in a shared-memory computing system having two or more processors operatively coupled to a shared memory and to associated incoherent caches that cache copies of data stored in the memory. According to example embodiments disclosed herein, cacheline information for data that has been rendered obsolete due to a data update being performed by one of the processors is recorded. The recorded cacheline information is communicated to one or more of the other processors. The one or more other processors use the communicated cacheline information to flush the obsolete data from all incoherent caches that may be caching such data.

1. Field
The present disclosure relates to computer systems and methods in which data resources are shared among data consumers while preserving data integrity and consistency relative to each consumer. More particularly, the disclosure concerns an implementation of a mutual exclusion mechanism known as "read-copy update" in a cache-incoherent shared-memory computing environment.
2. Description of the Prior Art
By way of background, read-copy update (also known as "RCU") is a mutual exclusion technique that permits shared data to be accessed for reading without the use of locks, writes to shared memory, memory barriers, atomic instructions, or other computationally expensive synchronization mechanisms, while still permitting the data to be updated (modify, delete, insert, etc.) concurrently. The technique is well suited to both uniprocessor and multiprocessor computing environments wherein the number of read operations (readers) accessing a shared data set is large in comparison to the number of update operations (updaters), and wherein the overhead cost of employing other mutual exclusion techniques (such as locks) for each read operation would be high. By way of example, a network routing table that is updated at most once every few minutes but searched many thousands of times per second is a case where read-side lock acquisition would be quite burdensome.
The read-copy update technique implements data updates in two phases. In the first (initial update) phase, the actual data update is carried out in a manner that temporarily preserves two views of the data being updated. One view is the old (pre-update) data state that is maintained for the benefit of read operations that may have been referencing the data concurrently with the update. The other view is the new (post-update) data state that is seen by operations that access the data following the update. In the second (deferred update) phase, the old data state is removed following a "grace period" that is long enough to ensure that the first group of read operations will no longer maintain references to the pre-update data. The second-phase update operation typically comprises freeing a stale data element to reclaim its memory. In certain RCU implementations, the second-phase update operation may comprise something else, such as changing an operational state according to the first-phase update.
FIGS. 1A-1D illustrate the use of read-copy update to modify a data element B in a group of data elements A, B and C. The data elements A, B, and C are arranged in a singly-linked list that is traversed in acyclic fashion, with each element containing a pointer to a next element in the list (or a NULL pointer for the last element) in addition to storing some item of data. A global pointer (not shown) is assumed to point to data element A, the first member of the list. Persons skilled in the art will appreciate that the data elements A, B and C can be implemented using any of a variety of conventional programming constructs, including but not limited to, data structures defined by C-language "struct" variables. Moreover, the list itself is a type of data structure.
It is assumed that the data element list of FIGS. 1A-1D is traversed (without locking) by multiple readers and occasionally updated by updaters that delete, insert or modify data elements in the list. In FIG. 1A, the data element B is being referenced by a reader r1, as shown by the vertical arrow below the data element. In FIG. 1B, an updater u1 wishes to update the linked list by modifying data element B. Instead of simply updating this data element without regard to the fact that r1 is referencing it (which might crash r1), u1 preserves B while generating an updated version thereof (shown in FIG. 1C as data element B′) and inserting it into the linked list. This is done by u1 acquiring an appropriate lock (to exclude other updaters), allocating new memory for B′, copying the contents of B to B′, modifying B′ as needed, updating the pointer from A to B so that it points to B′, and releasing the lock. In current versions of the Linux® kernel, pointer updates performed by updaters can be implemented using the rcu_assign_pointer( ) primitive. As an alternative to locking during the update operation, other techniques such as non-blocking synchronization or a designated update thread could be used to serialize data updates. All subsequent (post update) readers that traverse the linked list, such as the reader r2, will see the effect of the update operation by encountering B′ as they dereference B's pointer. On the other hand, the old reader r1 will be unaffected because the original version of B and its pointer to C are retained. Although r1 will now be reading stale data, there are many cases where this can be tolerated, such as when data elements track the state of components external to the computer system (e.g., network connectivity) and must tolerate old data because of communication delays. In current versions of the Linux® kernel, pointer dereferences performed by readers can be implemented using the rcu_dereference( ) primitive.
At some subsequent time following the update, r1 will have continued its traversal of the linked list and moved its reference off of B. In addition, there will be a time at which no other reader process is entitled to access B. It is at this point, representing an expiration of the grace period referred to above, that u1 can free B, as shown in FIG. 1D.
FIGS. 2A-2C illustrate the use of read-copy update to delete a data element B in a singly-linked list of data elements A, B and C. As shown in FIG. 2A, a reader r1 is assumed be currently referencing B and an updater u1 wishes to delete B. As shown in FIG. 2B, the updater u1 updates the pointer from A to B so that A now points to C. In this way, r1 is not disturbed but a subsequent reader r2 sees the effect of the deletion. As shown in FIG. 2C, r1 will subsequently move its reference off of B, allowing B to be freed following the expiration of a grace period.
In the context of the read-copy update mechanism, a grace period represents the point at which all running tasks (e.g., processes, threads or other work) having access to a data element guarded by read-copy update have passed through a "quiescent state" in which they can no longer maintain references to the data element, assert locks thereon, or make any assumptions about data element state. By convention, for operating system kernel code paths, a context switch, an idle loop, and user mode execution all represent quiescent states for any given CPU running non-preemptible code (as can other operations that will not be listed here). The reason for this is that a non-preemptible kernel will always complete a particular operation (e.g., servicing a system call while running in process context) prior to a context switch.
In FIG. 3, four tasks 0, 1, 2, and 3 running on four separate CPUs are shown to pass periodically through quiescent states (represented by the double vertical bars). The grace period (shown by the dotted vertical lines) encompasses the time frame in which all four tasks that began before the start of the grace period have passed through one quiescent state. If the four tasks 0, 1, 2, and 3 were reader tasks traversing the linked lists of FIGS. 1A-1D or FIGS. 2A-2C, none of these tasks having reference to the old data element B prior to the grace period could maintain a reference thereto following the grace period. All post grace period searches conducted by these tasks would bypass B by following the updated pointers created by the updater.
Grace periods may be synchronous or asynchronous. According to the synchronous technique (e.g., using the synchronize_rcu( ) primitive), an updater performs the first phase update operation, blocks (waits) until the grace period has completed, and then implements the second phase update operation, such as by removing stale data. According to the asynchronous technique (e.g., using the call_rcu( ) primitive), an updater performs the first phase update operation, then specifies the second phase update operation as a callback, and thereafter resumes other processing with the knowledge that the callback will eventually be processed at the end of a grace period. Advantageously, callbacks requested by one or more updaters can be batched (e.g., on callback lists) and processed as a group at the end of the grace period. This allows grace period overhead to be amortized over plural deferred update operations.
Multiprocessor RCU implementations developed to date assume that the underlying hardware system offers cache-coherence and one of a range of memory-ordering models (i.e., from strongly ordered to weakly ordered). However, there have been recent concerns, particularly among vendors offering strongly ordered systems, that cache-incoherent systems will be required in order to continue progress according to Moore's Law. Whether or not these concerns have any basis in reality, shared-memory cache-incoherent systems are starting to appear. In some cases, all caches in the system are incoherent. In other cases, the system may have cache-coherent multi-processor "nodes" within a larger cache-incoherent system. In such systems, cache coherence is maintained with respect to a node's local memory but not with respect to the memory of other nodes. Although there has been some work extending RCU to shared-nothing systems (i.e., clusters), there has been very little work towards efficient RCU implementations in cache-incoherent shared-memory multiprocessor systems. One of the challenges facing RCU in a cache-incoherent shared-memory environment is the need to accommodate the reuse of memory blocks by updaters. Such reuse can occur, for example, when a memory block associated with stale data is reclaimed at the end of a grace period and then subsequently reused for storing new data. If the memory block is reused before the cachelines containing the stale data are removed from local processor caches, readers dereferencing pointers that should point to the new data may in fact retrieve the old stale data.
One prior-art approach for solving this problem, used in the Blackfin® system from Analog Devices, Inc., is to have the rcu_dereference( ) primitive flush all lines from the executing processor's cache. See Linux® v.2.6.39 source code—SSYNC( ) instruction at line 163 of_raw_smp_check_barrier_asm( ) function spanning lines 136-183 of /linux/arch/blackfin/mach-bf561/atomic.S, which is called from smp_check_barrier( ) function spanning lines 59-62 of /linux/arch/blackfin/include/asm/cache.h, which is called from read_barrier_depends( ) function at line 44 of /linux/arch/blackfin/include/asm/system.h, which is called from "rcu_dereference_check( )" spanning lines 327-334 of linux/include/linux/rcupdate.h, which is implemented by rcu_deference( ) at line 519 of linux/include/linux/rcupdate.h. Unfortunately, this approach imposes great overhead on the RCU readers that invoke this primitive, defeating much of the purpose of using RCU in the first place. These developments therefore motivate an RCU implementation that can run efficiently on cache-incoherent systems.

This patent is subject to a terminal disclaimer.

Read-copy update implementation for non-cache-coherent systems

International Business Machines Corporation


A sensor to detect and map various mechanical stimuli spatially distributed over the area of contact with the surface of the sensor. The sensor is a thin film including a stack of alternating layers of nanoparticles and dielectric materials sandwiched between electrodes. By applying a bias between the electrodes, the applied stimuli to the sensor is converted to light and/or device-current through the stack. The optical signal may be directly focused on a photo detector, such as a digital camera, to image the distribution of the stimuli. The electronic signal in the form of spatial distribution of device-current over the area of contact may be obtained by patterning top and bottom electrodes and analyzed using standard electronics. The sensor has applications in many fields, including medicine, forensics, basic and applied research, and robotics.

1. Field of the Invention
The present invention relates to sensors to detect and map various stimuli spatially distributed over the area of contact with the surface of the sensor. More specifically, the present invention relates to a family of opto-electronic and electronic sensors that by touch or on physical contact with the surface of a body detects features, such as texture and roughness of the body's surface, variation in hardness of a body, palpable structure, shape of a solid object, static-charge on the surface of a body, and temperature distribution of a solid surface. This invention is a family of devices in a form of a thin-film that utilizes nanoparticles and polymers to convert the stimuli on touch over the area of contact to an electrical, or optical, or a combination of electrical and optical signals that can be processed using standard electronics to detect the distribution of the magnitude of the stimuli received over the area of contact. The abovementioned device can substitute for or act in conjunction with one or more human senses.
2. Description of Related Art
Broadly, the sensation of touch is the determination of distribution of physical properties such as, texture, roughness, hardness, static-charge, and temperature over the area of physical contact. The primary function of sense of touch is the determination of the magnitude of stress or pressure distribution over the area of physical contact between the sensor and the object surfaces to "feel" the texture, roughness, hardness and palpable features imbedded in the object tactile or touch sensors of substantial active area of contact is a critical component to advance noninvasive surgical procedures by giving a surgeon the "touch sensation", for example to determine various normal and diseased tissues of a patient. More specifically, tactile devices are used as medical devices to image the palpable structure in a breast to determine cancerous mass or tumor. It is also a critical component in the development of humanoid robots that can sense shapes, textures, hardness, and manipulate complex objects, which are not possible by vision alone. Touch (or tactile) sensors are usually made as a micro-electromechanical system composed of micro-machined deformable components or by integrating strain sensitive materials, such as magneto-resistive ceramics, piezoelectric polymers, and strain sensitive conducting elastomers. Tactile sensors based on change in the capacitance between two electrodes spaced by a polymer have also been designed using an array of such capacitors. Tactile sensors from optical data have been demonstrated where the contact stress distribution is calculated from the change in shape of the deformable sensor surface obtained by a camera. For small area devices, such as an array of capacitance sensors on an 8 by 8 matrix, a spatial resolution of 100 micrometers (μm) has been demonstrated. However, for a large area device of active (i.e., sensing) area of about 1 cm2 or larger, the spatial resolution for stress distribution is at best in the approximately 2 mm range, which compares poorly with the approximately 40 μm resolution achieved by the human finger.
Thus, there exists a need in the art for improved sensors to replace, complement, or augment one or more human senses of touch. Included among these are touch sensors to sense texture, imbedded palpable features, static charge and spatial variation of temperature. These devices find use in many fields, including the medical field, the sports and health fields, and robotics.

High resolution thin film tactile device to detect distribution of stimuli on by touch


A vibration structure that includes a film constructed to deform in a plane direction as voltage is applied thereto, a frame-shaped member, a vibration portion surrounded by the frame-shaped member in a plan view of the vibration structure, a support portion connecting the vibration portion and the frame-shaped member and supporting the vibration portion within the frame-shaped member, a first connection member that connects the film and the frame-shaped member, and a second connection member that connects the film to the vibration portion such that the vibration portion vibrates in the plane direction when the film is deformed in the plane direction. The support portion is disposed at a position closer to a center of gravity of the vibration portion than an end portion of the vibration portion when viewed in the plan view.

For example, Japanese Patent Application Laid-Open No. 2012-137971 (Patent Document 1) discloses a configuration in which a vibration motor is disposed in an end portion of a touch panel and the entire touch panel is vibrated with a substantially uniform vibration amount.    Patent Document 1: Japanese Patent Application Laid-Open No. 2012-137971

Vibration structure and electronic device


A fuel injection unit is designed for replacement of existing carburetors. The fuel injection unit can be sized similarly to the existing carburetor. The fuel injection unit can have concealed fuel injectors. End caps can be provided that overlie the fuel injectors and that contain fuel line connections. The end caps provide an appearance of carburetor fuel bowls while generally concealing the fuel injectors and the associated fluid connections.

1. Field of the Invention
The present invention generally relates to fuel injection systems for motor vehicles. More particularly, the present invention relates to such systems that are sized and configured to replace a carburetor.
2. Description of the Related Art
Carbureted automobiles ceased to be manufactured in large numbers. The carburetor was replaced with electronic fuel injection (EFI), which has become the standard of the auto manufacturing industry. The hot rod industry and the aftermarket industry in general are beginning to accept EFI as an alternative to carburetion.
EFI has a number of performance advantages. For example, a computer-controlled engine is easier to start and is more drivable. The engine operates with less hesitation and reduced incidences of stalling. Moreover, EFI provides increased fuel efficiency and reduced emissions. An EFI engine can respond more quickly and precisely to the changing boost levels of turbochargers or superchargers. Furthermore, EFI engines are more consistent when operating around steep inclines and over bumpy terrain.

Fuel injection body sized to replace carburetor body


A racing game and a method for playing the game. The method includes providing the racing game, generating the at least two random numbers, wherein an at least one player uses the at least two random number generators to generate the at least two random numbers, and advancing the at least one game piece representing the at least one player that corresponds to the at least two random numbers generated. One of the random number generators is used to determine lane choice for at least one player, along which the at least one game piece is advanced during game play.

Board games are enjoyed by both children and adults of all ages. Racing games are particularly well-liked. Many versions of racing games exist. As nonlimiting examples, U.S. Pat. Nos. 6,834,856, 5,092,605 and 5,749,582 each disclose known racing games including racing lanes and toy cars that advance in the lanes. The entire disclosures of each of the above-mentioned patents are hereby incorporated herein by reference.
The known racing games are not versatile. For example, most exist in only one form, making it difficult for players to participate in the game under variable circumstances and in various locations. Additionally, most racing games are geared toward either children or adults, and cannot be altered to appeal to both children and adults in their various forms, using alternative rules and game add-ons.
There is a need for a versatile racing game appropriate for adults and children of all ages. Desirably, the racing game may be played in multiple locations and with various materials.


A thin-disc piezoelectric actuating ultrasonic motor includes a stator made up of a commercially available piezoelectric element that includes a piezoelectric ceramic membrane bonded on a metal plate to form a concentric disk. An ultrasonic motor driving mechanism induces mechanical vibration in the piezoelectric element by extension and shrinkage of the metal back plate, upon application of single phase AC power. There are two propagating directions in the induced mechanical vibrating wave. One is a radial component, and the other is a transverse component. The outer edge of the piezoelectric element thus forms traveling waves in different directions. These traveling waves may be used to provide a torque so as to drive the rotor to rotate.

The present invention relates to a thin-disc piezoelectric actuating ultrasonic motor, wherein an AC voltage is inputted into a piezoelectric element consisting of a piezoelectric ceramic and metal back plate. The piezoelectric ceramic generates a pull or push effect due to the reverse piezoelectric effect and the metal back plate in the piezoelectric element is driven to vibrate. The generated mechanical wave propagates in radial or transverse directions. As the wave propagates, each screw forms a reflecting point. Due to the reflecting points from three peripheral screws, traveling waves of different directions are formed by the piezoelectric buzz piece at the outer edge of the metal back plate. One of the traveling waves is used to provide a torque to cause the rotor to rotate.
The currently used ultrasonic motor is primarily formed by a piezoelectric (PZT) ceramic 12 made of a zirconium-titanium-acid-lead material, as illustrated for example in FIG. 1. After a voltage is inputted into the piezoelectric ceramic 12, the piezoelectric ceramic 12 and the metal back plate 11 will be forced to generate a mechanical extension-contraction phenomenon. Energy is transferred in a wave form. The piezoelectric ceramic operates within an ultrasonic frequency having an amplitude of several micrometers which is controllable by input voltage. Therefore, it can be used as a driving device or a driving motor of a compact structure or system.
The aforesaid ultrasonic motor may generate an alternating extension-contraction function by AC power. By mechanical design, motions in specific directions are generated. The moving distance in each period is only several micrometers. Under the vibration of the ultrasonic frequency, a displacement of several centimeters per second is generated for driving precise devices (such as automatic focusing means of a camera, positioning devices for fine machining, etc.). Meanwhile, the ultrasonic motor has the features of small volume, light weight, low noise, low speed with a high torque, high retaining force, quick response, insensitivity to electromagnetic interference, and so forth. Different advantages may be emphasized in different products, such as lower speed, high torque, high retaining force, and low noise in products designed for use in silent places (such as hospitals); quick response in products requiring driving a X-Y platform, and insensitivity to electromagnetic waves in products for use in magnetic floating vehicles and biomedical technology.
The prior art ultrasonic motors or actuators are made of piezoelectric bulk material or piezoelectric stacking pieces, however, that have a high cost, so that the commercial ultrasonic motor has a high price.
Accordingly, the primary object of the present invention is to provide an ultrasonic motor including a piezoelectric element into which is inputted an AC voltage. The piezoelectric ceramic in the piezoelectric element generates a pull-push effect due to a reverse piezoelectric effect and a metal back plate in the piezoelectric element is driven to vibrate. The generated mechanical wave propagates or transfers along a radial or transverse path. As the wave propagates, each screw in the back plate can be formed as a reflecting point. Due to the reflecting points from three peripheral screws, traveling waves of different directions can be formed by the piezoelectric element at the outer edge. One of the traveling waves is used to provide a torque to drive a rotor to rotate.
Another object of the present invention is to provide a thin-disc piezoelectric actuating ultrasonic motor, that can be used in semiconductor equipment, medical instruments, hard disk drives and CD drives, and that has a low cost and high efficiency.
To achieve the above objects, the present invention provides a thin-disc piezoelectric actuating ultrasonic motor, wherein a main electrode is covered at the uppermost surface of a piezoelectric element or ceramic, and the lowest end of the piezoelectric element is adhered to a metal back plate. In operation, AC power is inputted between the main electrode and the metal back plate. The piezoelectric ceramic will extend or shrink due to the reverse piezoelectric effect. In contrast to a conventional xe2x80x9cspeakerxe2x80x9d, in which the metal back plate is deformed by the piezoelectric ceramic so as to vibrate air for emitting a sound, at a working frequency of between 50 and 20 kHz, in the present invention, the piezoelectric element is used as a driver operating at a frequency of over 30 kHz. The working principle is that the piezoelectric element is used to vibrate the periphery of the metal back plate for driving the rotor to rotate.
In the thin-disc piezoelectric actuating ultrasonic motor of the present invention, the piezoelectric element including the metal back plate is fixed to a rectangular piece by three asymmetric screws. Then one side of the fixed rectangular piece is fixed to another rectangular piece larger than the former one by a plurality of screws and a spring so that an elastic resilient structure is formed between the two rectangular pieces. Then an AC current is inputted into the piezoelectric element so that the piezoelectric ceramic will extend and contract due to the reverse piezoelectric effect of the ceramic and drive the metal back plate to vibrate. The mechanical waves are transferred along the radial and transverse directions. The outer edge of the piezoelectric element generates traveling waves along different directions. The traveling waves will provide a torque to drive the rotor to rotate.
The piezoelectric element forms a motor stator consisting of the above-mentioned two major elements: one is a piezoelectric ceramic and another is a metal back plate. The principle of either standing or traveling waves in a stator is that an AC voltage applied to the main electrode of the piezoelectric element causes the piezoelectric ceramic as the main actuating body of the stator to generate a reverse piezoelectric effect to vibrate the metal back plate. Therefore, wave energy is transferred to the stator. The oscillation of friction material on the stator causes the shaft of a rotor to be rotated along the wave traveling direction. The traveling wave is generated because a disc with a single frequency can be formed to provide multiple reflections of the specific frequency. The intersection of these reflecting waves will form wave motions at a specific section.

Thin-disc piezoelectric actuating ultrasonic motor

National Science Council of Republic of China