A sealing arrangement for sealing a gap (22) between two adjacent, thermally loaded components (14, 14′) of a thermal machine, especially a turbomachine or gas turbine, includes a seal (25) which is supported in a recess (23) which extends transversely to the gap (22) and traverses said gap (22). An efficient and simple improvement of the sealing arrangement is made by the seal (25) being formed at least partially of a shape memory alloy in such a way that, when a pre-specified temperature limit is exceeded, the seal changes its sealing behavior.

1. Field of Endeavor
The present invention relates to the field of machine elements in conjunction with thermal machines, and more particularly to a sealing arrangement.
2. Brief Description of the Related Art
In thermal machines, such as gas turbines, or electromechanical machines, such as electric generators, the cooling of thermally loaded components is an essential parameter for the overall efficiency and the service life of the system. In most cases, the cooling medium is cooling air; however, steam from a steam generator can also be used for the same purpose. The subsequently disclosed subject matter is correspondingly applicable to all cooling media, regardless of the supply source, but is explained using the example of an air-cooled gas turbine.
In a gas turbine, air is compressed by a centrifugal or axial compressor from the ambient pressure to nominal pressure. After cooling of the hot parts of the combustion chamber, the main portion of the compressed air is used for combusting fuel in the combustion chamber. The rest of the compressed air is extracted at one or more points along, or at the end of, the compressor, and directed through cooling air passages to the hot parts of the gas turbine. In the turbine, the cooling medium is used for the internal or external cooling of the turbine components, such as stator blades and rotor blades. In addition, the cooling medium reduces the operating temperature of non-rotating and rotating components, such as the blade roots or rotor disks, which are exposed to large centrifugal forces.
Some of the air is also used for sealing purposes, particularly between rotating and stationary parts, by the air being purged through a gap into the hot gas passage of the turbine in order to prevent entry of hot gas and therefore local overheating. The seal plays an important role in the effective distribution and controlling of the cooling air. On account of mechanical and thermal stresses and the thermal expansion of the components during operation, however, the gaps which are to be sealed alter in their dimensions. In the stationary state of the machine, each rotating and non-rotating component is assembled with other parts, taking into consideration manufacturing and assembly tolerances and also the anticipated mechanical and thermal deformation of the components. The cold gaps which therefore result enable the unhindered thermal expansion and rotation-induced deformation of the components during operation by the gaps which result in the process, the so-called hot gaps, at no time adopting unacceptably small values. The unhindered expansions and deformations prevent mechanical defects in each component where they adjoin other components.
Under operating conditions, depending upon the thermal and mechanical load of the respective component, the resulting hot gaps can become smaller or larger than the cold gaps relative to the stationary state of the machine. An example of such changes in a gas turbine is shown in FIGS. 1-3. FIG. 1 shows in a detail a typical arrangement of rotor blades and stator blades in a gas turbine, including the seals—in this case exemplarily of a strip-like construction—which are arranged between the components. The gas turbine 10 of FIG. 1 includes a rotor 11 which is equipped with rotor blades 13 and is enclosed by a turbine casing or stator blade carrier 12. The rotor blades 13 have an (inner) platform 14 (14′), beneath which the blade merges into a shank 15, on the end of which is arranged a blade root 16 by which the rotor blade 13 is fastened in the rotor 11. Stator blades 18, which have a(n) (outer) platform 19, are attached on the turbine casing or stator blade carrier 12. The blade airfoils of the rotor blades and stator blades 13, 18 lie in the hot gas passage of the turbine.
For sealing in relation to the hot gas passage, provision is made for seals—in this case exemplarily constructed as sealing strips 20, 21 (FIG. 2)—which extend in the axial direction (z-axis in FIG. 2) and in the circumferential direction (u-axis in FIG. 2), but can also extend in the radial direction and be arranged between adjacent platforms 14 (14′) of blades or between blades and adjacent heat shields 13, 17 or ring segments, as well as between adjacent heat shields (when provided). According to FIG. 3a, the sealing strips 21 lie transversely to the gap 22 between the platforms 14 and 14′ of adjacent components in a corresponding recess 23.
As exemplarily indicated in FIG. 3b, the gap between the rotor blades of each turbine stage increases during operation. Under the influence of centrifugal forces, the rotor blades are stretched in the radial direction, which results in a larger gap c in the circumferential direction between the platforms of the blades.
This enlargement of the gap in the circumferential direction is partially compensated for by the thermal expansion of the blade platforms. Depending upon the blade mass and the operating temperature, the thermal deformations of the platforms are usually less than the blade deformations which are brought about as a result of rotation. Therefore, the gap c between the blade platforms of longer blades in the circumferential direction during operation can be either larger than the cold gap c0 in the stationary state of the machine (FIG. 3a), or it can be smaller, which applies typically to non-rotating components or light rotor blades, the deformations of which are principally determined by the thermal load. In general, during operation the gaps can vary considerably depending upon the mechanical and thermal load of the rotating and non-rotating components of the machine. Furthermore, the radius of the platforms 14, 14′, which in the stationary state can have the value R0 (FIG. 3a), can acquire another value R (FIG. 3b) during operation.
In order to passively control the gaps during operation of the machine, according to FIG. 2 provision is made for axially and circumferentially extending seals—in this case exemplarily constructed as strips 20 or 21—which prevent an uncontrolled leakage of the cooling medium into the hot gas passage of the turbine. The seals 20, 21 generally are formed of an alloy which is suitable for the operating conditions of the machine.
The seals which are arranged in rotating components are pressed against the platforms of the rotor blades as a result of centrifugal forces. Consequently, a mechanical contact between the upper side of the seal 21 and the outer flanks of the seal groove 23 is created inside the platforms or heat shields 14, 14′, which is schematically shown in FIG. 3b. On account of the thermal expansion and rotation-induced deformations, the effective hot gap c (FIG. 3b) becomes larger during operation, whereas the width b of the seal 21 remains practically unaltered on account of its small dimensions relative to the size of the blade, of the rotor and of the heat shields. The mechanical contact which is created can be limited to a narrow contact area on the seal which does not lead directly to the best possible sealing effect or can even lead to undesirable or increased leakage on account of local deformations of the platform.
In the prior art, considerations have already been made to purposefully control sealing conditions in thermal machines by the use of memory alloys.
An arrangement of a rotor and a stator of a turbine, in which rotor blades with a blade airfoil and (inner) platform and stator blades with a blade airfoil and (inner) platform alternate with each other, is known from printed publication US 2007/0243061. Between the platforms of the rotor blades and the platforms of the stator blades a seal is defined, wherein the platforms of the rotor blades and/or stator blades in the region of the seal partially are formed of a memory alloy in order to control the cooling air flow through the seal in dependence upon temperature. Such controlling through the platforms themselves is extremely costly in production and dimensioning, because the blades themselves have to be constructed from different material and correspondingly prefabricated.
U.S. Pat. No. 7,086,649 B2 discloses an annular seal for inserting between two parts which rotate relatively to each other. The seal includes a section which can bend for altering the sealing gap. Such a section can be formed of a bimetal or a memory alloy in order to alter the gap width in a temperature-controlled manner.
A device for controlling the clearance between the blade tip of a rotor blade and the opposite wall of an axial turbine, in which the radial position of the wall is controlled by a spiral spring, formed of a memory alloy, which shifts the wall, is known from printed publication JP58206807.
The seals which are described in the introduction are not the subject of known proposals.

Sealing arrangement for a thermal machine


There is provided a new thermo-gelling composition made with methylcellulose and citric acid. This composition may also have an effective amount of a treating agent, which may be a medicinal agent, cosmetic agent, moisturizer, adjuvant, nutritional agent, other ingredients and combinations thereof. The composition is useful in delivering moisturizers or pharmaceutically active agents to the user in a controlled release manner through the mucosal tissues in a body cavity, or on body surfaces, or as a subcutaneously injected medicament. The composition may also be used as a replacement for the soft tissues of the body as in, for example, the foot cushion and cartilage repair.

The present invention concerns the delivery of treating agents and moisturizers to the body as well as soft tissue replacement.
Often in the treatment of chronic conditions or illnesses, treating substances must be delivered to specific areas of the body and remain there for some time. The contact time is important to the efficacy of many treatments because they must be absorbed by the body or because they act slowly on the cause of the malady. Other factors to be considered in the choice of delivery system are ease of application, coverage, durability of effects, that it be leak resistant and comfortable, and that the system have the capability of delivering other treating agents over time in a controlled release manner.
Various methods have been used to increase the contact time of the treating substance with the body. Increasing the viscosity of the treating composition, for example, has been used for some time, but a high viscosity is sometimes an impediment to proper administration of the composition. A composition that is too viscous is difficult to work with and to put into place in the body. Multi-component compositions that react upon mixing to become semi-solid in place likewise suffer from the same problem; that of being difficult to administer. Multi-component compositions also can be quite complicated, sometimes having many ingredients in precise ratios which may pose a problem for the addition of treating agents.
While the current methods may solve some of the problems associated with the delivery of substances, they do not address all of the basic requirements of a successful system. There remains a need, therefore, for a delivery system that may be used by a consumer and which will be effective and easy to apply and that may be extended to deliver other treating agents.


Machine learning object-searching methods and apparatuses are disclosed. The method comprises: selecting a state from a set of states of a target object-searching scene as a first state; obtaining a target optimal object-searching strategy whose initial state is the first state for searching for a target object; performing strategy learning by taking the target optimal object-searching strategy as a learning target to obtain an object-searching strategy by which a robot searches for the target object, and adding the obtained object-searching strategy into an object-searching strategy pool; determining whether the obtained object-searching strategy is consistent with the target optimal object-searching strategy; if yes, determining that the strategy learning in which the first state is taken as the initial state of the object-searching strategy is completed; and if not, returning to the step of selecting a state from a set of states of a target object-searching scene.

With the rapid development of machine learning algorithms, robots employing machine learning algorithms have been developed rapidly. More and more robots with different characteristics are applied in people's daily life, which brings convenience to people's life.
A robot with an object-searching function in an application scene is taken as an example. At present, most robots search for an object by determining an object-searching path depending on positioning apparatuses provided therein and the digital map technology. Although in most cases the object can be searched for successfully by the above method, the positioning devices provided in the above robots cannot provide a sufficiently accurate result and thus the above method has a low success rate in many application scenes.

Machine learning and object searching method and device

HANGZHOU HIKVISION DIGITAL TECHNOLOGY CO., LTD.


An apparatus and method of implementing multicast security in a given multicast domain, the given multicast domain having one or more network devices, receives multicast traffic that is encrypted with a global key, the global key being available to the given multicast domain and one or more other multicast domains, decrypts the received multicast traffic with the global key to produce decrypted multicast traffic, encrypts the decrypted multicast traffic with a local key to produce local encrypted multicast traffic, the local key being available to the given multicast domain, and forwards the local encrypted multicast traffic to the one or more network devices in the given multicast domain. In a further embodiment, the apparatus and method for implementing multicast security in a given multicast domain first receives a global key message that identifies the global key.

Multicasting is a well-known method of transmitting information to selected groups of users across a network, such as the Internet. For example, the transmission of an E-mail message to a group of users, each user being listed on a mailing list, uses multicasting principles. Video conferencing and teleconferencing also use multicasting principles and, accordingly, are often referred to as "multiconferencing."
Due to increased demand for uses utilizing multicasting principles, protocols such as the Internet Group Multicast Protocol ("IGMP") have been developed and refined to support multicasting over a Transmission Control Protocol/Internet Protocol ("TCP/IP") network, such as the Internet. The new protocols, such as IGMP, allow users to easily create and join multicasting sessions ("multicasts"). However, multicasts often transmit confidential information between multicast users ("members") during the multicast. Thus, a need exists for securing multicast transmissions.
However, because multicasting involves groups of users, securing multicast transmissions raises the issue of scalability. In response to this issue, it is recognized that it would be more scalable to allow the use of multiple, independently group security associations. In one such scheme, each packet is decrypted, and then re-encrypted, subgroup to subgroup, until the packet reaches the destination member. However, as a result of the decryption and re-encryption from subgroup to subgroup, the multicast transmission incurs latency. In addition, a problem arises when a multicast transmission is sent from a data originator that only allows an authorized agent or broker to translate the multicast transmission.
In another scheme, a multicast network is partitioned into hierarchical multiple security domains. In this scheme, however, a multicast transmission cannot be translated across horizontal domains.

Apparatus and method of implementing multicast security between multicast domains


A computer system stores and transmits compressed triangular meshes. The computer uses a data structure that represents a triangular mesh in n-dimensional space. The data structure has a table of vertex runs, a table of triangle runs, zero or more marching records, which provide the connectivity information of the triangular mesh. The data structure also has zero or more associated data records that include the geometric information of the triangular mesh. The table of triangle runs and the marching record have information that describes how to construct a triangular mesh (therefore, the polygon vertices and the boundary edges). The table of vertex runs describes a vertex spanning tree that provides additional connectivity information to construct the triangular mesh from the polygon. The associated data record determines the exact position of the triangular mesh in space. The system also includes ways for creating this data structure from a triangular mesh, transmitting this information between computers, and compressing and decompressing this transmitted information.

Although modeling systems in Mechanical Computer Aided Design and in animation are expanding their geometric domain to free form surfaces, polyhedral models remain the primary 3D representation used in the manufacturing, architectural, Geographic Information Systems, geoscience, and entertainment industries. Polyhedral models are particularly effective for hardware assisted rendering, which is important for video-games, virtual reality, fly-through, and electronic mock-up applications involving complex Computer Aided Design models.
In comparison to image and video compression, little attention has been devoted to the compression of 3D shapes, both from the research community and from 3D data exchange standards committees. This situation is likely to change rapidly for three reasons. 1) The exploding complexity of industrial Computer Aided Design models raises significantly the cost of the memory and auxiliary storage required by these models. 2) The distribution of 3D models over networks for collaborative design, gaming, rapid prototyping, or virtual interactions is seriously limited by the available bandwidth. 3) The graphics performance of high level hardware adapters is limited by insufficient on-board memory to store the entire model or by a data transfer bottleneck.
Since methods are known in the prior art for easily and efficiently triangulating arbitrary polygonal faces, it is sufficient to consider geometric models defined by triangular meshes. A triangular mesh is defined by the position of its vertices (geometry), which are n-dimensional vectors, by the association between each triangle and its sustaining vertices (connectivity), and by colors, normals, and texture coordinates (photometry), which does not affect the 3D geometry, but influences the way it is shaded.
The prior art in 3D geometric compression may be divided into three categories: simplification, geometry encoding, and connectivity encoding.
Polyhedral simplification techniques reduce the number of vertices in the mesh by altering the model's connectivity and by possibly adjusting the position of the remaining vertices to minimize the error produced by the simplification. These techniques target the generation of multiple levels of detail (LOD) for accelerated graphics or data reduction for over-sampled meshes. Although these techniques could be considered for lossy compression, they are inappropriate for applications that require access to the exact connectivity of the model. In fact simplification techniques are orthogonal to the compression techniques described here because geometric compression may be applied to each level of detail.
Geometry encoding techniques use lossy or lossless compression to reduce the storage necessary for the geometric data associated with vertex positions, and possibly with colors, normals and texture coordinates. Applying general purpose binary compression algorithms to the geometric data stream leads to suboptimal solutions. A geometric compression approach that involves normalizing the geometry into a unit cube and rounding off the vertex coordinates to fixed length integers is described by Michael Deering in "Geometric Compression", Computer Graphics (Proc. SIGGRAPH), pages 13-20, August 1995, which is here incorporated by reference in its entirety. The rounding controls the amount of lost information.
Connectivity encoding techniques attempt to reduce the redundancy inherent to many popular representations of polyhedral or triangular meshes. For example, Connectivity encoding techniques try to minimize the number of bits required to represent without loss of information the triangles of a triangular mesh of V vertices and T triangles.
On one extreme, if the vertices are always organized into a regular 2D grid, the triangle mesh may be completely defined by the number of rows and columns of the grid. Regular grids may be appropriate for terrain modeling in Geographic Information Systems and for rendering uniformly tesselated non-trimmed rectangular parametric patches. However, they are not suitable for modeling the more general 3D shapes found in Computer Aided Design, entertainment, and other applications.
At the other extreme, the vertex positions of a triangular mesh of V vertices and T triangles may be represented with an array, the vertex positions array, and each triangle may be represented by 3 indices into the vertex positions array. This solution does not impose any topological limitations on the mesh, but requires storing 3 addresses per triangle (approximately 6 addresses per vertex for typical triangular meshes). Even if the models were restricted to less than 1000 vertices, this scheme would consume 60 bits per vertex for the connectivity information alone.
Triangle strips used in graphics application programming interfaces (APIs) (described by J. Neider, T. Davis, and M. Woo. in OpenGL Programming Guide, Addison-Wesley, 1993; which is here incorporated by reference in its entirety) provide a compromise where a new vertex is combined with the previous two vertices to implicitly define a new triangle in the current strip. Triangle strips only pay off if one can build long strips, which is a challenging computational geometry problem. Furthermore, because on average a vertex is used twice, either as part of the same triangle strip or of two different ones, the use of triangle strips with OpenGL requires sending most vertices multiple times. The absence of the swap operation further increases this redundancy.
The application of triangle strips as a compression technique, where the locations of all vertices are available for random access during decompression, would still require storing one vertex reference per triangle, two vertex references per strip, the book keeping information on the number and length of the strips, and an additional bit of information per triangle indicating witch open side of the previous triangle should be used as the basis for the next triangle (this bit is equivalent to the SWAP operation in GL).
In Deering's method a stack-buffer is used to store 16 of the previously used vertices instead of having random access to all of the vertices of the model. This is a suitable solution for adapters with very limited on-board memory. Deering also generalizes the triangle strip syntax by providing more general control over how the next vertex is used and by allowing the temporary inclusion of the current vertex on the stack and the reuse of any one of the 16 vertices of the stack-buffer. The storage cost for this connectivity information is: one bit per vertex to indicate whether the vertex should be pushed onto the stack-buffer, two bits per triangle to indicate how to continue the current strip, one bit per triangle to indicate whether a new vertex should be read or whether a vertex from the stack-buffer should be used, and 4 bits of address for selecting a vertex from the stack-buffer, each time an old vertex is reused. Assuming that each vertex is reused only once, the total cost for encoding the connectivity information is: 1+4 bits per vertex plus 2+1 bits per triangle. Assuming 2 triangles per vertex, the total cost is roughly 11 bits per vertex. As far as we know, algorithms for systematically creating good traversals of general meshes using Deering's generalized triangle mesh syntax have not yet been developed. Naive traversal of the mesh may result in many isolated triangles or small runs, implying that a significant portion of the vertices will be sent more than once, and hence increasing the number of bits per triangle. None of the prior art methods for connectivity encoding preserve the original connectivity of the triangular mesh. All of these methods partition the triangular mesh into connected subsets of triangles. The vertices shared by two or more parts are represented multiple times. This may not be a problem when the compression method is meant to be used to better utilize the communication bandwidth between a CPU and a graphics adapter in a computer, but this change of connectivity is a serious disadvantage in other applications which require preserving the topological properties of the original mesh.
FIG. 1, comprising FIG. 1A and FIG. 1B, is a prior art example of trees. The prior art (described by "R. E. Tarjan." in Data Structures and Network Algorithms, SIAM, 1983; which is here incorporated by reference in its entirety) recognizes that a tree 1000 is composed of one or more nodes and one or more edges, each edge connecting a pair of the nodes. A node 1010 connected by a single edge 1015 to another node 1030 is a leaf node. A node 1020 connected by two edges (1025, 1035) to two other nodes (1030, 1050) is a regular node. A node 1030 connected by three or more edges (1015, 1035, 1045) to respective nodes (1010, 1020, and 1055) is a branching node. A tree can be described as a set of one or more runs. A run is a sequence of nodes, with each pair of consecutive nodes connected by an edge. The sequence has a first node that is a leaf or branching node, zero or more intermediate nodes that are regular nodes, and a last node that is a leaf or branching node. For example, the leaf node 1040, the regular nodes 1050 and 1020, and the branching node 1030 define the run (1040,1050,1020,1030).
A rooted tree 1100 is a tree with one of its nodes 1110 identified as a root node. The root node determines a parent-child relation between each pair of nodes connected by an edge. The root node also determines the first and last node of each run. The root node partially determines an order of traversal of the rooted tree. To fully specify the order of traversal, the runs must be further partitioned into one or more sets of common first node runs, each set composed of all the runs that share a common first node, and an ordering must be assigned to the runs within each one of the sets of common first node runs. For example, the choice of node 1110 as the root of the rooted tree 1100 determines that nodes 1120 and 1150 are the first and last nodes of run (1120,1130,1140,1150), respectively, and nodes 1120 and 1180 are the first and last nodes of run (1120,1160,1170,1180), respectively. But which one of these two runs is traversed first is not determined by the choice of node 1110 as the root of the tree, and has to be explicitly specified.
FIG. 2, comprising FIG. 2A, FIG. 2B, FIG. 2C, FIG. 2D, and FIG. 2E, is prior art example of triangular meshes. A triangular mesh 2100 is composed of vertices 2110, edges 2120, and triangles 2130.
A path on a triangular mesh is a sequence of non-repeated vertices such that each pair of consecutive vertices are connected by an edge. The first and last vertex of a path are said to be connected by the path. For example, the vertices 2140 and 2165 are connected by the path defined by the sequence formed by vertices 2140, 2150, 2160, and 2165. A triangular mesh is connected if every pair of its vertices is connected by a path. For example, the triangular mesh 2100 is connected, and the triangular mesh 2200 is not. When a triangular mesh is not connected it is composed of two or more connected components, where each connected component is a connected triangular mesh composed of a subset of vertices, edges, and triangles of the original triangular mesh and with two vertices of the triangular mesh belonging to the same connected component if they are connected by a path. For example, the triangular mesh 2200 is composed of two connected components, the triangular mesh 2210, and 2220. Vertices 2230 and 2240 belong to the same connected component because they can be connected by a path. Vertices 2230 and 2250 belong to different connected components because there exists no path connecting them.
An edge of a triangular mesh is a boundary edge if it belongs to exactly one triangle, an internal edge if is shared by exactly two triangles, and a singular edge if it is shared by three or more triangles. For example, edge 2350 of triangular mesh 2300 is a boundary edge, all the edges of triangular mesh 2100 are internal edges, and edge 2340, of the triangular mesh 2300 is a singular edge, because it is shared by triangles 2310, 2320, and 2330. (Note that boundary edges and internal edges are also called regular edges.) A vertex of a triangular mesh is a regular vertex if the set of vertices of all the triangles of the triangular mesh that contain the vertex, excluding the given vertex, can be reordered to define a single path. If a vertex is not a regular vertex, then it is a singular vertex. For example, all the vertices of triangular mesh 2100 are regular, and vertex 2410 of triangular mesh 2400 is singular because there is no way of reordering the vertices of all the triangles incident to vertex 2410, excluding vertex 2410, to form a single path. A triangular mesh has boundary if it has one or more boundary edges. For example, the triangular meshes 2100 and 2200 have no boundary, and the triangular meshes 2300 and 2400 have a boundary. A triangular mesh is a manifold if it has no singular vertices and no singular edges. If a triangular mesh is not a manifold, it is a non-manifold. For example, the triangular meshes 2100 and 2200 are manifolds, but the triangular mesh 2300 is a non-manifold.
An orientation of a triangle of a triangular mesh is an ordering of the tree vertices of the triangle, modulo cyclical permutations. Therefore, a triangle of a triangular mesh has two possible orientations. For example, the two different orientations of triangle 2130, composed of vertices 2110, 2170, and 2180, are the orderings (2110,2170,2180) and (2180,2170,2110). But the orderings (2110,2170,2180) and (2180,2110,2170) define the same orientation of the triangle because they are related by a cyclical permutation.
An orientation of an edge of a triangular mesh is one of the two possible orderings of the two vertices of the edge. For example, the two orientations of edge 2120 of the triangular mesh 2100 are defined by the orderings (2110,2170) and (2170,2110) of the vertices 2110 and 2170. The two orientations of an edge are said to be opposite of each other. An orientation of a triangle induces a consistent orientation on the three incident edges. For example, the orientation (2110,2170,2180) induces the consistent orientations (2110,2170), (2170,2180), and (2180,2110) on the three edges of triangle 2130. A manifold triangular mesh is orientable if an orientation can be chosen for each triangle of the triangular mesh in such a way that for each internal edge of the triangular mesh, the two triangles incident to the edge induce opposite orientations on the common edge. If a manifold triangular mesh is not orientable, then it is non-orientable All non-manifold triangular meshs are non-orientable. For example, triangular mesh 2100 is orientable, and triangular mesh 2500 is non-orientable.
The Euler characteristic of a triangular mesh with V vertices, E edges, and T triangles is the number X=V-E+F. It is known in the prior art (described by "W. S. Massey" in Algebraic Topology: An Introduction, Harcourt, Brace & World, 1967; which is here incorporated by reference in its entirety) that two connected manifold triangular meshes of the same Euler characteristic can be continuously deformed into one another if both are orientable, or both are non-orientable.
A triangular mesh with V vertices and T triangles is usually represented in the prior art (described by "Foley et.al." in Computer Graphics: Principles and Practice, Addison-Wesley, 1990; which is here incorporated by reference in its entirety) by a vertex positions array and a triangle array. The position of each vertex of the triangular mesh is represented in the vertex positions array by n floating point coordinates. Each triangle of the triangular mesh is represented in the triangle array by three indices to the vertex positions array.
For the purposes of this disclosure, a simple triangular mesh is a triangular mesh with n-dimensional vertices that is connected, oriented, manifold, without boundary, and of Euler characteristic 2. For example, triangular mesh 2100 is a simple triangular mesh in 3-dimensional space. For example, every simple triangular mesh can be obtained by triangulating and continuously deforming a sphere. If a triangular mesh is not simple, it is complex. Some examples of complex triangular meshes are shown in FIGS. 2B through 2E.

Compression of geometric models using spanning trees

International Business Machines Corporation


Embodiments of the present invention provide methods, computer program products, and systems for automatically generating a display to present different terms. Embodiments of the present invention can be used to identify a first and a second user using applications in a software as a service (SaaS) environment and store, for the first and the second user, a first term associated with the first user and a second term associated with the second user in the SaaS environment. Responsive to identifying the first term associated with the first user and the second term associated with the second user have functionally equivalent definitions, embodiments of the present invention can replace the second term associated with the second user with the first term associated with the first user and generate a display for the first term associated with the first user that replaced the second term associated with the second user.

This present invention relates generally to the field of Software as a Service (SaaS), and more particularly, to utilization of tool terminology in SaaS environments.
Generally speaking, SaaS is a software licensing and delivery model. Software is typically licensed on a subscription basis and is centrally hosted. For example, SaaS can be accessed by users using a client via a web browser. Examples of applications provided in the SaaS environment include office and messaging software, payroll processing software, management software, development software, etc.

This patent is subject to a terminal disclaimer.

International Business Machines Corporation


A method for formal verification includes a latch remodeling process to reduce computational requirements for clock modeling. Latches that exhibit flip flop-like output behavior in a synthesized layout of sequential logic are identified and replaced with flip flops to generate a remodeled layout. This latch replacement can be performed using rules that filter out latches that do not exhibit flip flop-like output behavior. Clock modeling is then performed on the remodeled layout. Because the remodeled layout contains fewer latches than the original synthesized layout, the computational expense and time required for clock modeling (and hence, formal verification) on the remodeled layout can be significantly reduced over the requirements for clock modeling (and formal verification) on the original synthesized layout.

1. Field of the Invention
The invention relates to the field of electronic design automation, and in particular to a system and method for accurately and efficiently performing clock modeling in design formal verification.
2. Related Art
An electronic design automation (EDA) system is a computer software system used for designing integrated circuit (IC) devices. The EDA system typically receives one or more high level behavioral descriptions of an IC device (e.g., in HDL languages like VHDL, Verilog, etc.) and translates ("synthesizes") this high-level design language description into netlists of various levels of abstraction. A netlist describes the IC design and is composed of nodes (functional elements) and edges, e.g., connections between nodes. At a higher level of abstraction, a generic netlist is typically produced based on technology independent primitives.
The generic netlist can be translated into a lower level technology-specific netlist based on a technology-specific (characterized) cell library that has gate-specific models for each cell (i.e., a functional element, such as an AND gate, an inverter, or a multiplexer). The models define performance parameters for the cells; e.g., parameters related to the operational behavior of the cells, such as power consumption, delay, and noise. The netlist and cell library are typically stored in computer readable media within the EDA system and are processed and verified using many well-known techniques.
FIG. 1 shows a simplified representation of an exemplary digital ASIC design flow. At a high level, the process starts with the product idea (step E100) and is realized in an EDA software design process (step E110). When the design is finalized, it can be taped-out (event E140). After tape out, the fabrication process (step E150) and packaging and assembly processes (step E160) occur resulting, ultimately, in finished chips (result E170).
The EDA software design process (step E110) is actually composed of a number of steps E112-E130, shown in linear fashion for simplicity. In an actual ASIC design process, the particular design might have to go back through steps until certain tests are passed. Similarly, in any actual design process, these steps may occur in different orders and combinations. This description is therefore provided by way of context and general explanation rather than as a specific, or recommended, design flow for a particular ASIC.
A brief description of the component steps of the EDA software design process (step E110) will now be provided. During system design (step E112), the designers describe the functionality that they want to implement and can perform what-if planning to refine functionality, check costs, etc. Hardware-software architecture partitioning can occur at this stage. Exemplary EDA software products from Synopsys, Inc. that can be used at this step include Model Architect, Saber, System Studio, and DesignWare® products.
During logic design and functional verification (step E114), the VHDL or Verilog code for modules in the system is written and the design is checked for functional accuracy. More specifically, does the design as checked to ensure that produces the correct outputs. Exemplary EDA software products from Synopsys, Inc. that can be used at this step include VCS, VERA, DesignWare®, Magellan, Formality, ESP and LEDA products.
During synthesis and design for test (step E116), the VHDL/Verilog is translated to a netlist. The netlist can be optimized for the target technology. Additionally, the design and implementation of tests to permit checking of the finished chip occurs. Exemplary EDA software products from Synopsys, Inc. that can be used at this step include Design Compiler®, Physical Compiler, Test Compiler, Power Compiler, FPGA Compiler, Tetramax, and DesignWare® products.
During design planning (step E118), an overall floorplan for the chip is constructed and analyzed for timing and top-level routing. Exemplary EDA software products from Synopsys, Inc. that can be used at this step include Jupiter and Floorplan Compiler products.
During netlist verification (step E120), the netlist is checked for compliance with timing constraints and for correspondence with the VHDL/Verilog source code. Exemplary EDA software products from Synopsys, Inc. that can be used at this step include VCS, VERA, Formality and PrimeTime products.
During physical implementation (step E122), placement (positioning of circuit elements) and routing (connection of the same) is performed. Exemplary EDA software products from Synopsys, Inc. that can be used at this step include the Astro product.
During analysis and extraction (step E124), the circuit function is verified at a transistor level, this in turn permits what-if refinement. Exemplary EDA software products from Synopsys, Inc. that can be used at this step include Star RC/XT, Raphael, and Aurora products.
During physical verification (step E126), various checking functions are performed to ensure correctness for manufacturing, electrical issues, lithographic issues, and circuitry. Exemplary EDA software products from Synopsys, Inc. that can be used at this step include the Hercules product.
During resolution enhancement (step E128), geometric manipulations of the layout are performed to improve manufacturability of the design. Exemplary EDA software products from Synopsys, Inc. that can be used at this step include the iN-Phase, Proteus, and AFGen products.
Finally, during mask data preparation (step E130), the "tape-out" data for production of masks for lithographic use to produce finished chips is performed. Exemplary EDA software products from Synopsys, Inc. that can be used at this step include the CATS(R) family of products.
As ASIC designs become increasingly complex, formal verification of those designs (step E114) becomes more and more difficult. FIG. 2 shows a flow diagram of a conventional formal verification process. An initial circuit design is first provided in a "DESIGN" step 210. A synthesis operation is then performed on the design in a "SYNTHESIS" step 220, to transform the original gate-level RTL layout into an equivalent set of sequential elements (flip flops and latches) in a synthesized layout. Next, in a "CLOCK MODELING" step 230, the propagation of data through the synthesized layout is monitored in response to discrete clock cycles to test the functionality of the circuit design. During a "VERIFICATION" step 240, the results of the clock modeling are evaluated, and any problems (or lack thereof) are provided in an "OUTPUT" step 260.
Conventional clock modeling methodologies often generate combinational loops when processing a synthesized layout of sequential logic (that includes latches). A combinational loop is problematic because the state of data values at locations within the loop (e.g., inputs to logic gates) are not explicitly defined at a given point in time. In a synthesized layout of sequential logic, any latch implemented in that layout has the potential to generate a combinational loop, due to the nature of latch behavior. Specifically, a latch is transparent when enabled (i.e., data at the latch input is passed directly to the latch output), and therefore cannot provide any stabilizing effect when incorporated into a loop of logic.
For example, FIG. 3A shows an exemplary portion of a synthesized layout that includes a multiplexer 310, a latch 320, a combinational logic block 330, a latch 340, and a combinational logic block 350, all connected in series, with the output of logic block 350 feeding back into an input of multiplexer 310. A common clock signal CLK is provided to the clock pins CK of latches 320 and 340, while a selection signal SEL provided to multiplexer 310 determines whether an input signal S1 or the output of logic block 350 is provided to the input pin D of latch 320.
If selection signal SEL instructs multiplexer 310 to feed the output of logic block 350 back to latch 320, a combinational loop is realized when clock signal CLK enables both latches 320 and 340 (e.g., when clock signal CLK is in a logic HIGH state). Such a situation is problematic for clock testing because the data values (e.g., the values at inputs D and outputs Q of latches 320 and 340) at the end of a given clock cycle are not explicitly defined by the circuit itself.
For example, if logic block 330 or 350 performs a data inversion, a logic HIGH value at the input of latch 320 will be (relatively) immediately provided as a logic LOW output to multiplexer 310 by logic block 350. Latch 320 will then receive a logic LOW input from multiplexer 310, which will switch the output of logic block 350 to a logic HIGH state. This data oscillation will continue as long as latches 320 and 340 are enabled (i.e., as long as clock signal CLK is in a logic HIGH phase). When clock signal CLK switches to a logic LOW phase, the most recent state of the data in circuit 300 is stored. However, because of the aforementioned combinational loop behavior (data oscillation), specific values for the stored data cannot be determined in a clock modeling environment.
To overcome this problem, conventional formal verification systems typically perform latch "unrolling" to generate a circuit that can be solved using clock modeling. To "unroll" a latch, the logic driven by that latch is duplicated a predetermined number of times to simulate the repetitive looping effect of the combinational loop. For example, FIG. 3B shows a sample unrolled circuit 300′ for clock modeling that could be generated from circuit 300 in FIG. 3A. Circuit 300′ simulates the combinational loop behavior of circuit 300 by imposing a breakpoint between latch 340 and logic block 350 and replicating the logic following that breakpoint (logic block 350, multiplexer 310, and logic block 330) a certain number of times. Specifically, in circuit 300′, logic block 350, multiplexer 310, and logic block 330 are repeated twice the first time as logic block 350-1, multiplexer 310-1, and logic block 330-1, respectively, and the second time as logic block 350-2, multiplexer 310-2, and logic block 330-2, respectively. Circuit 300′ therefore simulates two cycles of the combinational loop of circuit 300. Latch 340 (in circuit 300) is replaced with a flip flop 340′ coupled between logic block 330-2 and logic block 350-1, while latch 320 (in circuit 300) is replaced with a flip flop 320′ coupled to the output of multiplexer 310-2 to complete unrolled circuit 300′. Note that by choosing a breakpoint between latch 340 and logic block 350 in circuit 300, latch 320 is rendered a pass-through element for combinational loop situations. Accordingly, flip flop 320′ in circuit 300′ simply receives the output of multiplexer 310-2.
Unfortunately, the logic duplicating technique described with respect to FIG. 3B is less than ideal for accurate and efficient clock modeling. The duplicate logic blocks used in place of each latch can significantly expand the size of the synthesized layout, thereby making clock modeling very computationally expensive. Furthermore, since the actual combinational loop behavior of a given circuit will typically depend on propagation delays specific to that circuit, applying the same duplication factor to all latches in a circuit will not accurately represent the behavior of many of those circuits.
Accordingly, it is desirable to provide a method and system for performing formal verification of IC layouts that can accurately account for latch behavior while minimizing computational requirements.

Latch modeling technique for formal verification


A tray for use in baking bread, baguettes, crusty rolls, or the like comprising a contoured baking sheet fabricated from a single piece of material and at least one support member attached to the baking sheet. The support member includes a plurality of protrusions that correspond to a series of fastening apertures formed in the baking sheet. Pressure applied to the protrusions deforms the top portion thereof and creates a series of permanent connectors that connect the support member to the baking sheet to form a baking tray.

The commercial production of bread products such as baguettes and crusty rolls typically includes the use of a baking pan or tray. Such pans or trays may include a baking sheet that further includes a plurality baking subunits formed in the baking sheet. These subunits roughly determine the shape and overall length of the baked loaf or roll. Due to its high thermal conductivity, low density, and good corrosion resistance, baking sheets of this nature are typically manufactured from aluminum; however, stainless steel may also be used. To provide or enhance structural integrity, the baking sheet may be attached to a frame either by welding, riveting, or a similar known means for joining components together.
Welding and riveting operations are often expensive and add to the overall cost associated with manufacturing baking trays. Additionally, commercial baking trays that are constructed from multiple components that have been riveted or welded together tend to suffer from significant structural deficiencies that negatively impact the function and longevity of the trays. With prolonged use and repeated exposure to mechanical stresses, rivets may loosen or break free from the pan. Likewise, welded baking pans that are subjected to repeated heating and cooling cycles are highly susceptible to fatigue cracking that destroys the weld joints and renders the tray useless for baking. Thus, there is a need for a relatively inexpensive means for manufacturing industrial baking trays that does not include the use of riveting or welding to attach the components of the tray to one another.


An arrangement for cleaning ground water and ground region through which it passes comprises transporting unit for producing a liquid circulation between a well shaft extending in the region of contaminated ground water and the surrounding region, unit for separating the well shaft into an upper region and a lower region, a water permeable shaft wall arranged at least locally for aspiration of water from and reintroduction of water into the ground, unit for connecting the regions with one another and including a throughgoing tube in which the transporting unit operate, and unit forming filter chambers in the upper region and in the lower region of the well shaft. The filter chambers occupy the whole free cross-section of the well shaft and extend at least in the upper well region upwardly over an upper edge of the water permeable shaft wall into an outwardly closed shaft region.

The present invention relates to an arrangement for cleaning ground water and a ground region through which the ground water passes.
More particularly, it relates to an arrangement of the above mentioned general type which has a transporting device for producing a liquid circulation guided through a filter, between a well shaft extending to the region of the ground water to be cleaned and the surrounding ground region. The well shaft is subdivided into an upper and a lower region which are separated from one another and has at least locally a water permeable shaft wall for aspiration of water from and then introduction of water into the ground region, and a throughgoing pipe connecting the regions with one another and accommodating the transporting device.
An arrangement of the above mentioned general type is disclosed, for example in the German reference DE-PS 4,001,011. With this arrangement there is a problem that the filter regions formed along the well shaft wall, for example filter gravel filler arranged in the well pipe, are not available for cleaning, deposits can form there, and therefore the efficiency of the arrangement is undesirably affected. Moreover, an outer filter gravel casing requires a greater opening diameter, which makes the arrangement more expensive. It has been recognized that the filter layers which are arranged before the water permeable vertical shaft wall regions are contaminated fast and these deposits can be removed, due to the vertical position of the filter surfaces, only with great expenses with use of acids and a cleaning circulation with water under high pressure.


A vibration member (140) has a sheet shape. A piezoelectric element (130) is attached to one surface of the vibration member (140). A support member (110) supports the edge of the vibration member (140). The support member (110) includes a first facing portion (112) and a second facing portion (114). The first facing portion (112) faces the surface of the vibration member (140) to which the piezoelectric element (130) is attached. The second facing portion (114) faces the surface of the vibration member (140) which is located on the opposite side to the piezoelectric element (130). A first spring (152) is provided between the first facing portion (112) and the vibration member (140) or the piezoelectric element (130). A second spring (154) is provided between the second facing portion (114) and the vibration member (140).

There is a parametric speaker as one of speakers. For example, as disclosed in Patent Document 1, the parametric speaker modulates an audio signal into a modulation signal of an ultrasonic wave band, and demodulates the modulation signal into an audible sound in the atmosphere.
As an oscillation device that oscillates a sonic wave of an ultrasonic wave band, there is a device in which a piezoelectric element is used as a vibrator (for example, Patent Documents 1 to 4). When a piezoelectric element is used as a vibrator, it is necessary to form electrodes on both sides of the piezoelectric element, and to input a signal between the two electrodes. Patent Documents 1 and 2 of these Patent Documents disclose that a terminal for inputting a signal to the electrode located on the upper surface side of the piezoelectric element utilizes a spring.
Meanwhile, Patent Document 5 discloses that in a piezoelectric actuator, a piezoelectric element is supported by a power feeding support portion through an elastic body.


In one embodiment, a gateway includes a memory, and a processor to, in response to receiving a plurality of content requests, generate a plurality of network flows and flow buffers, each one content request of the plurality of content requests being served by one network flow of the plurality of network flows, and one flow buffer of the plurality of flow buffers, the one flow buffer being included in the memory, the plurality of network flows including a first flow and a second flow, the first flow serving one of the plurality of requests having a first priority level, the second flow serving one of the plurality of requests having a second priority level, the first priority level being higher than the second priority level, and run a network arbiter to give prioritize reading the first flow over reading the second flow when the first flow is non-idle.

By way of introduction, available bandwidth is typically one of the main constraints in a content delivery system. For example, a gateway or set-top box (STB) may be downloading various types of content, for example, live content, real-time recordings, video on demand content, content pushed by a content provider for later viewing (e.g., video on demand content and replacement advertisements) as well as interactive TV downloads and software downloads. It will be appreciated that some of the content examples in the previous list are more time sensitive than other content types in the list. For example, live content is probably the most time sensitive in the previous list. Content items may be downloaded using an adaptive bitrate (ABR) mechanism whereby bitrate is adjusted according to the prevailing bandwidth. In many situations, using ABR results in a better rendering result whereby instead of having blank screens while waiting for high bitrate content, content is delivered at a lower bitrate while bandwidth is low. However, in other situations, ABR may be detrimental to the content delivery and rendering. For example, if a STB is downloading a live content item and content pushed by the content provider at the same time and the live content item is being downloaded using ABR and the pushed content is not being downloaded by ABR, the live content item is squeezed to use a lower bitrate than the pushed content, even though the pushed content is probably not even needed for rendering at present.


An apparatus and method for setting a ratio of a discharge rate to a charge rate for measuring a capacitance on a sensor element of a sensing device. The apparatus may include a sensor element of a sensing device, a relaxation oscillator having a first and a second programmable current source, and a ratio decoder to receive a ratio of a discharge rate to a charge rate, and to set the first and second programmable current sources based on the received ratio.

Computing devices, such as notebook computers, personal data assistants (PDAs), kiosks, and mobile handsets, have user interface devices, which are also known as human interface devices (HID). One user interface device that has become more common is a touch-sensor pad (also commonly referred to as a touchpad). A basic notebook computer touch-sensor pad emulates the function of a personal computer (PC) mouse. A touch-sensor pad is typically embedded into a PC notebook for built-in portability. A touch-sensor pad replicates mouse x/y movement by using two defined axes which contain a collection of sensor elements that detect the position of a conductive object, such as a finger. Mouse right/left button clicks can be replicated by two mechanical buttons, located in the vicinity of the touchpad, or by tapping commands on the touch-sensor pad itself. The touch-sensor pad provides a user interface device for performing such functions as positioning a pointer, or selecting an item on a display. These touch-sensor pads may include multi-dimensional sensor arrays for detecting movement in multiple axes. The sensor array may include a one-dimensional sensor array, detecting movement in one axis. The sensor array may also be two dimensional, detecting movements in two axes.
One type of touchpad operates by way of capacitance sensing utilizing capacitive sensors. The capacitance detected by a capacitive sensor changes as a function of the proximity of a conductive object to the sensor. The conductive object can be, for example, a stylus or a user's finger. In a touch-sensor device, a change in capacitance detected by each sensor in the X and Y dimensions of the sensor array due to the proximity or movement of a conductive object can be measured by a variety of methods. Regardless of the method, usually an electrical signal representative of the capacitance detected by each capacitive sensor is processed by a processing device, which in turn produces electrical or optical signals representative of the position of the conductive object in relation to the touch-sensor pad in the X and Y dimensions. A touch-sensor strip, slider, or button operates on the same capacitance-sensing principle.
Another user interface device that has become more common is a touch screen. Touch screens, also known as touchscreens, touch panels, or touchscreen panels are display overlays which are typically either pressure-sensitive (resistive), electrically-sensitive (capacitive), acoustically-sensitive (SAW—surface acoustic wave) or photo-sensitive (infra-red). The effect of such overlays allows a display to be used as an input device, removing the keyboard and/or the mouse as the primary input device for interacting with the display's content. Such displays can be attached to computers or, as terminals, to networks. There are a number of types of touch screen technologies, such as optical imaging, resistive, surface acoustical wave, capacitive, infrared, dispersive signal, piezoelectric, and strain gauge technologies. Touch screens have become familiar in retail settings, on point of sale systems, on ATMs, on mobile handsets, on kiosks, on game consoles, and on PDAs where a stylus is sometimes used to manipulate the graphical user interface (GUI) and to enter data.
FIG. 1A illustrates a conventional touch-sensor pad. The touch-sensor pad 100 includes a sensing surface 101 on which a conductive object may be used to position a pointer in the x- and y-axes, using either relative or absolute positioning, or to select an item on a display. Touch-sensor pad 100 may also include two buttons, left and right buttons 102 and 103, respectively, shown here as an example. These buttons are typically mechanical buttons, and operate much like a left and right buttons on a mouse. These buttons permit a user to select items on a display or send other commands to the computing device.
FIG. 1B illustrates a conventional linear touch-sensor slider. The linear touch-sensor slider 110 includes a surface area 111 on which a conductive object may be used to control a setting on a device, such as volume or brightness. Alternatively, the linear touch-sensor slider 110 may be used for scrolling functions. The construct of touch-sensor slider 110 may be the same as that of touch-sensor pad 100. Touch-sensor slider 110 may include a sensor array capable of detection in only one dimension (referred to herein as one-dimensional sensor array). The slider structure may include one or more sensor elements that may be conductive traces. By positioning or manipulating a conductive object in contact or in proximity to a particular portion of the slider structure, the capacitance between each conductive trace and ground varies and can be detected. The capacitance variation may be sent as a signal on the conductive trace to a processing device. It should also be noted that the sensing may be performed in a differential fashion, obviating the need for a ground reference. For example, by detecting the relative capacitance of each sensor element, the position and/or motion (if any) of the external conductive object can be determined. It can be determined which sensor element has detected the presence of the conductive object, and it can also be determined the motion and/or the position of the conductive object over multiple sensor elements.
One difference between touch-sensor sliders and touch-sensor pads may be how the signals are processed after detecting the conductive objects. Another difference is that the touch-sensor slider is not necessarily used to convey absolute positional information of a conducting object (e.g., to emulate a mouse in controlling pointer positioning on a display), but rather relative positional information. However, the touch-sensor slider and touch-sensor pad may be configured to support either relative or absolute coordinates, and/or to support one or more touch-sensor button functions of the sensing device.
FIG. 1C illustrates a conventional sensing device having three touch-sensor buttons. Conventional sensing device 120 includes button 121, button 122, and button 123. These buttons may be capacitive touch-sensor buttons. These three buttons may be used for user input using a conductive object, such as a finger.
In order to detect the presence of a conductive object on either of the above mentioned sensing devices (e.g., touch-sensor pad 100, touch-sensor slider 110, or touch-sensor buttons of sensing device 120), a current source is coupled to the sensing device to provide a charge current to one or more sensor elements of the sensing device. The current source may be part of a relaxation oscillator. The output of the relaxation oscillator may be measured by a digital counter.
One conventional sensing device includes a current source that provides current to the sensing elements of the sensing device to measure the capacitance on the sensing elements. The conventional sensing device, however, has a fixed value for the current. This fixed value may be a hard coded value in a register programmable current output digital-to-analog converter (DAC) (also known as IDAC). The hard coded value may be stored in a register or in memory of the processing device, which is used to determine the presence and/or position of a conductive object on the sensing device.
Conventional sensing devices that use a hard coded current from the current source of the capacitive circuit can have current or circuit response variations due to chip, system, and/or board manufacturing variations. These current or circuit response variations may result in improper capacitive sensing operations. For example, if the current is too low, it may take the circuit longer to measure the capacitance on the sensing device. Current or circuit response variations may also result in significant failure rate in production quantities due to the manufacturing variations.
FIG. 1D illustrates a varying capacitance sensor element. In its basic form, a capacitance sensor element 130 is a pair of adjacent conductors 131 and 132. There is a small edge-to-edge capacitance, but the intent of sensor element layout is to minimize the parasitic capacitance CP between these conductors. When a conductive object 133 (e.g., finger) is placed in proximity to the two conductors 131 and 132, there is a capacitance between electrode 131 and the conductive object 133 and a similar capacitance between the conductive object 133 and the other electrode 132. The capacitance between the electrodes when no conductive object 133 is present is the base capacitance CP that may be stored as a baseline value. There is also a total capacitance (CP+CF) on the sensor element 130 when the conductive object 133 is present on or in close proximity to the sensor element 130. The baseline capacitance value CP may be subtracted from the total capacitance when the conductive object 133 is present to determine the change in capacitance (e.g., capacitance variation CF) when the conductive object 133 is present and when the conductive object 133 is not present on the sensor element. Effectively, the capacitance variation CF can be measured to determine whether a conductive object 133 is present or not (e.g., sensor activation) on the sensor element 130.
Capacitance sensor element 130 may be used in a capacitance sensor array. The capacitance sensor array is a set of capacitors where one side of each capacitor is connected to a system ground 138. When the capacitance sensor element 130 is used in the sensor array, when the conductor 131 is sensed, the conductor 132 is connected to ground, and when the conductor 132 is sensed, the conductor 131 is connected to ground. Alternatively, when the sensor element is used for a touch-sensor button, the sensor element is sensed and the sensed button area is surrounded by a fixed ground. The presence of the conductive object 133 increases the capacitance (CP+CF) of the sensor element 130 to ground. Determining sensor element activation is then a matter of measuring change in the capacitance (CF) or capacitance variation. Sensor element 130 is also known as a grounded variable capacitor.
The conductive object 133 of FIG. 1D has been illustrated as a finger. Alternatively, this technique may be applied to any conductive object, for example, a conductive door switch, position sensor, or conductive pen in a stylus tracking system (e.g., stylus).
The capacitance sensor element 130 is known as a projected capacitance sensor. Alternatively, the capacitance sensor element 130 may be a surface capacitance sensor that does not make use of rows or columns, but instead makes use of a single linearized field, such as the surface capacitance sensor described in U.S. Pat. No. 4,293,734. The surface capacitance sensor may be used in touch screen applications.
FIG. 1E illustrates a conventional capacitance sensor element 137 coupled to a processing device 110. Capacitance sensor element 137 illustrates the capacitance as seen by the processing device 110 on the capacitance sensing pin 136. As described above, when a conductive object 133 (e.g., finger) is placed in proximity to one of the conductors 135, there is a capacitance, CF, between the one of the conductors 135 and the conductive object 133 with respect to ground. This ground, however, may be a floating ground. Also, there is a capacitance, CP, between the conductors 135, with one of the conductors 135 being connected to a system ground 138. The grounded conductor may be coupled to the processing device 110. The conductors 135 may be metal, or alternatively, the conductors may be conductive ink (e.g., carbon ink), conductive ceramic (e.g., transparent conductors of indium tin oxide (ITO)), or conductive polymers. The grounded conductor may be an adjacent sensor element. Alternatively, the grounded conductor may be other grounding mechanisms, such as a surrounding ground plane. Accordingly, the processing device 110 can measure the change in capacitance, capacitance variation CF, as the conductive object is in proximity to one of the conductors 135. Above and below the conductor that is closest to the conductive object 133 is dielectric material 134. The dielectric material 134 above the conductor 135 can be an overlay, as described in more detail below. The overlay may be non-conductive material used to protect the circuitry from environmental conditions and ESD, and to insulate the user's finger (e.g., conductive object) from the circuitry. Capacitance sensor element 137 may be a sensor element of a touch-sensor pad, a touch-sensor slider, or a touch-sensor button.
One conventional circuit of measuring the change in capacitance introduced by the conductive object is a relaxation oscillator.
FIG. 1F illustrates a conventional relaxation oscillator for measuring capacitance on a sensor element. The relaxation oscillator 150 is formed by the capacitance to be measured on the sensor element, represented as capacitor 151, a charging current source 152, a comparator 153, and a reset switch 154 (also referred to as a discharge switch). It should be noted that capacitor 151 is representative of the capacitance measured on a sensor element of a sensor array. The relaxation oscillator is coupled to drive a charging current (Ic) 157 in a single direction onto a device under test ("DUT") capacitor, capacitor 151. As the charging current piles charge onto the capacitor 151, the voltage across the capacitor increases with time as a function of Ic 157 and its capacitance C. Equation (1) describes the relation between current, capacitance, voltage, and time for a charging capacitor.CdV=ICdt   (1)
The relaxation oscillator begins by charging the capacitor 151, at a fixed current Ic 157, from a ground potential or zero voltage until the voltage across the capacitor 151 at node 155 reaches a reference voltage or threshold voltage, VTH 160. At the threshold voltage VTH 160, the relaxation oscillator allows the accumulated charge at node 155 to discharge (e.g., the capacitor 151 to "relax" back to the ground potential) and then the process repeats itself. In particular, the output of comparator 153 asserts a clock signal FOUT 156 (e.g., FOUT 156 goes high), which enables the reset switch 154. This discharges the capacitor at node 155 to ground and the charge cycle starts again. The relaxation oscillator outputs a relaxation oscillator clock signal (FOUT 156) having a frequency (fRO) dependent upon capacitance C of the capacitor 151 and charging current Ic 157.
The comparator trip time of the comparator 153 and reset switch 154 add a fixed delay. The output of the comparator 153 is synchronized with a reference system clock to guarantee that the reset time is long enough to completely discharge capacitor 151. This sets a practical upper limit to the operating frequency. For example, if capacitance C of the capacitor 151 changes, then fRO changes proportionally according to Equation (1). By comparing fRO of FOUT 156 against the frequency (fREF) of a known reference system clock signal (REF CLK), the change in capacitance ΔC can be measured. Accordingly, equations (2) and (3) below describe that a change in frequency between FOUT 156 and REF CLK is proportional to a change in capacitance of the capacitor 151.ΔC ∝Δf, where   (2)Δf=fRO−fREF.   (3)
A frequency comparator may be coupled to receive relaxation oscillator clock signal (FOUT 156) and REF CLK, compare their frequencies fRO and fREF, respectively, and output a signal indicative of the difference Δf between these frequencies. By monitoring Δf one can determine whether the capacitance of the capacitor 151 has changed.
The relaxation oscillator 150 may be built using a programmable timer (e.g., 555 timer) to implement the comparator 153 and reset switch 154. Alternatively, the relaxation oscillator 150 may be built using other circuitry. The capacitor charging current for the relaxation oscillator 150 may be generated in a register programmable current output DAC (also known as IDAC). Accordingly, the current source 152 may be a current DAC or IDAC. The IDAC output current may be set by an 8-bit value provided by the processing device 110, such as from the processing core. The 8-bit value may be stored in a register or in memory.
In many capacitance sensor element designs, the two "conductors" (e.g., 131 and 132) of the sensing capacitor are actually adjacent sensor elements that are electrically isolated (e.g., PCB pads or traces), as indicated in FIG. 1D. Typically, one of these conductors is connected to a system ground 138. Layouts for touch-sensor slider (e.g., linear slide sensor elements) and touch-sensor pad applications have sensor elements that may be immediately adjacent. In these cases, all of the sensor elements that are not active are connected to a system ground 138 of the processing device 110. The actual capacitance between adjacent conductors is small (CP), but the capacitance of the active conductor (and its PCB trace back to the processing device 110) to ground, when detecting the presence of the conductive object 133, may be considerably higher (CP+CF). The capacitance of two parallel conductors is given by the following equation:
                    C        =                                            ɛ              0                        ·                          ɛ              R                        ·                          A              d                                =                                                    ɛ                R                            ·              8.85              ·                              A                d                                                  pF                                      /                                    m                                              (        4        )
The dimensions of equation (4) are in meters. This is a very simple model of the capacitance. The reality is that there are fringing effects that substantially increase the sensor element-to-ground (and PCB trace-to-ground) capacitance.
As described above with respect to the relaxation oscillator 150, when a finger or conductive object is placed on the sensor element, the capacitance increases from CP to CP+CF so the relaxation oscillator output signal 156 (FOUT) decreases in frequency. The relaxation oscillator output signal 156 (FOUT) may be fed to a digital counter for measurement. There are two methods for counting the relaxation oscillator output signal 156: frequency measurement and period measurement.
In the conventional relaxation oscillator, the baseline capacitance CP is with respect to system ground 138, such as of the processing device 110, while the capacitance variation CF is with respect to a common ground or a floating ground.
Sensing devices with floating grounds are subject to high voltage AC offsets due to the sensing devices power supply, especially when used with AC/DC converters with high leakage or when the sensing device is coupled to the AC line. Capacitive sensor elements may be especially sensitive to this type of periodic noise due to the low currents and capacitance of the sensing device.
FIG. 1G illustrates a graph of the voltage across a sensor element. The voltage Va 161, which is the voltage across the capacitor 151 at node 155. As the voltage Va 161 reaches a threshold voltage VTH 160, the voltage is removed from the node 155, dropping the voltage Va 161 back to ground. As described above, the conventional relaxation oscillator is subject to noise on the system ground. The system ground may be very noisy in comparison to the common ground. Consequently, the frequency of the voltage Va is modulated by the noise, resulting in different charge time periods (t1, t2, and t3) between peaks of the saw-toothed voltage. This may affect sensing the correct capacitance variation CF.
FIG. 1H illustrates two graphs of the output counts for four scans of four buttons on a conventional sensing device with and without alternating current (AC) noise. The presence of a finger or other type of conductive object on the switch may be determined by the difference in counts between a stored value (e.g., baseline or threshold) for no switch actuation and the acquired value with switch actuation. The sensing device can be scanned to measure the capacitance, which is represented by the number of counts. When the counts are measured as being above a "button pressed" or presence threshold, switch activation can be detected. Graph 160 illustrates the counts measured on a conventional sensing device that includes four buttons. Graph 160 illustrates the counts of a first scan of the four buttons (four shaded rectangles) in a row followed by a delay and then their rescan three times (four total scans of the four buttons). The result is that counts of all buttons exceed the 'button pressed' threshold consistently when no AC noise is present. Graph 160 illustrates the counts measured on the conventional sensing device when no or minimal AC noise is present.
Graph 170 illustrates the counts measured on the conventional sensing device when AC noise is present. Similar to Graph 160, Graph 170 illustrates the counts of a first scan of the four buttons (four shaded rectangles) in a row followed by a delay and then their rescan three times (four total scans of the four buttons). Graph 170, however, illustrates the AC noise offsets introduced in the counts measured on the conventional sensing device. The AC noise may be caused due to an AC power adapter that is used to power the sensing device, or alternatively, from other AC power sources. Due to the AC noise, the button counts measured on the conventional sensing device do not consistently cross the "button pressed" or presence threshold.
Conventional sensing devices do not attempt to reduce the AC noise level. Taking a single sample of length t, asynchronous to the AC noise, results in an offset proportional to the AC noise amplitude and polarity at the time of the sample. Because the precise frequency and phase of the AC noise is not known during the sample, the offset appears to be random to the firmware. Because conventional designs perform no reduction in AC noise, the worst case AC induced noise level results in being approximately 5 times the signal level. The characteristic waveform of this worst case (e.g., counts measured including the AC offset) may be similar to that of an object in proximity to the capacitive sensing circuit, meaning the counts may exceed the presence threshold for switch activation. The result is false-positive detections and missed-real detections of the presence of the conductive object, resulting in detection algorithm instability.

Setting a discharge rate and a charge rate of a relaxation oscillator circuit


Systems and methods of laying out integrated circuits are disclosed. During the layout stage of an integrated circuit device, a fixed, physical geometry is created of the parameterized cells (PCells) included in the integrated circuit schematic. The systems include a proxy engine configured to save to cache the geometries created during the layout stage such that the geometries need not be recomputed when the design is opened after a save to disk operation, during which geometries may otherwise be destroyed. The proxy engine may further be configured to delegate requests for the creation of geometries to other components of the integrated circuit design system. In addition, the proxy engine may be configured to perform customized evaluations of PCells, other than or in addition to caching and delegation.

1. Field of the Invention
The present invention relates generally to integrated circuit (IC) devices, and more particularly to IC device design.
2. Related Art
A process of designing an IC device comprises multiple steps. Building blocks of the IC device under design are typically represented by parameterized cells (PCells). During a schematic (netlist) stage, the PCell is a symbolic representation of an electrical characteristic. During a layout stage, a user application generates a request to evaluate the PCell by passing parameter values and identity of the PCell desired. The request results in a generation of an instantiation of a physical, fixed structure of the PCell. This structure is referred to as design data and is compatible with an electronic design automation (EDA) vendor's database.
Due to the proprietary nature of a vendor's database and programming language, an IC design becomes locked into a particular vendor's tool chain. For example, a designer is unable to use a schematic application from one vendor and a layout application from a different vendor. Although at least one EDA vendor has standardized its database into a non-proprietary format, its programming language remains proprietary. Thus, intellectual property of the user's IC design becomes programmed into a particular vendor's programming language.
During the layout stage, the design data is stored in memory. When the layout is saved to disk, for all the PCell instantiations created, only the parameter values and a reference to the PCell are saved. The design data (i.e., geometries) generated by the PCell instantiations are destroyed. When the layout is opened again, the geometries need to be recreated. Disadvantageously, this process can take a substantial amount of time.
As a further disadvantage, delivering the IC design to a third party comprises delivering scripts for original PCells, into which the user's intellectual property has been programmed. The delivery of the scripts is necessary also for the third party, such as a foundry, which need only validate the IC design and not modify it. Additionally, the third party still requires a license to the EDA vendor's tool in order to open the layout and recreate the geometries.
As additional and more sophisticated EDA tools become available, there is a need for improved systems and methods for designing integrated circuits in terms of increased standardization, improved cross-vendor portability and intellectual property protection, and reduced computational resources required to recompute geometries.

System and method for proxied evaluation of PCells


In a fixing device for fixing a toner image onto a recording medium, a heating roller is provided with an elastic layer formed on an outer periphery thereof. An endless belt is adapted to be circulated. A press member presses a part of the endless belt against the heating roller so as to deform the elastic layer, thereby forming a fixing nip portion through which the recording medium it passed. A guide member has a slope portion extended so as to close to a tangential line defined at a press contact position between the heating roller and the press member, as is being away from the exit of the fixing nip portion. A fixing pressure generated at the exit of the fixing nip portion is greater than a fixing pressure generated at an entrance of the fixing nip portion.

The present invention relates to a fixing device comprising, a heating roller having an elastic surface layer and incorporating a heat source therein; a press roller opposed to the heating roller so as to provide pressure against the heating roller; and a heat-resistant belt circulated while being sandwiched between the heating roller and the press roller to form a fixing nip portion, wherein a sheet medium on which an unfixed toner image is formed is passed through the fixing nip portion to fix the unfixed toner image on the sheet medium.
The present invention also relates to a fixing device comprising: a heating element having a flat surface; a press roller opposed to the flat surface so as to provide pressure against the heating element; and a heat-resistant belt circulated while being sandwiched between the flat surface and the press roller to form a fixing nip portion, wherein a sheet medium on which an unfixed toner image is formed is passed through the fixing nip portion to fix the unfixed toner image on the sheet medium.
In the former type of the fixing device, when the sheet medium is passed through the fixing nip portion to perform the fixation of the unfixed toner image, the sheet medium is curled along the outer periphery of the heating roller and becomes liable to wind around the heating roller. In order to separate the sheet medium from the heating roller, there is provided a peeler such as a peeling pawl, a peeling plate at an exit side of the fixing nip portion.
For example, Japanese Patent Publication No. 2-61030B discloses a peeler in which a plurality of flexible claws are projected from a base plate toward the exit of the fixing nip portion, so as to come in slide contact with a fixing roller, in order to separate the ejected shoot medium from the fixing roller. Japanese Utility Model Publication No. 53-117249U discloses a peeler in which a plate member is formed with slits so that divided sections are made flexible. The tip ends of the divided sections are opposed to the exit of the fixing nip portion, so as to come in slide contact with a fixing roller, in order to separate the ejected sheet medium from the fixing roller.
However, in such a configuration that the peeler comes in slide contact with the fixing roller, irrespective of the degree of the sliding pressure, the surface of the fixing roller (the heating roller and/or the press roller) is liable to be subjected to damage, wear, and deterioration. In particular, such phenomenon becomes remarkable in the recent image forming apparatus in which the operation speed is increased.
Meanwhile, immediately after the fixing operation (i.e., immediately after the ejection from the fixing nip portion), the toner image is not completely fixed on the shoot medium. When the peeler disclosed in the above publications comes in slide contact with such an unfixed toner image, sliding traces would be left on the image, or the unfixed toner would be transferred onto the peeler, thereby causing a defect on the obtained image, or the unfixed image would adhere the peeler, thereby interfering the conveyance of the sheet medium and causing the sheet jamming. In particular, such phenomenon becomes remarkable in the recent image forming apparatus in which the operation speed is increased.

Fixing device and image forming apparatus incorporating the same


A new toilet tank assembly aquarium for housing aquatic creatures. The assembly includes a toilet bowl assembly with a toilet tank assembly coupled to the toilet bowl assembly. The toilet tank assembly has a top, a front, a back, and a pair of sides. The front, back and sides of the toilet tank assembly define an interior space with the top of the toilet tank assembly having an opening into the interior space of the toilet tank assembly. A toilet water reservoir is located in the interior space. A lid substantially covers the opening of the top of the toilet tank assembly. The front of the toilet tank assembly is generally transparent.

1. Field of the Invention
The present invention relates to toilets and more particularly pertains to a new toilet tank assembly aquarium for housing aquatic creatures.
2. Description of the Prior Art
The use of toilets is known in the prior art. More specifically, toilets heretofore devised and utilized are known to consist basically of familiar, expected and obvious structural configurations, notwithstanding the myriad of designs encompassed by the crowded prior art which have been developed for the fulfillment of countless objectives and requirements.
Known prior art toilets include U. S. Pat. No. Des. 270,936; PCT Patent No. WO 93/14628 (inventor: Gerlitzki); U.S. Pat. No. 4,364,132; U.S. Pat. No. 1,957,831; PCT Patent No. WO 87/00020 (inventors: Gurevich et al.); U.S. Pat. No. 3,181,178; and U.S. Pat. No. 5,042,426.
While these devices fulfill their respective, particular objectives and requirements, the aforementioned patents do not disclose a new toilet tank assembly aquarium. The inventive device includes a toilet bowl assembly with a toilet tank assembly coupled to the toilet bowl assembly. The toilet tank assembly has a top, a front, a back, and a pair of sides. The front, back and sides of the toilet tank assembly define an interior space with the top of the toilet tank assembly having an opening into the interior space of the toilet tank assembly. A toilet water reservoir is located in the interior space. A lid substantially covers the opening of the top of the toilet tank assembly. The front of the toilet tank assembly is generally transparent.
In these respects, the toilet tank assembly aquarium according to the present invention substantially departs from the conventional concepts and designs of the prior art, and in so doing provides an apparatus primarily developed for the purpose of housing aquatic creatures.


A cover receptacle assembly of plastics for use in laboratories, in particular for the polymerase chain reaction technique, comprising a tubular receptacle having a receptacle botton at one end and a receptacle opening at an opposite end, a cover for sealingly closing said receptacle opening, strap hinge means integrally and pivotally connecting said receptacle and cover with each other, and holding means for holding said cover in an intermediate position between an initial position wherein said cover is pivoted away from said receptacle opening for 180.degree. and a closing position wherein said cover closes said receptacle opening.

1. Field of the Invention
This invention relates to a cover receptacle assembly of plastics for use in laboratories, in particular for the polymerase chain reaction (PCR) technique. The cover receptacle assembly is intended for small probes and may have a capacity of about 0.2 to 0.5 ml.
2. Description of Related Art
Cover receptacle assemblies of the prior art comprise a tubular receptacle and a cover connected thereto adjacent the receptacle opening by means of a flap. In a reaction receptacle of plastics as disclosed in European patent 0 149 797 B1 the flap comprising strap hinge means is integrally connected both to the receptacle and the cover. For facilitating injection molding of such assemblies the structure thereof is such that the cover normally assumes a position wherein it is laterally pivoted away from its closing position for 180.degree. and the strap hinge means extends parallel to the receptacle opening. Due to the resilience of the strap hinge means the cover remains in such an initial position or returns thereto unless it is being held in its closing position. As a result the cover receptacle assembly when being in its open condition requires a lot of space.
Quite often a great number of cover receptacle assemblies are inserted in holders to allow for the simultaneous handling of various probes, which holders have apertures arranged in parallel rows to receive the cover receptacle assemblies. Such holders may belong for example to heating or mixing devices. Furthermore, it has become known to interconnect a plurality of cover receptacle assemblies by strip portions so as to form receptacle strip assemblies in order to allow for simultaneous handling thereof even when they are not positioned in a common holder. One field of use is the polymerase chain reaction (PCR) technique wherein a temperature program is being executed in a heating device. When therein a temperature of more than 90.degree. C. has been reached, DNA is being separated into its two rods. At temperatures of about 40.degree. to 70.degree. C. copies of the DNA are being made by use of a primer. The DNA is being multiplied in a plurality of heating and cooling cycles.
When the probes are being handled simultaneously, the substantial space requirement of the open cover receptacle assemblies is particularly disadvantageous. This is so because they must be filled and unfilled when they are positioned within the holder. If laterally projecting covers overlap adjacent receptacle openings, pipetting of the probes becomes difficult and the risk of contamination thereof is enhanced. When the receptacle rows are largely spaced from each other in order to avoid this, the holders and accordingly the heating and other auxiliary devices will become volumineous and expensive.