An external interconnection unit including a pad provided on a semiconductor chip, a bump electrode formed on a main surface of a semiconductor chip for connection with the board, and a connection interconnection for connecting the pad and the bump electrode is provided in a plurality of stages in two rows in parallel. The bump electrode is provided on a region other than the region of a sense amplifier region (SR). A semiconductor package having reliability as a semiconductor device prevented from being degraded, and a semiconductor package effectively taking advantage of the feature of a CSP structure is provided.

1. Field of the Invention
The present invention relates to semiconductor packages of CSP (Chip Scale Package) and BGA (Ball Grid Array) structures of a high chip occupying rate and improved in packaging density, and more particularly, to a semiconductor package of a CSP structure and a BGA structure in which reliability as a semiconductor device is prevented from being degraded.
2. Description of the Background Art
A semiconductor package of a CSP structure has been developed as one that can have a high chip occupying rate (more than 90%) and that can have packaging density improved drastically. Such a package is released in, for example, ISSCC (International Solid-State Circuits Conference) 94.
As shown in FIG. 30, a semiconductor package of a CSP structure (referred to as CSP hereinafter) includes a semiconductor chip 1, a connection interconnection 3, a bump electrode 4, and a mold resin 5. Semiconductor chip 1 includes an integrated semiconductor device, and a bonding pad (referred simply as xe2x80x9cpadxe2x80x9d hereinafter) 2 electrically connected to the integrated semiconductor device. Pad 2 is connected to bump electrode 4 via interconnection 3 formed by photolithography. Mold resin 5 covers the entirety thereof except for the head of bump electrode 4. This semiconductor package of a CSP structure is mounted on a predetermined board by fusing bump electrode 4.
Since connection interconnection 3 and bump electrode 4 are formed on semiconductor chip 1 in a CSP, lead pins and wires connecting a lead pin and a pad of a semiconductor chip required in conventional packages do not have to be provided. This eliminates the need of a thick mold that was required to cover the lead pins and wires. Therefore, the thickness of the mold can be reduced significantly. In effect, a CSP allows a package of substantially the same size of a semiconductor chip.
Since interconnection 3 is formed by photolithography, the length and path configuration of connection interconnection 3 can be set arbitrarily. Connection between bump electrode 4 and pad 2 can be implemented easily even when bump electrode 4 and pad 2 are formed at arbitrary positions. Furthermore, wire inductance and input capacitance can be increased to improve electric characteristics by forming interconnecting 3 so that the length between bump electrode 4 and pad 2 is reduced.
FIG. 31 shows a CSP in which connection interconnection 3 is provided with pad 2 arranged at an arbitrary position. As shown in FIG. 31, respective pads 2 are formed at arbitrary positions connected to corresponding bump electrodes 4 by connection interconnection 3 formed vertically and horizontally by photolithography.
As shown in FIG. 31, a CSP can have pad 2, connection interconnection 3 and bump electrode 4 formed on arbitrary positions on a semiconductor chip 1. In forming bump electrode 4 and in mounting the CSP on a board, stress is exerted onto the semiconductor element provided under bump electrode 4. It was therefore necessary to take care that the stress generated in forming bump electrode 4 and in mounting CSP on a board is as low as possible.
The advantage of forming pad 2 or the like at an arbitrary position on semiconductor chip 1 in the CSP was used just for connecting pad 2 with bump electrode 4 by connection interconnection 3 as shown in FIGS. 30 and 31.
In a semiconductor memory such as a DRAM (Dynamic Random Access Memory), the chip area is increased as the capacity thereof becomes greater. However, the demand for increase in speed and reduction in consumption power is insatiable. Increase in the length of the wiring path on a chip due to a larger chip area results in a greater delay in signal transmission to prevent high speed operation.
Furthermore, there is a greater demand for a x16/x32/x64 configuration than a x1/x4/x8 configuration as to the number of data input/output pins corresponding to a multi-bit structure requirement. Increase in the number of bits will require a greater number of output buffers and bonding pads, which in turn will result in a larger chip area. Also, the problem of a power supply noise becomes noticeable.
Furthermore, there is a trend towards a system chip incorporating both memory and logic. Corresponding packaging technology is therefore required.
An object of the present invention is to provide a semiconductor package having a bump electrode arranged taking into consideration stress exerted on an underlying semiconductor element so as to prevent reduction in reliability as a semiconductor device.
Another object of the present invention is to provide a semiconductor package effectively taking advantage of the feature of a CSP.
A further object of the present invention is to provide a semiconductor package that can maintain high speed operation even in a semiconductor memory of a great capacity.
Still another object of the present invention is to provide a semiconductor package that can have increase in chip area and power supply noise suppressed even when the number of bits is increased.
A semiconductor package of the present invention includes features set forth in the following on the postulation that it is a semiconductor package including a plurality of external interconnection units formed of a bump electrode for connection with the outside world, on a main surface of a semiconductor chip having an integrated semiconductor device, a pad formed at the semiconductor chip for connection with the integrated semiconductor device, and a connection interconnection formed on the main surface of the semiconductor chip by photolithography for electrically connecting a pad and a bump electrode.
When an integrated semiconductor device includes a fragile circuit that is easily altered in circuit characteristics by an external factor such as mechanical stress, a semiconductor package according to an aspect of the present invention has a bump electrode formed at a region other than the upper portion of the region where the fragile circuit is provided.
Due to this arrangement, mechanical stress is prevented from being exerted on the fragile circuit via the bump electrode in the semiconductor package of the present aspect.
Preferably, the fragile circuit is a sense amplifier circuit formed of a pair of transistors for sensing and amplifying a small potential difference between a pair of bit lines.
By a virtue of the fragile circuit being a transistor circuit, imbalance in the operation characteristics of the transistor pair due to mechanical stress being exerted via the bump electrode is prevented. Therefore, reduction in the sense operation of the sense amplifier circuit can be prevented.
Preferably, the fragile circuit is an analog circuit operating at a small current.
By virtue of the fragile circuit being an analog circuit, deterioration of the operation of the analog circuit due to mechanical stress being exerted via the bump electrode is prevented.
A semiconductor package according to another aspect of the present invention includes at least one power supply pad, and a power supply interconnection. The power supply pad is provided on a main surface of the semiconductor chip to supply power to an integrated semiconductor device. The power supply interconnection is connected to the power supply pad and is provided so as to surround at least a portion of each of the plurality of external interconnection units.
By virtue of the above-described arrangement, an external interconnection unit surrounded by a power supply interconnection is electrically shielded to be immune from another external internal connection unit and to prevent electrical influence to another external interconnection unit.
Preferably, the power supply interconnection surrounding at least a portion of each of the plurality of external interconnection units is formed in a mesh-like manner connected to each other. A plurality of power supply pads are provided with respect to the mesh-like power supply interconnection so as to reduce the power supply impedance.
By virtue of this arrangement, load of the power supply can be reduced.
Preferably, a stress relaxing material is provided right beneath the bump electrode and between the connection interconnection and the main surface of the semiconductor chip for relaxing mechanical stress exerted on the semiconductor chip via the bump electrode. By virtue of this arrangement, mechanical stress is prevented from being exerted on the integrated semiconductor device.
A semiconductor package according to a further aspect of the present invention has an integrated semiconductor device including an input/output buffer circuit directly connected to a pad. The bump electrode electrically connected to the input/output buffer circuit via the pad is provided above the proximity of the input/output buffer circuit.
By virtue of this arrangement, the interconnection path from the bump electrode and the input/output buffer circuit can be shortened to prevent delay in signal transmission therebetween. Therefore, high speed operation can be maintained even when the capacity of a semiconductor memory or the like is increased. Furthermore, xe2x80x9caddress set upxe2x80x9d and xe2x80x9chold marginxe2x80x9d can be improved due to the reduction of the interconnection path length.
Preferably, the integrated semiconductor device includes a plurality of memory mats, and a master peripheral circuit that divides the plurality of memory mats and controls a memory mat independently. The memory mat includes a plurality of memory regions having a memory element, and a local peripheral circuit dividing the plurality of memory regions and controlling the memory element in each memory region independently.
The integrated semiconductor device has the so-called hierarchical memory structure. Thus, a semiconductor memory of a hierarchical memory structure that can maintain high speed operation even when the capacity is increased can be obtained.
Preferably, a second connection interconnection formed on the main surface of the semiconductor chip is further provided. The master peripheral circuit and the local peripheral circuit are electrically connected by this second connection interconnection.
The second connection interconnection is formed on the main surface of the semiconductor chip. Since elements and circuits are not formed on the main surface of the semiconductor chip, a large line width of the second connection interconnection can be ensured. A material suitable for interconnection can be selected since restriction with respect to the material of the second interconnection is not severe. Therefore, the impedance of the second connection interconnection can be reduced, which in turn allows reduction of the time constant and prevents delay in signal transmission.
Preferably, a bump electrode through which a signal transmitted to each of the plurality of memory mats is entered by the master peripheral circuit is formed on the region where the master peripheral circuit is provided. Each of the plurality of memory mats is arranged so as to be symmetrical with respect to the position of the bump electrode. The interconnection from a bump electrode to the plurality of memory mats is arranged so as to be symmetrical with respect to the position of bump electrode.
By virtue of this symmetrical arrangement, each interconnection from a bump electrode to respective memory mats can be arranged so as to be symmetrical with respect to the bump electrode. An input signal is first entered into the master peripheral circuit that controls each memory mat. Therefore, the transmission distance of a signal from a bump electrode to each of the plurality of memory mats is substantially identical. As a result, phase offset of a signal applied to each memory mat, i.e. the skew, can be reduced significantly.
Preferably, the transmission distance of an input signal from a bump electrode to each of the plurality of memory mats is substantially identical.
Due to this arrangement, the skew for each memory mat can be reduced.
Preferably, an output bump electrode for providing an output signal from a memory element to the outside world is electrically connected to an output buffer provided within a region of the local peripheral circuit. This output bump electrode is arranged on a region where the local peripheral circuit is provided.
The output bump electrode can be arranged in the proximity of the output buffer circuit arranged on a local peripheral circuit region. Therefore, delay of an output signal from an output buffer circuit to a bump electrode can be prevented.
Preferably, the connection interconnection includes first and second connection interconnections electrically insulated from each other, and extending at different levels on the main surface of the semiconductor chip.
By virtue of the first and second connection interconnections extending at different levels, the degree of freedom of the arrangement of the connection interconnection can be increased in comparison with the case where the first and second interconnections are formed on the same level. Therefore, various interconnection structures can be accommodated while maintaining electrical insulation of the first and second connection interconnections.
Preferably, the connection interconnection includes first and second connection interconnections extending on the same level on a main surface of the semiconductor chip. At the crossing of the first and second connection interconnections, the electrical insulation state of the first and second connection interconnections is maintained by one of the first and second interconnections being electrically connected to a conductive layer formed in the semiconductor chip.
Since the first and second connection interconnections extending on the same level can have their insulation state maintained by using a conductive layer in a semiconductor chip, it is easy to comply with various interconnection structures.
Preferably, a power supply bump electrode for supplying power supply to the output buffer circuit is arranged on a region where the local peripheral circuit including the output buffer circuit is provided.
By virtue of this arrangement, power can be supplied from the bump electrode to the output buffer circuit through a short interconnection path. Therefore, a low impedance power supply of low noise can be realized.
Preferably, an output bump electrode electrically connected to each of the plurality of memory elements in a memory region and electrically connected to a data bus for data input/output with the plurality of memory elements is arranged on and in the proximity of the memory region.
By virtue of this arrangement, the data bus can be shortened. Therefore, access will not be degraded even when the number of bits is increased.
Preferably, the master peripheral circuit includes a mat select circuit that selects and renders operable one of the plurality of memory mats, and that inhibits supply of power towards a local peripheral circuit within a non-selected memory mat.
A particular mat can be selected to be rendered operable by the mat select circuit. Since power supply towards the local peripheral circuit is inhibited by a mat select circuit for a non-selected mat, consumption power can be reduced in comparison with the case where a predetermined voltage is applied to a non-selected mat to set a standby state thereof.
Preferably, the master peripheral circuit includes a mat select circuit for selecting and rendering operable a predetermined number of memory mats, and inhibiting power supply into the local peripheral circuit of the non-selected memory mat.
Since the number of memory mats to be selected can be varied according to the mat select circuit, the number of bits can be changed according to the selected number of memory mats. Therefore, the memory size can be set as a variable module. Furthermore, consumption power can be reduced since power supply towards a local peripheral circuit in a non-selected memory mat is prevented by the mat select circuit.
Preferably, a power supply conductive layer for supplying a power supply voltage to elements within the integrated semiconductor device is formed within the semiconductor chip. The connection interconnection to which power supply voltage from the bump electrode is provided extends in a direction crossing the direction of extension of the power supply conductive layer, and is electrically connected to the power supply conductive layer.
By electrically connecting the connection interconnection to the power supply conductive layer, the potential of the power supply conductive layer can be enhanced.
Preferably, the element is a sense amplifier circuit formed of a transistor pair for sensing and amplifying a small potential difference between a bit line pair. The connection interconnection and the power supply conductive layer are arranged so as to be mesh-like in plane.
Since the potential of the power supply conductive layer connected to the sense amplifier circuit is enhanced, a stable operation of the sense amplifier circuit can be achieved.
Preferably, the semiconductor chip includes a test pad for testing brought into contact with a probe needle of a prober in a testing mode. The test pad is provided at the main surface of the semiconductor chip, and is formed on a region other than where the integrated semiconductor device is formed.
The semiconductor chip allows wafer testing by a prober since it includes a pad for testing.
Preferably, an oscillator activated by an external test signal, and a control signal generator for generating various control signals by the oscillator are further provided for a test mode operation. The control signal generator is connected to the master peripheral circuit so that a signal provided from the control signal generator is applied to the master peripheral circuit.
Since a control signal such as RAS and CAS of each address signal and test patterns can be generated in the semiconductor chip by an external test signal, the number of pads for testing can be reduced in comparison with the case where these signals are externally applied to the semiconductor chip.
Preferably, a shift register is further provided for sequentially storing the pass/fail state of test data obtained from each of the plurality of memory mats and sequentially providing the stored pass/fail state of test data.
Preferably, a signal indicating the pass/fail state of test data provided from a shift register is output from the test pad provided in the semiconductor chip.
The pass/fail state of a plurality of test data can be sequentially output to one output pad by the shift register. Therefore, the number of pads required for testing in the semiconductor chip can be reduced.
Preferably, a test pad and a pad are electrically connected to the local peripheral circuit by different interconnection paths. The first interconnection between the test pad and the local peripheral circuit can be switched between a connected and non-connected state. Also, the second interconnection between the pad and the local peripheral circuit can be switched between a connected and non-connected state. In a test mode, the first interconnection attains a connected state, and the second interconnection attains a non-connected state. In a normal operation mode, the first interconnection attains a non-connected state, and the second interconnection attains a connected state.
Since the connection/non-connection of the first and second interconnections can be selected, the test pad can be electrically connected to the local peripheral circuit in a testing mode, and the pad can be electrically connected to the local peripheral circuit in a normal operation mode.
Preferably, a circuit for determining and storing a defective address of a memory element from the pass/fail of test data obtained from each memory mat is further provided. A signal of a defective address is sequentially output from this circuit.
Preferably, a signal of a defective address provided from the circuit that determines and stores a defective address is output from the test pad provided in the semiconductor chip.
The defective address can be output as a packet by the circuit that determines and stores the defective address of a memory element.
Preferably, the power supply interconnection is provided on the main surface of the semiconductor chip so as to surround the interconnection to which a predetermined potential is applied. This power supply interconnection is formed so that current is not conducted.
Due to this arrangement, the interconnection is electrically shielded to be electrically immune from another external interconnection unit and to prevent electrical influence on another external interconnection unit.
Preferably, a plurality of bump electrodes are arranged separated from each other and so as to be exposed from the surface of the entire semiconductor package.
Preferably, the plurality of bump electrodes include a bump electrode which is not electrically connected to a pad.
By virtue of a plurality of bump electrodes formed all over the surface of the semiconductor package, heat radiation of the semiconductor package can be improved. Therefore, the heat resistance can be lowered.
Preferably, a plurality of bump electrodes are also arranged on the back side of the semiconductor package, spaced apart from each other.
By forming bump electrodes also on the back surface, heat radiation of the package can further be improved to reduce heat resistance.
Preferably, a comparator that selects a predetermined number of memory elements from a memory mat to determine match/mismatch of logic of the predetermined number of memory elements, and providing the determination result is connected to only one of the plurality of memory mats.
Since the transmission distance of a signal applied to each of the plurality of memory mats from a bump electrode is substantially equal, the access time towards these mats is also substantially identical. By providing a comparator in only one memory mat and measuring the access time of that memory mat, measurement of the access time period for other memory mats can be omitted. In other words, the so-called I/O false degeneration test is allowed.
A semiconductor package according to still another aspect of the present invention includes a semiconductor chip having an integrated semiconductor device. The integrated semiconductor device includes a plurality of memory mats, and a master peripheral circuit that divides the plurality of memory mats and controls a memory mat independently. A memory mat includes a plurality of memory elements. A circuit for determining and storing a defective address of a memory element from the pass/fail state of test data obtained from each of the plurality of memory mats in a test mode is also provided. A signal of a defective address is sequentially output from this circuit.
By virtue of this circuit for determining and storing a defective address of a memory element, a defective address can be output in a packet.
A semiconductor package according to yet a further aspect of the present invention includes a plurality of external interconnection units formed of a bump electrode on a main surface of a semiconductor chip with an integrated semiconductor device for connection with the outside world, a pad formed on the semiconductor chip for connection with the integrated semiconductor device, and a connection interconnection formed on the main surface of the semiconductor chip by photolithography for electrically connecting a pad and a bump electrode. A power supply interconnection is provided on the main surface of the semiconductor chip so as to surround a connection interconnection to which a predetermined potential is applied. This power supply interconnection is provided so that current is not conducted.
By virtue of this arrangement, this connection interconnection is electrically shielded and is electrically immune to another external interconnection unit and prevents electrical influence to another external interconnection unit.
A semiconductor package according to yet a still further aspect of the present invention includes a pad on a main surface of a semiconductor chip with an integrated semiconductor device. The integrated semiconductor device includes a plurality of memory mats, and a master peripheral circuit dividing the plurality of memory mats and controlling a memory mat independently. A memory mat includes a plurality of memory elements. Each of the plurality of memory mats is arranged so that the transmission distance of a signal applied to each of the plurality of memory mats from a pad is substantially equal. A comparator selecting a predetermined number of memory elements from a memory mat for determining match/mismatch of logic of the predetermined number of memory element and providing the determination result is connected to only one of the plurality of memory mats.
Since the transmission distance of the signal applied to each of the plurality of memory mats from a bump electrode is substantially equal in the semiconductor package, the access time towards these mats is also identical. Therefore, by providing a comparator to one memory mat and measuring the access time of that memory mat, measurement of the access time of the other memory mats can be omitted. In other words, the so-called I/O false degeneracy testing is allowed.
In a semiconductor package according to another aspect of the present invention including a plurality of external interconnection units formed of a bump electrode provided on a main surface of a semiconductor chip including an integrated semiconductor device for connection with an external terminal, a pad formed at the semiconductor chip for connection with the integrated semiconductor device, and a connection interconnection for electrically connecting the pad and the bump electrode, the integrated semiconductor device includes a plurality of memory mats, and a master peripheral circuit for dividing the plurality of memory mats and controlling each memory mat independently. This memory mat includes a plurality of memory arrays, and a local peripheral circuit for dividing the plurality of memory arrays and controlling each memory array independently.
In a semiconductor package according to another aspect of the present invention, a bump electrode is provided for connection with an external terminal such as of a CSP structure and a BGA structure. The bump electrode can be arranged all over the surface of the semiconductor chip. This prevents increase of the size of the semiconductor package such as a QFP and prevents generation of a great capacitance between leads even in the case where hierarchical and highly integrated memories are mounted on a semiconductor package.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.

Semiconductor chip scale package and ball grid array structures


This invention provides a method for on-site production of a protective gas mixture for arc joining, in particular for arc welding. Gaseous argon is removed from a liquid argon supply and helium is added to the argon, and a doping gas premix which is prepared separately on-site is added. Various combinations of argon, helium and the doping gas premix are supplied via a protective gas supply device which supplies multiple workplaces with different gas mixtures without the need for specialty gas mixing equipment.

This invention relates to a method for on-site preparation of a protective gas mixture containing argon, helium and a doping gas for arc joining, in particular for arc welding, in which the argon is prepared by evaporation from the liquid phase. This invention also relates to a doping gas premix for on-site preparation of a protective gas mixture containing argon, helium and a doping gas for arc joining, in particular for arc welding. In addition, this invention relates to a protective gas supply device for on-site supply of workplaces comprising a liquid argon reservoir, a helium reservoir and a supply of doping gas premix, where the liquid argon reservoir is connected to at least one workplace via lines.
Arc joining includes arc welding, which has been in use for a long time, as well as arc soldering under a protective gas, the latter having recently become more important. In addition, arc joining also includes joining of different types of materials in which one material is melted while the other is only heated.
In arc welding under a protective gas, inert gases are the predominant component in the protective gas. Argon is the inert gas most commonly used in gas-shielded welding. By adding helium to argon, the heat balance of the protective gas in the arc and in the melt is improved so that a deeper fusion zone, better degassing and better wetting are achieved, depending on the material. Higher welding speeds are therefore obtained with helium. Addition of hydrogen when welding nickel-based materials (also Cr—Ni steel) often improves welding results. Addition of nitrogen or a nitrogen-hydrogen mixture to argon or argon-helium mixtures gives the desired improvement in various cases. Addition of nitrogen is thus often advantageous in the case of an austenitic material structure, but when welding or soldering materials with inert reducing gas mixtures or inert and slow-reacting gas mixtures, there are often disturbances in the process despite the choice of the gas mixture directed at the welding task. To eliminate these problems, small amounts of active gases are added to the inert reducing or inert and slow-reacting gas mixtures, thereby doping the gas mixtures. The doping is in the range of one percent, the so-called vpm range. For example, doping of inert gases with CO2, O2, NO or N2 is well known when welding aluminum materials. Doping the welding protective gas with CO2 or O2 for nickel-based materials is described in EP 544 187. Doping with CO2 or O2 is also known in arc soldering and is described in EP 1 101 559. EP 639 627 describes the use of a doped gas mixture containing hydrogen. WO 02/47859 describes doped gas mixtures containing nitrogen for arc welding. Adding a doping gas improves the arc stability and the seam has a high-quality appearance. However, unwanted oxidation of the workpiece is prevented.
In summary, it can be concluded that very good welding results can be obtained only when a protective gas mixture optimized for the given welding task is used. The composition of the protective gas mixture is based exactly on the material, the properties of the welding workpiece, the arc stability and the welding speed. There are therefore many different protective gas mixtures.
To also be able to use the optimum protective gas mixture, it must be available in a sufficiently large quantity for the welding device. Normally a protective gas mixture in a ready-made form is already mixed with several components by the gas supplier and supplied in gas cylinders to the gas consumer. The gas consumer can then used the ready-made gas mixture without any additional operations. The large quantities of gas that must be supplied to the gas consumer are a disadvantage here. This is to be performed in a complex manner in particular when gas consumption is high. Since the volume of argon is reduced several fold by liquefaction, large quantities of gas are normally supplied and stored in liquid form. The required quantity of gas is removed in the form of vaporized liquid. Large-scale consumers therefore usually have a supply of liquid argon. Ready-made gas mixtures are consequently complex to handle for the large-scale consumer, especially in comparison with liquid argon supply.
Another possibility for the gas consumer to obtain the desired protective gas mixture is to mix it himself on-site. One disadvantage of on-site mixing techniques is that preparation of multicomponent mixtures is very complex and difficult and therefore gas mixtures with definitive volume amounts are often produced, leading to defective welding results. For the case when the gas consumer requires gas mixtures with volume amounts of less than one percentage point, which includes doped protective gas mixtures, these mixtures cannot be prepared with conventional mixers because only mixtures with a volume amount of components of at least one percent can be produced with conventional mixers. Doped gas mixtures, however, can be produced only with precision mixers, which can be considered as special parts that are very expensive. In addition, precision mixers are highly susceptible to defects.
EP 0 020 174 describes a method for mixing gases having different thermal conductivities. With this method it is possible to prepare a doped protective gas mixture. The mixing technique described there makes it possible to accurately prepare even volume amounts of a few percentage points in a mixture.
EP 1 321 217 describes a method for preparing a doped protective gas mixture of liquid argon and a gas-free premix. The liquid argon is vaporized and the gaseous argon is mixed with the gas premix consisting of the doping gas which is present in the gas premix in a higher concentration than in the ready-made protective gas mixture accordingly, plus helium and/or argon.
However, the problem of producing large quantities of protective gas mixtures tailored to specific welding or soldering jobs has not yet been solved satisfactorily from a technical standpoint or even in practical implementation. In particular, there is no simple and uncomplicated method that will permit the use of argon as a liquid argon supply and will yield the special doped protective gas mixture.
Therefore, the object of this invention is to provide a method which will permit the production of the doped protective gas mixture on-site, also incorporating a liquid argon supply, and which will have a high flexibility, so that the composition of the protective gas mixture can be varied with no problem as the welding job changes and can be adapted to the given welding and joining task. Furthermore, the object of this invention is to provide a corresponding doping gas premix. In addition, this invention provides a protective gas supply device for on-site supply of workplaces in such a way as to solve the problems defined above while being characterized by a high flexibility in particular.
This object is achieved with this method by adding helium to the gaseous argon and also adding a doping gas premix which is supplied separately on-site. By supplying the components separately, it is possible to use individual components and intermediates in addition to the ready-made protective gas mixture. Selected workplaces may be supplied with gaseous argon directly from the liquid argon supply and another group of workplaces may be supplied with an argon-helium mixture obtained by mixing together helium and vaporized argon. Finally, a third group of workplaces is supplied with the ready-made protective gas mixture of vaporized argon, helium and doping gas premix. Furthermore, it is also possible to supply workplaces with a gas mixture of vaporized argon and the doping gas premix. This flexibility in on-site preparation of protective gas mixtures is offered only by the inventive method. It is thus possible to provide the optimized protective gas mixture for each workplace and for each welding job. Furthermore, argon which accounts for the largest amount in this inventive method is obtained from the liquid argon supply, so all advantages offered by a liquid argon supply can be utilized. Furthermore, with the on-hand liquid argon supply, only mixers are needed to obtain an optimum protective gas mixture for welding. A particular advantage that should be emphasized is that conventional two-component or three-component mixers are sufficient to prepare the protective mixture although the protective gas mixture also contains doping in the vpm range. Doped protective gas mixtures are normally critical to produce due to the small quantity of doping gas added. Since the doping gas is part of a doping gas premix, the mixing ratios that must be set with the inventive method are in the percentage range and consequently can be established with conventional mixers in a completely unproblematical manner.
The helium and the doping gas premix are advantageously added separately from one another. With this procedure, a very high flexibility is obtained with very little complexity. If the vaporized argon is first combined with the helium (and this variant is regarded as preferred) and then the argon-helium mixture is combined with the doping gas premix, then pure argon, the argon-helium mixture and the doped protective gas mixture are available as the protective gas. If the argon is first combined with the doping gas premix and then this mixture is combined with helium, then argon, doped argon and the doped argon-helium mixture are available as the protective gas. In another variant of the embodiment, the mixing of argon, helium and the doping gas premix is performed in a three-component mixer. It is also possible to add helium or the doping gas premix separately each at selected workplaces and in this way to adjust different helium amounts or different concentrations of doping gas. The amount of helium in the ready-made gas mixture is advantageously 5 to 70 vol %, preferably 10 to 50 vol % and especially preferably 15 to 30 vol %. With all variants, a doped protective gas mixture is generated on-site in an uncomplicated manner and at the same time a very high flexibility is achieved with the inventive method, making it possible to provide the optimum protective gas composition for the particular welding job. A high flexibility is advantageous in particular in preparing protective gas for different workplaces with different welding jobs. In a factory, it is often necessary to supply workplaces which are equipped with different welding equipment and at which different welding jobs are being performed. Doped protective gas mixtures in particular are advantageous at workplaces where robots perform the welding work, whereas argon is often preferred as the protective gas at workplaces where welding is performed manually. In addition to this criterion, the material and the properties of the workpiece also influence the choice of protective gas.
In another advantageous embodiment, the helium and the doping gas premix are added using a three-component mixer. The helium and the doping gas premix are also available separately on-site in this embodiment of the invention. To prepare the doped protective gas mixture, a single conventional mixer is sufficient. A precision mixer is not necessary for this. It is thus possible in a very simple way to supply workplaces with vaporized argon and other places with the doped protective gas mixture.
It is especially advantageous to add the doping gas plus at least one other component to the protective gas mixture with the doping gas premix. The inventive method thus yields in a very simple way a multicomponent doped protective gas mixture, with a very high flexibility in the volume amounts. The ready-made protective gas mixture contains the other component in a volume amount of 1 to 8 vol %, preferably 1.5 to 5 vol %, especially preferably from 1.8 to 3 vol %.
As the additional component, hydrogen and/or nitrogen is advantageously used. Thus the especially advantageous doped protective gas mixtures of helium, argon and hydrogen and/or nitrogen are prepared.
In an advantageous embodiment, a gas or a mixture of the gases NO, N2, O2 or CO2 is used as the doping gas. Especially good welding and soldering results are obtained with these doping gases.
A doping gas premix containing the doping gas in a concentration of 0.005 to 10 vol %, preferably 0.1 to 5 vol %, especially preferably 1 to 3 vol % is used to advantage. With these concentrations in the doping gas premix, ready-made protective gas mixtures with the desired doping gas concentrations are prepared. The concentrations of the doping gas in the ready-made protective gas mixture are in the range of 10 to 10,000 vpm, preferably in the range of 50 to 1000 vpm.
In an advantageous embodiment, the inventive method is used to prepare protective gas mixtures for high-alloy materials and nickel-based materials. In arc joining of these materials, doped multicomponent protective gas mixtures are especially advantageous. These protective gas mixtures are especially suitable for special steels and corrosion-resistant steel. It is therefore especially advantageous to use the inventive method when processing such materials.
Advantageously, at least one workplace is supplied exclusively with vaporized argon and at least one workplace is supplied with the protective gas mixture by the method according to this invention. Thus the advantages with regard to the flexibility of the inventive method are utilized.
In addition, advantageously at least one workplace is supplied with an argon-helium mixture. Use of the argon-helium mixture is an important advantage which is obtained by preparing the protective gas according to this invention.
This object is achieved with regard to the doping gas premix by the fact that the doping gas premix contains the doping gas in a concentration of 0.005 to 10 vol % and also contains hydrogen and/or nitrogen as the additional component. With this doping gas premix, a particularly advantageous protective gas mixture is obtained by using the preparation method according to this invention.
It is especially advantageous for the doping gas to be a gas or a mixture of the gases NO, N2, O2 or CO2. These doping gases ensure that not only the welds and the soldered connections will have an optimum appearance and unacceptable oxidation will be prevented but also there is an improvement in the stability of the arc.
The concentration of the doping gas is advantageously 0.1 to 5 vol %, preferably 1 to 3 vol %.
For the protective gas supply device, the object is achieved by the fact that the liquid argon reservoir is connected to at least one additional workplace via supply lines including at least one mixer whereby the mixer(s) is/are connected to the liquid argon reservoir, the helium supply and the doping gas premix supply. The inventive protective gas supply device manifests its aforementioned advantages in workplaces with different welding jobs. Reservoirs and supply tanks are advantageously designed as follows: one tank with liquid argon, one or two bundles with helium and one or two gas cylinders with doping gas premix. Having duplicate bundles and cylinders on hand permits a continuous supply of gas to the workplaces even while the supply containers are being replaced.
In an advantageous embodiment, the supply lines containing the mixer are equipped with a three-component mixer. In this embodiment, it is very easily possible to supply some workplaces with vaporized argon and other workplaces with the doped protective gas mixture.
In another advantageous embodiment, the supply lines containing the mixer are equipped with two mixers, whereby the feed side of the first mixer is connected to the liquid argon reservoir and to the helium supply and the discharge side of the first mixer is connected to at least one other workplace and the feed side of the second mixer is connected to the discharge side of the first mixer and to the doping gas premix supply, and the discharge side of the second mixer is connected to at least one additional workplace by lines. The high flexibility of the inventive protective gas supply device is manifested here. Some workplaces are connected to the liquid argon reservoir and other workplaces receive an argon-helium mixture while a third group of workplaces receive a doped protective gas mixture.
Other objects, advantages and novel features of the present invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings.

Preparing a protective gas mixture for arc joining


A sliding bearing for a steering column includes: a cylindrical bearing body; flat surfaces formed integrally on an inner peripheral surface of the bearing body; first slits extending from one end face of the bearing body to this side of the other end face of the bearing body; second slits extending from this side of the other end face of the bearing body to the one end face of the bearing body; grooves formed in an outer peripheral surface of the bearing body; and elastic rings which are respectively fitted in the grooves in such a manner as to project from the outer peripheral surface of the bearing body and to reduce the diameter of the bearing body.

1. Field of the Invention
The present invention relates to a sliding bearing interposed between, for example, a steering column tube and a steering column shaft to rotatably support the steering column shaft of an automobile, a sliding bearing interposed between a rack shaft and a tubular member so as to support the rack shaft linearly movably, and a bearing mechanism having such a bearing.
2. Description of the Related Art
As a bearing for a steering column for rotatably supporting a steering column shaft (hereafter referred to as the column shaft) of an automobile, a rolling bearing constituted by a ball bearing or a sliding bearing formed of a synthetic resin is used.
In general, conditions for rotation such as a load and a velocity are not so stringent for the bearing for rotatably supporting the column shaft. However, the vibration absorbing characteristic for absorbing vibrations applied to the column shaft and stability in frictional torque are required at the time of idling or the like.
The rolling bearing is stable in the frictional torque, but is inferior in the vibration absorbing characteristic. In addition, the dimensional accuracy of a steering column tube (hereafter referred to as the column tube) for fixing the rolling bearing and the column shaft supported by the rolling bearing need to be finished to high accuracy. Therefore, on top of the fact that the rolling bearing itself is expensive, there is a problem in that the fabrication cost becomes high.
The sliding bearing has advantages in that, as compared with the rolling bearing, the sliding bearing is low in cost and excels in the vibration absorbing characteristic. Nevertheless, there is a problem in that since an appropriate clearance (axial gap) is required between the sliding bearing and the column shaft, collision noise occurs between the column shaft and the bearing, and is transmitted to the driver of the automobile as unpleasant sound. If the clearance between the sliding bearing and the column shaft is made small to suppress the occurrence of this collision noise, the frictional torque increases, and the difference in frictional torque between at the time of rotation start and during rotation becomes large. At the same time, the small clearance constitutes a factor hampering the stability in frictional torque, such as the occurrence of variations in frictional torque during rotation due to a stick-slip phenomenon or the like caused by dimensional errors in the outside diameter of the column shaft.
In addition, although the column shaft is rotatably supported by the column tube by means of the bearing, the roundness of the inside diameter of the column tube is normally not very high. If the sliding bearing made of a synthetic resin is press fitted and fixed into such a column tube, the sliding bearing is strained by being affected by the roundness of the inside diameter of the column tube, producing a difference in the clearance with the column shaft. This also hampers the stability of the frictional torque. (Refer to JP-A-11-201154 and JP-UM-B-56-39747 as prior arts)
The above-described problems occur not only in the sliding bearing interposed between the column shaft and the column tube which rotatably supports this column shaft, but can similarly occur, for example, in a bearing interposed between a rack shaft and a tubular member (tube) which supports the rack shaft linearly movably.

Sliding bearing and bearing mechanism having the same


Since a spectroscopic module (1) has a plate-shaped body section (2), the spectroscopic module can be reduced in size by reducing the thickness of the body section (2). Moreover, since the body section (2) is plate-shaped, the spectroscopic module (1) can be manufactured, for example, by using a wafer process. More specifically, by providing lens sections (3), diffraction layers (4), reflection layers (6) and light detecting elements (7) in a matrix form on a glass wafer which becomes many body sections (2) and dicing the glass wafer, many spectroscopic modules (1) can be manufactured. This enables easy mass production of spectroscopic modules (1).

There is known such a conventional spectroscopy module that is provided with a block-shaped supporting body, which is a double convex lens, a spectroscopic portion such as a diffraction grating on one convex plane of the supporting body, and a light detecting element such as a photo diode on the other convex plane of the supporting body (refer to Patent Document 1, for example). In the above-described spectroscopy module, light made incident from the other convex plane is dispersed at the spectroscopic portion and the thus dispersed light is detected by the light detecting element.    Patent Document 1: Japanese Published Unexamined Patent Application No. H04-294223

This patent is subject to a terminal disclaimer.


According to the switching supply such as a DC/DC converter, since primary side coils provided in two transformers are mutually connected in series, voltage variation generated in parallel-connected secondary side coils can be suppressed, and the uniformity of secondary side parallel output can be enhanced even in case of voltage value fluctuations or the like caused by variation in the output of an inverter circuit.

1. Field of the Invention
The present invention relates to a switching supply such as a DC/DC converter or the like comprising a plurality of connected transformers.
2. Related Background Art
A conventional switching supply such as a DC/DC converter is disclosed in, for instance, Japanese Patent No. 2,629,999. The DC/DC converter disclosed in Japanese Patent No. 2,629,999 comprises two connected output transformers. In a first output transformer, two primary side coils are arranged along the same magnetic path and with the same polarity. One primary side coil in the first output transformer and one primary side coil in the second output transformer are switched by a first driving circuit, while another primary side coil in the first output transformer and another primary side coil in the second output transformer are switched by a second driving circuit, to stabilize thereby the DC/DC converter. Secondary side coils of the transformers are connected to a rectifier circuit that outputs a desired DC voltage.


A single wood concrete layer, sound absorption panel is formed as a single wood concrete layer, cast panel body of kaolin mineralized organic fiber chips encased in Portland cement with steel reinforcement. The panels have a noise reduction coefficient of at least about 0.85 for a panel thickness of about 10 cm and a panel density of 86.5 kg/m.sup.2.

1. Field of the Invention
The present invention is directed to a single layer sound absorption panel of the type which can be used in a sound barrier wall adjacent a highway or other noise source.
2. Background of the Related Art
U.S. Pat. No. 4,325,457 discloses an acoustical barrier formed of two concrete layers joined as a laminate. According to this U.S. Patent, a single concrete layer panel provides inferior results as compared to a two layer panel, and so it provides a first concrete layer comprising mineralized fibrous material blended with cement, and a second concrete layer comprising a fine aggregate concrete. The resulting panel has a thickness of 10 cm and a density of approximately 20 lbs/ft.sup.2, and provides a noise reduction coefficient of about 0.72.
Applicants have previously invented a free aggregate of wood pinchips, and a process for forming the free aggregate, as disclosed in their U.S. Pat. No. 5,019,170, which is hereby incorporated by reference into the present application. The disclosed process, known as the K-X treatment, mineralizes organic fibrous materials by encasing the individual chips in a kaolin mineralizing coating to a degree sufficient to seal in water soluble organic matter held in pores of the chips to prevent the leaching thereof, while maintaining the individual chips in a free aggregate form. The resulting free aggregate can then be mixed with Portland cement to form lightweight "wood concrete".

Method of making single wood concrete layer sound absorption panel


A solution for composing a multi-angle video from videos captured from different angles is disclosed. A request to compose a multi-angle video is received from a target user, requesting composing a multi-angle video using a video captured by the target user and videos captured by other users nearby the target user. A plurality of videos captured by nearby users are identified based on metadata associated with the captured videos, e.g., geolocation and timestamps of the videos, and presented to the target user. A video sequence including two or more videos from the plurality of videos captured by nearby users is received and the multi-angle video is composed based on the received video sequence.

This invention relates generally to video sharing and particularly to multi angle video editing using cloud video sharing.
With the advancement of mobile computing devices such as smart phones and tablets, more and more people are capable of recording videos of various types of events. For instance, people attending a sports event may use their mobile computing devices to record short footages of the sports event. The users may edit their own videos with mobile applications. For example, multiple people may have recorded a particular moment of the event from different angles and a user may like to use two or more of those videos to generate a single video that transitions from one angle recorded by a camera of a first mobile device to a second angle recorded by a camera of a second mobile device. However, editing and generating a multi-angle video from videos captured from different angles by individual users using their mobile devices is technically challenging and expensive.
In addition, a user may want to perform the video editing using the mobile computing device used to record one of the footages of the event. Mobile computing devices have limited computing capabilities, which renders multi-angle video editing more challenging. Current solutions for multi-angle video editing, e.g., manual selecting and marking different portions of videos captured from different angles, may not be suitable for such mobile computing devices without degrading user experience.

Multi-angle video editing based on cloud video sharing


A carton tray has an improved corner construction including long and short overlapped connector tabs wherein the long connector tab is secured by adhesive both to the adjacent short connector tab and to the end panel to which the short connector tab is foldably connected. The result is a strong corner post of at least three-ply thickness and one which can be easily assembled on a standard hot melt forming machine with application of adhesive to only one side of the blank from which the carton tray is constructed. The invention is further directed to the method of forming the improved carton tray with the corner post construction described above.

1. Technical Field
The present invention is directed generally to a carton tray with a new corner post construction and the method of forming the tray. Specifically, the invention is directed to an improved carton formed from blanks which may be shipped flat on pallets to a customer location where the cartons may be assembled on a customer's forming machine into strong, attractive cartons without exposed raw edges on the exterior corners.
2. Description of the Prior Art
Oftentimes, tray forming of folding cartons can be objectionable to users requiring a high degree of structural aesthetics and vertical stacking strength. Common glue-forming of trays employs four Britewood style corner posts bonded inside to either the side panels or end panels. When this type of carton is viewed at eye level, the resulting outside corner always shows a die-cut raw edge.
One way around this is full gusset style forming. A gusset no longer exhibits this raw edge but requires that the paper board be coated on both sides with a heat sealing medium or requires that the glue forming be fairly complicated and expensive. In both cases, the gusset must be bonded to itself and then bonded inside the carton body.
Gusset or bellows corners have been designed in the past so the bonding medium on only one side of the substrate can bond the gusset only to the side panel of the carton. This is difficult and doesn't allow for bonding the gusset to itself. The gusset bonding to the side panel is marginal at best.
Bellows have been designed in the past to provide a carton corner construction but through bonding to a flange and usually to the outside of the carton only. A secondary risky and difficult design is where one side of the gusset is cut down slightly.
Setup cartons have been prepared in the past which are strong and present no die-cut raw edges but these are extremely expensive because they are overwrapped with a printed glued-on paper and are shipped fully assembled and empty. Simplex trays have been designed which may be shipped flat and manually or machine assembled by folding a double thickness end panel over fully gusseted folding corners with locking tabs to hold the assembled corners together but gaps are often formed in the assembled corner and much paperboard is required or wasted for the double side panels and end panels required for a simplex tray.
Accordingly, there is a need for an improved carton construction and method of forming same which enables carton blanks to be shipped flat for simple assembly on a customer's forming machine with adhesive applied to only one side of the carton blank and with multi-ply strong corners which exhibit no die-cut raw edges.
Accordingly, a primary object of the invention is to provide an improved carton tray and method for forming same which enables formation on simple machinery yet which provides an aesthetically pleasing and strong corner construction.
Another object is to provide such a carton tray and method which makes efficient use of the paper board stock from which it is formed.
Another object is to provide such a carton tray and method of forming same which provides such an inherently strong corner construction that the caliper of the paperboard blank may be dropped without sacrificing stacking strength compared to higher caliper trays of known construction.
Another object is to provide such a carton tray and method of forming same which enable blanks to be shipped flat on pallets to a customer location where the cartons can be fully assembled on the customer's forming machine with application of adhesive to only one side of the cartons.
A related object is to provide such a carton tray and method of forming same which enables assembly on standard hot melt glue forming machines.
Finally, an object of the invention is to provide an improved carton tray which is simple and rugged in construction, economical to manufacture and efficient in operation.


An electric motor control apparatus includes an electrical current control apparatus which is operable to limit current to an electric motor. When the electric motor is a three-phase motor, three current limiting switch assemblies are provided in the electric current control apparatus. A single stack of laminations concentrates magnetic fields emanating from conductors in all three current limiting switch assemblies. Each of the current limiting switch assemblies includes two movable contacts which are mounted on contact arms. The contact arms are movable in slots in the stack of laminations. A first series of splitter plates is disposed in an array along a path of movement of the contact on the first movable contact arm and a second series of splitter plates is disposed along a path of movement of the contact on the second contact arm for each of the current limiting switch assemblies. A short circuit splitter plate conducts electrical current between the two series of splitter plates. A bypass splitter plate is connected in a bypass circuit which conducts excessive current around a motor starter to protect the motor starter.

The present invention r elates to an electric control apparatus which may be utilized to limit current flow to an electrical device, such as an electric motor.
A known electrical control apparatus includes a pair of parallel stationary contact arms and a pair of movable contact arms. The movable contact arms are connected in series with each other. Electric current flows in opposite directions in the adjacent stationary contact arms and movable contact arms. Opposition between magnetic fields emanating from current conducted through the movable and stationary contact arms causes the movable contact arms to open an electrical circuit when there is an excessive flow of current through the circuit.
An electric control apparatus having this construction is disclosed in U.S. Pat. No. 5,073,764. Other known electric control apparatus is disclosed in U.S. Patents Nos. 3,815,059; 4,810,841; and 5,495,083.


A polyurethane or polyisocyanurate foam is prepared from a reaction mixture that includes comprising a polyol, an aromatic isocyanate compound, and a blowing agent. The polyol includes a poly(phenylene ether) having a number average molecular weight of 600 to 2000 atomic mass units and an average of 1.5 to 3 hydroxyl groups per molecule. The polyurethane or polyisocyanurate foam exhibits improved resistance to burning and/or reduced elapsed times to formation of tack-free foams relative to foams prepared without the poly(phenylene ether).

Polyurethanes are prepared from compounds with at least two hydroxyl groups and compounds with at least two isocyanate groups. See, e.g., D. Randall and S. Lee, "The Polyurethanes Book", New York: John Wiley & Sons, 2003; and K. Uhlig, "Discovering Polyurethanes", New York: Hanser Gardner, 1999. The isocyanate groups of the isocyanate compound react with the hydroxyl groups of the hydroxyl compound to form urethane linkages. In many cases, the hydroxyl compound is a low molecular weight polyether or polyester. The isocyanate compound can be aliphatic or aromatic, and in the preparation of linear polyurethanes is typically difunctional (i.e., it is a diisocyanate). However, isocyanate compounds with greater functionality are used in preparing thermoset polyurethanes. The family of polyurethane resins is very complex because of the enormous variation in the compositional features of the hydroxyl compounds and isocyanate compounds. This variety results in a large numbers of polymer structures and performance profiles. Indeed, polyurethanes can be rigid solids, soft and elastomeric, or a have a foam (cellular) structure.
Rigid polyurethane and polyisocyanurate foams are particularly effective thermal insulators. Most applications are as insulating materials in construction. However, the inherent ability of polyurethane and polyisocyanurate foams to burn creates a need for reduced flammability. See, e.g., S. V. Levchik, E. D. Weil, "Thermal decomposition, combustion and fire-retardancy of polyurethanes—a review of the recent literature", Polymer International, volume 53, pages 1585-1610 (2004). And the production of polyurethane and polyisocyanurate foams often requires substantial elapsed times from mixing of reactants to formation of a tack-free solid foam.
There is therefore a need for polyurethane and polyisocyanurate foams exhibiting improved resistance to burning and/or reduced elapsed times to formation of tack-free foams.


An x-ray source is described. During operation of the x-ray source, an electron source emits a beam of electrons. This beam of electrons is focused to a spot on a target by a magnetic focusing lens. In particular, the magnetic focusing lens includes an immersion lens in which a peak in a magnitude of an associated magnetic field occurs proximate to a plane of the target. Moreover, in response to receiving the beam of focused electrons, the target provides a transmission source of x-rays.

X-rays are widely used in micro-analysis and imaging because of their small wavelengths and their ability to penetrate objects. Imaging applications of x-ray sources include an x-ray imaging microscope and an x-ray point projection microscope. In an x-ray imaging microscope, a characteristic line of the x-ray source (i.e., monochromatic x-rays) is typically used with an x-ray lens (such as a Fresnel lens) to image an object. The resolution and aberrations associated with an x-ray imaging microscope are usually determined by the wavelength of the characteristic line.
In contrast, in an x-ray point projection microscope, a small x-ray source is used in conjunction with geometric magnification to image an object. Because an x-ray point projection microscope does not have aberrations, the resolution of an x-ray point projection microscope is typically determined by the size of the x-ray source. Ideally, the x-ray source would be a point source. In practice, the x-ray source is considerably larger. For example, if a tungsten wire is used to provide the x-rays, the x-ray-source size may be 50-200 μm; similarly, if a dispenser cathode (such as tungsten in a calcium-oxide mixture) is used to provide the x-rays, the x-ray-source size may be 1-5 mm. These x-ray-source sizes may limit the resolution of an x-ray point projection microscope.
Moreover, in these applications there is typically a tradeoff between the x-ray intensity and the operating life of the target or the x-ray intensity and the x-ray beam quality. In particular, as the electron-beam current (and, thus, the power consumption) in an x-ray source is increased, the cross-sectional diameter of the electron beam is also increased. This usually increases the cross-sectional diameter of the beam of x-rays output by the x-ray source. Furthermore, as the electron-beam current is increased, the operating life of the target is decreased because the degradation of the location on the target that is bombarded by the electrons is accelerated.
Therefore, there is a need for an x-ray source without the problems listed above.


A cell treatment composition based on a non-selective complete nutrient medium and also including a yeast derivative, one or more antioxidants, an oxygen tension reducing agent and one or more fatty acids between 10 and 25 carbon atoms in length having from 0 up to 4 double bonds. Nutrient medium additives for treatment of injured, damaged or stressed cells containing a yeast derivative, one or more antioxidants, an oxygen tension reducing agent and one or more fatty acids between 10 and 25 carbon atoms in length having from 0 up to 4 double bonds. Methods for treating prokaryotic and eukaryotic cells, including the steps of providing one or more injured, damaged or stressed cells and supplying the cells with an environment that includes a non-selective complete nutrient medium and also contains a yeast derivative, one or more intracellular antioxidants, oxygen tension reducing agent and one or more fatty acids between 10 and 25 carbon atoms in length having from 0 to 4 double bonds.

The present invention relates to compositions for the treatment of injured, damaged or stressed cells, and in particular to a composition for promoting the repair of both prokaryotic and eukaryotic cells. The present invention also relates to methods for treating cells with the compositions of the present invention.
Environmental stresses due to heat, freezing, low pH, irradiation, trauma and the like can damage cellular membrane integrity, resulting in cell populations that require more exacting growth requirements for repair and proliferation. One characteristic of injured cells is their inability to tolerate growth conditions in which normal cells would multiply. Providing injured cells with an environment that promotes the repair of cellular membrane damage restores the injured cells to a sound physiological condition that enables the cells to tolerate the growth conditions in which normal cells flourish.
In the case of food pathogens, microorganisms damaged by food processing techniques can escape detection in food samples contaminated therewith. Providing microorganisms with an environment that restores the injured cells to sound physiological condition prevents the injured cells from escaping detection.
One impediment to the proliferation of damaged or stressed cells recognized by the prior art is the susceptibility of such cells to the accumulation of relatively low levels of hydrogen peroxide in the cell cytoplasm. Brewer, Appl. Environ. Biol., 34(6), 797-800 (1977), Rayman, Can. J. Microbiol., 24(7), 883-5 (1978) and McDonald, Appl. Environ. Microbiol., 45(2). 360-5 (1983) disclose the beneficial effects to injured cells of supplementing growth media with compounds that degrade hydrogen peroxide or block its formation, including sodium pyruvate.
The importance of antioxidants such as pyruvate in media for treating injured cells is also disclosed by D'Aoust, Appl. Environ. Microbiol., 35(3), 483-6 (1978), Alico, Appl. Environ. Microbiol., 51(4), 699-702 (1986) and Mackey, J. Appl. Bacteriol., 53(2), 233-42 (1982).
Park, Can. J. Microbiol., 23(5), 559-62 (1977) and D'Aoust, Appl. Environ. Microbiol., 35(3), 483-6 (1978) disclose growth media beneficial to injured cells. Supplementation of growth media with yeast extract was disclosed to nurture injured cells by Russell, Appl. Microbiol., 16(2), 335-9 (1986). Murthy, J. Food Microbiol., 4(4), 341-6 (1986) discloses supplementation of growth media with unsaturated fat to resuscitate injured cells. The importance of anaerobic conditions to the resuscitation of injured aerobic bacteria is disclosed by Allen, J. Bacteriol., 20, 417-39 (1930).

Repair medium for the resuscitation of injured cells


A cooperative position location device (CPLD) that integrates a broadcast digital transmission (BDT) receiver, a data link transceiver, and a displacement sensor; a computer program product tangibly stored in computer-readable media; and associated methods for receiving and processing special codes embedded in BDT signals from a plurality of transmitters to produce time of arrival (TOA) measurements thereof; for sending and receiving special messages between cooperative position location devices (CPLDs) to produce time difference of arrival (TDOA) of common events of BDT at and time of flight (TOF) measurements between the CPLDs; and for integrating differential and relative ranges between CPLDs to a plurality of BDT transmitters and displacement measurements to yield a joint position solution of the CPLDs.

1. Field of the Invention
The present invention relates generally to radio geolocation and particularly to cooperative receivers for position location using periodic codes in such broadcast digital transmissions as broadcast digital television (DTV) and wireless local area network (WLAN) signals.
2. Description of the Prior Art
Among different radio geolocation and navigation systems, there are two important systems in wide use today. One is the 100 kHz Long Range Navigation-C (LORAN-C) system which evolved to the present form in the mid-1950s. It uses terrestrial radio transmitters to provide navigation, location, and timing services for suitably equipped air, land and marine users, civil and military alike. A LORAN-C receiver measures the difference in times of arrival of pulses transmitted by a chain of three to six synchronized transmitter stations separated by hundreds of kilometers. There are many LORAN chains of stations around the globe. Modernization effort is underway to enhance the accuracy, integrity, availability, and continuity of the LORAN system, known as Enhanced LORAN or eLORAN for short.
The other is the increasingly popular satellite-based Global Positioning System (GPS). Fully operational since 1994, the GPS relies upon a nominal constellation of twenty-four satellites in six different orbit plans around the Earth for position location, navigation, survey, and time transfer. Each satellite carries a set of ultra precise atomic clocks and transmits pseudo-noise (PN) code modulated signals at several frequencies. By tracking four or more satellites, a user can solve for the variables of longitude, latitude, altitude and time to precisely determine the user's location and calibrate its clock. More details are provided in the books entitled, Global Positioning System: Theory and Applications (Vols. I and II), edited by B. W. Parkinson and J. J. Spilker Jr., AIAA, 1996; Understanding GPS: Principles and Applications, edited by E. D. Kaplan, Artech House Publishers, 1996; Fundamentals of Global Positioning System Receivers—A Software Approach, by J. B. Y. Tsui, John Wiley & Sons, Inc., 2000; and Global Positioning System, Signals, Measurements, and Performance, by P. Misra and P. Enge, Ganga-Jamuna Press, 2001.
Despite of its increased popularity, GPS cannot function well when the line-of-sight (LOS) view between a receiver and a GPS satellite is obstructed due to foliage, mountains, buildings, or other structures. To satisfy the requirements of location-based mobile e-commerce and emergency call location (E911), there have been ongoing efforts so as to improve GPS receiver sensitivity to operate on GPS signals of very low power level. One example is the assisted GPS (AGPS). The AGPS approach relies upon a wireless data link to distribute, in real time, such information as time, frequency, navigation data bits, satellite ephemeredes, and approximate position as well as differential corrections to special GPS receivers equipped with a network modem so as to reduce the uncertainty search space, to help lock onto signals, and to assist navigation solution. This approach, however, comes with a price associated with installing and maintaining the wireless aiding infrastructure and services.
GPS cannot function well either when GPS signal is heavily jammed or overwhelmed by unintentional interference. GPS signals may be turned off altogether from newer GPS satellites with flexible power and flexible signal capabilities when it orbits over certain region. In such circumstances, no GPS solution is available.
Amid the process of replacement of National Television System Committee (NTSC) analog television signals by an Advanced Television Systems Committee (ATSC) digital television (DTV) signal, there has been a considerable amount of efforts devoted to the use of DTV signals for position location, thus serving as a complement to and/or a substitute for GPS. This is exemplified by the U.S. Pat. No. 6,861,984, entitled, Position Location Using Broadcast Digital Television Signals, by M. Rabinowitz and J. J. Spilker Jr., issued Mar. 1, 2005.
Designed primarily for indoor reception, DTV signals exhibit several advantages. It is much higher in power (40 dB over GPS) and at lower and more diverse frequencies (nearly half of the spectrum between 30 MHz and 1 GHz). The geometry offered by a network of terrestrial DTV transmitters is superior to what a satellite constellation can provide. As such, it has better propagation characteristics with greater diffraction, larger horizon, and stronger penetration through buildings and automobiles. DTV signals have a bandwidth of 6 to 8 MHz, which is much wider than the primary lobe of GPS C/A-code (2 MHz), thereby minimizing the effects of multipath and permitting higher accuracy tracking.
With DTV transmitters fixed on the ground, their lines of sight to a user changes very slowly, only adding a small amount of Doppler shift to a DTV signal frequency. This allows the signal to be integrated over a long period of time, thus easing the task of acquisition and tracking of a weak signal considerably. As a further benefit, the component of a DTV signal that can be used for timing is of low duty factor (e.g., 1 of 313) in contract to GPS wherein the ranging code is repeatedly transmitted and has to be tracked continuously.
However, one inherent technical difficulty faced by position location using broadcast digital transmissions (BDT) such as DTV signals is the clock bias and drift of the signal timing source at a transmitter, which are unknown to a user. Although it may be possible to have all DTV stations use ultra-precise atomic clocks or GPS-disciplined clocks, the synchronization of all signal transmissions across a large region is a daily operational challenge. It may also be possible to time-tag all transmissions and embed the clock offset information in the broadcast signals for all stations in a given region. However, these approaches require coordinated involvement of local DTV operators who are in broadcasting and not time transfer business.
Many inventions exemplified by the U.S. Pat. No. 6,861,984 by M. Rabinowitz and J. J. Spilker Jr. mentioned earlier make use of base stations, location servers, and monitor units to calibrate the DTV transmitter timing biases and to provide the calibration data to mobile users via dedicated data links. The position location mechanism in such inventions is referred to as "reference-aiding," wherein the signal source timing errors are estimated explicitly at the reference station and sent to users (a parametric approach) or the measurement difference is employed to remove the timing errors common to the reference station and users (a non-parametric approach). There is a significant cost associated with installing and maintaining the infrastructure of base stations, location servers, and monitor units on a large scale. A user has to subscribe to a service coverage in addition to special equipment for the service signals.
Clearly, a user is subject to the potential risk of service discontinuity when moving from one region (or a country for the matter) to another without a global service network in place or a valid global subscription. These prior-art approaches further prevent broadcast digital transmission (BDT) signals from being used for military applications as signals of opportunity (SOOP) because of lack of pre-surveyed reference/monitor units. In the U.S. Pat. No. 7,388,541, entitled "Self-Calibrating Position Location Using Periodic Codes in Broadcast Digital Transmissions," issued Jun. 17, 2008 to the present inventor, two position location mechanisms, referred to as "self-referencing" and "self-calibrating," respectively, are disclosed by which position location systems can make use of broadcast digital transmissions such as DTV and WLAN signals without requiring the service from external base stations, location servers, and monitor units. However, these self-aiding methods, in contrast to the above-mentioned reference-aiding methods, are useful for one user at a time and may require long time to complete the self-referencing and/or self-calibrating process.
Applications arise wherein a team of cooperative mobile users need to know not only their own location but also those of their teammates without relying upon GPS signals. By cooperative, we mean the teammates have a means to communicate to one another via a wireless data link to coordinate their activities, exchange data, and perform mutual aiding in the form of cooperative referencing and calibration. This need is met by the present invention as described and claimed below.

Cooperative position location via wireless data link using broadcast digital transmissions


A printed circuit board 2 and an FPC board 3 to be connected together are each given a multilayer structure wherein insulating films 23, 33 and interconnection patterns 22, 32 are stacked alternately. In the FPC board 3, connecting signal lines are distributed among the multilayered interconnection patterns 22, and in the printed circuit board 2, interconnecting to lands 32a formed on a connection face thereof is carried out using interconnection patterns 32 of inner layers. By this means, it is possible to greatly increase the number of connecting signal lines between the printed circuit board 2 and the FPC board 3.

In related art, as a connection structure for connecting a flexible printed circuit board (FPC board) made of a thermoplastic resin to a mother board, for example the connection structure disclosed in JP-A-2001-111209 is known. This connection structure is obtained in the following way.
That is, as shown in FIG. 11, respective connection terminal parts (lands) 113a, 111a of interconnection patterns 113 formed on an FPC board 105 and interconnection patterns 111 formed on a mother board 102 are brought together with solder paste 120a, 120b therebetween. Then, by means of a thermocompression tool 121, connecting areas of the boards 102, 105 are heated to above the glass transition point of the thermoplastic resin constituting the insulating layer 112 of the FPC board 105, and also a pressure is applied to them. As a result, the FPC board 105 and the mother board 102 are connected by the respective interconnection patterns 111, 113 being electrically connected by the solder and the thermoplastic resin constituting the insulating layer 112 of the FPC board 105 softening and becoming intimate with the insulating layer 110 of the mother board 102.
In the connection structure described above, the number of signal lines connected between the two boards is limited by the width of the FPC board 105 and the spacing of the interconnection patterns 113 including the lands 113a. Because of this, to increase the number of connecting signal lines it is necessary either to increase the width of the FPC board 105 or to make the spacing of the interconnection patterns 113 including the lands 113a as narrow as possible.
However, because of a requirement for small size and light weight, it is not possible to freely increase the width of the FPC board 105. And also with regard to narrowing the spacing of the interconnection patterns 113 including the lands 113a, because of problems such as migration and short-circuiting, and problems of etching precision at the time of formation of the interconnection patterns 113, it is not possible to greatly increase the number of connecting signal lines.
The present invention was made in view of these problems with related art, and an object of the invention is to provide a circuit board and a circuit board connection structure with which it is possible to greatly increase the number of connecting signal lines without increasing the width of the board parts being connected.

Circuit board and circuit board connection structure


A reconfigurable workbench pipeline for robotic process automation (RPA) workflows is disclosed. Different workbench pipelines may be built for different users. For instance, a global workflow (e.g., a receipt extractor) may be built and used initially, but this workflow may not work optimally or at all for a certain user or a certain task. A machine learning (ML) model may be employed, potentially with a human-in-the-loop, to specialize the global workflow for a given task.

Current RPA workflows are deterministic in nature and include a static pipeline of activities. In other words, a single logical flow is created and applied by the robot(s) in executing the workflow. The "pipeline" refers to a series of steps that extract data and/or certain actions that are taken based on the extracted data. However, such a static pipeline may not be optimal for all situations, and particularly those that change over time or are targeted for a specific user. Accordingly, an improved solution may be beneficial.

Inserting and/or replacing machine learning models in a pipeline for robotic process automation workflows


The invention provides a peptide having at least 3 amino acids comprising an amino acid sequence selected from

The present invention relates to peptides for use in an improved method of transfecting cells.
The term "transfection" is used herein to denote the introduction of a nucleic acid into a cell. The nucleic acid may be of any origin, and the recipient cell may be prokaryotic or eukaryotic.
Gene therapy and gene vaccination are techniques that offer interesting possibilities for the treatment and/or prophylaxis of a variety of conditions, as does anti-sense therapy. Such techniques require the introduction of a DNA of interest into target cells. The ability to transfer sufficient DNA to specific target cells remains one of the main limitations to the development of gene therapy, anti-sense therapy and gene vaccination. Both viral and non-viral DNA delivery systems have been proposed. In some cases RNA is used instead of DNA.
Receptor-mediated gene delivery is a non-viral method of gene transfer that exploits the physiological cellular process, receptor-mediated endocytosis to internalise DNA. Examples include vectors targeted against insulin receptors, see for example, Rosenkranz et al Experimental Cell Research 199, 323-329 (1992), asialoglycoprotein receptors, see for example, Wu & Wu, Journal of Biological Chemistry 262, 4429-4432 (1987), Chowdhury et al Journal of Biological Chemistry 268, 11265-11271 (1993), and transferrin receptors, see for example, Ciriel et al, Proc. Natl. Acad. Sci. USA 88, 8850-8854 (1991). Further examples of vectors include monoclonal antibodies targeting receptors on neuroblastoma cells (Yano et al, 2000), folate conjugated to liposomes (Reddy & Low 2000, Reddy et al. 1999), galactose for targeting liver cells (Han et al. 1999 Bettinger et al. 1999) and asialogylcoprotein, also for liver cells (Wu et al. 1991).
Receptor-mediated non-viral vectors have several advantages over viral vectors. In particular, they lack pathogenicity; they allow targeted gene delivery to specific cell types and they are not restricted in the size of nucleic acid molecules that can be packaged. Gene expression is achieved only if the nucleic acid component of the complex is released intact from the endosome to the cytoplasm and then crosses the nuclear membrane to access the nuclear transcription machinery. However, transfection efficiency is generally poor relative to viral vectors owing to endosomal degradation of the nucleic acid component, failure of the nucleic acid to enter the nucleus and the exclusion of aggregates larger than about 150 nm from clathrin coated vesicles.
Desirable properties of targeting ligands for vectors are that they should bind to cell-surface receptors with high affinity and specificity and mediate efficient vector internalisation. Short peptides have particular advantages as targeting ligands since they are straightforward to synthesise in high purity and, importantly for in vivo use, they have low immunogenic potential.
WO 98/54347 discloses a mixture comprising an integrin-binding component, a polycationic nucleic acid-binding component, and a lipid component, and also discloses a complex comprising    (i) a nucleic acid, especially a nucleic acid encoding a sequence of interest,    (ii) an integrin-binding component,    (iii) a polycationic nucleic acid-binding component, and    (iv) a lipid component.
The complex is primarily an integrin-mediated transfection vector.
Integrins are a super-family of heterodimeric membrane proteins consisting of several different α and β subunits. They are important for attachment of cells to the extracellular matrix, cell-cell interactions and signal transduction. Integrin-mediated internalisation proceeds by a phagocytic-like process allowing the internalisation of bacterial cells one to two micrometers in diameter (Isberg, 1991). Targeting of non-viral vectors to integrins, therefore, has the potential to transfect cells in a process that mimics infection of cells by pathogens and avoids the size limitation imposed by clathrin-coated vesicles in receptor-mediated endocytosis.
It is considered that the components described in WO 98/54347 associate electrostatically to form the vector complex, the vector being of the lipopolyplex type. The vector complexes of WO 98/54347 are found to transfect a range of cell lines and primary cell cultures with high efficiency, with integrin specificity and with low toxicity. For example, vascular smooth muscle cells are transfected with 50% efficiency, endothelial cells with 30% efficiency and haematopoietic cells with 10% efficiency. Furthermore, in vivo transfection of bronchial epithelium of rat lung and pig lung with an efficiency comparable with that of an adenoviral vector has been demonstrated.
Vectors that utilise integrin receptors to mediate gene transfer have the advantage that they target a large number of different types of cells in the body as integrin receptors are relatively widespread. In some circumstances, for example, in in vivo treatment, however, it may be preferable to target recipient cells more specifically.

Abstract: a) X1SM[SEQ.ID.NO.: 1] b) LX2HK[SEQ.ID.NO.: 2] c) PSGX3ARA[SEQ.ID.NO.: 9] d) SX4RSMNF[SEQ.ID.NO.: 16] e) LX5HKSMP[SEQ.ID.NO.: 18]in which X1 is a basic amino acid residue, X2 is Q or P, X3 is A or T, X4 is an acidic amino acid residue and X5 is P or Q.

Abstract: The invention further provides non-viral cell-targeting vector complexes and methods associated therewith.


The present invention provides an improved voltage variable material (“VVM”). More specifically, the present invention provides an improved printed circuit board substrate, an improved device having circuit protection an improved data communications cable having circuit protection and a method for mass producing devices employing the VVM substrate of the present invention. The VVM substrate eliminates the need for an intermediate daughter or carrier board by impregnating conductive particles and possibly semiconductive and/or insulative particles associated with known volatage variable materials into the varnish or epoxy resin associated with known printed circuit board substrates.

The present invention relates to circuit protection. More particularly, the present invention relates to an improved voltage variable material ("VVM").
Electrical overstress transients ("EOS transients") produce high electric fields and high peak powers that can render circuits or the highly sensitive electrical components in the circuits, temporarily or permanently non-functional. EOS transients can include transient voltages or current conditions capable of interrupting circuit operation or destroying the circuit outright. EOS transients may arise, for example, from an electromagnetic pulse, an electrostatic discharge, lightning, a build-up of static electricity or be induced by the operation of other electronic or electrical components. An EOS transient can rise to its maximum amplitude in subnanosecond to microsecond times and have repeating amplitude peaks.
The peak amplitude of the electrostatic discharge transient wave ("ESD event") may exceed 25,000 volts with currents of more than 100 amperes. There exist several standards which define the waveform of the EOS transient. These include IEC 61000-4-2, ANSI guidelines on ESD (ANSI C63.16), DO-160, and FAA-20-136. There also exist military standards, such as MIL STD 883 part 3015.
Voltage variable materials ("VVM's") exist for the protection against EOS transients, which are designed to rapidly respond (i.e., ideally before the transient wave reaches its peak) to reduce the transmitted voltage to a much lower value and clamp the voltage at the lower value for the duration of the EOS transient. VVM's are characterized by high electrical resistance values at low or normal operating voltages. In response to an EOS transient, the materials switch essentially instantaneously to a low electrical resistance state. When the ESD event has been mitigated these materials return to their high resistance state. These materials are capable of repeated switching between the high and low resistance states, allowing circuit protection against multiple ESD events.
VVM's also recover essentially instantaneously to their original high resistance value upon termination of the ESD event. For purposes of this application, the high resistance state will be referred to as the "off-state" and the low resistance state will be referred to as the "on-state." EOS materials can withstand thousands of ESD events and recover to desired off-status after providing protection from each of the individual ESD events.
Circuit components utilizing EOS materials can shunt a portion of the excessive voltage or current due to the EOS transient to ground, protecting the electrical circuit and its components. The major portion of the threat transient, however, is reflected back towards the source of the threat. The reflected wave is either attenuated by the source, radiated away, or re-directed back to the surge protection device which responds with each return pulse until the threat energy is reduced to safe levels.
One VVM for providing protection against electrical overstress is disclosed in U.S. Pat. No. 6,251,513 B1, entitled, Polymer Composites for Overvoltage Protection, assigned to the assignee of this invention, the teachings of which are incorporated herein by reference. Other voltage variable materials, the teachings of which are incorporated herein by reference, include the following.
U.S. Pat. No. 2,273,704, issued to Grisdale, discloses granular composites which exhibit non-linear current/voltage relationships. These mixtures are comprised of conductive and semiconductive granules that are coated with a thin insulative layer and are compressed and bonded together to provide a coherent body.
U.S. Pat. No. 2,796,505, issued to Bocciarelli, discloses a non-linear voltage regulating element. The element is comprised of conductor particles having insulative oxide surface coatings that are bound in a matrix. The particles are irregular in shape and make point contact with one another.
U.S. Pat. No. 4,726,991 issued to Hyatt et al., discloses an EOS protection material comprised of a mixture of conductive and semiconductive particles, all of whose surfaces are coated with an insulative oxide film. These particles are bound together in an insulative binder. The coated particles are preferably in point contact with each other and conduct preferentially in a quantum mechanical tunneling mode.
U.S. Pat. No. 5,476,714, issued to Hyatt, discloses EOS composite materials comprised of mixtures of conductive and semiconductive particles sized to be in a 10 to 100 micron range. The materials also include a proportion of 100 angstrom sized insulative particles. All of these materials are bonded together in an insulative binder. This invention includes a grading of particle sizes such that the composition causes the particles to take a preferential relationship to each other.
U.S. Pat. No. 5,260,848, issued to Childers, discloses foldback switching materials which provide protection from transient overvoltages. These materials are comprised of mixtures of conductive particles in the 10 to 200 micron range. Semiconductor and insulative particles are also employed in these compositions. The spacing between conductive particles is at least 1000 angstroms.
Additional EOS polymer composite materials are also disclosed in U.S. Pat. Nos. 4,331,948, 4,726,991, 4,977,357, 4,992,333, 5,142,263, 5,189,387, 5,294,374, 5,476,714, 5,669,381 and 5,781,395, the teachings of which are specifically incorporated herein by reference.
These known voltage variable materials are particularly suited for protecting data transmission signals. The growth in the data communications and telecommunications industries has provided a myriad of opportunities for these materials. One limitation keeping the known VVM's from reaching their full potential is that they are not structurally free standing. That is, the materials are typically applied to a substrate, which is then electrically connected to a use point, usually a printed circuit board ("PCB"). VVM applications are thus limited to the smallest possible substrate that will hold or support a quantity of VVM, which may be too large, the wrong shape or the wrong configuration for certain applications, e.g., for certain fine pitch integrated circuits. Other applications, such as data cabling, do not provide a convenient place to mount a substrate.
A need therefore exists to provide a more flexible and space saving way to use voltage variable materials. A need exists for the voltage variable material to be free standing so as to eliminate the need for a carrier substrate or daughter board. A need also exists for a way to electrically couple VVM's in applications that do not provide a convenient place to mount the carrier substrate.