An apparatus and method for spatially shifting a light using a multilayer thin-film stack of at least two materials having unequal optical properties, such as indices of refraction and absorption coefficients. The apparatus has an input face for admitting the light into the apparatus and an impedance matching mechanism for maximizing the in-coupling of the light into the multilayer thin-film stack at a non-normal incidence. The non-normal incidence is sufficient to generate a spatial shift of the light in the multilayer thin-film stack as a function of at least one light parameter, such as wavelength and/or polarization of the light, thereby separating the light into light components. The spatial shift is achieved by any one or any combination of effects including superprism, turning point and energy confinement. These effects are achieved in the multilayer thin-film stack by appropriately engineering its layer sequence.

In optical communications the technique of wavelength-division multiplexing (WDM) allows several different light signals to be transmitted through a single optical fiber using a different wavelength for each signal. Implementation of WDM requires multiplexing techniques that spatially superimpose the light components or component beams of different wavelengths prior to transmission to form a single light beam. At the receiving end, WDM requires demultiplexing techniques that spatially separate the different light components of the single light beam to recover the original component beams.
In general, demultiplexing requires apparatus and methods for dispersing or spatially separating light into light components based on their constituent or component wavelengths. Conventional prisms or diffraction gratings are one means to select and separate different wavelengths of light. These conventional devices, however, have small dispersion (change in propagation angle with respect to wavelength). For example, typical gratings and prisms exhibits angular dispersion figures of less than 1°/nm. Therefore, they have to be quite large in order to achieve sufficient spatial separation of light components at different component wavelengths. The prior art teaches to replace gratings and prisms by alternative elements for effective wavelength separation.
Smaller, integrated arrayed waveguide grating (AWG) routers have been developed. Since waveguides are very temperature sensitive, these integrated devices need to be temperature-stabilized during operation. They are especially useful for high-channel count multiplexers and demultiplexers justifying the expensive fabrication and operation.
For lower-channel count systems, multilayer thin-film stacks are more cost-effective, since they are much less sensitive to temperature drift and normally do not require temperature stabilization during operation. Such stacked structures are constructed of a number of layers, e.g., alternating layers of a higher and lower refractive index dielectric material and spacer layers, as necessary. The thicknesses of the layers and their refractive indices determine the optical properties of these structures.
There are many examples of multiplexers and demultiplexers in the prior art using the transmission and reflection properties of multilayer thin-film structures as a function of wavelength or polarization. Such transmissive or reflective thin-film structures are often referred to as thin-film filters, including, e.g., a thin-film edge filter built of alternating layers of dielectric and spacer layers as taught by Thelen in U.S. Pat. No. 4,373,782. In this filter the bandpass reflectance characteristic of transition wavelength edges is non-polarizing for radiation incident at a preselected non-normal angle. Thin film filters are also used in conjunction with broadband reflecting regions in wavelength selective optical switches, as described, e.g., by Scobey et al. in U.S. Pat. No. 6,320,996. Improvements to the performance of thin-film bandpass filters, e.g., reduction of ripple effects and improvements to bandpass transmission are further described by Cushing in U.S. Pat. No. 6,011,652 entitled "Multilayer thin film dielectric bandpass filter". In U.S. Pat. No. 6,147,806 to Park et al. describes the use of dichroic mirrors for demultiplexing of light into three color components. In U.S. Pat. No. 6,396,632 Liu et al. teach a tunable optical filter and an optical modulator that use a conventional thin film optical filter whose thickness is adjusted with the aid of a piezoelectric layer. The use of thin film filters in conjunction with dispersive elements for multiplexing applications is taught by Boye et al. in U.S. Pat. No. 6,404,958. In U.S. Pat. No. 6,122,417 Jayaraman et al. teach the use of a stack of layers as a Fabry-Perot cavity to multiplex and demultiplex an optical laser signal containing several different wavelengths. In fact, Jayaraman employs a linear array of Fabry-Perot cavities as filters to construct a WDM multiplexer-demultiplexer. It should be noted that the reflection/transmission wavelengths of Fabry-Perot filters are determined based on the physical principles of resonant optical cavities by adjusting the longitudinal dimension of the cavity to control the radiation modes that are resonant in the cavity. All of these devices use the well-known transmission and reflection properties of thin-film structures. Since these properties only allow for the separation into two different light paths—a reflection and a transmission path—a different thin-film filter structure is needed for each wavelength component to be demultiplexed. Thus, for a higher channel count system, many different thin-film filters have to be cascaded resulting in numerous or complicated components and high cost.
To reduce the number of components in a thin-film demultiplexing system, prior art has also investigated the use of thin-film filters in special geometries. For example, U.S. Pat. No. 6,008,920 to Hendrix teaches multiple channel multiplexer/demultiplexer devices using a single constant, non-variable wavelength selective optical interference filter preferably made of tens of layers and forming several cavities. The apparatus uses the angle-shift property of the thin-film filter, wherein the wavelength-selectivity changes with changing angle of incidence. Hendrix uses a system, e.g., a solid glass wedge adjacent the filter, to vary the angle of incidence and thus achieve wavelength selectivity.
In U.S. Pat. No. 6,111,674 Bhagavatula teaches the use of an optical path length generator with a plurality of partially reflective surfaces to build a multiple reflection multiplexer and demultiplexer. The partially reflective surfaces reflect successive portions of the energy of each of the different wavelength signals along different length optical paths. These intermediate pathways are recombined by a lens to achieve demultiplexing.
In U.S. Pat. No. 6,404,947 Matsuda teaches the use of a photonic crystalline layer composed of a stack of layers made up of multiple fine lines for wavelength separation in a demultiplexer and demultiplexer-receiver. By changing the spacing of the fine lines along the layer, the change in the position of the band edge of this two-dimensional photonic crystal is used for demultiplexing. Although these structures are more compact than other prior devices, their fabrication is complex and expensive.
In order to increase the dispersion, prior art has also investigated the use of higher-dimensional structures, i.e., structures that have varying optical properties in two- or three-dimensions. Recently, Kosaka et al. ("Superprism phenomena in photonic crystals," Phys. Rev. B, Vol. 58, No. 16, 15 Oct. 1998; "Self-collimating phenomena in photonic crystals," Appl. Phys. Lett., Vol. 74, No. 9, 1 Mar. 1999; "Photonic crystals for micro-lightwave circuits using wavelength-dependent angular beam steering," Appl. Phys. Lett., Vol. 74, No. 10, 8 Mar. 1999) have proposed a method based on photonic crystals that can give angular dispersion many times larger than a prism or diffraction grating by relying on the "anomalous dispersion effect" or the "superprism effect" observed for non-normal incidence light.
It should be noted that the dispersive effects of thin film stacks on one-dimensional or normal-incidence light have been studied. N. Matuschek et al., "Analytical Design of Double-Chirped Mirrors with Custom-Tailored Dispersion Characteristics", IEEE Journal of Quantum Electronics, Vol. 35, No. 2 (1999), pp. 129-137 and M. Jablonsky et al., "The Realization of All-pass Filters for Third-order Dispersion Compensation in Ultrafast Optical Fiber Transmission Systems", Journal of Lightwave Technology, Vol. 19, No. 8 (2001), pp. 1194-1205 discuss the theory and uses of temporal dispersion characteristics of thin film stacks acting as all-pass reflection filters. In order to improve the performance of their thin film stack mirrors Matuschek et al. teach the use of chirping a stack mirror, i.e., slowly increasing the volume ratio between the two different materials to reduce the reflection off the front of the stack by impedance matching.
B. E. Nelson et al., "Use of a dielectric stack as a one-dimensional photonic crystal for wavelength demultiplexing by beam shifting", Optics Letters, Vol. 25, No. 20, Oct. 15, 2000, pp. 1502-1504 and U.S. application Ser. No. 09/778,327 to D. A. B. Miller et al. teach the use of a dielectric stack that relies on group velocity dispersion in accordance with the superprism effect to spatially separate light beams of different component wavelengths. In this case the group velocity dispersion occurring just outside the main reflection region of a multilayer stack of dielectrics is used for wavelength multiplexing and demultiplexing.
Although these teachings go a long way to improving the efficiency and spatial separation of wavelength components of light by using the superprism effect in multilayer dielectric stacks, further improvements in efficiency and spatial separation are desired. Hence, what is needed is a compact device using a multilayer stack for multiplexing and demultiplexing of light in accordance with the superprism effect. The device should exhibit improved spatial separation characteristics of the wavelength components as well as high efficiency. Furthermore, what is needed is a multiplexing and demultiplexing device that is both very compact and easily fabricated.

Apparatus and method employing multilayer thin-film stacks for spatially shifting light

The Board of Trustees of the Leland Stanford Junior University


A toothbrush which is particularly well adapted for properly cleaning tooth surfaces and interproximal areas having a plurality of tufts of bristles mounted in the head of the toothbrush with the tufts cut in a series of at least two rounded peaks extending laterally across the head and in which the tufts of bristles may be arranged in at least two longitudinally disposed outer rows defining an inner area lying therebetween and at least one longitudinally disposed inner row is positioned in the inner area, with the tips of the inner row of tufts of bristles being feathered.

The present invention relates generally to dental hygiene and, more particularly, to toothbrushes which are particularly well suited to reach into and remove plaque and debris from the gingival sulcus and to clean exposed tooth surfaces.
Most dentists recommend that their patients use the Bass method of tooth brushing. This technique is the most widely recommended method for removing plaque from the gingival sulcus and from the exposed surfaces of the teeth. The Bass method requires that the toothbrush head be positioned along the gum line at approximately a 45 degree angle, with at least one row of bristles nestled below the gumline. While the brush head is oriented in this way, it is gently rocked back and forth so that bristles in the gingival sulcus loosen and remove plaque which is present there while the rest of the bristles brush and massage the exposed surface of the gum and clean the exposed tooth surfaces. The bristles are then swept away from the gumline. The brush head is then lifted away and repositioned to perform the same process with adjacent teeth and gums. An important objective of this technique is to reduce targeted pathogenic organisms found in the gingival sulcus which, among other things, will minimize or eliminate gingival inflammation and bleeding.
Toothbrushes with a wide variety of bristle configurations are available. The most common toothbrush design comprises a handle with a flat head and tufts of bristles of substantially the same length projecting from the head. The tips of the bristles in these conventional toothbrushes therefore lie generally in a plane. This design is not particularly well-suited to the Bass method because the bristles which contact the outer tooth surfaces and the outer surfaces of the gums below the gum line impede penetration of the remaining bristles into the gingival sulcus or into the spaces between adjacent teeth.
Other current toothbrush head designs have outer longitudinal rows of bristles which are longer than the rows of bristles lying in the inner portion of the brush. This design is not well suited to the Bass method because the outer bristles tend to lay on top of the gingiva, rather than penetrating into the gingival sulcus. Yet another toothbrush bristle head design which has been suggested comprises groupings of tufts of bristles with tips at two different heights. In this design, the tufts are arranged in alternating, laterally extending rows shaped to form either a square wave configuration or a triangular wave configuration. In both cases, the design offers little in the way of penetration of the gingival sulcus when the Bass technique is used. Furthermore, the sharp transition in bristle length at the corners of the square or triangular wave configurations are potentially irritating and uncomfortable.
Toothbrush designs have included bristle tips cut laterally across the longitudinal axis of the head of the toothbrush to produce a dome configuration. This configuration does have advantages with respect to the Bass technique, since the outer rows of bristles are shorter than the inner rows and do not interfere with penetration of the inner rows into the gingival sulcus.
Techniques for increasing effective bristle tip area by feathering the tips of the bristles in a variety of different kinds of brushes have been known for some time. These techniques have been applied to various toothbrush bristle configurations, including some of the configurations discussed above. Also, selective feathering of bristles has been suggested in the past. While feathering may improve the overall performance of many toothbrushes, it has had little impact on the effectiveness of earlier brushes in cleaning the gingival sulcus because the bristle tuft configurations have not been well-suited to the Bass method. Furthermore, although increasing the effective bristle tip area would further improve the cleaning achieved with the dome configuration discussed immediately above, this has not been suggested in the past.
The present invention provides a new toothbrush head design with an ideal configuration of bristle tuft lengths as well as feathering of selected bristle tips. The resulting toothbrush is gentle but effective, providing outstanding overall comfort as well as greatly enhanced effectiveness in reaching into and removing plaque and debris from the gingival sulcus, massaging the gum both above and below the gum line, and cleaning exposed tooth surfaces including the spaces between adjacent teeth.
The present invention is directed to a toothbrush having an elongated handle with an elongated head at one end. A plurality of tufts of bristles are mounted in the head and project generally perpendicularly from it. The tips of the tuft bristles are cut to form an undulating surface comprising at least two rounded peaks extending generally laterally across the head of the toothbrush.
The plurality of tufts of bristles mounted in the toothbrush head may include at least two longitudinally disposed outer rows, one along each of the opposite outer edges of the head, defining an inner area lying therebetween, and at least one longitudinally disposed inner row of tufts positioned in this inner area. The tips of the bristles in the inner rows of tufts of bristles are feathered.
In one preferred embodiment, the tips of the tufts of all or only the inner row(s) of bristles are also cut in a rounded profile that arches upwardly across the longitudinal axis of the head. Also, in another preferred embodiment of the invention, the undulating surface is made up of at least three rounded peaks. In yet another preferred embodiment, some of the tufts of bristles of the inner row(s) extend beyond the last tufts of the bristles in the outer rows.

Toothbrush with bristle configuration adapted for cleaning tooth surfaces and interproximal areas


Provided according to one embodiment of the present invention are a non-magnetic steel material and a method for manufacturing the same. The steel material comprises 15-27 wt % of manganese, 0.1-1.1 wt % of carbon, 0.05-0.50 wt % of silicon, 0.03 wt % or less (0% exclusive) of phosphorus, 0.01 wt % or less (0% exclusive) of sulfur, 0.050 wt % or less (0% exclusive) of aluminum, 5 wt % or less (0% inclusive) of chromium, 0.01 wt % or less (0% inclusive) of boron, 0.1 wt % or less (0% exclusive) of nitrogen, and a balance amount of Fe and inevitable impurities, has an index of sensitivity of 3.4 or less, the index of sensitivity being represented by the following relational expression (1): [Relational expression 1]—0.451+34.131*P+111.152*Al−799.483*B+0.526*Cr≤3.4 (wherein [P], [Al], [B] and [Cr] each mean a wt % of corresponding elements), and contains a microstructure with austenite at an area fraction of 95% or greater therein.

Transformer structures include a case and a lock plate, and steel materials used for such transformer structures are required to have high non-magnetic characteristics.
Recently, steel materials having high non-magnetic characteristics in which austenite is stabilized by adding large amounts of manganese (Mn) and carbon (C) while entirely excluding chromium (Cr) and nickel (Ni) have been developed. Austenite is a paramagnetic substance having low magnetic permeability and is more non-magnetic than ferrite.
High manganese (Mn) steel materials having austenite in which carbon (C) is contained in large amounts are suitable for use as non-magnetic steel materials due to high stability of austenite.
However, if elements such as aluminum (Al) or phosphorus (P), remaining in manufacturing processes of high manganese steel materials, are included in austenite in large amounts, the crack sensitivity of the steel materials increases at high temperatures. This is due to low hot ductility and internal grain boundary oxidation at high temperatures. High crack sensitivity has a large influence on the surface quality of steel materials at room temperature.
Therefore, it is necessary to develop a non-magnetic steel material having low crack sensitivity and high surface qualities.

Non-magnetic steel material having excellent hot workability and manufacturing method therefor


A print media bin operatively coupled to a media handling system is disclosed. In one embodiment, the print media bin includes a first tray positioned adjacent to a second tray and a media tray drive subsystem coupled to the first tray for allowing the print media bin to rotate in order to provide access to the second tray. The media tray drive subsystem includes a drive cluster gear and a tray lock, including an anti-rotation rib and a lock latch, operatively coupled to the drive cluster gear.

In prior media tray systems, if the user fails to properly engage the media tray, media may be pulled from the main media tray and the print may be made on media that it is probably not intended for. This wastes media and ink/toner and frustrates the user because the desired media was not used. Conversely, if the media tray was not disengaged after printing a specialized media, the next print job may pull that media from the media tray and use it, thereby wasting ink/toner and media. Consequently, a more advantageous system, then, would be provided if such user frustration and ink/toner and media waste could be reduced.

Hewlett-Packard Development Company, L.P.


Provided are a method of writing/reading data into/from a memory cell and a page buffer using different codes for the writing and reading operations. The method of writing/reading data into/from a memory cell that has a plurality of threshold voltage distributions includes a data writing operation and a data reading operation. In the data writing operation, data having a plurality of bits is written into the memory cell by using a plurality of writing codes corresponding to threshold voltage distributions. In the data reading operation, the data having a plurality of bits is read from the memory cell by using reading codes corresponding to the threshold voltage distributions from among the threshold voltage distributions. In the method of writing/reading data into/from a memory cell, a part of the writing codes is different from a corresponding part of the reading codes.

1. Field
Example embodiments relate to a method of writing/reading data into/from a memory cell and a page buffer. More particularly, example embodiments relate to a method of writing/reading data into/from a memory cell and a page buffer using different codes for writing and reading operations.
2. Description of the Related Art
Non-volatile memory devices, which can electrically erase and program data, generally preserve stored data even without a power supply. A representative example of a non-volatile memory device is a flash memory.
Memory cells of a flash memory are generally composed of cell transistors. Each cell transistor includes a control gate, a floating gate, a source, and a drain. A cell transistor of a flash memory can be programmed or erased using the Fowler-Nordheim (F-N) tunneling mechanism.
An erasing operation of the cell transistor may be performed by applying a ground voltage to the control gate of the cell transistor and applying a higher voltage than a source voltage to a semiconductor substrate (referred to herein as a bulk) of the cell transistor. During this erasing operation, a strong electric field is formed between the floating gate and the bulk due to a large voltage difference therebetween and thus, electrons stored in the floating gate are emitted to the bulk due to the F-N tunneling effect. Accordingly, a threshold voltage of the cell transistor is reduced.
A programming operation of the cell transistor may be performed by applying a higher voltage than the source voltage to the control gate and applying the ground voltage to the drain and bulk. During this programming operation, electrons are injected to the floating gate by the F-N tunneling effect. Accordingly, the threshold voltage of the programmed cell transistor is increased.
A mode in which electrons are injected to the floating gate is referred to as a programming mode, and a mode in which electrons are removed from the floating gate is referred to as an erasing mode. The threshold voltage of the programming mode may be greater than 0 volts and the threshold voltage of the erasing mode may be less than 0 volts.
Recently, research has been actively conducted on a multi-level flash memory which stores a plurality of data in a memory cell in order to further improve integration density of a flash memory. Multi-bit data including two or more bits may be stored in the memory cell of a multi-level flash memory. A memory cell storing multi-bit data is referred to as a multi-level memory cell while a memory cell storing a single bit is referred to as a single-level memory cell. Since a multi-level memory cell stores multi-bit data, the multi-level memory cell has four or more threshold voltage distributions, as well as four or more storage states of the data corresponding to the threshold voltage distributions. A conventional example of storing two-bit data in a multi-level memory cell of a multi-level flash memory is described below. However, three or more bit data may also be stored in the multi-level memory cell of a conventional multi-level flash memory.
A conventional multi-level memory cell may have a variety of threshold voltage distributions based on a number of storable bits. In the conventional example described below, the multi-level memory cell has four threshold voltage distributions. A conventional multi-level memory cell which stores four bits may have sixteen threshold voltage distributions, for example.
The threshold voltage distributions of the multi-level memory cell in this conventional example are mapped to corresponding codes which represent storage states of the data. For example, the four threshold voltage distributions may be mapped to four corresponding codes ('11', '10', '01', and '00') for representing two bits.
Writing and reading operations of the multi-level memory cell are performed by using the codes. In particular, the writing operation of the multi-level memory cell is performed by mapping a threshold voltage distribution of the multi-level memory cell to a code (e.g., '00'), which represents a storage state of written data. The reading operation of the multi-level memory cell is performed by checking the position of the threshold voltage distribution and reading the code (e.g., '00'), which is mapped to the checked threshold voltage distribution.
Conventionally, the writing and reading operations of a general memory cell are performed by using the same codes. For example, if codes of '11', '01', '00', and '10' are used for the writing operation, the same codes of '11', '01', '00', and '10' are also used for the reading operation.
If the codes optimized for the writing operation are used for the writing and reading operations, the number of reading operations has to be increased in order to check positions of the threshold voltage distributions during the reading operations. On the other hand, if the codes optimized for the reading operation are used for the writing and reading operations, threshold voltage variations increase in the writing operation.

Method of writing/reading data into/from memory cell and page buffer using different codes for writing and reading operations


A method for processing a handover procedure by a user equipment (UE) in a mobile communication system. The method includes receiving, by the UE, a radio resource reconfiguration message from a base station; recognizing, by the UE, a handover type based on a handover type indicator included in the received radio resource reconfiguration message; and performing, by the UE, a first or second handover procedure according to the recognized handover type. The first or second handover procedure is performed if the radio resource reconfiguration message includes mobility related information. The mobility related information includes a target physical cell identity and a new cell-radio network temporary identifier (C-RNTI).

1. Field of the Invention
The present invention relates to a long term evolution (LTE) system and, more particularly, to a mobile communication system for differently performing radio resource reconfiguration according to types of handover, and a method for processing a handover procedure thereof.
2. Discussion of the Related Art
FIG. 1 shows a network structure of the E-UMTS, a mobile communication system, applicable to the related art and the present invention. The E-UMTS system has been evolved from the UMTS system, for which the 3GPP is proceeding with the preparation of the basic specifications. The E-UMTS system may be classified as the LTE (Long Term Evolution) system.
The E-UMTS network may be divided into an evolved-UMTS terrestrial radio access network (E-UTRAN) and a core network (CN). The E-UTRAN includes a terminal (referred to as 'UE (User Equipment), hereinafter), a base station (referred to as an eNode B, hereinafter), a serving gateway (S-GW) located at a termination of a network and connected to an external network, and a mobility management entity (MME) superintending mobility of the UE. One or more cells may exist for a single eNode B.
FIGS. 2 and 3 illustrate a radio interface protocol architecture based on a 3GPP radio access network specification between the UE and the base station. The radio interface protocol has horizontal layers comprising a physical layer, a data link layer, and a network layer, and has vertical planes comprising a user plane for transmitting data information and a control plane for transmitting control signals (signaling). The protocol layers can be divided into the first layer (L1), the second layer (L2), and the third layer (L3) based on three lower layers of an open system interconnection (OSI) standard model widely known in communication systems.
The radio protocol control plane in FIG. 2 and each layer of the radio protocol user plane in FIG. 3 will now be described.
The physical layer, namely, the first layer (L1), provides an information transfer service to an upper layer by using a physical channel. The physical layer is connected to an upper layer called a medium access control (MAC) layer via a transport channel, and data is transferred between the MAC layer and the physical layer via the transport channel. Meanwhile, between different physical layers, namely, between a physical layer of a transmitting side and that of a receiving side, data is transferred via a physical channel.
The MAC layer of the second layer provides a service to a radio link control (RLC) layer, its upper layer, via a logical channel. An RLC layer of the second layer may support reliable data transmissions. A PDCP layer of the second layer performs a header compression function to reduce the size of a header of an IP packet including sizable unnecessary control information, to thereby effectively transmit an IP packet such as IPv4 or IPv6 in a radio interface with a relatively small bandwidth.
A radio resource control (RRC) layer located at the lowest portion of the third layer is defined only in the control plane and handles the controlling of logical channels, transport channels and physical channels in relation to configuration, reconfiguration and release of radio bearers (RBs). The radio bearer refers to a service provided by the second layer (L2) for data transmission between the UE and the UTRAN.
A random access channel (RACH) will now be described. The RACH is used to transmit data with a relatively short length to uplink, and in particular, the RACH is used when a UE, which has not been allocated dedicated radio resources, has a signaling message or user data to be transmitted to uplink. Or, the RACH may be also used for a base station to instruct a UE to perform a RACH procedure.
The mobile communication system is different from a fixed line communication system in that the mobile communication system should provide a seamless service to UEs with mobility. Namely, the mobile communication system features that it supports the case where a UE moves to a different area. When the UE becomes away from a connected base station and simultaneously becomes close to a different base station, a network should perform an operation of changing a connection point of the UE to the new base station from the serving base station. While the UE is disconnected from the old base station and completes its connection to the new base station, there is no data transmission or reception.
Meanwhile, every user data has a transmission limit time. For example, in case of a voice call, single voice information generated from a device intending transmission of the voice information should be transmitted to a device that is to receive the voice information within a certain time. In addition, data such as TCP ( ) should be delivered from a sender to a recipient within a certain time, and the reception side should inform the sender about acknowledgement of transmission/reception of the TCP data within a certain time, otherwise the sender would re-transmit the TCP data.
In general, the UE and the base station continuously exchange transmission/reception acknowledgement information with respect to the transmitted/received data. For example, in case of a TCP packet, if a single packet is lost by lower entities while being transmitted from the sender to the recipient, the transmission side TCP entity rapidly lowers a transmission rate (speed) of the TCP data. For example, the transmission side TCP entity, which generates data and transmits the same to the reception side at a rate of 100 Mbit/s, determines that the reception side has failed to receive even only one packet, the transmission side TCP entity rapidly lowers the transmission rate of the TCP data to, for example, 10 Kbit/s.
Thus, in the mobile communication system, in order to reduce an influence on the TCP, a lossless mode to effectively support traffic such as the TCP between the base station and the UE. The lossless mode may be considered an AM (Acknowledge Mode) RLC, and if the transmission side fails to receive a reception acknowledgement response with respect to its transmitted data from the reception side within a certain time or if the transmission side receives information of a reception failure with respect to its transmitted data, the transmission side re-transmits the data.
In this case, however, when the transmission side receives the information of reception failure with respect to certain data, it does not always perform retransmission with respect to the corresponding data but performs retransmission only when a transmission/reception acknowledgement response is made within a maximum transmission delay time defined in a radio interface.
FIG. 4 is a signal flow chart illustrating a handover procedure between the UE and the base station defined in the LTE.
As shown in FIG. 4, the UE performs measurement on the strength or the like of signals with respect to each cell, and if a particular reference (base) designated by the base station is satisfied according to the measurement results, the UE transmits a measurement report message to a source base station (source eNB) via uplink (UL) (S10).
The source eNB determines performing of handover to move the UE to a cell of a target eNB with reference to the measurement report message received from the UE, and transmits context data to the target eNB to request preparation of handover (S20).
The target eNB secures radio resources under its management, and transfers radio resource configuration information together with a temporary identifier (new C-RNTI) with respect to the corresponding UE to the source eNB. The source eNB transmits a handover command to the UE (S40) and then starts transmission of user data (PDCP SDU) or the like to the target eNB. In this case, the source eNB transmits data (PDCP SDUs) which have been successively received from the UE to a core network (MME/UPE), and transfers first one (PDCP SDU) of data which have not been successively received from the UE, to the target eNB. Also, the source eNB delivers data which have not been acknowledged by the UE, among the data (PDCP SDUs) the source eNB had transmitted to the UE.
Upon receiving the handover command, the UE reestablishes a radio environment with the target eNB including timing synchronization (S50). The target eNB response to the UE by timing information, and the UE transmits a handover confirmation message to the target eNB (S60). In this case, the target eNB transmits reception acknowledgement information with respect to the handover confirmation message to the UE. Additionally, the target eNB may transmit user data transmission/reception confirmation information (PDCP status report) to the UE. The PDCP status report informs about which user data (PDCP SDUs) have been successfully received by the source eNB from the UE and about which user data (PDCP SDUs) have not been successfully received. In other words, the PDCP status report may be interpreted as information of user data the target eNB requests its retransmission from the UE.
Upon receiving the PDCP status report, the UE retransmits data informed to have not been successfully received by the source eNB among the data attempted to have been transmitted to the eNB, and does not retransmit data informed to have been successfully received by the eNB.
Thereafter, when the handover is completed, the target eNB informs the source eNB about the success of handover (S70), and transmits user data to the core network (MME/UPE) to update the location of the UE. At this time, with respect to the user data which had been attempted to be transmitted by the UE when the UE located within the source eNB, the target eNB performs realigning on the user data received from the source eNB and the data received from the UE located within the target eNB, and transfers successfully restored user data to the MME/UPE.
In the related handover procedure, as soon as the UE is connected to the new target eNB, the UE starts transmission to the target eNB, starting from the first user data which had not been acknowledged by the source eNB, among the user data the UE had transmitted to the source eNB in step S60. Namely, the UE does not start user data transmission to uplink after it receives the user data transmission/reception confirmation information from the target as soon as the UE is connected to the new target eNB, but starts transmission to the uplink at the same time when the handover occurs. Such user data transmission causes a first problem as follows.
FIG. 5 shows an example of an unnecessary data transmission occurring in the handover procedure between the UE and the base station.
With reference to FIG. 5, the transmission side PDCP entity of the UE starts transmission of six user data (PDCP SDU 1 to PDCP SDU 6) to the transmission side RLC at a time T0, and the transmission RLC entity transmits user data by using RLC PDU 1 to RLC PDU 6. In this case, only RLC PDU 1, among the six RLC PDUs, is acknowledged by the reception side RLC, while the RLC PDU 2 to RLC PDU 6 have been received by the reception side RLC but their status report has not been transmitted yet. The received RLC PDU 1 to RLC PDU 6 are delivered to an upper layer at the reception side.
When handover occurs at the time T1, the transmission side and reception side RLC entities are all reset, and the transmission side PDCP entity transmits all the PDCP SDUs (PDCP SDU 2 to PDCP SDU 6) starting from the PDCP SDU 2, and the transmission side RLC entity transmits the user data by using RLC PDU A to RLC PDU G. At this time, the reception side PDCP entity transmits a PDCP status report to the transmission side PDCP entity.
At a time T2, namely, when the PDCP status report has not been received yet, the transmission side RLC entity exchanges the RLC PDUs with a peer entity (i.e., the reception side RLC entity).
Thereafter, when the PDCP status report arrives at the transmission side PDCP entity at a time T3, the transmission side PDCP entity confirms that the PDCP SDU 1 to PDCP SDU 6 are all received by the reception side, deletes the PDCP SDU 2 to PDCP SDU 6, and transmits discard indication information with respect to the discarded PDCP SDUs or the like to the RLC entity.
In this manner, although the source eNB successfully receives the PDCP SDU 1 to PDCP SDU 6 at the time T0 to T1, unless an acknowledgement of the PDCP SDU 2 to PDCP SDU 6 is transferred to the UE, the UE starts transmission of the PDCP SDU 2 to PDCP SDU 6 in the new cell. In this case, because the UE starts transmission of the PDCP SDUs before it receives the transmission/reception acknowledgement response from the target eNB, the unnecessary transmission is generated. In addition, the unnecessary retransmission of the data delays transmission of new data, negatively affecting the quality of service (QoS) of the system.

This patent is subject to a terminal disclaimer.

Mobile communication system and method for processing handover procedure thereof


A hearing aid includes: a housing having an exterior surface and an opening at the exterior surface; a battery door moveably coupled to the housing; and a spring element located in the housing, wherein the spring element is aligned with the opening of the housing to allow actuation of the spring element by a tool that is inserted through the opening of the housing; wherein when the spring element is actuated by the tool, the battery door is allowed to be fully opened, and when the spring element is un-actuated, the battery door is prevented from being fully opened.

Hearing aids have been used for compensating hearing loss of users. Sometimes, a hearing aid may have a battery door that can be easily opened to access the battery housed in the hearing aid. However, such hearing aid may not be suitable for use by infants or children. This is because a child may easily open the battery door and gain access to the battery. As batteries for hearing aids can be quite small, they may become choking hazard for the young users. Thus, it may be desirable to have a safety feature in a hearing aid to prevent a user, such as an infant or a young child, from gaining access to the battery in the hearing aid.

Hearing aid with safety feature for opening a battery door


A thin wire of gold alloy for wire bonding, consisting of: a first group consisting of 2 to 10 ppm by weight of scandium, 3 to 20 ppm by weight of beryllium, and 2 to 50 ppm by weight of indium; and the balance consisting of gold and unavoidable impurities. The thin wire has a loop height of 200 .mu.m or more and a wire flow after resin molding of not more than 5%.

The bonding wire for connecting the electrodes on a semiconductor element to the external leads is conventionally a thin wire of gold alloy because of its good electrocoductivity, corrosion resistance, or other reliable properties.
Bonding of the thin gold alloy wire is typically performed by a thermocompression bonding process, in which the top end of a thin gold alloy wire is melted by heating with an electric torch to form a ball due to the surface tension of the melted metal, the ball is then pressed against an electrode on a semiconductor element heated at 150 to 300.degree. C. with an ultrasonic vibration applied thereto to form a bond, and thereafter, bonding to the external lead is performed by an ultrasonic compression bonding process in the same manner.
Advanced integration of semiconductor elements involves an increased number of electrodes on a semiconductor element. Miniaturization of semiconductor elements involves a reduced area of an electrode and a shortened pitch or distance between electrodes, and therefore, requires that bonding wires should provide a reduced ball size and should have a reduced diameter. The reduction in the ball size reduces the heat input from an electric torch to the bonding wire upon forming the ball, thereby reducing the length of the region of the wire in which recrystallization occurs during the formation of the ball. It is known that there is a close relationship between the recrystallization region length and the loop height of the wire, such that a bonding wire having a long recrystallization region has a high loop, and vice versa. Namely, under a reduced ball size, the conventional loop height cannot be obtained unless the recrystallization region length is increased by decreasing the contents of the alloying elements in a bonding wire gold alloy that control the recrystallization. The alloying elements that control the recrystallization generally also improve the mechanical strength of wire, so that reduction in the contents of such alloying elements causes reduction in the mechanical strength of wire.
The loop height is also reduced by thinning of a bonding wire. Specifically, the ball size is usually controlled to a fixed value within the range of from 2.5 to 3.0 times the wire diameter, so that reduction of the wire diameter brings about the same effect as that obtained by reducing the ball size, and therefore, thinning of a bonding wire causes reduction in the loop height.
The reduction in the ball size, or the thinning of the bonding wire, thus leads to reduction in the loop height, and thereby, causes the problems in reliability and production yield of semiconductor devices because the bonding wires are undesirably brought into contact with the semiconductor element or the die pads of leadframes, causing device malfunction or defects, because the pull strength is reduced by the reduced loop height, and because bonding wires are brought into contact with each other by a wire flow induced by wire deformation because of a flow resistance to a resin used for sealing the semiconductor elements.
To prevent occurrence of these problems, a usual measure is to reduce the contents of the elements that control the recrystallization region length. However, this causes a reduction in the mechanical strength and coarsening of the recrystallized grains of a wire in the portion immediately above the ball being formed, so that the portion immediately above the ball is easily broken by vibration during handling after bonding, to cause poor reliability and a reduced production yield of semiconductor devices.
To solve this problem, many kinds of thin gold alloy wires have been proposed; for example, a gold bonding wire comprising from 5 to 100 ppm by weight of calcium (Japanese Unexamined Patent Publication (Kokai) No. 53-105968), a gold bonding wire comprising from 3 to 5 ppm by weight of calcium, from 1 to 8 ppm by weight of beryllium, and/or from 5 to 50 ppm by weight of germanium (Japanese Unexamined Patent Publication (Kokai) No. 53-112060), and a gold bonding wire comprising from 1 to 8 ppm by weight of beryllium (Japanese Unexamined Patent Publication (Kokai) No. 53-112059).
However, these gold bonding wires have the problem that the loop height after bonding is reduced because of an increased content of the alloying elements for preventing coarsening of the crystal grains immediately above the ball. Moreover, the alloy composition containing beryllium alone as an additive alloying element to the gold base provides a high loop but has the problems that the mechanical strength of wire is lower and the wire flow after resin molding is more significant in comparison with the other alloy compositions.
Control of the loop height is currently effected by the loop shape control system of a bonder to ensure the necessary loop height, but this requires a long duration of time for bonding and causes problems somewhat in the productivity. The conventional bonding wire is not successful in providing large loop height while preventing the coarsening of crystal grains at the wire portion immediately above the ball. There has been a strong need for a thin wire of gold alloy for wire bonding that reliably provides a large loop height and high bonding strength.
The present inventors studied many of the conventionally proposed thin wires of gold alloy for wire bonding and discovered the following fact. The conventional thin wires of gold alloy for wire bonding have a pull strength greater than that of a pure gold wire containing no additive elements, but when a high loop must be formed, the contents of the alloying elements must be reduced, with the result that the pull strength becomes poor and the recrystallized crystal grains easily coarsen in the wire portion immediately above the ball thereby causing damage in the ball neck during the bonding operation. Reduction in the wire diameter involves reduction in the pull strength in accordance with the reduced wire sectional area. Therefore, to ensure a good pull strength, the contents of the alloying elements must be increased, with the result that the large loop height cannot be provided.


A high-efficiency coding apparatus is provided which can increase accuracy in motion compensation and also increase processing speed without increasing the circuit scale as compared with the case that motion detection is carried out with respect to both of even and odd fields. Thus, this high-efficiency coding apparatus can perform accurate encoding, and can realize satisfactory transmission or recording of information. This high-efficiency coding apparatus is formed with frame memories for storing image information of a present frame therein, a frame memory for storing image information of a preceding frame therein, a frame type/2-field type motion detecting circuit for obtaining frame motion vector data of half-pel accuracy and 2-field motion vector data of half-pel accuracy by effecting motion detection of pixel data located within reference blocks located within the search area of a preceding frame and pixel data located within a remarkable block of the present frame, and selectively outputting these motion vector data. A motion compensating circuit effects motion compensation based on the selected output and an adding circuit effects encoding of the image information of the present frame and motion-compensated image information.

The present invention relates to a high-efficiency coding method, a high-efficiency coding apparatus, a recording and reproducing apparatus, and an information transmission system for use with a VCR, an information transmission system or the like.
A method using a motion compensation prediction and a DCT (discrete cosine transform) has hitherto been known as a high-efficiency coding method for an interlace component digital moving picture signal (e.g., CCIR recommendation 601, etc.).
The following three methods are known as the motion compensation prediction method.
A frame type motion compensation method:
This is a method of motion-compensating a processed image as a frame. Graphics image data generated on a computer, for example, is a non-interlace image signal. Therefore, when the graphics image data is displayed on a television monitor for displaying an NTSC television signal, such graphics image data is converted into an NTSC interlace image signal. Since the non-interlace graphics image data obtained from the computer is converted into the NTSC interlace image signal, the interlace image signal is an image signal of frame unit, and an odd-numbered scanning line and an even-numbered scanning line do not have a time difference of one field therebetween unlike an ordinary NTSC television image signal obtained from a television camera or the like. Thus, in this case, it is optimum to effect the frame type motion compensation on the processed image signal.
Field type motion compensation method:
This is a method of motion-compensating a processed image at every field. An NTSC television image signal obtained from a television camera or the like, for example, have a time difference of one field between the odd-numbered scanning line and the even-numbered scanning line of one frame. Accordingly, in this case, it is optimum to effect the field type motion compensation on the processed image signal.
A frame type/field type adaptive motion compensation method:
This is a method of adaptively switching the frame type motion compensation and the field type motion compensation.
Important points of the frame type motion compensation method and the field type motion compensation method will be described below. A "half-pel" in the frame type motion compensation and a "half-pel" in the field type motion compensation become different from each other. Specifically, in the frame type motion compensation, an average value of pixels (pels) adjacent in the longitudinal, lateral or oblique direction within frame is referred to as a "half-pel", and in the field type motion compensation, an average value of pixels adjacent in the longitudinal, lateral or oblique direction within odd field and an average value adjacent in the longitudinal, lateral or oblique direction within even field are referred to as "half-pels". Accordingly, pixel data is newly generated by averaging two pixel data adjacent in the horizontal, vertical or oblique direction in a memory, for example. If half-pel data is newly generated and a motion detection is carried out in the state including the newly-generated half-pel data, then it is possible to obtain motion vector data with accuracy higher than that of motion vector data that has been detected when at least half-pel data is not generated. Thus, accurate macroblock data can be extracted from a preceding frame, and hence a difference between macroblock data of the preceding frame and macroblock data of the present frame can be made accurate.
The number of motion vectors within one frame in the field type motion compensation becomes twice of those within one frame in the frame type motion compensation. Since it is customary that data is processed in the macroblock unit in the motion compensation, when the macroblock in the frame type motion compensation is of 16 lines.times.16 pixels, macroblocks in the odd field and the even field in the field type motion compensation each become 8 lines.times.16 pixels.
In other words, the number of macroblocks within one frame in the field type motion compensation becomes twice the number of macroblocks within one frame in the frame type motion compensation. The reason for this is that the frame type motion compensation has one motion vector with respect to one macroblock and that the field type motion compensation has one motion vector with respect to a macroblock of odd field and a macroblock of even field. Accordingly, the frame type motion compensation has one motion vector with respect to one macroblock and the field type motion compensation has two motion vectors with respect to one macroblock in the frame type motion compensation.
The frame type motion compensation and the field type motion compensation are different from each other as described above. A coding apparatus for effecting the frame/field adaptive motion compensation will be described with reference to FIG. 1 and FIGS. 2A to 2C.
FIG. 1 of the accompanying drawings shows an example of an encoding apparatus for effecting the frame/field adaptive motion compensation.
As shown in FIG. 1, this encoding apparatus comprises a blocking circuit 201 for blocking interlace image data supplied thereto from an input terminal 200 at the macroblock unit of 16 lines.times.16 pixels, an adding circuit 202 for subtracting macroblock data MB(F-1) of motion-compensated preceding frame supplied thereto from a motion compensating circuit 214 from macroblock data MB(F) of the present frame supplied thereto from the blocking circuit 201, a switch 204 for switching the macroblock data MB(F) of the present frame supplied thereto from the blocking circuit 201 and difference data supplied thereto from the adding circuit 202 based on a switching control signal supplied thereto from an inter/intra judgement circuit 203, a DCT (discrete cosine transform) circuit 205 for transforming the macroblock data MB(F) of the present frame from the switch 204 or the difference data in the form of coefficient data of DC component to high-order AC component at the block unit of 8 lines.times.8 pixels, a quantizer circuit 206 for quantizing coefficient data supplied thereto from the DCT circuit 205 at a predetermined quantization step size, a variable word-length encoder 207 for variable-word-length-encoding the coefficient data supplied thereto from the DCT circuit 205 by use of a suitable method such as a run-length-coding method or a Huffman coding method, an inverse quantizer circuit 209 for inverse-quantizing the coefficient data supplied thereto from the quantizer circuit 206 to provide the coefficient data of the DCT circuit 205, an IDCT (inverse discrete cosine transform) circuit 210 for transforming coefficient data supplied thereto from the inverse quantizer circuit 209 into the original macroblock data MB(F) of the present frame or the difference data, an adding circuit 211 for adding the output of the IDCT circuit 210 and the macroblock data MB(F-1) of the motion-compensated preceding frame supplied thereto from the motion compensating circuit 214, a switch 212 for selectively supplying the output of the adding circuit 211 and the output of the IDCT circuit 210 based on the switching control signal supplied thereto from the inter/intra judgement circuit 203, a frame memory 213 for storing an output of the switch 212 in its storage area, a frame type motion vector detecting circuit 216 for obtaining frame motion vector data mv(Fr) by motion-detecting the macroblock data MB(F-1) of the preceding frame supplied thereto from the frame memory 213 and the macroblock data MB(F) of the present frame supplied thereto from the blocking circuit 201 at the frame unit, a field type motion detecting circuit 215 for obtaining odd field motion vector data mv(odd) and even-numbered motion vector data mv(even) by motion-detecting the macroblock data MB(F) of the present frame supplied thereto from the blocking circuit 201 and the macroblock data MB(F-1) of the preceding frame supplied thereto from the frame memory 213 at the field unit, a field/frame type switching circuit 217 for selecting the odd field motion vector data mv(odd) supplied thereto from the field type motion detecting circuit 215, the even field motion vector data mv(even) supplied thereto from the field type motion detecting circuit 215 or the frame motion vector data mv(Fr) supplied thereto from the frame type motion detecting circuit 216 and a motion compensating circuit 214 for generating address data generated based on the frame motion vector data or the field motion vector data mv(Fr)/mv(Fi) supplied thereto from the field/frame type switching circuit 217, reading out the macroblock data MB(F-1) of the preceding frame from the frame memory 213, and supplying the macroblock data MB(F-1) thus read to the adding circuit 202.
The switches 204, 212 are operated in unison with each other in response to the switching control signals supplied thereto from the inter/intra judgement circuit 203. Specifically, when the macroblock data MB(F) of the present frame from the blocking circuit 201 is selected, the switch 204 connects a movable contact c to one fixed contact a, and concurrently therewith, the switch 212 connects a movable contact c to one fixed contact a. When the difference data from the adding circuit 202 is selected, the switch 204 connects the movable contact c to the other fixed contact b, and concurrently therewith, the switch 212 connects the movable contact c to the other fixed contact b.
A manner in which the macroblock data MB is generated will be described with reference to FIGS. 2A to 2C. In FIGS. 2A to 2C, "an open square" represents a pixel of odd field, and an open circle" represents a pixel of even field, respectively. Arrows in FIGS. 2A to 2C show scanning trajectories obtained in the raster scanning or block scanning.
If image data of one frame obtained in the raster scanning shown in FIG. 2A is processed by the block scanning as shown in FIG. 2C, then there is extracted macroblock data MB of 16 lines.times.16 pixels, for example, shown by broken lines in FIG. 2B. Then, the motion compensation processing is carried out by use of the resultant macroblock data MB.
The inter/intra judgement circuit 203 compares dispersed values of the macroblock data MB(F) of the present frame and the difference data, and selects one of the macroblock data MB(F) of the present frame and the difference data having a smaller dispersed value. The dispersed values are calculated by the following equations (1) and (2): ##EQU1## where MP is an average luminance level of pixel provided within the macroblock, and Pj is a luminance level of pixel. ##EQU2## where Var.sub.MBLK is a dispersed value of macroblock.
The field type motion detecting circuit 215 and the frame type motion detecting circuit 216 carry out motion-detection by block-matching which will be described later on.
The frame type motion detection and the field type motion detection will be described with reference to FIGS. 3 and 4. In FIGS. 3 and 4, "open square" represents a pixel of odd field, "open circle" represents a pixel of even field, and "open triangle" represents a half-pel, respectively.
FIG. 3 is a schematic diagram used to explain the frame type motion detection. The vertical direction in FIG. 3 represents a motion vector between a pixel of odd field and a pixel (upper and lower direction) of even field adjacent to the above pixel of odd field, and a value of this motion vector is assumed to be "1", for example (motion amount of one pixel). A motion from upper to lower direction between the preceding frame and the present frame is represented by "minus (-)", and a motion from lower to upper direction between the preceding frame and the present frame is represented by "plus (+)". If one half-pel of the one-frame preceding frame is a pixel of even field of the present frame and the other half-pel of the one-frame preceding frame is a pixel of odd field of the present frame as shown by solid arrows in FIG. 3, then values of these frame motion vectors both become "-2.5" (motion amount of 2.5 pixels from upper to lower direction).
FIG. 4 is a schematic diagram used to explain the field type motion detection. In FIG. 4, the horizontal direction represents a motion vector obtained between the pixel of odd field and the pixel (upper and lower direction) of even field adjacent to the above pixel. A value of this motion vector is assumed to be "1", for example (motion amount of one pixel). A motion from upper to lower direction between the preceding frame and the present frame is represented by "minus (-)", and a motion from lower to upper direction between the preceding frame and the present frame is represented by "plus (+)". If a half-pel of the even field of the preceding frame is a pixel of even field with respect to the even field as shown by a solid-line arrow in FIG. 4, then a value of motion vector of even field becomes "-3" (motion amount of three pixels from upper to lower direction). The above half-pel, i.e., half-pel of even field becomes a pixel of odd field in the odd field. If a pixel of odd field of one-field preceding frame is a pixel of odd field of the present frame with respect to the odd field, then a value of motion vector of odd field becomes "-4" (motion amount of four pixels from upper to lower direction).
As is clear from the above description, when coordinates of vector in the longitudinal direction are examined from a frame standpoint, the half-pel in the frame type motion compensation corresponds to "0.5", and the half-pel in the field type motion compensation corresponds to "1.0". Accordingly, the field type motion compensation has two vectors, i.e., even field vector and odd field vector with respect to one macroblock, and the frame type motion compensation has one motion vector with respect to one macroblock.
The field/frame type switching circuit 217 is supplied with the frame motion vector data mv(Fr), the odd field motion vector data mv(odd), the even field motion vector data mv(even) and difference absolute value sum data obtained when these vector data are obtained. The field/frame type switching circuit 217 compares the above three difference absolute value sum data, and selects motion vector data obtained from the difference absolute value sum data of smallest value.
The interlace image data of the present frame is supplied through the input terminal 200 to the blocking circuit 201. This interlace image data is divided by the blocking circuit 201 into macroblocks of 16 pixels.times.16 pixels, for example, and supplied to the switch 204, the adding circuit 202, the field type motion detecting circuit 215, and the field/frame type switching circuit 217, respectively.
The adding circuit 202 subtracts the motion-compensated macroblock data MB(F-1) of the preceding frame supplied thereto from the motion compensating circuit 214 from the macroblock data MB(F) of the present frame to provide difference data, and this difference data is supplied to the switch 204. The macroblock data MB(F) of the present data supplied to the switch 204 and the difference data from the adding circuit 202 are selectively supplied to the DCT circuit 205 in response to the switching control signal from the inter/intra judgement circuit 203.
The macroblock data MB(F) of the present frame or the difference data supplied to the DCT circuit 205 is transformed into coefficient data of from DC component to high-order AC component, and supplied to the quantizer circuit 206, in which it is quantized with a predetermined quantization step size. The quantized coefficient data is supplied to the variable word-length encoding circuit 207 and the inverse quantizer circuit 209. The quantized coefficient data supplied to the variable word-length encoding circuit 207 is variable-word-length-encoded by a proper method such as run-length-coding method or Huffman coding method, and outputted through the output terminal 208.
On the other hand, the quantized coefficient data supplied to the inverse quantizer circuit 209 is transformed into the original coefficient data, which is not yet quantized, and supplied to the IDCT circuit 210. The coefficient data supplied to the IDCT circuit 210 is decoded by the IDCT circuit 210 into the original macroblock data MB(F) or difference data, and supplied to the adding circuit 211 and the switch 212.
The difference data supplied to the adding circuit 211 is added to the motion-compensated macroblock data MB(F-1) of the preceding frame supplied thereto from the motion compensating circuit 214, and supplied to the switch 212. The added output and the macroblock data MB(F) of the present frame supplied to the switch 212 are selectively supplied to the frame memory 213 in response to the switching control signal from the inter/intra judgement circuit 203, and stored in a memory space of the frame memory 213.
The macroblock data MB(F-1) of the preceding frame read out from the frame memory 213 is supplied to the field type motion detecting circuit 215 and the frame type motion detecting circuit 216. The field type motion detecting circuit 215 is supplied with the macroblock data MB(F-1) of the preceding frame read out from the frame memory 213 and the macroblock data MB(F) of the present frame from the blocking circuit 201. Then, the field type motion detecting circuit 215 effects a motion detection of the field unit on the basis of the macroblock data MB(F) of the present frame and the macroblock data MB(F-1) of the preceding frame. Resultant odd-numbered motion vector data mv(odd) and even-numbered motion vector data mv(even) are supplied to the field/frame type switching circuit 217 together with the difference absolute value sum data.
The frame type motion detecting circuit 215 is supplied with the macroblock data MB(F-1) of the preceding frame read out from the frame memory 213 and the macroblock data MB(F) of the present frame from the blocking circuit 201. The frame type motion detecting circuit 216 effects a motion detection of the frame unit by the macroblock data MB(F) of the present frame and the macroblock data MB(F-1) of the preceding frame. Resultant frame motion vector data mv(Fr) is supplied to the field/frame type switching circuit 217 together with the difference absolute value sum data.
The field/frame type switching circuit 217 compares the difference absolute value sum data supplied thereto from the field type motion detecting circuit 215 and the difference absolute value sum data from the frame type motion detecting circuit 216, and selects motion vector data with a smaller value, i.e., odd field motion vector data mv(odd), even field motion vector data mv(even) or the frame motion vector data mv(Fr). The motion vector data thus selected is supplied to the motion compensating circuit 214 as the frame motion vector data mv(Fr) or the field motion vector data mv(Fi). The motion compensating circuit 214 carries out a motion compensation. Specifically, the motion compensating circuit 214 reads out the macroblock data MB(F-1) of the preceding frame from the frame memory 213 in response to address data (or control signal for controlling a memory controller (not shown)) generated on the basis of the frame motion vector data mv(Fr) or the field motion vector data mv(Fi) from the field/frame type switching circuit 217. This macroblock data MB(F-1) of the preceding frame is data indicative of the original position of the macroblock data MB(F) of the present frame supplied from the blocking circuit 201.
The motion-compensated macroblock data MB(F-1) of the preceding frame from the motion compensating circuit 214 is supplied to the adding circuit 202. Thus, the adding circuit 202 subtracts the macroblock data MB(F-1) of the preceding frame from the macroblock data MB(F) of the present frame supplied thereto from the blocking circuit 201.
An example of the field type motion detecting circuit 215 and an example of the frame type motion detecting circuit 216 shown in FIG. 1 will be described with reference to FIG. 5.
As shown in FIG. 5, the field type motion detecting circuit 215 shown in FIG. 1 comprises an odd field first motion detecting circuit 243 for detecting a motion between odd fields with an accuracy of one pixel, an odd-field second motion detecting circuit 245 for detecting a motion between odd fields with an accuracy of half-pel, an even field first motion detecting circuit 244 for detecting a motion between even fields with an accuracy of one pixel, and an even field second motion detecting circuit 247 for detecting a motion between even fields with an accuracy of half-pel.
As shown in FIG. 5, the frame type motion detecting circuit 216 shown in FIG. 1 comprises a frame first motion detecting circuit 249 for detecting a motion between frames with an accuracy of one pixel, and a frame second motion detecting circuit 250 for detecting a motion between frames with an accuracy of half-pel.
An input terminal 240 to which the macroblock data MB(F) of the present frame is supplied from the blocking circuit 201 shown in FIG. 1 is connected to input terminals of the odd field first and second motion detecting circuits 243, 245, the even field first and second motion detecting circuits 244, 247, and the frame first and second motion detecting circuits 249, 250. An input terminal 242 to which the macroblock data MB(F-1) of the preceding frame from the frame memory 213 shown in FIG. 1 is connected to input terminals of the odd field first and second motion detecting circuits 243, 245, the even field first and second motion detecting circuits 244, 247 and the frame first and second motion detecting circuits 249, 250.
The odd field first and second motion detecting circuits 243, 245 are supplied with odd field macroblock data MB(odd, F) of present frame through the input terminal 240 and odd field macroblock data MB(odd, F-1) of preceding frame through the input terminal 242. The even field first and second motion detecting circuits 244, 247 are supplied with even field macroblock data MB(even, F) of present frame through the input terminal 240 and even field macroblock data MB(even, F-1) of preceding frame through the input terminal 242. Further, the frame first and second motion detecting circuits 249, 250 are supplied with the macroblock data MB(F) of present frame through the input terminal 240 and the macroblock data MB(F-1) of preceding frame through the input terminal 242.
The odd field first motion detecting circuit 243 detects a motion vector with an accuracy of integer pixels on the basis of the odd field macroblock data MB(odd, F) of the present frame and the odd field macroblock data MB(odd, F-1) of the preceding frame, and supplies resultant odd field motion vector data MV(odd) to the odd field second motion detecting circuit 245. The odd field second motion detecting circuit 245 detects a motion vector with an accuracy of half-pel on the basis of the odd field motion vector data MV(odd), the odd field macroblock data MB(odd, F) of present frame and the odd field macroblock data MB(odd, F-1) of preceding frame supplied thereto from the odd field first motion detecting circuit 243, and supplies resultant odd field motion vector data mv(odd) through the output terminal 246 to the field/frame type switching circuit 217 shown in FIG. 1.
The even field first motion detecting circuit 244 detects a motion vector with an accuracy of integer pixels on the basis of the even field macroblock data MB(even, F) of present frame and the even field macroblock data MB(even, F-1) of preceding frame, and supplies resultant even field motion vector data MV(even) to the even field type motion detecting circuit 247. The even field second motion detecting circuit 247 detects a motion with an accuracy of half-pel on the basis of the even field motion vector data MB(even), the even field macroblock data MB(even, F) of the present frame and the even field macroblock data MV(even, F-1) of the preceding frame supplied thereto from the even field first motion detecting circuit 244, and supplies resultant even field motion vector data mv(even) through the output terminal 248 to the field/frame type switching circuit 217 shown in FIG. 1.
The field type motion detection will be described more fully with reference to FIG. 6. In FIG. 6, only the eeven field type motion detection will be described, and the even field type motion detection is not shown and need not be described because only an object to be detected is different. The motion vector detection will be described later on with reference to FIG. 9, and concepts in detecting motion with accuracy of integer pixels and accuracy of half-pel will be described below.
In FIG. 6, the vertical axis represents coordinates of motion vector in the vertical direction, and horizontal axis represents coordinates of motion vector in the horizontal direction. In FIG. 6, "open circle" represents pixel data of even field, and "open triangle" represents half-pel data, respectively. FIG. 6 shows not only pixel data of the even and odd fields but also pixel data of even and odd fields of present frame and pixel data of even and odd fields of preceding frame in an overlapping state.
In this case, let us describe the field type motion detection on the assumption that the position of even field pixel data Pc of preceding frame coincides with the position of even field pixel data P(F) of present frame after one frame. If the even field pixel data P(F) of present frame is set to be a starting point, then coordinates of motion vector data MV1 with accuracy of integer pixels provided between the even field pixel data P(F) of present frame and even field pixel data Pc of preceding frame become (-1, -2) as shown by arrows and numerical values in FIG. 6, wherein "-1" is in the horizontal direction, and "-2" is in the vertical direction. In other words, the even field first motion detecting circuit 244 shown in FIG. 5 detects a motion of even field pixel data, and an accuracy of a resultant motion vector data MV1 becomes an accuracy of integer pixels.
The even field second motion detecting circuit 247 shown in FIG. 5 sets a search area (shown by a broken-line area in FIG. 6) about the even field pixel data Pc on the basis of the motion vector data MV1 {even field motion vector data MV(even) in FIG. 5} with an accuracy of integer pixels calculated by the even field first motion detecting circuit 244. Within that area, the even field second motion detecting circuit 247 detects a motion including half-pel generated from the even field pixel data, and detects motion vector data mv2 {even field motion vector data mv(even) in FIG. 5}.
If the position of even field half-pel data Pa of preceding frame is agreed with the position of even field pixel data P(F) of present frame, coordinates of motion vector data MV1 with accuracy of integer pixels become (-1, -2). In this case, a motion detection with an accuracy of half-pel is carried out, and consequently, coordinates of the motion vector data mv2 becomes (-0.5, -2). Specifically, in the first step, a motion detection with an accuracy of integer pixels is carried out, and the search area for effecting motion detection with an accuracy of half-pel is set on the basis of the resultant motion vector data in the next step. Then, a motion detection with an accuracy of half-pel is carried out, and a motion detection with a higher accuracy can be carried out.
On the other hand, the frame first motion detecting circuit 249 detects a motion with an accuracy of integer pixels on the basis of the macroblock data MB(F) of present frame and the macroblock data MB(F-1) of preceding frame, and supplies resultant frame motion vector data MV(Fr) to the frame second motion detecting circuit 250. The frame second motion detecting circuit 250 detects a motion with an accuracy of half-pel on the basis of the macroblock data MB(F) of present frame, the macroblock data MB(F-1) of preceding frame, and the frame motion vector data MV(Fr) supplied thereto from the frame first motion detecting circuit 249, and obtains resultant frame motion vector data with an accuracy of half-pel. The frame second motion detecting circuit 250 supplies this motion vector data mv (Fr) through the output terminal 251 to the field/frame type motion detecting circuit 217 shown in FIG. 1.
The frame type motion detection will be described with reference to FIG. 7. A manner in which a motion vector itself is detected will be described later on with reference to FIG. 9, and only concepts in detecting motion with an accuracy of integer pixels and with an accuracy of half-pel will be described below
In FIG. 7, the vertical axis represents coordinates of motion vector in the vertical direction, and the horizontal axis represents coordinates of motion vector in the horizontal direction, respectively. In FIG. 7, "open square" represents odd field pixel data, "open circle" represents even field pixel data, and "open triangle" represents half-pel data, respectively. FIG. 7 shows not only pixel data of the present frame but also pixel data of present frame and pixel data of preceding frame in an overlapping state.
In the following description, let it be assumed that the position of pixel data Pc of preceding frame is agreed with the position of pixel data P(F) of present frame after one frame. If the pixel data P(F) of present frame is set to a starting point, then coordinates of motion vector data MV1 with an accuracy of integer pixels between the pixel data P(F) of present frame and the pixel data Pc of preceding frame are set to (-1, -2) as shown by arrows and numerical values in FIG. 7, wherein "-1" is set on the horizontal direction, and "-2" is set on the vertical direction. Specifically, the frame first motion detecting circuit 249 shown in FIG. 5 detects a motion on the basis of whole data provided within the frame, and an accuracy of resultant motion vector data MV1 becomes an accuracy of integer pixels.
The frame second motion detecting circuit 250 sets a search area (area encircled by a broken line in FIG. 7) about the pixel data Pc on the basis of motion vector data MV1 {frame motion vector data MV(Fr) in FIG. 5)} with an accuracy of integer pixels calculated by the frame first motion detecting circuit 249. Then, within the above area, the frame second motion detecting circuit 250 detects a motion with an accuracy including half-pel generated from pixel data, and detects motion vector data mv2 {frame motion vector data mv(Fr) in FIG. 5}.
If the position of half-pel data Pa of preceding frame is agreed with the position of even field pixel data P(F) of present frame after one frame, then coordinates of the motion vector data MV1 with an accuracy of integer pixels become (-1, -2). In this case, a motion is detected with an accuracy of half-pel, and hence resultant motion vector data mv2 is set to (-1.5, -1.5). In other words, in the first step, a motion detection with an accuracy of integer pixels is carried out, and the search area for detecting a motion with an accuracy of half-pel in the next step is set on the basis of the resultant motion vector data. Then, a motion detection with an accuracy of half-pel is carried out within the above search area, thereby detecting a motion with a higher accuracy.
The frame type motion detection will be further described with reference to FIG. 8. FIG. 8 illustrates a macroblock of 16 lines.times.16 pixels, by way of example. In FIG. 8, similarly to FIG. 7, "open square" represents odd field pixel data, "open circle" represents even field pixel data, "open triangle" represents interpolated half-pel data, and vm1 to vm9 represent motion vector data with an accuracy of half-pel corresponding to positions of respective half-pels, respectively. In FIG. 8, macroblock data MB(VM5) is predicted on the basis of frame motion vector data VM5 {corresponding to the frame motion vector data MV(Fr) detected by the first motion detecting circuit 249 shown in FIG. 5}. Accordingly, the pixel data Pc shown in FIG. 7 corresponds to pixel data Pc shown in FIG. 8.
When the frame motion vector data MV5 detected by the frame first motion detecting circuit 249 is supplied to the frame second motion detecting circuit 250, the frame second motion detecting circuit 250 generates half-pel data provided around the pixel data Pc on the basis of the frame motion vector data MV5 with an accuracy of integer pixels, and detects a motion within that search area. As a result, macroblock data MB(vm3) is predicted as shown in FIG. 8. The macroblock data MB(vm3) is predicted by the frame motion vector data vm3 with an accuracy of half-pel. The half-pel data Pa shown in FIG. 8 corresponds to the half-pel data Pa shown in FIG. 7.
An example of motion detecting circuit shown in FIG. 5 will be described with reference to FIG. 9. A motion detecting circuit shown in FIG. 9 detects a motion by use of block-matching method. A frame memory provided within the blocking circuit 201 shown in FIG. 5 corresponds to a present frame memory 321 shown in FIG. 9, and the frame memory 213 shown in FIG. 1 corresponds to a reference frame memory 323 shown in FIG. 9. While the field first motion detecting circuits 242, 244, the field second motion detecting circuits 245, 247, the frame first motion detecting circuit 249, and the frame second motion detecting circuit 250 are illustrated in FIG. 5, in the case of the field type motion detecting circuit, reference blocks and remarkable blocks, which will be described below, are set at every field. In the case of the frame motion detecting circuit, reference blocks and remarkable blocks, which will be described below, are set every frame.
The motion detecting circuit shown in FIG. 9 comprises a present frame memory 321 for storing therein image data of present frame, a reference frame memory 323 for storing therein image data of preceding frame (reference frame), an address shift circuit 333 for sequentially supplying different address data to the reference frame memory 323, an adding circuit 324 for subtracting macroblock data MB(F-1) supplied thereto from the reference frame memory 323 from macroblock data MB(F) of present frame supplied thereto from the present frame memory 321, an absolute value generating circuit 325 for generating an absolute value of a subtracted result supplied thereto from the adding circuit 324, a latch circuit 327 for latching absolute value data supplied thereto from the absolute value generating circuit 325, an adding circuit 326 for adding an output of the absolute value generating circuit 325 and a latched output of the latch circuit 327 to provide difference absolute value sum data, a memory 328 for storing therein the difference absolute value sum data supplied thereto from the adding circuit 326, a minimum value detecting circuit 329 for detecting a minimum value from the difference absolute value sum data stored in the memory 328, a motion vector detecting circuit 330 for obtaining vector data based on the minimum difference absolute value sum data supplied thereto from the minimum value detecting circuit 329 and supplying the vector data to a controller 332 and the field/frame switching circuit 217 shown in FIG. 1, and the controller 332 for controlling the address shift circuit 333 based on the motion vector data supplied thereto from the motion vector detecting circuit 330 and controlling writing of image data in the present frame memory 321 and reading of stored image data from the present frame memory 321.
The motion vector detecting circuit 330 converts inputted difference absolute value sum data into motion vector data by reading out motion vector data corresponding to inputted difference absolute value sum data, e.g., data indicative of moving amount in the longitudinal and lateral directions from a suitable memory means, such as a ROM (read-only memory).
Pixel data of macroblock (8.times.8 pixels or 6.times.16 pixels) is sequentially read out from the present frame memory 321 as remarkable block under control of the controller 332. On the other hand, the address shift circuit 333 sets a search area on the memory space of the reference frame memory 323 under control of the controller 332, and sets a reference block of the same size as that of the above macroblock within the search area. Then, the address shift circuit 333 sequentially supplies address data, which is used to sequentially read out pixel data from the reference block, to the reference frame memory 323. After the reading of pixel data from the set reference block is completed, the address shift circuit 333 shift the position of the reference block by one pixel within the search area by supplying address data to the reference frame memory 323, and reads out pixel data within the reference block shifted by one pixel by sequentially supplying address data to the reference frame memory 323.
The adding circuit 324 subtracts pixel data provided within the reference block read out from the reference frame memory 323 from pixel data provided within the remarkable block read out from the present frame memory 321. A subtracted result from the adding circuit 324 is supplied to the absolute value generating circuit 325, in which it is converted to absolute value data, and supplied through the adding circuit 326 to the latch circuit 327. The latch circuit 327 latches an added result supplied thereto from the adding circuit 326, i.e., difference absolute value sum data, whereby difference absolute value sum data between the remarkable block provided within the present frame memory 321 and one reference block provided within the reference frame memory 323 is sequentially stored in the memory 328. Then, the memory 328 finally stores therein difference absolute value sum data of the number corresponding to a number of remarkable blocks that have been sequentially set in the search area with a displacement of one pixel.
After calculation of pixel data of reference block provided within one search area and pixel data of remarkable block is finished completely, the minimum value detecting circuit 329 selects the minimum difference absolute value sum data from all difference absolute value sum data stored in the memory 328, and supplies the selected minimum absolute value sum data to the motion vector detecting circuit 330. Also, the minimum value detecting circuit 329 supplies a control signal to the controller 332 such that the controller 332 starts the next processing.
The difference absolute value sum data from the minimum value detecting circuit 329 is supplied to the motion vector detecting circuit 330. The motion vector detecting circuit 330 detects motion vector data corresponding to the difference absolute value sum data supplied thereto from the minimum value detecting circuit 329. The motion vector data obtained by the motion vector detecting circuit 330 is supplied through an output terminal 331 to the field/frame switching circuit 217 shown in FIG. 1 and the controller 332. Then, the controller 332 sets a search area in a similar manner, and controls the address shift circuit 333 and the present frame memory 321 in such a manner that pixel data provided within the reference block and pixel data provided within the remarkable block are processed one more time.
FIG. 10 shows a concept of manner in which a motion is detected according to the block-matching method. In FIG. 10, MB1 represents a macroblock of present frame, SA represents a search area of preceding frame, SIT represents a position of the macroblock MB1 in the preceding frame, and MB2 represents a macroblock of preceding frame composed of the same data as that of the macroblock MB1 of present frame.
Let it be assumed that the position of the macroblock MB1 of present frame is agreed with the position SIT shown by a broken line in the preceding frame and that data of the macroblock MB1 of present frame is data of the macroblock MB2 in the preceding frame.
In such case, a difference absolute value between data of the macroblock obtained from the search area SA by shifting address one pixel and data of the macroblock MB1 of present frame is sequentially calculated, and this difference absolute value data is added to each block, whereafter the motion vector MV is calculated based on the minimum difference absolute value sum data within difference absolute value sum data of each block. Thus, as shown in FIG. 10, there can be obtained a position of the macroblock MB1 of present frame in the preceding frame, i.e., a position of the macroblock MB2 in the preceding frame. In this example, coordinates are (-2, 4), wherein "-2" represents a moving amount of horizontal direction within the preceding frame, and "4" represents a moving amount of vertical direction in the preceding frame. Further, "minus (-1)" represents a movement from upper to lower direction in the vertical direction, and "plus (+)" represents a movement from lower to upper direction in the vertical direction.
U.S. Pat. No. 4,937,666 describes a technique concerning 2-step vector search in which a motion detection with an accuracy of half-pel is carried out after a motion detection with an accuracy of integer pixels has been carried out. U.S. Pat. No. 4,897,720 describes a technique concerning a block-matching.
When a video camera picks up an object and generates a video signal, an electrical signal which results from receiving light from the object by a CCD (charge-coupled device) is converted into a video signal of even field and an electrical signal which results from receiving light from the object by the CCD next is converted into a video signal of odd field. Thus, the video signal of odd field and the video signal of even field constitute a video signal of interlaced system. That is, the video signal of odd field and the video signal of even field have a time difference of one field therebetween. If the object is moved during a time period of one field, a motion occurs between the video signal of odd field and the video signal of even field, i.e., there occurs a difference of luminance level between corresponding pixels.
Accordingly, when a video signal obtained from a device which outputs a video signal having a time difference between the odd field and the even field is frame-type-motion-detected by half-pel and frame-type-motion-compensated, there arise the following problems. That is, when two pixel data adjacent in the vertical direction are averaged in order to generate half-pel data, pixel data of odd field and pixel data of even field are averaged and resultant average value is used as half-pel data. Therefore, when the odd field and the even field have a motion therebetween, the half-pel data includes motion of odd field and even field, i.e., a fluctuation amount of level. Accordingly, an error occurs in the motion detection of half-pel accuracy using half-pel data and a reliable motion compensation cannot be made. As a result, an error occurs in encoding for transmitting or recording a video signal, and hence information cannot be transmitted or recorded accurately.
On the other hand, when the frame type motion compensation is carried out after the field type motion detection was carried out, motion vector data for odd field and even field are respectively obtained, thereby increasing an encoding amount.
Further, in the case of frame type/field-type adaptive motion compensation wherein motion vector data obtained by the field type motion detection and the frame type motion detection are selected and a motion compensation is carried out on the basis of the selected motion vector data, as is clear from the description of FIG. 5, there have to be prepared two detecting circuits of large circuit scale for the field type motion detection and the frame type motion detection, resulting in the circuit scale being increased.
In order to carry out motion detection with half-pel accuracy, there have to be generated nine half-pel data around integer pixel data including center half-pel data. When nine half-pel data around the integer pixel data Pc shown in FIG. 5 are generated together with the center half-pel data, in addition to respective integer pixel data of the macroblock data MB(VM5), integer pixel data for generating the above-mentioned nine pixel data have to be read out from the frame memory 113. When the macroblock is of 16 lines.times.16 pixels, for example, pixel data of at least 18 lines.times.18 pixels have to be read out from the frame memory 113. Accordingly, the pixel data for generating the half-pel data have to be read out from the frame memory 113 during a limited time period. There is then the problem that a processing speed in motion detection is lowered.

High-efficiency coding method, high-efficiency coding apparatus, recording and reproducing apparatus, and information transmission system


Embodiments of the invention describe apparatuses, systems and method for particularly to providing alternative boot paths for computing devices. In embodiments of the invention, a non-volatile controller subsystem is powered up by default in order to allow memory operations to one or more non-volatile devices prior to PCIe/USB enumeration. Logic such as a system SPI controller receives a request to access an SPI flash device for executing a firmware image instruction; however, embodiments of the invention either do not include or do not utilize an SPI flash device. Instead of notifying an SPI flash device, the host SPI controller redirects this request to the non-volatile controller subsystem. The non-volatile controller accesses one or more non-volatile device(s) for executing the firmware image instruction. Furthermore, embodiments of the invention may also support the protection of storage operations initiated from the host controller to the non-volatile device from hardware attacks.

Computing devices commonly use Serial Peripheral Interface (SPI) flash devices for firmware image storage; however as the demand for faster and more efficient device performance increases, the performance of SPI flash devices becomes a limiting factor. Other types of memory devices are capable of performing faster and more efficiently than existing SPI flash solutions. What is needed is a solution to support different types of non-volatile memory storage (i.e., flash and non-flash devices) for firmware images with minimal changes to the platform hardware design of a computing device.
Descriptions of certain details and implementations follow, including a description of the figures, which may depict some or all of the embodiments described below, as well as discussing other potential embodiments or implementations of the inventive concepts presented herein. An overview of embodiments of the invention is provided below, followed by a more detailed description with reference to the drawings.

Alternative boot path support for utilizing non-volatile memory devices


A dispensing mechanism is primarily intended for dispensing food products, such as ice cream, in semi-solid form. The machine has particular application in dispensing portion-sized containers of product. The containers (10) are filled with product through an open end which is then fitted with a closure member (11). The containers are then located in a discharge unit (25, 29) and the container (10) or the closure member (11) is deformed on operation of the unit. The product is discharged through an outlet which may be in the closure member or in the container.

1. Field of the Invention
This invention relates to dispensing mechanisms in particular, but not exclusively, to dispensing mechanisms for dispensing food products such as ice cream or chilled confectionery products usually of semi-solid form.
2. Description of the Prior Art
It has been proposed to dispense ice cream from large containers in individual portions by, for example, hand operation using scoops. It has also been proposed to dispense ice cream from machines as by soft serve machines in which the product is mixed, and frozen, or by dispensing machines in which pre-packaged ice cream is delivered from an ice cream container.
All these known systems are limited by one or more factors such as expensive machinery, slow rate of dispensing, narrow range of product, deterioration of bulk product not used, consistency of portion control, limited flavour selection etc.
A further possibility is the making up of individual portions in a factory and packaging the portions for individual use. Such individual portions cannot be readily employed in certain outlets, such as restaurants or in certain receptacles such as glass or dishes, and the nature of the receptacles in which the individual portions are sold is limited by the cost effectiveness of the packaging receptacle.
An object of the invention is to provide a dispensing mechanism which overcomes at least some of the above disadvantages and which is flexible, cost effective and meets a gap in the existing market.