An optoelectronic device for acquiring images of planes, such as bar codes, includes a deflector for deflecting an incident beam emitted by a light source such as an oscillating or rotating cyclic polygonial deflector or mirror. A driver osscilates or rotates the deflector in such a way that the incident beam describes, during each cycle, angular scanning adapted to generate at least one elementary scanning line on the plane. A closed loop control circuit controls the driver and is connected, on the one hand, to the clock in order to receive the transfer signal "PHgr"TG and, on the other hand, to the driver and adapted to synchronize the beginning of each scanning cycle in phase and frequency with the signal "PHgr"TG emitted by the clock.

The invention relates to an optoelectronic device for acquiring images of planes, such as bar code, area code, matrix or stacked code symbols.
At present there are two large groups of optoelectronic devices for reading bar codes and other symbols which each have their own advantages: CCD reading devices and laser reading devices.
CCD reading devices comprise, in the first instance, a lighting system generally consisting of high-intensity light-emitting diodes arranged so as to illuminate the bar codes. These devices also comprise a lens for forming the image of the bar code on the light-sensitive elements of the CCD for a pause time known as integration time. After this integration time, a clock emits a transfer signal "PHgr"TG controlling the transfer of information contained in the light-sensitive elements of the CCD to an analogue shift register. A second clock then delivers a pixel signal "PHgr"pix which controls the sequential reading of the code image. During this sequential reading, a further image can thus be exposed in the light-sensitive elements of the CCD.
This type of CCD reading device has two main advantages. Firstly, the scanning of the image is entirely electronic and therefore does not require a moving part. Furthermore, this CCD technology allows high reading speeds for a cost price lower than that of laser technology devices.
Laser reading devices, for their part, firstly comprise a source, generally a laser diode, of emission of a laser beam which is focused by an optical system. They also comprise a mechanism of rotating or oscillating mirrors for deflecting the laser beam so that it describes annular scanning which forms an elementary scanning line when projected on the bar code. These devices also comprise an electro-optical system positioned so as to intercept the beginning of scanning and to emit a pulse representative of the beginning of the line to enable the decoding system to be synchronized. With this technology, the laser light reflected by the bar code is collected either by tracing the reverse path of the incident beam or by stationary global retro-collection, and directed toward a light-sensitive system such as a photodiode which creates an instantaneous electrical signal, that is without accumulation of charges, representative of the image of the bar code.
This type of laser reading device has the advantage of offering a greater depth of field and insensitivity to movement, in particular when the device is displaced perpendicularly to the bars of the code.
The differences in design of these two types of optoelectroric device, in particular with respect to processing of the image, mean that there are currently two completely different ranges of products belonging to each of the two families.
It is the object of the present invention to provide an optoelectronic device designed to allow the reading and decoding of images issuing either from a CCD type read head or a laser type read head.
To this end, the invention relates to an optoelectronic device for acquiring images of sprite planes, such as bar code symbols. In one aspect an opto-electronic device, comprises:
a lighting source capable of emitting an incident light beam,
an electronic sensor for acquiring images,
optics for forming images on the electronic sensor; and
a processor for reading and decoding the images acquired by the sensor and comprising a clock adapted to emit a transfer signal "PHgr"TG of each image acquired by said sensor.
In another aspect, the device comprises:
deflecting means for the incident beam comprising oscillating or rotating cyclic deflector driven by a driver for causing said cyclic deflector to oscillate or rotate in such a way that the incident beam describes, during each cycle, angular scanning adapted to generate at least one elementary scanning line on the plane,
a closed loop control circuit for controlling the driver coupled, on the one hand, to the clock in order to receive the transfer signal "PHgr"TG and, on the other hand, to said driver and adapted to synchronize the beginning of each scanning cycle in phase and frequency with the signal "PHgr"TG emitted by the clock.
The invention therefore involved substituting a module for reading symbols such as bar codes with a laser beam designed to be controlled by the processor of a CCD technology reader for the electro-optical assembly of a CCD technology bar code reader (CCD strip, lens, lighting).
To this end, the device according to the invention comprises closed loop control circuit for controlling the laser beam-type read module on the basis of the available transfer signal "PHgr"TG so as to supply an analogue signal comparable to the one originating from a CCD sensor which can therefore be processed and decoded by CCD technology processing means.
Starting with a single base incorporating CCD technology processing means, the concept of the invention therefore offers two groups of optoelectronic devices involving CCD and laser technology.
According to a first advantageous variation of the invention:
the cyclic deflector can take the form of a rotating polygon having n reflective facets,
the driver can take the form of a stepper motor coupled to rotate or oscillate the rotating polygon, said motor having a number of steps per revolution equal to kn, wherein k=x or 1/x, x being an integer,
the closed loop control circuit can take the form of a sequential controller coupled to the stepper motor to produce control phases of said stepper motor synchronized with the signal "PHgr"TG emitted by the clock.
According to this variation employing a rotating polygon, the use of a stepper motor eliminates the constraint of closed loop speed control. Furthermore, the provision of a motor with a number of steps which is a multiple or sub-multiple of the number of facets of the polygon eliminates the constraint of closed loop phase control and allows the beginning of scanning to be detected. An extremely simple sequential controller is therefore sufficient to produce the phases of control of the step-by-step motor on the basis of a single transfer signal "PHgr"TG.
The controller can therefore advantageously consist of sequential electronics comprising flip-flops for generating two phases of control of the stepper motor.
Furthermore, to ensure that the video signal and the transfer signal "PHgr"TG are in phase, the device according to one aspect of the invention advantageously comprises means for prior adjustment of the angular position of the body of the step-by-step motor.
To this end, the body of the stepper motor is advantageously sandwiched between two stationary elements in which the bearings of said stepper motor are rotatably mounted, the adjustment means comprising means for fixing the body of said motor to at least one of said stationary elements after prior adjustment of the angular position of said body.
In addition, according to an advantageous embodiment, the axis of rotation of the polygonal mirror is inclined to the edges of the facets by an angle xcex1 adapted such that each facet creates a shifted scanning line parallel to that created by the adjacent facets.
This arrangement allows the scanning lines generated by each facet to be shifted in a very simple manner so that the code can be scanned in a direction parallel to the bars of the symbol.
The angle xcex1 of inclination of the axis of rotation of the rotating polygon is advantageously substantially equal to one quarter of the angle subtended by the edges delimiting a facet.
According to a second advantageous variation relating to a device comprising, conventional CCD technology, a clock emitting a pixel signal "PHgr"pix for sequential reading of each image acquired by the sensor, wherein:
the cyclic deflector can take the form of an oscillating mirror coupled to the driver to oscillate the cyclic deflector with a predetermined amplitude between two extreme positions,
the closed loop control circuit of the driver comprises:
a counter incremented by the signal "PHgr"pix for sequential reading and adapted to be reset to zero during the emission of a transfer signal "PHgr"TG,
a comparator configured to compare the value of the counter with a stored value obtained by prior learning and representative of the phase displacement required to obtain the phase synchronization of the beginning of each scanning cycle with the signal "PHgr"TG, said comparator emitting a phase synchronization signal when the stored value corresponds to the value in the counter,
a controller coupled to the driver and receiving the transfer signal "PHgr"TG and the phase synchronization signal and adapted to synchronize said driver with said transfer signal "PHgr"TG.
According to this variation employing an oscillating mirror, the transfer signal "PHgr"TG is used to control the phase and speed of the oscillations of said mirror.
Moreover, the pixel signal "PHgr"pix associated with the counter and the comparator allows the phasing of the video signal and the transfer signal "PHgr"TG on the basis of a stored phase displacement value obtained in a prior learning phase.
Furthermore, according to this variation, the controller for the driver advantageously comprise electronics containing flip-flops D for generating oscillating mode control signals for the driver.
Further characteristics, aims and advantages of the invention will emerge from the following detailed description given with reference to the accompanying drawings which show non-limiting examples of a preferred embodiment of a laser technology read module according to the invention as well as three variations of closed loop control circuit according to various aspects of the invention.

Optoelectronic device for acquiring images of planes, such as bar code symbols


A headset for virtual reality applications includes an array of light emitting diodes (LEDs) emitting light captured by a camera included in a virtual reality system, allowing the virtual reality system to detect the position and orientation of the headset in three-dimensional space. To manufacture the headset, a flexible strip including a circuit having the LEDs is molded into an outer shell of the headset using a casting material that is transmissible to wavelengths of light transmitted by the LEDs. An interior surface of the outer shell of the headset is within a specified distance of the LEDs. The outer shell may also include fabric that is also molded into the outer shell in the same or in a similar process.

This disclosure relates generally to manufacturing processes, and more specifically to overmolding a light emitting diode (LED) array into a casting material.
Virtual reality systems rely on accurately tracking users to provide realistic content to the users. Many virtual reality systems track users by mounting light emitting diodes (LEDs) onto a headset worn by a user that presents virtual reality content to a user so a camera included in the virtual reality system may detect the position and orientation of the headset in three-dimensional space based on the light signals transmitted by the LEDs and captured by the camera. Current manufacturing techniques manually place a flexible array of LEDs onto a headset and affix the flexible array of LEDs to the headset with glue. However, manually affixing and adhering flexible arrays of LEDs to headsets result in high labor costs, greater variation in positioning of the LEDs on the headsets, and additional material between the flexible array of LEDs and the surface of the headset. Greater variation in the positions of LEDs on the headset may impair calibration of the virtual reality system to a position of the headset, which impairs subsequent tracking of the headset by the virtual reality system. Errors in tracking the headset may reduce the accuracy or quality of content provided via the headset by the virtual reality system.
Additionally, some headsets may have fabric attached to an outer surface of the headsets. Conventional manufacturing processes wrap the fabric around the headset after the headset has been molded. However, this is labor-intensive and imprecise, resulting in low yields and increased risk of deformation from creep.

Overmolded LEDs and fabric in virtual reality headsets


A method for manufacturing CBRAM switching elements and CBRAM semiconductor memories with improved switching characteristics so as to remove superfluous, weak, cluster-like, or unbound selenium at the surface of a GeSe layer is solved by the present invention in that, after the generation of an active matrix material or GeSe layer, respectively, a reactive sputter etching process is performed in which the surface layer of the active matrix material or GeSe layer, respectively, is removed at least partially so as to modify the surface structure thereof.

In a semiconductor memory device, a cell field consisting of a plurality of memory cells and a matrix of column and row supply lines or word and bit lines, respectively, is usually built up. The actual memory cell is positioned at the crosspoints of the supply lines that are made of electroconductive material. The column and row supply lines or word and bit lines, respectively, are each electrically connected with the memory cell via an upper or top electrode and a lower electrode or bottom electrode. To perform a change of the information content in a particular memory cell at the addressed crosspoint, or to recall the content of the memory cell, the corresponding word and bit lines are selected and impacted either with a write current or with a read current. To this end, the word and bit lines are controlled by appropriate control means.
A plurality of kinds of semiconductor memories are known, e.g. a RAM (Random Access Memory) comprising a plurality of memory cells that are each equipped with a capacitor which is connected with a so-called selection transistor. By selectively applying a voltage at the corresponding selection transistor via the column and row supply lines, it is possible to store electric charge as an information unit (bit) in the capacitor during a write process and to recall it again during a read process via the selection transistor. A RAM memory device is a memory with optional access, i.e. data can be stored under a particular address and can be read out again under this address later.
Another kind of semiconductor memories are DRAMs (Dynamic Random Access Memory) which comprise in general only one single, correspondingly controlled capacitive element, e.g. a trench capacitor, with the capacitance of which one bit each can be stored as charge. This charge, however, remains for a relatively short time only in a DRAM memory cell, so that a so-called "refresh" must be performed regularly, e.g. approximately every 64 ms, wherein the information content is written in the memory cell again.
Contrary to this, the memory cells of so-called SRAMS (Static Random Access Memories) usually comprise a number of transistors each. In contrast to DRAMs, no "refresh" has to be performed in the case of SRAMs since the data stored in the transistors of the memory cell remain stored as long as an appropriate supply voltage is fed to the SRAM. Only in the case of non-volatile memory devices (NVMs), e.g. EPROMs, EEPROMs, and flash memories do the stored data remain stored even when the supply voltage is switched off.
The presently common semiconductor memory technologies are primarily based on the principle of charge storage in materials produced by standard CMOS (complement metal oxide semiconductor) processes. The problem of the leaking currents in the memory capacitor existing with the DRAM memory concept, which results in a loss of charge or a loss of information, respectively, has so far been solved insufficiently only by the permanent refreshing of the stored charge. The flash memory concept underlies the problem of limited write and read cycles with barrier layers, wherein no optimum solution has been found yet for the high voltages and the slow read and write cycles.
Since it is intended to accommodate as many memory cells as possible in a RAM memory device, one has been trying to realize them as simple as possible and on the smallest possible space, i.e. to scale them. The previously employed memory concepts (floating gate memories such as flash und DRAM) will, due to their functioning that is based on the storing of charges, presumably meet with physical scaling limits within foreseeable time. Furthermore, in the case of the flash memory concept, the high switching voltages and the limited number of read and write cycles, and in the case of the DRAM memory concept the limited duration of the storage of the charge state, constitute additional problems.
As approaches for solving these problems, so-called CBRAM (CB=Conductive Bridging RAM) memory cells have recently become known in prior art, in which it is possible to store digital information by a resistive switching process. The CBRAM memory cell may be switched between different electric resistance values by bipolar electric pulsing. In the simplest embodiment, such an element may be switched between a very high (e.g. in the GOhm range) and a distinctly lower resistance value (e.g. in the kOhm range) by applying short current or voltage pulses. The switching rates may be less than a microsecond.
In the case of CBRAM memory cells, an electrochemically active material, e.g. a so-called chalcogenide material of germanium (Ge), selenium (Se), copper (Cu), sulphur (S), and/or silver (Ag) is present in a volume between a first electrode or top electrode and a lower electrode or bottom electrode, for instance, in a GeSe, GeS, AgSe, or CuS compound. The abovementioned switching process is, in the case of the CBRAM memory cell, based on principle on the fact that, by applying appropriate current or voltage pulses of specific intensity and duration at the electrodes, elements of a so-called deposition cluster continue to increase in volume in the active material positioned between the electrodes until the two electrodes are finally bridged in an electroconductive manner, i.e. are electroconductively connected with each other, which corresponds to the electroconductive state of the CBRAM cell.
By applying correspondingly inverse current or voltage pulses, this process may be reversed again, so that the corresponding CBRAM memory cell can be returned to a non-conductive state. This way, a "switching over" between a state with a higher electroconductivity of the CBRAM memory cell and a state with a lower electroconductivity of the CBRAM memory cell may be achieved.
The switching process in the CBRAM memory cell is substantially based on the modulation of the chemical composition and the local nanostructure of the chalcogenide material doped with a metal, which serves as a solid body electrolyte and a diffusion matrix. The pure chalcogenide material typically has a semiconductor behavior and has a very high electric resistance at room temperature, said electric resistance being by magnitudes, i.e. decimal powers of the ohmic resistance value higher than that of an electroconductive metal. By the current or voltage pulses applied via the electrodes, the steric arrangement and the local concentration of the ionically and metallically present components of the mobile element in the diffusion matrix is modified. Due to that, the co-called bridging, i.e. an electrical bridging of the volume between the electrodes of metal-rich depositions, may be caused, which modifies the electrical resistance of the CBRAM memory cell by several magnitudes in that the ohmic resistance value is reduced by several decimal powers.
The surfaces of vitreous GeSe layers of the chalcogenide material that are deposited by means of sputtering methods have an amorphous structure and frequently contain superfluous selenium that is poorly bound with respect to the valency bond with germanium. In a method that his known from the document U.S. 2003/0155606, a tempering process is performed at 250° C. in an oxygen atmosphere to oxidize the selenium at the layer surface of the GeSe layer and to evaporate it. The disadvantage of this method consists in that the entire memory device is heated with this tempering, so that an undesired modification of the layer characteristics or interface interdiffusions may occur.
Moreover, the thermal energies that are employed with this method for dissolving the selenium agglomerations lie within the meV range. In this energy range, however, only those selenium atoms that are very weakly bound, i.e. that are practically unbound, can be deactivated or solved out. Weakly bound selenium atoms or selenium atoms that are conglomerated like clusters cannot be removed with this known method and thus lead to the formation of AgSe conglomerates in the Ag doping and electrode layer.
In another method known from U.S. 2003/0045049, the treatment of the surface with an oxygen or hydrogen plasma or other chemicals is suggested so as to generate a passivation layer on the GeSe layer. The only object of this method, however, is to form a passivation layer at the surface of the Ag-doped GeSe layer. The oxide passivation layers that are formed with different oxygen treatments tend to crystallize at low temperatures already. The oxide layer therefore does not behave chemically inert to the Ag electrode, i.e. the formation of silver oxide may take place at the interface of the Ge oxide layer with the Ag electrode, which is of disadvantage for the function of the CBRAM memory cell. Furthermore, the passivation layer that has to be sufficiently chemically compact to be able to prevent the formation of conglomerates also forms an electronic barrier modifying or preventing the contact to the top electrode and thus the switching behavior.

Method for manufacturing a CBRAM semiconductor memory


This invention relates to a process for reducing fouling of equipment used in fluidized bed thermal conversion processes such as fluid coking and FLEXICOKING™. Acoustic energy is used to acoustically agglomerate fine mists created during the coking process. The agglomerated mists are then carried along with the circulating coke instead of depositing on coking equipment.

Fluidized bed coking is a thermal conversion process in which heavy petroleum feeds are thermally cracked in a fluidized bed to form cracked vapor products and solids. In fluid coking and the fluidized bed coking process known as FLEXICOKING™, the thermally cracked vapors are typically passed through cyclones to separate coke fines entrained in the vapors and then through a scrubber. Some of the vapor formed by thermal cracking condenses and deposits on coke circulating in the thermal cracking unit and on various process equipment such as reactors, heat exchangers, reboilers, transfer lines, cyclones and fractionators. Subsequent thermal conversion of the condensed vapors converts them to coke. The process whereby coke is deposited on process equipment is known as fouling. The fluid coking process uses a fluidized bed reactor in which the thermal cracking reactions take place and a burner. The FLEXICOKING™ process uses a similar coking reactor together with a heater and gasifier. The specific configuration of the fluidized bed coking unit is not critical to the present invention.
Fouling is a major operational problem because fouled equipment must be shut down and periodically cleaned to remove coke deposits. Cleaning may be by mechanical means, such as pigging or by spalling/steam spalling, whereby the unit temperature is raised and lowered through several cycles causing coke deposits to break up due to differences in respective thermal expansion coefficients. Spalling may be followed by steam injection at high temperatures. Fouling has been addressed by the addition of chemical anti-foulants, use of scouring coke and by control of process conditions such as residence times and temperature differences, e.g., super heat.
Acoustic agglomeration is based on the use of sound to agglomerate small particles in the micron and sub-micron range present in aerosols. The thus agglomerated particles are more susceptible to conventional separation techniques such as cyclones, filters and the like, and to the return of agglomerated particles to the reactor phase. Acoustic sound waves are used to increase the relative molecular motion of the fine particles. This, in turn, results in more frequent collisions in which as least some of the particles stick together forming larger particles. The overall effect of acoustic treatment is to shift the median particle size of the aerosol to larger values. Acoustic agglomeration has been applied to particles in gases such as coat dust, fines from internal combustion engines and fly ash to make the particles larger and thus more susceptible to conventional separation techniques as noted above.

Acoustic agglomeration to reduce fouling in thermal conversion processes

ExxonMobil Research and Engineering Company


A system for locating geographic points on maps, charts and, the like uses a rectangular grid with sides tangent to the corresponding geographical extremities of the area (city, county, state, nation, etc.) represented on the chart. Two decimal scales extend from the zero ordinate of the grid, with unit ordinates at their opposite ends. Thus, a location along either scale and therefore a line of position across the enclosed geographical area represented, may be defined by a decimal number between zero and one and the intersection of the lines of position representing a point on the represented area may be defined by a two decimal array. Tables of the decimal arrays for specific points may be provided, and the system is extendible to different maps and/or insets of dissimilar scale, so long as the, decimal scales are consistently used between each map. The system may be further extended to provide point location within three dimensional volumes by using a three decimal array. The advantages of the system are numerous, including ease of visualization and ease of reading maps and charts of all types in general; ease of teaching geography and related subjects; and wide spread applicability to other areas.

The development of geodesy and cartography have led to the further development of various systems for defining the location of specific points on the surface of the earth or on a representative map or chart. Two primary principles of point location have been developed: The polar coordinate system (e.g., degrees of latitude and longitude) and the Cartesian coordinate system of ordinates about a set of orthogonal axes.
Of the two, the Cartesian coordinate system is preferred for use with flat surfaces such as conventional maps and charts. The problem with the polar coordinate system is that it is based upon an angular measurement; hence, absolute distances increase with the distance from the origin. The inherent problems associated with this system are apparent on larger scale maps and charts.
As a result, most makers of maps and charts for the layman nave used a Cartesian coordinate or "grid" system to specify locations on the map. The various systems developed are arbitrary at best, and provide no clear transfer from one map to specify another, particularly in the case of maps or charts made by different companies. The most commonly used system is an alphanumeric one, in which a series of numbers are used to define points along one axis and a series of alphabetical letters are used to define points along a second perpendicular axis. While this system is superior to the polar coordinate system for use with maps representing a relatively small area of the surface of the earth (e.g., a single state road map or the like), the alphanumeric notation used provides no rapid and clear concept of the location of a point on that map. A designation such as "M-13" is, of no value to a person, unless that person also knows the limits of the notation scales used. In the above example, an area within a grid column "M" may be on the centerline of the defined map, if the entire alphabet is used. On the other hand, if only the first half of the alphabet is used, then the area will lie somewhere very near one edge. In addition, such conventional systems describe only a general area, rather than pinpointing a specific location as in the case of the present invention. Thus, a user of such a conventional system would be forced to search a relatively large rectangular area of a map in order to find a point identified as being located in (for example) area "M-13." In fact, it is likely that a plurality of point" of interest will be located in such a single rectangular area, with each point of interest having the same general location description even though they may be widely separated. This can lead to less than optimum choices in routes and other logistic decisions if planning is based upon a callout for a single general area containing several widely spaced points.
Such alphanumeric systems are limited in another respect, and that is that at least along the axis using letters of the alphabet, no more resolution than that provided by the 26 characters of the alphabet may be provided. If resolution to 100 units is desired, some additional system must be added. Other deficiencies are apparent with these commonly used reference systems, which render such systems cumbersome and confusing to the user.
The need arises for a coordinate system for use with maps, charts and the like, which system is easily understandable by the user and which is easily transferable between various maps and scales. The system must also easily accommodate the location of points in a three dimensional volume. Due to the ease of use of such a system, the teaching of the system to others and visualization of locations would also be readily achieved.


Collection content classifiers classify computer files and other collection content in accordance with predetermined classification specifications. In operation, collection content classifiers dynamically discover collection content members, assign data types to content members, associate symbolic actions with content members, determine processing dependencies among content members, and return organized classification information to calling programs for subsequent use in processing content members. Collection content classifiers thereby improve the productivity of human knowledge workers by enabling the construction of smart, collection-aware application programs that can perform more extensive, more complex, and more automated collection processing operations than were previously possible.

The general problem addressed by this invention is the low productivity of human knowledge workers who use labor-intensive manual processes to work with collections of computer files. One promising solution strategy for this software productivity problem is to build automated systems to replace manual human effort.
Unfortunately, replacing arbitrary manual processes performed on arbitrary computer files with automated systems is a difficult thing to do. Many challenging subproblems must be solved before competent automated systems can be constructed. As a consequence, the general software productivity problem has not been solved yet, despite large industry investments of time and money over several decades.
The present invention provides one piece of the overall functionality required to implement automated systems for processing collections of computer files. In particular, the current invention has a practical application in the technological arts because it provides both humans and software programs with useful information about the contents of collections that require processing.
Problems to be Solved
The Collection Content Classification Problem is one important problem to solve to enable the construction of automated collection processing systems. It is the problem of how to determine collection content members, content types, content processing actions, and content processing interdependencies. Solving the Collection Content Classification problem is important because a solution would enable application programs to process collections of computer files in more powerful, more automated ways than were previously possible.
Some interesting aspects of the general Collection Content Classification problem are these: arbitrary collection types may be involved, containing arbitrary internal structures and numbers of internal products, and arbitrary product types. Arbitrary numbers of files and file types may be involved, requiring arbitrary content processing actions, platform dependent processing actions, and various administrative preferences for all of the above. The general Collection Classification Problem is not a simple problem.
The Collection Multiple Product Problem is another important problem. It is the problem of how to represent multiple collection output products within one collection. This problem is important because it is both intuitive and practical to create several output products from one set of related collection content files. Without a solution to the multiple product problem, a separate collection instance would be required for each desired product, thereby increasing software complexity and maintenance costs.
Some interesting aspects of the multiple product problem are these: an arbitrary number of collection products may be involved, each product may have an arbitrary product type and product content, and an arbitrary set of required product-level, platform-dependent processing actions.
The Collection Content Membership Problem is another important problem. It is the problem of how to dynamically determine what directories and files are part of a collection. This problem is important because manually enumerating collection content files is a tedious, error prone, and non-scalable method.
Some interesting aspects of the Collection Content Membership problem are these: collection content files can belong to separate products on different platforms, content files can be shared among multiple products and platforms, content files can be ignored for particular products and platforms, and content files can be stored outside the host collection subtree for various products and platforms.
The Collection Special Fileset Problem is another important problem. It is the problem of how to identify special content files and then process them in special ways. For example, the normal way to compile Fortran source code files is with code optimization enabled, but some Fortran source files are so big that they cannot be optimized. Therefore a mechanism is needed to process a few large Fortran files out of many in a special way, with code optimization turned off. Without a solution to the Collection Special Fileset problem, automated collection processing systems cannot process special content file cases. This is a significant limitation in real-world industrial software environments, which invariably have special processing situations.
Some interesting aspects of the Collection Special Fileset problem are these: many special files may be involved, although typically only a few files out of many are involved, multiple sets of special files may be involved, and special processes for the special files may range from simple to complex, or similar to very different from the norm.
The Collection Content Type Assignment problem is another important problem. It is the problem of how to dynamically determine a content type for each collection content file. A solution to this problem is important because content types are the primary means for determining automated processing actions for processing content files. Without a proper content type assignment, automated systems cannot easily make decisions on how to process content files.
Some interesting aspects of the Collection Content Type Assignment problem are these: large numbers of content files may be involved, arbitrary user-defined content types must be supported, type assignment methods must not fail on missing filename suffixes, and type assignment mechanisms must use internal parseable type-marker strings when necessary.
The Collection Action Assignment problem is another important problem. This is the problem of how to associate collection content files with appropriate automated file processing actions.
Some interesting aspects of the Collection Action Assignment problem are these: arbitrary processing actions for files, filesets, and products must be supported, processing actions must be chosen in accordance with collection, product, and content types, and processing actions must be sharable, customizable, extensible, and fully user-definable.
The Collection Content Dependency problem is another important problem. This is the problem of how to determine processing dependencies for collection content members. This problem is important because collection content files must be processed in accordance with interdependencies among content files in order to produce valid collection product results.
Some interesting aspects of the Collection Content Dependency problem are these: dependencies exist among files, such as source files depending on include files, dependencies exist among products, such as program products depending on the existence of library products for linking purposes, and dependencies must sometimes be calculated for unknown languages, so an extensible mechanism for dependency calculation is required.
General Shortcomings of the Prior Art
A professional prior art search for the present invention was performed, but produced no meaningful, relevant works of prior art. Therefore the following discussion is general in nature, and highlights the significant conceptual differences between file-oriented mechanisms in the prior art and the novel collection-oriented mechanisms represented by the present invention.
Prior art approaches lack support for collections. This is the largest limitation of all because it prevents the use of high-level collection abstractions that can significantly improve productivity.
Prior art approaches lack collection content listing means to dynamically determine collection content members of each collection product, thereby requiring the use of manually constructed content lists, and increasing software maintenance costs.
Prior art approaches lack collection content typing means to dynamically determine data types for collection content members, thereby preventing flexible, scalable, and automated processing of content according to data type.
Prior art approaches lack extensible collection content dependency means to dynamically determine processing dependencies for collection content members, thereby preventing the easy extension of automated dependency calculations to new programming languages.
Prior art approaches lack product build order means for dynamically determining relative product build order of multiple products within a single collection, thereby preventing the proper construction of multiple collection products.
As can be seen from the above description, prior art mechanisms in general have several important disadvantages. Notably, general prior art mechanisms do not support collections, symbolic content types, or action assignment based on content types. These are the most important limitations of all.
In contrast, the present collection command applicator invention has none of these limitations, as the following disclosure will show.
Specific Shortcomings in Prior Art
Several examples of prior art approaches that classify sets of related computer files are discussed below. The examples fall into two main categories: makefile generator programs and integrated development environment (IDE) programs. Both types of programs classify a list of source files so that the files can be processed efficiently in an automated manner.
Prior Art Makefile Generators
Makefile generator programs generate makefiles for humans who are building software programs. Typically, makefiles contain computer instructions for compiling source code files and linking compiled object files to produce executable files or libraries of object files. In addition, programmers typically include a variety of other useful command sequences in makefiles to increase productivity.
Examples of popular freeware makefile generators include automake, imake, and mkmf (make makefile). Although each program is useful, each program has several important classification shortcomings.
Automake has no dynamic content discovery mechanism; instead it requires programmers to manually list all files that require processing. Neither does it have a mechanism for sharing classification information, so multiple automake files cannot easily share user-provided information. Finally, it uses an input file that must be manually constructed, and so its classification operations are not fully automated.
Imake has no dynamic content discovery mechanism; instead it requires programmers to manually list all files that require processing. It also uses an input file that must be manually constructed, so its classification operations are not fully automated.
Mkmf does have a dynamic content discovery mechanism that dynamically includes all source files in the current directory in the output makefile. However, only the current directory is used to find source files; no other directories are supported. Significantly, all source files in the directory are included, whether they should be included or not. This forces programmers to unnaturally restrict the directory contents to only those file that should be discovered by mkmf. Finally, all files are used to build one product only; files cannot be grouped into multiple products.
Thus these makefile generators, which are characteristic of the prior art, have significant content classification limitations.
Prior Art IDEs
Integrated development environments integrate many software development tools such as editors, compilers, linkers, debuggers, and online documentation into one application program environment. Many IDE programs contain an internal makefile generator to generate makefiles to control the software build process.
However, integrated development environments do not typically have dynamic content discovery mechanisms. Instead, programmers are required to manually identify interesting files for inclusion in the IDE project file. Therefore IDE classification operations are not fully automated. In addition, IDE programs do not typically provide user-customizable means for assigning particular data types to whole projects, or to files within those projects. Thus IDE programs lack user-definable and sharable classification type definition information.
As can be seen from the above descriptions, prior art approaches have several important disadvantages. In contrast, the present collection content classifier invention has none of these limitations, as the following disclosure will show.

This patent is subject to a terminal disclaimer.


A non-volatile memory device including a cell array region formed having a plurality of parallel bit lines, a plurality of parallel word lines, a plurality of memory cells, and a plurality of common source lines, the plurality of bit lines being orthogonal to the plurality of word lines, each of the memory cells being connected to a bit line and a word line and having a stacked gate comprised of a floating gate and a control gate and a source/drain region, the plurality of common source lines being parallel to the plurality of bit lines. The non-volatile memory device also includes a peripheral circuit region for driving the memory cells in the cell array region is formed. The cell array region includes one or more bulk bias contact structures for maintaining the voltage of a bulk region in which the cell array region is formed, at or below a predetermined voltage. The non-volatile memory device can uniformly maintain the voltage of a bulk region regardless of the position of memory cells without increasing the area of a cell array.

1. Field of the Invention
The present invention relates to a non-volatile memory device and a method of fabricating the same, and more particularly, to a non-volatile memory device having a bulk bias contact structure in a cell array region.
2. Description of the Related Art
Non-volatile memory devices are widely used for computers or memory cards because the non-volatile memory devices retain information stored in their memory cells even when no power is supplied.
Phenomena affecting the operating characteristics of non-volatile memory devices will be described with reference to FIG. 1 which is a partially-magnified circuit diagram of non-volatile memory devices. When a cell indicated by reference character A is to be selectively programmed, a program voltage VPG, for example, 10 to 15 V, is applied to a selected word line WL1 which is connected to the cell A, and a voltage of about 5 V is applied to a selected bit line BL1 which is connected to the cell A. A non-selected bit line BL2 is connected to a cell that is adjacent to the selected cell A and shares the word line WL1 with the selected cell A. The non-selective bit line BL2 is floated. Also, a non-selected word line WL2 is connected to a cell B that is adjacent to the selected cell A and shares the bit line BL1 to which about 5 V is applied, with the selected cell A. The non-selected word line WL2 is grounded. When the cell A is selectively programmed as described above, an electrical field in the channel region under the gate of the selected cell A remarkably increases in a pinch-off region around the drain of the selected cell A, so that electrons within the channel are accelerated by this strong electrical field and easily achieve in a high energy state. The electrons in a high energy state collide with a silicon lattice in a bulk region, generating a plurality of electron-hole pairs. Some electrons with high energy, among electrons and holes, generated by impact ionization, are injected into a floating gate via a tunnel oxide film by a gate electrical field, and the other electrons, i.e., most of the electrons, are led to the drain by a strong drain electrical field, and become part of the drain current. At this time, holes are pushed in the opposite direction to the electrons by the drain electrical field, and flow into a source terminal or bulk terminal via a depletion layer or a bulk region under a channel. Therefore, hole current, that is, bulk current IBULK, flows via the drain of the selected cell A and a bulk region. The bulk current IBULK increases a bulk voltage due to bulk resistance RBULK. When a bulk voltage becomes 0.6 V or more due to a large bulk resistance RBULK, a p-n junction between a source region, which is a ground node, and a substrate is forward biased, and thus undesired forward current is generated, thereby causing a snap back phenomenon in which cell current rapidly increases. Hence, cells may abnormally operate, or the junctions of cells may be destroyed by excessive current.
Meanwhile, a voltage VFG which is induced in the floating gate of the non-selected cell B is expressed by Equation 1 using a cell equivalent circuit shown in FIG. 2:
VFG=(CDxc3x97VD)+(CIPO+CD+CB+CS)xe2x80x83xe2x80x83(1)
wherein CIPO is the capacitance between a control gate and a floating gate, CD is the capacitance between the floating gate and drain, CS is the capacitance between the floating gate and source, CB is the capacitance between the floating gate and a bulk region, and VD is a voltage which is applied to the drain, i.e., a voltage which is applied to a bit line. Equation 1 refers to the case in which the control gate voltage VCG, the source voltage VS and the bulk voltage VB of the non-selected cell B are assumed to be 0 V.
It can be seen from Equation 1 and FIG. 2 that the voltage VFG which is induced in the floating gate of the non-selected cell B is proportional to a voltage which is applied to the bit line BL1. If the non-selected cell B is an over-erased cell having a threshold voltage of a predetermined level or less (about 1 V), when a voltage of about 5 V is applied to the bit line BL1 to program the cell A, a predetermined voltage is induced in the floating gate of the non-selected cell B, which may turn on the cell B. This is referred to as a drain turn on (DTO) phenomenon which causes leakage current, i.e., drain turn on current IDTO, to flow from the bit line BL1 into a common source line CSL via the cell B. Once the cell B is turned on by the DTO phenomenon, the voltage of the bit line BL1 is reduced. This causes difficulty in programming the selected cell A. In addition, the DTO current IDTO increases with an increase in the number of non-selected cells connected to a bit line. Also, the DTO phenomenon becomes more serious as the bulk voltage is increased by the bulk current IBULK in the selected cell A.
In order to solve the above problem, a bulk bias contact structure is formed to prevent a bulk voltage from increasing by discharging current which flows into the bulk region of cell transistors by applying a bias voltage to the bulk region. As shown in FIGS. 3 and 4, a conventional bulk bias contact is formed in the shape of a guard band 3 that surrounds a cell array region 1. Alternatively, as shown in FIGS. 5 and 6, the conventional bulk bias contact may be formed in the shape of a bulk bias contact structure 5 on peripheral circuit regions corresponding to four corner regions of the cell array region 1 or corresponding to two corner regions among the four comer regions of the cell array region 1. The bulk bias contact structure 5 can solve the defect of the guard band 3 which increases the area of the entire chip, because of its wide layout area. However, in unit cells which are distant from the bulk bias contact structure 5, a large amount of bulk resistance is exhibited because of the long discharge path of the bulk current. Thus, the discharge effect of the bulk current is reduced, and the discharge effect of the bulk current is not uniform with respect to the position of unit cells.
A bulk bias contact structure, a guard band, an electro-static discharge prevention bulk bias contact structure, or the like have been formed in the active region of the peripheral circuit regions, in addition to the bulk bias contact structure in the cell array region for preventing the bulk voltage therein from being increased. The bulk bias contact structure maintains the bulk voltage of peripheral circuit regions at or below a predetermined voltage. The guard band prevents a latch-up phenomenon, or the like, which occurs between transistors for peripheral circuits.
As shown in FIG. 7, conventional bulk bias contact structures for maintaining the bulk voltage in a cell array region or peripheral circuit region at or below a predetermined voltage, are formed in the active region between isolation films 30xe2x80x2 which are formed in the peripheral circuit regions on a semiconductor substrate 10. Specifically, a region 40 doped at high concentration with impurities of a conductivity type that is the same as the conductivity type of the impurities of a bulk region, is exposed. And a contact hole between interlayer dielectric layers 34xe2x80x2 is filled with a metal film pattern 50, thereby completing the formation of the bulk bias contact structure. In order for the bulk bias contact structure to have a sufficient contact area, the area of the active region must be increased in consideration of the so-called bird""s beak phenomenon in which the isolation films 30xe2x80x2 grow toward the active region, upon layout. That is, in FIG. 7, the length of an actually-formed active region is d1, but the active region must be increased to a length of d2 upon layout. Therefore, an active region of a predetermined length d2 or greater is required to complete the bulk bias contact structure. As a result, the area of the entire chip increases by the length of the active region, inhibiting high integration of semiconductor devices.
An object of the present invention is to provide a non-volatile memory device which an maintain a bulk voltage at or below a predetermined voltage by rapidly discharging bulk current and has a uniform bulk current discharge effect regardless of the position of unit cells.
Another object of the present invention is to provide a non-volatile memory device which can be highly integrated by reducing a chip area by minimizing a layout area for forming a bulk bias contact structure.
To achieve the first object, the present invention provides a non-volatile memory device including a cell array region having a plurality of parallel bit lines, a plurality of parallel word lines, a plurality of memory cells, and a plurality of common source lines, the plurality of bit lines being orthogonal to the plurality of word lines, each of the memory cells being connected to a bit line and a word line and having a stacked gate comprised of a floating gate and a control gate and source/drain region, the plurality of common source lines being parallel to the plurality of bit lines. The non-volatile memory device also includes a peripheral circuit region for driving the memory cells in the cell array region is formed. The cell array region includes one or more bulk bias contact structures for maintaining the voltage of a bulk region in which the cell array region is formed, at or below a predetermined voltage.
Preferably, the one or more bulk bias contact structures are formed on the semiconductor substrate exposed by removing an isolation layer from a predetermined place of the cell array region.
The bulk bias contact structure is connected to common source lines, and thus the common source lines also act as bulk bias lines. In another aspect, the bulk bias contact structure is connected to bulk bias lines which are independent of common source lines. At this time, it is preferable that the bulk bias lines are formed at positions where conventional common source lines are formed. Alternatively, the bulk bias contact structure may be connected to dummy bit lines which are formed to reduce the loading effect which is caused upon fabrication.
The distance between a cell and a bulk bias contact of a non-volatile memory device according to the present invention can be significantly reduced without enlarging the area of a memory cell array. Therefore, the voltage of a bulk on which memory cells are formed can be effectively maintained at or below a predetermined voltage.

Nonvolatile memory device having bulk bias contact structure in cell array region


An electronic cigarette includes a liquid storage component and an atomization device. The atomization device includes a hollow spiral tubular electric heater coil and a liquid guiding member passing through the electric heater coil. The liquid guiding member is made from non-glass fiber material. The atomization device further includes a smoke guiding tube passing through the liquid storage component for supporting the same and working as a smoke path. The smoke guiding tube includes an external casing and an internal casing one of which is inserted into another one so as to hold the liquid guiding member between the two. The two ends of the liquid guiding member extend out of the smoke guiding tube and are tightly pressed against an inner wall of the liquid storage component. This kind of electronic cigarette is safe to human body and has stable internal construction.

A prior art electronic cigarette includes a liquid storage member for storage of cigar liquid, an atomization device for converting cigar liquid inside the liquid storage member into smoke, and a power supply device for providing power to the atomization device. The atomization device is generally composed of an electronic heater coil, a liquid guiding member, and a smoke guiding tube with a through hole for flowing of smoke. The liquid guiding member and smoke guiding tube are both made of glass fiber containing silicon dioxide. The glass fiber belongs to inorganic materials. The electronic heater coil is enwound on the liquid guiding member, and both ends thereof are connected with electric wire. After that, the electric heater coil is transversely disposed inside the smoke guiding tube. Next, the exposed ends of the electric wire are connected to the positive and negative electrodes of the power supply device. The liquid guiding member is connected to the liquid storage member so as to absorb cigar liquid. Finally, the cigar liquid is transferred to the electric heater coil through the liquid guiding member. When the electric heater coil is powered, smoke will be atomized to generate smoke. As the liquid guiding member and smoke guiding tube of the atomization device are constructed of inorganic materials formed by a great number of tiny glass fibers enwound together, they are susceptible to breaking, bending and twisting. When the electric heater coil is enwound on the liquid guiding member or secured into the smoke guiding tube, the liquid guiding member or smoke guiding tube will be bent or twisted. During this process, a great deal of glass fiber floccules will stick onto the liquid guiding member or inner wall of the smoke guiding tube. When such an electronic cigarette is assembled completely and used, these floccules will easily enter into mouth, respiratory tract or lung of a person, thus resulting in damage to body health. In addition, the smoke guiding tube constructed of glass fiber is easily broken, bent or twisted, thereby having weak structural stability.

HUIZHOU KIMREE TECHNOLOGY CO., LTD., SHENZHEN BRANCH


A diaper or adult incontinence garment including a backsheet and a sublayer. The sublayer may include one or more acquisition layers and one or more regions having a multitude of through or blind holes. The sublayer may isolate feces away from the skin and at the same time provide liquid acquisition. Certain regions of the sublayer may have a total open area of from 10% to 50% of the total surface area of the sublayer. The holes have an average smallest dimension of at least 3 mm. The sublayer has an average caliper of from 2 mm to 6, and an average caliper loss after wetting and under pressure of 0.3 psi of less than 20%.

It is well known that fecal material is often difficult to remove from the skin of the user, in particular on sensitive skin such as by young babies and the skin around the genitals. Moreover, it is well known that fecal material on the skin can cause irritation and redness of the skin and some times even dermatitis of the skin.
One of the solutions to reduce the fecal material on the skin is to provide a means to isolate the fecal material immediately after discharge, away from the skin. The problem with feces isolation in diapers is that the feces can vary hugely in consistency and viscosity and furthermore that, whilst isolating the feces, the diaper needs to retain its urine absorption capacity.
Hereto, diapers have been suggested with a topsheet with one or more large openings, through which the feces can pass to a void space between the topsheet and the absorbent core. The fecal material is then stored underneath this topsheet, away from the skin.
As alternative, a diaper with a first topsheet with a multitude of small openings has been proposed, allowing low viscosity feces to pass through said openings onto the absorbent core, such that it may be isolated underneath said topsheet and such that the absorbent core may dewater the feces, such as for example described in U.S. Pat. No. 5,342,338. Optionally, a second topsheet with openings may be present, which further allows immobilization of the feces and dewatering of the feces by the absorbent core underneath.
Also various other feces management element that comprise high loft or loop materials have been proposed.
The inventors have now found a very efficient, improved way to provide i) feces isolation and immobilization, ii) reduced re-soiling of the skin by the immobilized feces and ii) good liquid acquisition at the same time. This is achieved by providing an absorbent article, e.g. diaper, comprises a sublayer that comprises at least one, but preferably at least two acquisition layers with holes therein, said holes being capable to receive and store and immobilize feces, and said sublayer being at the same time capable to acquire the liquid (urine). Furthermore, the inventors found that it is important that the sublayer has a certain open areas in order to provide efficient and effective feces immobilization and liquid acquisition at the same time, and that the holes of the sublayer should have a large enough size and caliper to provide enough storage volume for the feces.
Moreover, they found that it is highly important for the sublayers of the present invention, which have a liquid acquisition and possibly even a liquid distribution function, that such sublayers maintain their volume (e.g. caliper) in use, i.e. that the sublayer is pressure resistant and resilient even when wet and even when the user may put pressure on it. The importance of pressure resistant feces management elements and elements with a certain caliper have been described in the art, but there has not been any teaching or realization that such feces management elements should be such that they maintain the same volume after they have acquired liquid (urine).
Thus, a diaper with a sublayer is obtained that provide a better feces immobilization whilst still allowing excellent liquid acquisition and comfortable fit.


Techniques are disclosed to increase the efficiency of multi-party authentication communications protocols. One technique includes a four party authentication method utilizing a general authenticator to store and provide a credit card authentication password and other payment information to an issuing bank and/or other parties involved in the transaction. Other techniques include the use of skeleton messages to minimize the forwarding of information through a forwarding party, the elimination of redundant communications exchanges, the use of a merchant appliance hardware solution to minimize system integration difficulties, and/or the imposition of credit card constraints. The techniques may be used singly or in combination.

Currently, online purchase transactions on the Web suffer from lack of adequate security. Specifically, there are no cardholder authentication schemes that have been widely adopted on the Web. In a typical conventional online purchase transaction, the cardholder submits her credit card type, credit card number, expiration date, billing address, and shipping address, to the merchant. Merchants who participate in e-commerce often use an industry-standard protocol, such as Secure Sockets Layer ("SSL"), to encrypt the data exchanged between the customer's Web browser and the merchant's Web commerce server so that sensitive information such as a credit card number can be securely transmitted from the customer to the merchant. Furthermore, merchants also often register with a Certification Authority ("CA"), such as VeriSign, to enable customers to authenticate the merchant. However, the customer or cardholder is not currently authenticated in online purchase transactions. As such, the risk of customer fraud is significant—some reports have estimated that 20 to 40 percent of online purchase attempts are fraudulent and the Federal Trade Commission has reported that the combined losses to the credit card industry and to cardholders, from unauthorized use of credit cards, exceed $2 billion annually. Because customer liability for fraud is limited to $50 per card under federal law, merchants generally bear the costs of such fraud. When customer fraud does occur, credit card companies often impose a "chargeback" fee on the merchant for the fraudulent transaction. As such, the merchant often loses the initial transaction amount, the cost of the product, the shipping cost, the credit card transaction fee, as well as the chargeback amount.
In order to reduce the risk of customer fraud in online transactions, credit card companies have developed payer authentication schemes that would enable online merchants to protect themselves and minimize their losses due to online credit card fraud. For a cardholder authentication scheme to be adopted by a large user base, it should not be inconvenient, complex, or expensive. For example, in 1997, Visa and MasterCard launched a first generation cardholder authentication scheme called the Secure Electronic Transaction ("SET") authentication protocol. This protocol was never widely adopted by banks because it was too cumbersome to implement or use. As exemplified by the SET experience, difficult integration issues with legacy software systems, large downloads, and long communication exchanges have discouraged merchants, consumers, and banks from participating in an authentication scheme.
A second generation of cardholder authentication schemes now being introduced represents the current state of the art prior to this application. For example, Visa is currently rolling out its "Verified by Visa" service which incorporates an online payer authentication protocol called Three-Domain Secure ("3-D Secure") designed to authenticate a cardholder in substantially real time. With 3-D Secure, merchants install a plug-in software module which is activated when a cardholder enters her purchasing information and selects the "buy" button on the checkout page of the merchant's Web site. If the cardholder is enrolled in the "Verified by Visa" service, a pop-up window will appear on the cardholder's screen prompting her to enter a confidential authentication password. The authentication password is transmitted to the issuing bank, which is thus able to authenticate the cardholder and authorize the transaction for the merchant. Visa announced in September 2001 that online merchants who participate in "Verified by Visa" would face no liability for any transaction processed by the service. Other credit card companies have also developed their own services to minimize online credit card fraud. For example, in May 2001, MasterCard announced its Secure Payment Application ("SPA") service, which combines a server based e-wallet and an applet downloaded onto the cardholder's PC to authenticate the cardholder.
Since all of the foregoing authentication schemes involve at least three parties, we shall for convenience refer to the class to which they belong as three party authentication methods ("3PAM"). In a 3PAM scheme the following four steps may be implemented: (1) the cardholder places an order on the merchant Web site; (2) the cardholder is authenticated by the issuing bank; (3) the issuing bank transmits a validation message to the merchant; and (4) the merchant informs the cardholder of the success of the purchase. While these four steps may be implemented over the Internet (in whole or in part), via, for example and without limitation, the Hypertext Transfer Protocol ("HTTP") or HTTP combined with SSL ("HTTPS"), those skilled in the art will realize that some of these steps could also be performed on a separate proprietary network, for example and without limitation, owned by a credit card company such as Visa or MasterCard.

Enhancements to multi-party authentication and other protocols


A magnetic storage element includes a magnetic nanowire. A cross-section of the magnetic nanowire has first and second visible outlines, the first visible outline has a first minimal point at which a distance from a virtual straight line becomes minimal, a second minimal point at which the distance from the virtual straight line becomes minimal, and a first maximal point at which the distance from the virtual straight line becomes longest between the first minimal point and the second minimal point, and an angle between a first straight line connecting the first minimal point and the second minimal point, and one of a second straight line connecting the first minimal point and the first maximal point and a third straight line connecting the second minimal point and the first maximal point is not smaller than four degrees and not larger than 30 degrees.

Conventionally, a semiconductor memory is designed so that each of the memory cells includes a storage element, a select element, and an information extracting line.
In recent years, shift-register memories have been suggested so as to realize larger memory capacities. This suggestion is based on the concept that only storage elements are arranged at high density, and the system is designed for transferring stored information to the location of a sensor formed in a predetermined site or an interconnect. Accordingly, there is a possibility that the memory capacities can be dramatically increased. In view of the purposes of development of the shift-register memories, placing a control electrode in each bit (each digit) is not desirable, and a shift operation for a desired digit number needs to be performed by adding some function to the entire bit string.
However, accurate shifting of information in all digits is not easy.

Magnetic storage element, magnetic storage device, magnetic memory, and driving method


The present invention relates to an assembly and method for measuring the optical activity of a stimulus of interest. The assembly comprises a source of incident electromagnetic radiation (1), a lens arrangement (2), an input polariser (3), a planar waveguide structure (4) (or an optical fiber), an output polariser (5), a lens arrangement (6) for focussing the output electromagnetic radiation and a detector. The polarisation of the incident electromagnetic radiation relative to the planar waveguide structure (4) is determined by the input polariser (3). The planar waveguide structure in this embodiment comprises a silicon substrate layer (4c) and an absorbent layer (4e). The silicon oxynitride layer (4c) acts as the reference waveguide and the absorbent layer (4e) acts as the sensing waveguide. The sensing waveguide (4e) is exposed in the localised environment (8) to a sample containing the stimulus of interest which is optically active. The adjusted attitude of the output polariser (5) is directly proportional to the optical activity of the stimulus of interest.

Measurements of the degree of rotation of plane polarised light by a sample as a function of wavelength and concentration are important in inter alia the field of biology and biological research. Such measurements of optical activity have formed the basis of optical polarimetry utilised to assess chirality and optical isomerism for over a century and remain important as (in most other respects) optical isomers have identical properties which in general makes them difficult to distinguish or separate. For example, such measurements enable a biologically active optical isomer to be distinguished from its complementary optical isomer which may be biologically inactive.
Techniques relating to optical activity have been extended to include inter alia circular dichroism (CD) spectroscopy in which the behaviour of circularly polarised light is analysed at different wavelengths. When such wavelengths are in the UV region, important data relating (for example) to the structure and folding of proteins can be deduced. This is because the different tertiary structures adopted by protein molecules (especially alpha helical and beta pleated sheets) tend to be asymmetrical and have intrinsic optical properties which can be differentiated in terms of their optical activity. Whilst such data is very useful, its analysis is subject to some ambiguity.


A canonical decomposition (CD) method that includes building a multi-variate linear autoregressive (“MLAR”) model from an original data set or from a reduced set derived by data reduction methods from the original data set. The MLAR analysis is followed by seeking a coordinate transformation of the MLAR model to obtain the best possible match with one or more canonical forms representing relationships among components. For multi-variate data with a truly hierarchical structure, CD accurately extracts the underlying sources of the system.

Multi-variate time series data is abundant in a variety of systems. For example, such data is found in biomedical systems, from spatiotemporal signals such as the electroencephalogram (EEG), to temporal patterns of gene expression observed with gene chip arrays. Multi-variate or multi-channel data refers to measurements of multiple variables or channels (of data) across a common variable (i.e., time). Some examples of multi-variate data include: 16 channels representing 16 different locations on a patient's scalp to measure neural activity, expression levels of 40 different genes, or the brightness of pixels in the rows of an image. While many approaches exist for the analysis of multi-variate data, the most common approach involves first decomposing the data into several independent time series (e.g., using Principal Components Analysis (PCA)). The decomposed time series data is then separately analyzed using e.g., autoregressive modeling, spectral analysis, and other linear and nonlinear techniques. Once the data has been decomposed and analyzed, one can speculate about the nature of the underlying sources of the multi-variate time (temporal) series data.
However, this prior art technique is constrained in that decomposition necessarily assumes that the underlying sources are independent. Accordingly, the prior art technique is not appropriate for real systems in which the underlying sources include independent sources and sources with dependent or dynamic relationships. Dynamic relationships are dependencies among sources or within individual sources that change with respect to a common variable, e.g., time.
Conventional decomposition techniques include PCA, alone or in combination with Varimax Rotations (VR), independent components analysis (ICA), and/or non-negative matrix factorization (NMF). These methods ignore, or do not make use of time series data's causality. Causality is an attribute possessed by some systems, and indicates that one or more components of the system may be the cause of variation in another, perhaps overlapping, set of components. For example, a system that evolves in time possesses causality, in that its behavior at one time may cause variations at a later time. On the other hand, measurements from photographic snapshots of randomly chosen images typically do not possess causality. Another example of causality is that, the value of a stock across time depends on ("is caused by") what happened in the past. PCA assumes that the sources are mathematically independent. In the sense used by PCA, such mathematically independent sources are referred to as orthogonal sources. ICA requires independence of sources in an information-theoretic sense. Sources which are independent in an information-theoretic sense are those in which the value of one source does not provide any information with respect to determining the value of any other source. The Varimax rotation variation seeks a transformation that maximizes the sum of the variances in each extracted source. NMF attempts to find sources whose weights are non-negative (i.e., only adding, not subtracting, of the sources is allowed).
Although the above conventional techniques are suitable for image analysis or for separating independent time series data, they are unsuitable for multi-variate series systems that originate from dynamical interrelated sources via a mixing process. In particular, these conventional methods assume that the order of data points is irrelevant and thus, produce equivalent results for the original, time-reversed, or randomly shuffled data.
Models for the analysis of multi-variate time series data using multi-variate linear autoregression (MLAR) are also known in the art. One such model is described in Granger, C. W. J., "Investigating causal relations by econometric models and cross-spectral methods", Econometrica 37(3) (1969), pp. 424-438, herein incorporated by reference. However, although these methods make use of causality, they do not address the problem of identifying sources and can only be applied when the sources are known, i.e., under the assumption that the observed data series are the sources and that no mixing occurs.
Accordingly, it would be beneficial to design a multi-variate data analysis system and method which accounts not only for the causal relationships of the data sources, but also accounts for a mixing between the sources and the observed data series.

Method and system for analyzing multi-variate data using canonical decomposition


One exemplary embodiment of this disclosure relates to a gas turbine engine including a plate, a frame attached to the plate, and a panel. The panel is supported by the frame.

Gas turbine engines include a core flow path where air is communicated to a combustor section, combined with fuel, and ignited to generate a high pressure exhaust gas stream. Various portions of the engine are directly exposed to this high pressure exhaust gas stream. Some example portions include combustor liners and exit nozzles.
The high pressure exhaust gas stream includes relatively hot gases. The portions of the engine that are exposed to these hot gases include metal plates (e.g., walls, brackets, supports) configured to absorb various structural load in the engine. In one known example, to protect the metal plates from a hot gas path, ceramic matrix composite (CMC) panels are directly mounted to the metal plates with threaded fasteners.