A switching power supply includes input terminals, which receive a first voltage, and a switching converter stage, provided with a first switching device. The power supply further includes a second switching device, connected between the input terminals and the switching converter stage, and an activation device, associated with the second switching device for controlling the second switching device so as to limit a second voltage applied to the switching converter stage.

1. Field of the Invention
The present invention relates to a switching power supply provided with a voltage-limiting device and to a control method thereof.
2. Discussion of the Related Art
As is known, switching power supplies can be used for a wide range of applications of low, medium and high power. In many cases, the nominal input and output voltages and currents are not exceptionally high (the input voltages, for example, are often in the region of 300-500 V). However, in particular operating conditions that also commonly arise, some components must withstand decidedly higher voltage drops. In these cases, it is necessary to use active and/or passive power components, specifically designed for withstanding voltages of up to 1000-1500 V.
For greater clarity, reference will be made to a flyback-type switching power supply, as the one designated by the reference number 1 in FIG. 1.
The power supply 1 comprises an SMPS (Switch-Mode Power Supply) converter stage 2 in flyback configuration, a diode rectifier bridge 3 and a first filter capacitor 4.
A first terminal and a second terminal of the rectifier bridge 3 form a first input 1a and a second input 1b of the power supply 12 and receive an AC input voltage VAC. The rectifier bridge 3 is moreover connected to a first input 2a and to a second input 2b of the SMPS converter stage 2, which is also provided with a first output and a second output, which form, respectively, a first output 1c and a second output 1d of the power supply 1. The first filter capacitor 4 is connected between the first input 2a and the second input 2b of the SMPS converter stage 2.
The SMPS converter stage 2 comprises a transformer 7, having a primary winding 7a and a secondary winding 7b, a main switch transistor 8, here of an NMOS type, a sense circuit 10, an insulation circuit 11, a PWM-control circuit 12 (PWM—Pulse Width Modulation), and a protection circuit 14.
The primary winding 7a of the transformer 7 is connected to the first input 2a of the SMPS converter stage 2 and to a drain terminal of the main switch transistor 8, which has its source terminal connected to the second input 2b. The secondary winding 7b is connected to the first output 1a and to the second output 1b of the power supply 1 through a diode 15 and a second filter capacitor 16, in a conventional way.
The sense circuit 10, the insulation circuit 11 and the PWM-control circuit 12 are cascade-connected between the first output 1a and the second output 1b on one side and a gate terminal of the main switch transistor 8 on the other, so as to form a feedback control loop, which is also of a conventional type. In particular, the PWM-control circuit 12 switches the main switch transistor 8 with a controlled duty cycle so as to present an output voltage VOUT of a predetermined value between the first output 1a and the second output 1b of the power supply 1.
The protection circuit 14 is connected between the terminal of the primary winding 7a of the transformer 7 and is designed to limit the maximum voltage drop on the primary winding 7a itself. Typically, the protection circuit 14 comprises a series of zener diodes 18 and a diode 20 and intervenes in a one-directional way to limit the voltage on the primary winding to a maximum voltage VMAX, for example, of 300 V.
During operation of the power supply 1, the main switch transistor 8 may be subjected to very high voltages. The switch voltage VS between the drain terminal and the source terminal of the main switch transistor 8 is due to a levelled input voltage VINL, to a reflected voltage and to a dispersion voltage of the transformer 7. The levelled input voltage VINL is supplied between the inputs 2a, 2b of the SMPS converter stage 2 and is given by the AC input voltage VAC (more precisely, the levelled input voltage VINL is equal to √{square root over (2)}VAC). Assuming an AC input voltage VAC of 450 V, the levelled input voltage VINL is approximately 630 V. The reflected voltage is due to an imperfect matching of the load and can reach peak values of approximately 300 V. The dispersion voltage of the transformer 7 is limited to the maximum voltage VMAX (300 V) by the protection circuit 14. Consequently, in the most unfavorable conditions, the main switch transistor 8 must be able to withstand a switch voltage VS given by:VS=630+300+300=1230 V
Although current technologies certainly enable construction of active and passive semiconductor components capable of withstanding voltages that are so high, the design and fabrication of such components is, however, much more costly than for components designed to operate with lower voltages.
Use has been proposed of additional components, such as auxiliary switching devices that can be activated in given circumstances, for subtracting part of the voltage applied to the components that operate in the most critical conditions. The solutions so far identified are, however, not flexible and can be used only on some types of power supply.

Switching power supply with voltage limiting device and control method thereof


A card connector includes an insulating housing (1), a number of contacts including a first set of contacts (4) and a second set of contacts (2), and a third set of contacts (3) retained in the insulating housing (1) and a first holding plate (8′) and a second holding plate (8). The insulating housing (1) defines a card receiving space (130) with a card inserting opening along a card inserting direction. The first holding plate (8′) with the first contacts (4) arranged and a second holding plate (8) with the second contacts (2) arranged are assembled to the housing (1). The soldering portions of the second set of contacts (2) are arranged alternately with the soldering portions of the first set of contacts (4) and the third set of contacts (3) respectively.

1. Field of the Invention
The present invention relates to a card connector, especially to a card connector which can accept two or more different cards.
2. Description of Related Art
With development of consuming products, such as digital cameras, PDA (Personal Digital Assistance), portable audio and the like, a lot of different kinds of cards, such as an SD (Super Density, Secure Digital) card, an MMC (Multi-Media Card), an MS (Memory Stick) card and an XD (XD-picture) card etc., are widely used in the field of the consuming products. Because of requirements of miniaturization of the consuming products, a card connector which is adapted for receiving a single card is required to accept two or more different cards so as to downsize overall dimension of the consuming products.
A conventional card connector which can accept more different cards defines a single card receiving space and different contacts exposed into the card receiving space for electrically connecting with corresponding cards. Because the different contacts are receiving in one and the same card receiving space, it is bound to encounter a problem of arrangement of different contacts to design the card connector, namely how to avoid short circuit or Electro Magnetic Interference (EMI) of different contacts which abut against one another to assure better signal transmission and easily manufacture. In addition, the different contacts have different soldering portions soldered on a printed circuit board (PCB), when all the different soldering portions are soldered on different districts of the PCB, it is certain to encounter another coplanar problem of different soldering portions, therefore, increasing difficulty of manufacturing, assembling or soldering of the card connector.
Hence, an improved card connector is required to overcome the problems of the prior art.