A process for computing the coefficients C(i) of an adaptive filter (206) used in an echo-cancellation structure for a telecommunication apparatus. The process is based on the Least Mean Squared (L.M.S.) or gradient algorithm for computing the coefficients of the filter in accordance with the formula: ##EQU1## where e(i) is the estimation error and .alpha. is the step size used for performing an adjustement of the convergence of the filtering process. The process uses two different estimations of the power of the analog signal, a former short-term estimation and a latter long-term estimation in order to derive the appropriate value of the stepsize .alpha. which is used for computing the new coefficients. In the preferred embodiment the value of .alpha. is determined by dividing a constant .alpha..sub.0 being slightly lower than the maximum value ensuring stability of the convergence process by the greater of the two different estimations of the power of the analog signals.

Digital adaptive filtering is widely used in the telecommunication field, particularly for designing equalizers and echo cancellors in modems. A well known technique for achieving adaptive filtering is known as the Least Mean Square (L.M.S.) adaptation process that is also referred to as the "Gradient" method which proved its efficiency and simpleness.
The LMS adaptive filtering process is based on the use of coefficients which are computed in accordance with the following formula: ##EQU2## where e(n) is the estimation error.
The step size .alpha. is used for performing an adjustment of the convergence of the filtering process. Prior art document "Analyse des signaux et filtrage numerique adaptatif" by M. Bellanger, Ed. Masson, 1989, teaches that the value of the step size .alpha. should be computed in accordance with the formula: ##EQU3## where .delta..sup.2.sub.x represents the power of the input signal that is being processed, and .alpha..sub.0 represends a constant.
The skilled man is generally aware that he has to choose the value of .alpha..sub.0 in a range .vertline.0, .alpha..sub.s .vertline. where .alpha..sub.s represents the instability threshold of the system. It can be shown that is .alpha..sub.0 is chosen great (but still inferior to .alpha..sub.s), the convergence speed is high but also with a non satisfactory high residual error. On the contrary, should .alpha..sub.0 be chosen lower, the residual error is rendered lower, but at a cost of a lower convergence speed.
FIGS. 1a and 1b are respectively a one-dimension and two-dimensions graphical representations of the gradient method. More particularly, FIG. 1a shows the representation of the means error e.sup.2 (n) as a function of a single filter coefficient C1. FIG. 1b illustrates the two-dimensional parabolic figure of the mean error e.sup.2 (n) as a function of the two coefficents C1 and C2 characterizing a two-coefficient filter. As shown in FIG. 1b, it appears that from an initial setting ##EQU4## there is a convergence process that makes the vector C.sub.(n) reaching the optimum C.sub.opt which coordinates are C1opt and C2opt. In the theorical representation of FIG. 1b, that any value of .alpha..sub.0 being inferior to .alpha..sub.s ensures the convergence process of C.sub.(n) towards the optimal vector C.sub.opt . However, it should be noticed that this theorical representation is quite satisfactory when the signal being processed has the characteristics of white noise, and appears uncorrelated and stationnary.
However, the real situation is somewhat quite different when voice signals are to be processed by the LSM method. On the contrary to white noise, speech signals are correlated and present local stationarity. The problem of designing equalizers for processing voice signal is addressed in prior art document "Second-order Convergence Analysis of Stochastic Adaptive linear filtering" by Odile Macchi et al, IEEE Trans. on Automatic Control, vol. AC-28, n.sup.o 1, January 83; and, from the same author in document "Convergence Analysis of self-Adaptive Equalizers", IEEE trans. on Information Theory, vol. IT-30, n 2, March 84. Basically, the real situations differ from the theorical and ideal model of FIG. 1b in the existence of some local maxima, that are different from the optimum vector C.sub.opt , and which are likely to disturb the gradient convergence mechanism.
Such real situations are illustrated in FIG. 1c which shows that the residual error might strongly depend on the particular setting conditions ##EQU5## as well as the value of .alpha..sub.0 that is chosen. It was mentioned above, that it was possible to reach the optimum C.sub.opt in the theoretical model with a low value of the residual error. However, in real situations , it appears that a low value of .alpha..sub.0 might in certain circonstances not ensure the convergence towards the optimum vector C.sub.opt because of the existence of the disturbing local optima such as shown in FIG. 1c. Should the filtering mechanism converge towards a local minimum instead of the optimum value, this will result in unsatisfactory value of the residual error. To improve the situation, it is necessary to increase the value of .alpha..sub.0 , thus facilitating the process to diverge from the local maxima which are not the optimum point. However, as mentioned above, the increase of .alpha..sub.0 also causes an increase of the residual error.
Additional difficulties are encountered from the increase of the value of .alpha..sub.0 when processing voice or other non stationary signals in equalizers that are used in the telecommunication field. Indeed, in such signals the actual value of the power .delta..sup.2.sub.x is subject to large fluctuations that actually depend on the vocal message being processed. For instance, vocal signals may exhibit strong and sudden increase in the power of the signal. These strong variations might occur more rapidly relatively to the normal processing of the signal. It should be noticed that the echo cancellors that are generally used in the telecommunication field are based on digital filters that process the signals over 32 or 64 milliseconds, that is to say the samples which are used for filtering process generally exceeds 32 or 64 milliseconds. This set of samples are in a range that extends over 32 or 64 milliseconds, is also used for computing an estimation of the power .delta..sup.2.sub.x. Voice signals that are transmitted on telecommunication lines present the characteristics of requiring filtering process that uses samples that extend over 32 or 64 milliseconds, while the characteristics of speech signals might cause sudden variations--less than 10 milliseconds--in the power of the signal being processed. It therefore results in the fact that in equalizers used in the telecommunication field, the estimated value of .delta..sup.2.sub.x might be too low with respect to the actual and instantaneous power of the signal. This inevitably spoils the .alpha. determination process which is based on the previously mentioned formula: ##EQU6##
Indeed, if .delta..sup.2.sub.x is estimated far lower than the actual power of the signal, the value of .alpha. being computed might exceed the value of .alpha..sub.s being mentioned above, thus resulting in a divergence of the coefficients determination.
As a result, it appears that voice signals are not easily processed by traditional equalizers which are used in the telecommunication field. In both cases, the choice of small and large values of .alpha..sub.0 might not ensure the convergence process of the coefficient determination because of the particular characteristics of the speech signals.

Process for computing the coefficients of an adaptive filter in an echo-cancellor

International Business Machines Corporation


The present invention provides a method and a system for generating an exception handling instruction and for avoiding the execution of unnecessary instructions. More particularly, an internal opcode in a compiler is read and one internal opcode is obtained. Whether or not the obtained internal opcode is an instruction for which exception checking is required is determined. If exception checking is required for the opcode, an exception checking instruction having a sequence of bits that are uniquely determined must be generated in accordance with the type of exception, without generating an instruction for substituting into a register a label indicating the type of exception. Then, a processor instruction is generated corresponding to the obtained internal opcode. The above processing is repeated for the remaining internal opcode, and an exception handling instruction is generated. An exception checking instruction is an instruction for determining whether an exception condition is established, and for branching to an exception handler when the exception condition is established.

1. Technical Field
The present invention relates to a method and a system for increasing the speed of exception handling, in particular, to a method and a system for minimizing the number of instructions required for exception check handling, and to a medium for storing a program therefor.
2. Prior Art
In order to ensure, in a language processing system, the safety of a program written by a user, the detection of exceptions in a program written in a conventional language must be performed frequently so as to determine whether illegal pointer accesses have occurred or whether an index array is within a correct range. For example, in Java (trademark of Sun Microsystems, Inc.), when the following conditions are not satisfied, exceptions of types corresponding to individual conditions occur in order to ensure the safety of a program:
When the field of an object is to be accessed, the address of the object is not null.
When an element of an array is to be accessed, the address of the array is not null, and the index of the array falls within a correct range.
A divisor for the division of an integer is not 0.
In the C, C++ and FORTRAN languages, exception checks are not performed at the time of execution. In order to increase the speed of a program, such as a Java program frequently performing exception checking, the overhead required for exception checking must be minimized. In a compiler, even a reduction involving only one instruction can contribute greatly to an increase in the execution speed.
Conventionally, and mainly in the following two cases is processing performed when it is determined during the execution of a program that a condition exists for which an exception handling is required, and when an exception has occurred.
When a branching destination can be freely set (When both a comparison instruction and a branching instruction are employed).
When a branching destination used in common is set (an instruction is employed for branching, in a specific condition, to a handler prepared by an OS).
The outlines of the processing performed in these two cases will now be described.
 less than Case Wherein a Destination of a Branching Instruction can be Freely Set greater than
A jump destination (ERROR_HANDLING1, 2) for each exception condition is prepared for the code to examine an exception condition while an operation is being executed. When an exception condition is established, the code at the jump destination is executed. Pseudo-code for the operation is shown below.
Check for exception condition 1
When condition 1 is established, jump to ERROR_HANDLING1.
. . .
. . .
Check for exception condition 2
When condition 2 is established, jump to ERROR_HANDLING2.
. . .
ERROR_HANDLING:
Set exception type 1.
Jump to an exception handler.
ERROR_HANDLING2:
Set exception type 2.
Jump to an exception handler.
In the above code, it is assumed that the underlined instructions are processes that are not required for normal processing during which no exceptions occur. If in response to the occurrence of an exception a comparison instruction or a branching instruction can be used to indicate the type of exception, program control can branch directly to an exception handler without any unnecessary branching being performed.
 less than Case where a jump destination of a branching instruction is used in common greater than
Pseudo-code for a condition wherein a jump destination of a branching instruction is used in common is shown below.
Set exception type 1.
Check for exception condition 1.
When exception condition 1 is established, jump to ERROR_HANDLING.
. . .
. . .
Set exception type 2.
Check for exception condition 2.
When exception condition 2 is established, jump to ERROR_HANDLING.
ERROR_HANDLING:
Obtain an exception type.
In the above code, it is assumed that the underlined instructions are processes that are not required for normal processing during which no exceptions occur. If a comparison instruction or a branching instruction can be used to indicate the type of exception, the execution of unnecessary instructions can be avoided when no exception occurs.
It is, therefore, an object of the present invention to provide a method and a system for generating an exception handling instruction and for avoiding the execution of unnecessary instructions.
It is also an object of the present invention to provide a method and a system for generating exception handling instructions without generating an instruction for substituting into a register a label indicating a type of exception.
It is another object of the present invention to provide a method and a system for generating an exception handling instruction by employing a comparison instruction or a branching instruction indicating the type of exception.
It is an additional object of the present invention to provide a method and a system for generating an exception handling instruction by employing an instruction for checking an exception and for branching to an exception handler.
It is a further object of the present invention to provide a method and a system for generating an exception handling instruction and for generating code having a small size.
It is one further object of the present invention to provide, in accordance with the contents of the memory at an address whereat the processing branches to an exception handler, an exception handling method and system for determining the type of exception that has occurred.
It is yet one more object of the present invention to provide, in accordance with the contents of the memory before and after an address whereat the processing branches to an exception handler, an exception handling method and system for determining the type of exception that has occurred.
To achieve the above objects, first, internal opcode in a compiler is read and one internal opcode is obtained. Whether or not the obtained internal opcode is an instruction for which exception checking is required is determined. If exception checking is required for the opcode, an exception checking instruction having a sequence of bits that are uniquely determined must be generated in accordance with the type of exception, without generating an instruction for substituting into a register a label indicating the type of exception. Then, a processor instruction is generated corresponding to the obtained internal opcode. The above processing is repeated for the remaining internal opcode, and an exception handling instruction is generated. An exception checking instruction is an instruction for checking whether an exception condition is established, and for branching to an exception handler when the exception condition is established.
At the step for the execution of a exception handling, when an exception occurs, an address is obtained whereat program control branches to the exception handler, and the contents of the memory at the address are read. The type of exception that has occurred is determined in accordance with the contents of the memory (bit pattern), and then an exception handling is performed in accordance with the type of exception that has been determined. The contents of the memory equivalent to or greater than one instruction may be read from the obtained address and its preceding and succeeding addresses.
Specifically in order to minimize the overhead of the exception handling in a sequence of instructions to be executed, an exception checking instruction is so generated that an instruction which is to be inserted into the code portion for normal operation is minimized to check whether the exception occurs. When an exception occurs, the pertinent address is obtained during an exception handling routine, and a sequence of instructions at the preceding and succeeding addresses are decoded. The decoded instructions are employed to determine the type of exception that has occurred.

International Business Machines Corporation


The present invention relates to methods for inducing cellular mutation by promoting the reaction of nonenzymatic glycosylation of genetic material, such as DNA and RNA, by incubation of the genetic material with certain protein structure modifying agents. Suitable such agents are reducing sugars, such as glucose, glucose-6-phosphate and a reactive intermediate comprising a complex between glucose 6-phosphate and lysine. The methods include the in vitro reaction of the agent with genetic material, such as a particular gene-bearing plasmid, under conditions promoting mutation followed by the introduction of the plasmid bearing the reacted gene into a host cell, and allowing the reacted gene to be mutated and expressed, after which the mutant protein of interest may be isolated. In a variation on the last-mentioned method, a first genetic material may be incubated with the agent and reacted, and this reacted genetic material may then be introduced into a distinct cellular strain and appropriately incubated whereupon the first reacted genetic material will cause the mutation of the genetic material in the distinct cellular strain. The invention also includes an in vivo embodiment wherein the particular genetic material of interest may be isolated and introduced into a host cell which contains high intracellular concentrations of the protein structure modifying agent(s). In this instance, the mutation is promoted by the host cell, and the mutant material may thereafter be isolated and recovered. Diagnostic methods employing the principles of the invention are also disclosed.

1. Field of the Invention
The present invention is directed generally to the reaction that occurs between glucose and proteins, and more specifically to the identification of the reaction between reducing sugars and amino acids or proteins with nuclear material (DNA), and the application of this reaction to the synthesis of proteins of altered structure.
2. Description of the Prior Art
The reaction between glucose and proteins has been known for some time. Its earliest manifestation was in the appearance of brown pigments during the cooking of food, which was identified by Maillard in 1912, who observed that glucose or other reducing sugars react with amino acid to form adducts that undergo a series of dehydrations and rearrangements to form stable brown pigments. Maillard, L. C. (1912) C.R. Acad. Sci., Vol. 154, pp. 66-68.
In the years that followed the initial discovery by Maillard, food chemists studied the hypothesized reaction in detail and determined that stored and heat treated foods undergo nonenzymatic browning as a result of the reaction between glucose and the polypeptide chain, and that the proteins are resultingly crosslinked and correspondingly exhibit decreased bioavailability. Finot, P. A. (1982) in Modification of Proteins, eds, Feeney, R. E. and Whitaker, J. R., American Chemical Society, Vol. 198, pp. 91-124, Washington, D.C. At this point, it was determined that the pigments responsible for the development of the brown color that develops as a result of protein glycosylation possessed characteristic spectral properties; however, the chemical structure of the pigments had not been specifically elucidated.
The reaction between reducing sugars and proteins discussed above was found in recent years to have its parallel in vivo. Thus, the nonenzymatic reaction between glucose and the free amino groups on proteins to form a stable 1-amino-1-deoxy-2-ketosyl adduct, known as the Amadori product, has been shown to occur with hemoglobin, wherein a rearrangement of the amino terminal of the beta-chain of hemoglobin by reaction with glucose, forms the adduct known as hemoglobin A.sub.1c. This reaction was also found to occur with a variety of other body proteins, such as lens crystallins, collagen and nerve proteins. See, Bunn, H. F., Haney, D. N., Gabbay, K. H. and Gallop, P. H. (1975) Biochem. Biophys. Res. Comm. Vol. 67, pp. 103-109; Koenig, R. J., Blobstein, S. H. and Cerami, A. (1977) J. Biol. Chem. Vol. 252, pp. 2992-2997; Monnier, V. M. and Cerami, A. (1983) in Maillard Reaction in Food and Nutrition, ed. Waller, G. A., American Chemical Society, Vol. 215, pp. 431-448; and Monnier, V. M. and Cerami, A., (1982) Clinics in Endocrinology and Metabolism Vol. 11, pp. 431-452. Moreover, brown pigments with spectral and fluorescent properties similar to those of late-stage Maillard products have also been observed in vivo in association with several long-lived proteins, such as lens proteins and collagen from aged individuals. An age related linear increase in pigment was observed in human dura collagen between the ages of 20 to 90 years. See, Monnier, V. M. and Cerami, A. (1983) Biochem. Biophys. Acta., Vol. 760, 97-103 (1983); and, Monnier, V. M., Kohn, R. R. and Cerami, A. "Accelerated Age-Related Browning of Human Collagen in Diabetes Mellitus", (1983) Proc. Nat. Acad Sci. 81, 583-7. Interestingly, the aging of collagen can be mimicked in vitro by the crosslinking induced by glucose; and the capture of other proteins and the formation of adducts by collagen, also noted, is theorized to occur by a crosslinking reaction, and is believed to account for the observed accumulation of albumin and antibodies in kidney basement membrane. See, Brownlee, M., Pongor, S. and Cerami, A. (1983) J. Exp. Med., 158, 1739-1744 (1983).
As a result of recent studies by one of the inventors herein, further information regarding the chemistry of the late-stage Maillard process has been elucidated, and in particular, certain compounds have been identified that reflect the commencement and existence of the nonenzymatic reaction between proteins and glucose.
Specifically, in patent application Ser. No. 590,820, now U.S. Pat. No. 4,665,192, and in Ser. No. 097,856, filed Sep. 17, 1987, the disclosures of which are both incorporated herein by reference, certain chromophores reflecting these reactions were isolated and found to exist. Of the chromophores identified, the second was found to exist in instances where sulfite inhibition of the Maillard reaction had taken place. The existence of both chromophores confirmed generally the occurrence of nonenzymatic glycosylation of proteins, and specifically, the occurrence of advanced nonenzymatic glycosylation, and prompted further investigations as to the extent of protein-glucose interactions of this kind.
In this connection, the present inventors investigated the possibility that a similar nonenzymatic glycosylation could take place with genetic material encoding cellular proteins leading to a specific alteration of gene structure. This was prompted inasmuch as the earlier work referenced above had revealed that the Maillard reaction was taking place with several long-lived macromolecules in vivo.
Likewise, certain preliminary investigations by Bucala et al., PROC. NATL. ACAD. SCI. U.S.A. (1984), vol. 1981, pp. 105-109, and (1985), vol. 1982, pp. 8439-8442, investigated the effect of glucose 6-phosphate in causing the nonenzymatic modification of DNA and other nucleotides as measured by changes in spectral and fluorescent properties which were similar to those of other nonenzymatically glycosylated proteins. Following incubation of phage or plasmid DNA with glucose 6-phosphate, decreases in transfection and transformation capacities, respectively, were observed. These reactions appear to have a mutagenic effect, in some instances, resulting in both insertions and deletions in the plasmid DNA sequence and the development of multiple plasmid species from a single transformed cell. These earlier findings, however, were inconclusive as to the exact connection or causation for such phenomena, as it was observed by the investigators that certain of the aberrations noted were possibly attributable to glucose 6-phosphate reaction, however were also expected in the instance where DNA is exposed to other agents that may damage it.
Although both groups of investigators speculated respecting the implications of the glucose 6-phosphate reaction with nucleic acid material, none were certain of the mechanism of operation. Further investigations performed by the inventors herein have revealed additional information respecting the glycosylation of nucleic acids and the consequences thereof that are believed particularly relevant to clarifying the aging process as applied to these molecules and forming the basis for further investigations thereof as well as potential diagnostic and therapeutic applications. It is to these latter aims the present invention is accordingly directed.

Methods for preparing proteins of altered structure


A method and device for reducing delays of communication packets that comprise: providing a plurality of data frames belonging to different communication sessions conveyed along respective communication channels; providing protection data for protecting at least one of these data packets; and multiplexing one or more of the data frames into a second communication packet. This second communication packet comprises protection data for protecting at least one first data frame that had already been transmitted in a first communication packet that preceded the transmission of the second communication packet; the protection data is attached to a second data frame comprised in that second communication packet; the protection data is operative to protect a first data frame comprised in the first communication packet; and wherein each of the first and second data frames belongs to a different communication session.

The fast growth of the Internet has stimulated the development of IP networks. At present there is a clear trend to use IP networks not only for traditional Internet traffic but to provide all telecommunication services using this infrastructure. One of these applications is transmission of telephony traffic over IP networks by converting the different types of media traffic (such as video, audio, voice, etc.) to IP packets.
Unfortunately, video and voice communications, when carried over the Internet which is a best effort type of network, may fail to deliver PSTN like quality. The standard Internet Protocol (IP) developed to govern communications over public and private Internet backbones does not guarantee any quality of service (QoS). IP communications continue to suffer from delay related problems, delay jitter and packet loss, all associated with bandwidth availability. Low QoS can be tolerated with certain types of data such as Email and data downloads from remote Web sites since these communications may be repeated several times until the information has correctly been transferred. However, with real-time video, voice or data communications, such as telephone or video conference conversations or even dial-up modems sessions, reliability and QoS become significant issues. In other words, delays, delay jitter and loss can significantly impact the user's ability to receive and comprehend voice or video communications.
One of the major concerns in transmitting such real-time communications is, that data packets can be lost while conveying them along the transmission path, consequently, leaving gaps in the communication session. Typically, IP and UDP environments provide unreliable networks. Data packets can be lost or delayed for a variety of reasons, such as bandwidth congestion, unavailable routes, defective Internet engines, etc. If the data packet is lost, the only way to retrieve it is if the destination gateway receives a copy of the lost data packet. Particularly in cases where the receiving of such a copy requires transmitting a request to receive that copy which is sent from the destination gateway to the originating gateway, such a process adds substantial delays to receiving the message, thus degrading the quality of the voice communication to such an extent that the medium becomes unsuitable for real-time communications.
One approach that has been adopted to overcome at least to a certain extent this problem is, by having constant a priori re-transmission of packets in the attempt to ensure that at least one the packet's copies will reach its destination, thereby allowing the receiving side to obtain all information that has been transmitted.
In packetized networks, the communication signals are converted into IP packets using Real-time Transport Protocol ("RTP")/User Datagram Protocol ("UDP")/Internet Protocol ("IP"), RTP/UDP/IP connection. RTP is an Internet protocol for transmitting real-time data such as voice, audio and video. RTP itself does not guarantee real-time delivery of data, e.g. retransmission of undelivered packets, but it does provide mechanisms for the sending applications to support streaming data including a mechanism for iterative re-transmission of packets named RTP redundancy by which, each communication packet is retransmitted several times. However, in order to reduce the number of communication packets and the overhead associated therewith, each such communication packet comprises the current data frame and N previous data frames. The main drawback of this method is the gaps between the re-transmitted packets, which are a product of the basic packet duration. Therefore, when the first m replicas of the data packet are lost, the accumulative delay might reach m*packet duration (e.g. ˜3*20 msec). Typically, RTP runs on top of the UDP protocol. UDP is a connectionless protocol that, like TCP, runs on top of IP networks. Unlike TCP/IP, the UDP/IP provides no error recovery services, offering instead a direct way to send and receive datagrams over an IP network. In addition to RTP carrying VoIP packets, UDP is used to transmit other telephony signals such as demodulated facsimile signals according to ITU Recommendation T.38, and or demodulated dial modems transmissions (e.g. transmissions that are compatible with ITU-T v.15 Recommendation.
VoIP media-gateways provide an interface between existing TDM based networks packet switched IP data networks. For example, in a VoIP application the voice samples are compressed using a compression algorithm such as G.729. This algorithm is operative to convert a block of 80 voice samples (10 msec) into a compressed signal of 10 bytes. Typically, two consecutive frames of compressed voice (20 bytes) are transmitted in one IP packet every msec interval. As will be appreciated, small size communication packets are subjected to large overhead when transferred using the Real time Transport Protocol (RTP), as the RTP/UDP/IP overhead is 40 bytes (12+8+20) for a simple speech packet. For example, for a 20 byte packet transferred via RTP/UDP/IP the overhead presents 67% of the packet (40 byte overhead/(40+20) byte in a packet). In addition, for each voice channel, a single UDP/IP connection (a pair of UDP ports) is established between the media-gateways. This requires significant resources at the media-gateway and generates many small size packets on the IP network that may cause congestion at the network routers.
In the attempt to address the problem of the overhead associated with the communication packets being transmitted, one of the suggested approaches of conveying IP traffic in packetized networks is by tunneling. Tunneling, also known as encapsulation or channel multiplexing, refers to the practice of encapsulating a message from one protocol in a second, and using the facilities of the second protocol to traverse some number of network hops. In other words, the communication packets are "wrapped" with another protocol while they are being conveyed towards their destinations, and once they reach their respective destinations, they may be "unwrapped". Typically, many users use the same tunnel, which in turn might affect the service of many users.
In order to reduce some of the header overload when a session such as a VoIP session takes place, the channel carrying all the packets associated with the packets transmitted from one side to the other will be forwarded together with other channels within a single tunnel, ensuring that the packets are sent consecutively as well as their respective copies, to their destination. Tunneling should be associated with certain type of mini-headers that replace the original headers used to identify each of the sessions and achieve better efficiency.
The introduction of the RTP redundancy method into the "tunnel" concept might introduce more delays and might lead to reduced protection capabilities. When the session involves transmitting data for applications such as Email or WEB browsing, the receiver may tolerate delays in receiving the data packets without sacrificing the perceived service quality. However, for interactive real-time applications such as conversational voice and video over IP services, delays in delivering communication packets can significantly impair the parties' ability to communicate with each other in a satisfactory fashion. In addition, since the originating gateway must wait until a minimal required number of frames are aggregated into a communication packet is achieved, it is likely that the original frame is transmitted in one packet while its copy is transmitted in a proceeding (or even a later) packet. In such a case, the latency may be further increased.
A number of protocols have been developed over the years to assist in improving the efficiency at which the available bandwidth is used for transmitting packets and for providing protection for data contained in these packets. Among these protocols are the following ones:
Examples for Mux/Tunneled IP Protocols:                TCRTP        GRE IP tunnel
Examples for Header Compression Protocols:                IETF RFC 1144 (CTCP) header compression standard was developed by V. Jacobson in 1990. It is commonly known as VJ compression. It describes a basic method for compressing the headers of IPv4/TCP packets to improve performance over low speed serial links. VJ compression is the most commonly used header compression scheme in IP protocol stacks today. However, the evolution towards all IP networks has created new demands on header compression. Consequently, newer standards have developed with superior error recovery mechanisms, which work well on links that exhibit both non-trivial round-trip times and significant loss.        IETF RFC 2507 (IPHC). This technique compresses on a hop-by-hop basis, multiple IP headers including IPv4 and IPv6, TCP, UDP, ESP headers. The compression algorithms are specifically designed to work well over links with non-trivial packet-loss rates.        IETF RFC 2508 (CRTP) standard, developed in 1999, was justified primarily by the specific problem of sending audio and video over low speed serial links. CRTP compresses the headers of IP/UDP/RTP packets used for audio and video, reducing overhead on a hop-by-hop basis. CRTP performs best on local links with low round-trip times.        IETF RFC 3095 (ROHC) was developed in 2001. This standard can compress IP/UDP/RTP headers to just over one byte, even in the presence of severe channel impairments. This compression scheme can also compress IP/UDP and IP/ESP packet flows. ROHC is intended for use in wireless radio network equipment and mobile terminals to decrease header overhead, reduce packet loss, improve interactive response, and increase security over low-speed, noisy wireless links. ROHC has been adapted to work with link layer characteristics like those of GSM and CDMA and is known as Link Layer Assisted-ROHC (ROHC-LLA) Mux (tunneling):Examples of Redundancy Schemes:        RTP redundancy (voice audio & video)—RFC 2198 (IETF)        ITU-T T.38 redundancy        ITU-T V.150 (SPRT) redundancy.
US 2006209796 describes a method for reducing voice and data over IP (VoIP) packet overhead in an Internet telephony system, and for regenerating missing or damaged data in a data packet. A media framer aggregates packets from multiple concurrent calls from several channels into a larger data packet. A transmission control module defines the format for each data packet, and updates and synchronizes header information in the data packets. A single virtual connection transmits data packets and other signals between originating and destination gateways located in the service areas for a caller and called party. System redundancy improves the quality of service by regenerating missing or damaged data in the packets.
The underlying assumption of the prior art solutions for the provisioning of protecting packets in a multiplexed traffic, is that the gap between two consecutive multiplexed frames is substantially less than the gap existing between the arrival of a packet and the arrival of its corresponding protecting packet. However, when the multiplexed frames are relatively long, it could well happen that both the original packet as well as its duplication, i.e. its protecting packet, may be comprised within a single frame. In such a case, if the original packet is lost or delayed, so will its protecting packet. Therefore, for such a case no protection is adequately provided to the original packet.
The disclosure of the references mentioned throughout the present specification is hereby incorporated by reference.
Thus, a method and a device are needed to solve the above-described problems and to provide an efficient and cost-effective solution for real-time bidirectional communication of multimedia while mitigating call latency.

Method and apparatus for reducing delays in a packets switched network


A cap feeding device for a roofing gun includes a moving member and a pressing member which is pivotably connected to the moving member. Both of which are engaged with the rail unit of the container for receiving stack of caps. A torsion spring is biased between the two respective connection portions of the moving member and the pressing member. A coil spring has one end connected to the moving member and the other end of the coil spring is fixed to a bottom of the rail unit so that the moving member is movable along the rail unit. The caps can be directly pressed into the container and the user simply pulls the moving member upward till the pressing member pops outward to press on the top of the stack of the caps.

U.S. Pat. Nos. 6,502,719B2, 6,508,392B1 and 6,543,666B1 respectively disclose a cap feeding device for roofing guns wherein the user has to open a lid or rotate a cover on a top of the container before inserting a stack of caps into the container. This is not convenient for the user to quickly insert the caps into the container.
U.S. Pat. Nos. 6,273,315B1 and 6,302,310B1 respectively disclose two improved feeding devices to simplify the steps for inserting caps into the container.
Nevertheless, the disclosures mentioned above involve a complicated structure which needs higher maintaining cost and manufacturing cost. Furthermore, all the feeding device have to pull the cap or lid assembly from the bottom of the container up to the top of the container such that the cap or the lid is able to be operated. After the caps are put in the container, the cap or the lid has to be pivoted to its original position. Obviously, too many steps required to re-load the caps.


A multi-purpose tool may be comprised of a body having a gripping configuration on the outer surface of the body for long bolts and a lengthwise bore through the center of the body. The multi-purpose tool has a socket located at a first end of the body and a crown located at the second end of the body to receive various fasteners, such as flange and wing nuts. A multi-purpose tool may also be comprised of a body having a gripping configuration on the outer surface of the body and a lengthwise bore through the center of the body for a sleeve. The multi-purpose tool has a socket located in the sleeve at a first end of the sleeve and a crown located at the second end of the body to receive various fasteners, such as flange and wing nuts. The sleeve has a lengthwise bore through the center of the sleeve for long bolts or to accept a tool shaft. The tool shaft may accept various tool bits, and the tool shaft may be inserted into and engaged with the sleeve bore along its length. A cross hole extends in a substantially perpendicular direction through the center of the sleeve and the center of the body, respectively, which line up so the tool shaft may be inserted into and engaged with the sleeve bore for use as a T-handle.

The present multi-purpose tool generally relates to the field of hand tools used with mechanical fasteners. More specifically, the present multi-purpose tool relates to hand tools designed to engage multiple fittings and fasteners, such as hexagonal bolts and nuts, screws, and wing nuts. The present multi-purpose tool may be included in an installation kit accompanying an article employing multiple fittings and fasteners.
A variety of tools are often needed to deal with the multitude of fasteners encountered on a given job. This is often the case for plumbers or do-it-yourselfers doing plumbing work. In some cases, many different fittings and fasteners may be present on a single plumbing fixture. For example, installing a toilet frequently involves the use of hexagonal bolts and/or nuts, screws, flange nuts, and/or wing nuts. The wing nuts or flange nuts are often threaded over long bolts. Toilets are not sold with tools capable of securing these fasteners. Toilet installers are therefore forced to obtain tools separately, which may be inconvenient and expensive. Hand tightening some of these fasteners in the cramped conditions typically associated with toilet installation can result in hand cramps and even injury, which is particularly problematic in the often unsanitary environment posed by the installation or removal of an existing toilet. The use of multiple tools for toilet installation can be time consuming as one searches for the proper tool, and switches between tools during the installation. In addition, carrying around a variety of tools to the job site may be cumbersome.
Another job involving a multitude of fasteners is shutter installation or removal. Many different fittings and fasteners may be present on a single storm shutter. For example, installing or removing storm shutters frequently involves the use of hexagonal bolts and/or nuts, screws, and/or wing nuts. Shutters are not sold with tools capable of securing these fasteners. Shutter operators are therefore forced to obtain tools separately, which may be inconvenient and expensive. The use of multiple tools for shutter installation can be time consuming as one searches for the proper tool, and switches between tools during the installation. This is particularly problematic when hurriedly attempting to secure storm shutters, for instance, in the face of an approaching hurricane. As with toilet installation, carrying around a variety of tools to the job site may be cumbersome, and even more so with multiple shutters.


Patient respiration may be characterized using a marked respiration waveform involving a respiration waveform annotated with symbols, markers or other indicators representing one or more respiration characteristics. A respiration waveform may be acquired by sensing a physiological parameter modulated by respiration. A marked respiration waveform may be generated based on the acquired respiration waveform and one or more detected respiration waveform characteristics and/or respiration-related conditions. One or more components used to generate the marked respiratory waveform may be fully or partially implantable.

The human body functions through a number of interdependent physiological systems controlled through various mechanical, electrical, and chemical processes. The metabolic state of the body is constantly changing. For example, as exercise level increases, the body consumes more oxygen and gives off more carbon dioxide. The cardiac and pulmonary systems maintain appropriate blood gas levels by making adjustments that bring more oxygen into the system and dispel more carbon dioxide. The cardiovascular system transports blood gases to and from the body tissues. The respiration system, through the breathing mechanism, performs the function of exchanging these gases with the external environment. Together, the cardiac and respiration systems form a larger anatomical and functional unit denoted the cardiopulmonary system.
Various disorders may affect the cardiovascular, respiratory, and other physiological systems. For example, heart failure (HF) is a clinical syndrome that impacts a number of physiological processes. Heart failure is an abnormality of cardiac function that causes cardiac output to fall below a level adequate to meet the metabolic demand of peripheral tissues. Heart failure is usually referred to as congestive heart failure (CHF) due to the accompanying venous and pulmonary congestion. Congestive heart failure may have a variety of underlying causes, including ischemic heart disease (coronary artery disease), hypertension (high blood pressure), and diabetes, among others.
There are a number of diseases and disorders that primarily affect respiration, but also impact other physiological systems. Emphysema and chronic bronchitis are grouped together and are known as chronic obstructive pulmonary disease (COPD). Pulmonary system disease also includes tuberculosis, sarcoidosis, lung cancer, occupation-related lung disease, bacterial and viral infections, and other conditions.
Chronic obstructive pulmonary disease generally develops over many years, typically from exposure to cigarette smoke, pollution, or other irritants. Over time, the elasticity of the lung tissue is lost, and the lungs become distended, unable to expand and contract normally. As the disease progresses, breathing becomes labored, and the patient grows progressively weaker.
Disordered breathing is a respiratory system condition that affects a significant percentage of patients between 30 and 60 years. Disordered breathing, including apnea and hypopnea, may be caused, for example, by an obstructed airway, or by derangement of the signals from the brain controlling respiration. Sleep disordered breathing is particularly prevalent and is associated with excessive daytime sleepiness, systemic hypertension, increased risk of stroke, angina, and myocardial infarction. Disordered breathing can be particularly serious for patients concurrently suffering from cardiovascular deficiencies.
Various types of disordered respiration have been identified, including, apnea (interrupted breathing), hypopnea (shallow breathing), tachypnea (rapid breathing), hyperpnea (heavy breathing), and dyspnea (labored breathing). Combinations of the respiratory cycles described above may be observed, including, for example, periodic breathing and Cheyne-Stokes respiration (CSR). Cheyne-Stokes respiration is particularly prevalent among heart failure patients, and may contribute to the progression of heart failure.
Because of the complex interactions between the cardiovascular, pulmonary, and other physiological systems, as well as the need for early detection of various respiration diseases and disorders, an effective approach to monitoring and early diagnosis is needed. Accurately characterizing patient respiration aids in monitoring and diagnosing respiration-related diseases or disorders. Evaluating patient respiration information may allow an appropriate therapy to be selected and/or the effectiveness of a delivered therapy to be enhanced.

System and method for characterizing patient respiration


A method for completing the routing of a partially routed design is provided. The unrouted pins are routed to generate a first plurality of nets that may contain shorts or overlaps between the nets. The nets are analyzed to obtain timing information, and then divided into a set of critical and a set of non-critical nets. The non-critical nets are hidden, and the critical nets are rerouted to remove overlaps. The non-critical nets are then unhidden. The non-critical nets and rerouted critical nets are then rerouted so as to remove overlaps.

The design process for integrated circuits contains a number of well known sequential operations. Initially, the proposed functionality of a circuit is analyzed by one or more chip designers. These designers then use design capture tools to describe the logical components of the circuit and their interactions. This step involves generating a description of the design to be implemented in an appropriate machine-readable form. One of the commonly used methods for specifying a design is a hardware description language (HDL). This language contains specific functions and syntax to allow complex hardware structures to be described in a compact and efficient way. Computer-aided design tools are available to compile or synthesize the HDL description specifying the design into lower forms of description. The output of these synthesis tools is a design database specifying the components of the design and how the components are interconnected. The components of a design may consist of large blocks that implement complex logic functions, memory blocks, logic gates, or other types of components.
The design database is then passed as input to a layout tool, which typically includes a placement tool (placer) and a routing tool (router). Placement is the process whereby each component (or design object) of the design is allocated to a physical position on the chip. The aim of the placer is to place connected design objects in close physical proximity to one another. This conserves space on the chip and increases the probability that the desired interconnections between components will be successfully completed by the router. Additionally, placing connected components close to one another generally improves the performance of the circuit, since long interconnect paths are associated with excess capacitance and resistance, resulting in longer delays.
After placement is complete, a routing step is performed. Many routing algorithms use a routing resource graph, G(V, E), to represent the available routing resources in the target device (e.g., chip), where a node, nεV, in the graph represents a conductor (e.g., wire) in the device and an edge, eεE, is present between nodes corresponding to conductors that can be connected to one another. For example, in FPGA technology, edges are present between nodes whose conductors may be connected to one another through a programmable switch. Each component in the design being routed has a number of pins, which generate and receive electrical signals. Pins that generate signals are called source pins; pins that receive signals are called load pins. Each component pin corresponds to a node in the routing resource graph. A collection of pins that needs to be connected together in a logic design is called a net. The purpose of routing is to connect the pins in each net of a logic design. A net may have one or more source pins and one or more load pins. Signals are fed from source pins to load pins through an interconnection path chosen by the router. To route a load pin on a net, the router must identify a path through the routing resource graph from a source pin's node in the graph to the load pin's node in the graph. Each node in the graph has an associated cost, which is typically chosen based on a combination of factors, including the physical properties of the node's corresponding conductor (such as wire capacitance or wire length), as well as other factors related to the design being routed (such as the demand for the node amongst the nets of a the design). When a load pin is routed, it is desirable to use the minimum cost path from the source pin to the load. The minimum cost path is usually identified using a variant of Dijkstra's shortest path algorithm. More details can be found in Dijkstra, E., A Note on two Problems in Connexion with Graphs, Numerische Mathematik 1, 269–271, 1959.
After placement and routing, it is often necessary to verify that the design functions in ways expected by the designer. This verification may be achieved by simulation and analysis. During post-layout verification, the operation of the design is examined. After routing, the precise resistances and capacitances of a design's interconnections are known and consequently, post-layout timing analysis tools have an accurate picture of the circuit delays. Timing analysis tools can identify paths with excessive delay, detect setup and hold violations, and other timing errors. Other post-layout verification tools may check that the design functionality is correct and that it produces the correct output results for given input stimulus vectors. If post-layout verification is successful, the design process is complete and the design is implemented in the target technology. On the other hand, if verification is not successful, then incremental modifications to the design may be necessary, after which the design must again pass through some or all of the CAD flow. It is desirable if such iterations through the CAD flow after incremental circuit modifications can be performed quickly.
The design tools involved in the CAD flow that are used for HDL synthesis, placement and routing, verification and timing analysis of a design are commonly implemented in software executing on an engineering workstation.
Routing has a significant effect on the performance of the resulting circuit. As an example, if the interconnection paths selected by a router are not optimal, there may be excessive capacitance and resistance, leading to unacceptable delays and signal degradation. Further, routing is a computationally intensive operation, and it is desirable to reduce the execution time of routing. Consequently, it is important to develop improved routing methods and algorithms.

Incremental routing in integrated circuit design


There is now provided a method of recycling toluenediisocyanate residue resulting from the production of toluenediisocyanate by the reaction of toluenediamine by phosgenation in the presence of a solvent. In accordance with the teachings of the present invention, the toluenediisocyanate residue is treated at reflux with an alkanolamine to obtain an intermediary product which is distilled thereby giving rise to various products including but not limited to at least one component selected from toluenediamine, oxazolidone and hydroxyethylimidiazolidone. Preferably the alkanolamine employed is a monoethanolamine.

Toluenediisocyanates, otherwise referred to herein as TDI have become an important component in the preparation of various commercially useful products including but not limited to, polyurethane foams, elastomers and coatings. However, as a results of the production of toluenediisocyanates, waste in the form of toluenediisocyanate residues, sometimes referred to as distillation bottoms, are generated.
In view of the extensive production of toluenediisocyanate world wide and in turn, the generation of high quantities of toluenediisocyanate residues, the need for a reliable process for recycling toluenediisocyanate residues and recovering the useful products generated as a result is readily apparent.
While alternative processes can be employed to recycle toluenediisocyanate residues into useful products, it is believed that the present invention offers the most convenient and cost effective alternative available to date. For example, it is possible to recover many of the aforementioned products from toluenediisocyanate residues by reacting the residue with an excess amount of an alcohol such as ethanol, propanol, butanol, pentanol and cyclopentanol, among others. However, in order to drive the reaction, the residue must be heated to a temperature of approximately 200.degree. C. As a result of the reaction, an extensive amount of carbon dioxide is generated, thus, the reaction must be carried out in a pressure vessel capable of handling pressures of up to 400 lbs/in.sup.2. In contrast, the process of the present invention does not generate any carbon dioxide, or other such gases and therefore, can be carried out at relatively low pressures.

Recovery of products from toluenediisocyanate residues


A container and lid assembly includes a container, lid and handle members for carrying and securing together the handle and lid, and the lid has recesses oriented in the top wall of the lid such that a user's hand is received in the recess when a user is grasping one of the handles.

Most container and lid assemblies include a container and lid having a separate handle member secured to the container and a separate locking member secured to the container which may be used to secure together the container and lid. While a few container and lid assemblies do contain a latch which also serves as a handle member, there are some disadvantages with these assemblies. Specifically, some of the latch and handle assemblies such as the assembly illustrated in U.S. Pat. No. 3,416,701 consist of numerous components which must be separately manufactured, assembled and secured to the container. In addition, other handle and latch assemblies such as the one illustrated in U.S. Pat. No. 3,741,433 includes a handle molded into the product which only allows a minimal amount of weight to be carried in the container. Finally, other latch and handle assemblies protrude outwardly from the container side walls. and therefore, are susceptible to being damaged when the container and lid are stored in a confined area. Containers having latch and handle assemblies extending in an upwardly direction from the container also may be subject to storage problems since the handle and latch assembly is the component likely to have the greatest height.


An MPOA system for establishing communication by using layer 3 protocol on an ATM network, in which data about the layer 3 address of a source of data packets is added to an address resolution request packet which is transmitted in order to establish a shortcut VCC toward a destination of the data packets in each communication node and hence transmitted to the destination, and in the case of accepting the address resolution request packets to be transmitted in order to establish the respective shortcut VCCs toward the destination of the data packets, as for the same communication, from a plurality of the communication nodes, a shortcut VCC is established only between the destination and the communication node remotest from the destination on the network.

1. Field of the Invention
The present invention relates to a communication by an MPOA (Multi-Protocol Over ATM) system, and more particularly to an MPOA system capable of avoiding Domino Effect in a shortcut communication and its shortcut communication control method, and a shortcut communication control program.
2. Description of the Related Art
The conventional Multi-Protocol Over ATM (hereinafter, referred to as MPOA) system is a communication system using existing layer 3 (network layer) protocols such as Internet Protocol (hereinafter, referred to as IP), and Internetwork Packet Exchange (hereinafter, referred to as IPX) on asynchronous transfer mode (hereinafter, referred to as ATM) networks, and the specifications are defined by the ATM Forum's document AF-MPOA-0087.000.
The feature of the MPOA system is that, when a destination node (target) is in a subnet different from that of a source node of data packets as viewed from the source node, communication is performed by establishing a shortcut Virtual Channel Connection (hereinafter, referred to as VCC) toward the target in an ATM network, without passing through routers, in the case of detecting a data flow (flow of continuous data packets) larger than a predetermined value.
The operation of the conventional MPOA system will be described with reference to FIG. 13. Although ATM switches forming the ATM network are not illustrated in FIG. 13, they are assumed to be placed at proper positions to establish a VCC (including a shortcut VCC) connecting each host and router. As a matter of convenience, IP is used as the layer 3 protocol in the following description, but the protocol is not limited to IP.
In FIG. 13, it is assumed that a host 610 starts to transmit IP packets to a host 650 continuously. The IP packets are forwarded through a router 620, a router 630, and a router 640, toward the host 650. At this time, an MPC 611 that is an MPOA client (hereinafter, referred to as MPC) counts the transmitted IP packets. When the above counted value becomes equal to or larger than a predetermined value in a fixed time (for example, equal to or larger than ten packets in one second), it is judged as "There is a flow". This is called as flow detection.
The MPC 611 which has detected the flow starts a shortcut communication toward the host 650. In order to start a shortcut communication, it is necessary to establish a shortcut VCC toward the host 650. In order to establish the shortcut VCC, it is necessary to know the ATM address of the host 650. Such an operation that an MPC desiring a shortcut communication obtains the ATM address of a host of a shortcut destination is called as "address resolution". In other words, the MPC 611 having detected a flow starts the address resolution of the host 650 in order to start a shortcut communication toward the host 650.
The MPC 611 creates an MPOA address resolution request packet which includes the IP address of the host 650 as the target, and transmits it to an MPOA server (hereinafter, referred to as MPS), that is, an MPS 622.
The MPS 622 transmits the MPOA address resolution request packet to an MPS 632 of a router 630 of the next hop toward the target, according to the IP routing table. An MPS like the MPS 622 is called as an ingress MPS. The MPOA address resolution request packet is forwarded one after another toward the target, according to the IP routing table.
An MPS 642 takes out the necessary information from the MPOA address resolution request packet, to create an MPOA cache imposition request packet, and transmits it to an MPC 651 of the target host 650. This is to notify the MPC 651 of Media Access Control (hereinafter, referred to as MAC) header information to be added to the IP packets, when IP packets destined to the host 650 are transmitted from the MPC 511 through a shortcut communication. In the above MAC header information, the MAC address of the host 650 is included as DA (Destination Address), and the MAC address of the router 640 is included as SA (Source Address).
The MPC 651 returns an MPOA cache imposition reply packet to the MPS 642. In the above MPOA cache imposition reply packet, an ATM address for accepting the establishment of a shortcut VCC by the MPC 651 is included.
The MPS 642 takes out the necessary information from the MPOA cache imposition reply packet, to create an MPOA address resolution reply packet, and returns it to the MPS 622 that is the ingress MPS. An MPS like the MPS 642 is called as an egress MPS. The MPOA address resolution reply packet is forwarded one after another, toward the ingress MPS, according to the IP routing table.
When the MPS 622 receives the MPOA address resolution reply packet, it returns the same packet to the MPC 611. Thus, the MPS 611 can obtain the ATM address for establishing a shortcut VCC toward the host 650. The MPOA address resolution request/reply packets and the MPOA cache imposition request/reply packets may be collectively called as MPOA packets.
The MPC 611 establishes a shortcut VCC toward the host 650 by using the above ATM address, and thereafter the IP packets destined to the host 650 are transferred to the shortcut VCC. The MPC 651 receives the IP packets through the shortcut VCC, adds the MAC header previously notified by the MPS 642 through the MPOA cache imposition request packet to the above IP packets, so to create MAC frames. Thus created MAC frames are seemed as if they were transmitted from the router 640 to the host 650.
Thereby, the upper-layer protocol processing of the host 650 may be performed in the same way as in the case where the MPOA system is not introduced.
The above-mentioned conventional MPOA system has a problem of causing Domino Effect.
Hereinafter, the Domino Effect will be described. In FIG. 14, it is assumed that a host 710 starts to transmit IP packets toward a host 750 continuously. The IP packets are forwarded through a router 720, a router 730, and a router 740, to the host 750. An MPC 711 which has detected a flow toward the host 750 transmits an MPOA address resolution request packet to an MPS 722 in order to start a shortcut communication toward the host 750.
Here, the MPC 711 counts the flow, and simultaneously an MPC 721 of the router 720 and an MPC 731 of the router 730 count the flow. Accordingly, the MPC 721 and the MPC 731 detect the flow toward the host 750, in parallel with the MPC 711. Therefore, the MPC 721 and the MPC 731 transmit the MPOA address resolution request packets to the MPS 732 and an MPS 742 respectively, in order to start a shortcut communication toward the host 750. This is called as the Domino Effect in the MPOA system.
When the Domino Effect occurs, a redundant shortcut VCC is established. This is because both of "the ATM address of a source MPC" in the respective MPOA address resolution request packets from the MPC 721 and the MPC 731 are different from that of the MPC 711, the MPS 742 that is the egress MPS regards them as different flows, and the MPS 742 processes the respective MPOA address resolution request packets from the MPC 721 and the MPC 731 in the same way as it processes the MPOA address resolution request packet from the MPC 711.
FIG. 15 shows the state where redundant shortcut VCCs have been established as a result of occurrence of the Domino Effect. In this example, although shortcut VCCs are established respectively from the router 720 and the router 730 toward the host 750, these shortcut VCCs will be never used. This is because the IP packets from the host 710 to the host 750 are all transferred on the shortcut VCC toward the host 750, in the host 710.
As the conventional technique for avoiding the Domino Effect, there is a method in which, in each router, shortcut processing is not performed on a data flow coming from an ATM network and going to an ATM network again. This technique has been described by the specifications of NHRP (RFC2332, IETF) used in the MPOA system as the address resolution protocol.
This conventional technique, however, has a problem that even a flow naturally to be targeted for a shortcut is excluded.

MPOA system and its shortcut communication control method, and shortcut communication control program


Provided are compounds that target the lanthionine synthetase C-like protein 2 pathway. The compounds can be used to treat a number of conditions, including infectious disease, autoimmune disease, diabetes, and a chronic inflammatory disease.

Lanthionine C-like protein 2 (LANCL2) (also called "lanthionine synthetase C-like protein 2" or "lanthionine synthetase component C-like protein 2") is a signaling pathway protein that is expressed immune cells, gastrointestinal tract, neurons, testis and pancreas [1]. Activating the LANCL2 pathway increases insulin sensitivity and reduces inflammation associated with various autoimmune, inflammatory and metabolic conditions. Results of in vivo and in vitro testing in mice showed that using compounds targeting this pathway reduce glucose levels 2× in glucose tolerance tests as compared to controls and provided equivalent levels to prescription AVANDIA® (GlaxoSmithKline plc, Brentford, England)—an effective treatment but with significant side-affects. Targeting the LANCL2 pathway also reduces gut inflammation by 90% with a corresponding 4× reduction in the number of lesions. The results from this testing and other validations of the pathway are published in 12 peer-reviewed journal articles [2-13].
Within the category of autoimmune-related inflammation there is currently a global pandemic of autoimmune disorders such as inflammatory bowel disease (IBD), systemic lupus, rheumatoid arthritis, type 1 diabetes, psoriasis, multiple sclerosis. There is also a pandemic of chronic metabolic inflammatory diseases including metabolic syndrome, obesity, prediabetes, cardiovascular disease, and type 2 diabetes. Current treatments are moderately effective but are expensive and have serious side effects. The route of administration for the most effective treatments for autoimmune diseases, such as anti-TNF antibodies, is via IV or subcutaneous injection, requiring visits to clinics/surgeries and frequent monitoring. The unique mode of action of LANCL2 provides for orally administered therapeutics that are as effective as anti-TNF antibodies but without the side effects and high cost. Given the epidemic of inflammatory and autoimmune diseases as a whole, the LANCL2 pathway has the potential to significantly impact millions of patients.
Abscisic acid ("ABA") is one of the natural compounds found in the original screening process that binds to LANCL2.
There is an enormous number of compounds described in the field of synthetic organic chemistry. Various compounds are provided by the following references: WO1997/036866 to Diana et al., WO 2006/053109 to Sun et al., WO 2006/080821 to Kim et al., WO 2007/019417 to Nunes et al., WO 2009/067600 and WO 2009/067621 to Singh et al., WO 2008/079277 to Adams et al., JP 2008/056615 to Urasoe et al., WO 2011/066898 to Stoessel et al., US 2013/0142825 to Bassaganya-Riera et al., and U.S. Pat. No. 7,741,367 to Bassaganya-Riera et al. Some of the compounds described in these references are known to activate the LANCL2 pathway and others are not.
There is a need to develop novel ligands of the LANCL2 pathway to allow treatments to be tailored specifically to individual diseases and to potentially maximize their efficacy.
This application therefore describes a series of classes of compounds that have been developed by novel medicinal chemistry approaches, and screened using in silico, in vitro, and in vivo techniques, to maximize their ability to bind to the LANCL2 protein and thus to effect a beneficial response in various disease conditions, including but not limited to, autoimmune, chronic inflammatory, metabolic, and infectious diseases.

This patent is subject to a terminal disclaimer.

Lanthionine synthetase C-like 2-based therapeutics


A semiconductor clamped-stack assembly (32) has at least two clamped stacks, each of these clamped stacks having a plurality of power semiconductor components (8) and a plurality of heat sinks (6), which are arranged in series along a horizontally extending axial direction (A). According to the invention, power semiconductor components (8) from different clamped stacks are assigned to one another and are located in a common mounting plane, which is perpendicular to the axial directions (A) of the clamped stacks (31). Mutually associated power semiconductor components (8) can be removed from the clamped-stack assembly or, respectively, inserted into the clamped-stack assembly in a common mounting direction, which lies in the mounting plane. Mutually associated power semiconductor components (8) are preferably mounted on a common plate (14). As a result, they can be dismantled when the clamped-stack assembly (32) is loosened, without further power semiconductor components or heat sinks having to be dismantled. The plate (14) is hooked into frame rods (1) belonging to the clamped-stack assembly (32) or guided in guide rails (18).

The invention relates to the field of power semiconductor technology. It relates to a semiconductor clamped-stack assembly, in particular for current converters, according to the preamble of Patent claim 1.
In known water-cooled high-power current converters, a plurality of power semiconductor components (PS) are alternately combined in a series of circuits with cooling cans through which water flows, in order to form a stack or clamped stack. The required electrical and thermal characteristics are achieved by means of mechanical bracing by means of tie rods. In order to replace a defective semiconductor component, the clamp stack is loosened, during which process all the components must still be held in their position centered with respect to the stack axis.
In the latest generation of power semiconductor switches for high-power converters, a GTO (Gate Turn Off) thyristor, an IGBT (Insulated Gate Bipolar Transistor) or an IGCT (Insulated Gate Controlled Thyristor) accommodated in a presspack case is connected to a board, on which the associated drive unit is also arranged. Such a semiconductor clamped-stack assembly with horizontal clamped stacks is disclosed, for example, by the document by P. Steimer et al. xe2x80x9cSerieschaltung von GTO-Thyristoren fxc3xcr Frequenzumrichter hoher Leistungxe2x80x9d, [series connection of GTO thryistors for high-power frequency converters], ABB Technik 5 (1996), PP 14-20.
FIG. 5 in that document shows how the power semiconductor component and drive unit form a replaceable unit.
DE 198 30 424 A1 discloses a molding for holding heat sinks in a vertical clamped stack. The latter holds a heat sink and a power semiconductor component which is immediately adjacent and mounted on a board. An individual power semiconductor component in an individual stack can be replaced by the stack being loosened and being pressed on with a special tool. This leads to a high loading on adjacent power semiconductor components.
In the case where a number of clamped stacks are combined to form a clamped-stack assembly, as in the above mentioned document by P. Steimer et al., the individual clamped stacks block the access to the other clamped stacks located behind them. This makes access for replacing power semiconductor components more difficult. This leads to the situation where either clamped stacks are arranged with a large spacing from one another or where there must be sufficient space around a clamped-stack assembly in order to permit access to all the clamped stacks. Such arrangements prevent a compact design of a converter. A compact design is possible if a clamped-stack assembly or phase module can be removed or replaced as a whole, so that simple access to the power semiconductor components in the removed clamped-stack assembly is possible. However, this leads to a considerable outlay in that in order to replace a single defective power semiconductor component, the entire clamped-stack assembly has to be dismantled.
It is therefore an object of the invention to provide a semiconductor clamped-stack assembly of the type mentioned at the beginning which eliminates the above mentioned disadvantages.
This object is achieved by a semiconductor clamped-stack assembly having the features of Patent claim 1.
The semiconductor clamped-stack assembly has at least two clamped stacks, each of these clamped stacks having a number of power semiconductor components (LH) and a number of heat sinks, which are arranged in series along a horizontally extending axial direction, the clamped stacks being arranged parallel to one another in a common frame, and the power semiconductor components being mounted on carrier elements. According to the invention, power semiconductor components from different clamped stacks are assigned to one another and are located in a common mounting plane, which is perpendicular to the axial directions of the clamped stacks, and mutually associated power semiconductor components are capable of being removed from the clamped-stack assembly or, respectively, inserted into the clamped-stack assembly in a common mounting direction, which lies in the mounting plane.
This makes it possible to remove one or more of the mutually associated power semiconductor components from the clamped-stack assembly in the common mounting direction without further power semiconductor components or heat sinks having to be dismantled. The power semiconductor components (8) can therefore be replaced by means of access from only one side of the clamped-stack assembly (32), and it is not necessary for a region around one or around a number of clamped stacks to be kept free, or for the clamped-stack assembly to be removed. This therefore produces a compact clamped-stack assembly which is very simple to maintain, since power semiconductor components can be replaced with little effort. The compact design also means that the stray inductance of connecting conductors can be reduced.
The mutually associated power semiconductor components preferably have common fixing means for fixing to a frame of the clamped-stack assembly. In a first embodiment of the invention, these common fixing means are formed by guide means for a carrier element having a number of power semiconductor components mounted on it. These guide means are hooked into corresponding second connecting elements, which are connected to the frame, or hooked directly into the frame. In a second embodiment of the invention, these common fixing means are formed by guide rails, which guide one or more carrier elements in each case having one or more power semiconductor components mounted on them. In both embodiments, the common fixing means serve to hold the mutually associated power semiconductor components firmly when one or more of the clamped stacks in the clamped-stack assembly are loosened, that is to say are not under pressure. In addition, the common fixing means permit the mutually associated power semiconductor components to move in the common mounting direction and to be removed from the clamped-stack assembly.
The common fixing means have the advantage that the power semiconductor components maintain their position without additional holding parts when the clamped-stack assembly is loosened and, at the same time, can nevertheless also be replaced in a straightforward manner.
In a preferred embodiment of the invention, the clamped stacks in the clamped-stack assembly are arranged horizontally, so that in a loosened stack, individual power semiconductor components are not firmly held or clamped in by the weight of power semiconductor components and heat sinks located above. As a result, no special tools or mechanical aids are needed either in order to force apart heat sinks when replacing a power semiconductor component.
In a further preferred embodiment of the invention, heat sinks from a number of clamped stacks are assigned to one another, and mutually associated heat sinks are located in a common plane, which is perpendicular to the axial directions of the clamped stacks. It is preferable if the mutually associated heat sinks are connected to the frame by means of a common heat sink holder. The common holder for a number of heat sinks reduces the number of parts in a clamped-stack assembly and simplifies the mounting.
It is preferable if an electrical bus bar system for mutually associated heat sinks is formed by sheet metal plates, so that low-inductance electrical connection is produced.
Further preferred embodiments emerge from the dependant patent claims.


A mounting assembly for releasably mounting a rear light member to a body member of a vehicle. The mounting assembly comprises a locking member. The locking member includes a sleeve-like mounting portion adapted to be fixed to the support member, and a first locking portion integrally joined to the mounting portion. The first locking portion is adapted to snappingly engage a matingly shaped second locking portion of the structural member for retaining it. The mounting assembly further comprises a release pin axially slidably in the mounting portion of the locking member. The release pin has a shaft portion axially project from the sleeve-shaped mounting portion and is adapted to be axially displaced for releasing the two locking portions from being snappingly engaged.

The present invention relates to a mounting assembly for releasably mounting a structural member to a plate-shaped support member, in particular a rear light member to a body member of a vehicle. In particular, this invention relates to a mounting assembly, in which the releasable mount of the structural member occurs through a lock on the support member.
A great variety of these types of mounting assemblies are known. The lock serves to connect together the structural member and support member in a normal operating state and to release the connection between the structural member and the support member if required.
In order to release the lock, it must be normally accessible. However, in certain applications, for example when the mounting assembly serves to mount a rear light member to a body member of a vehicle, the lock is not accessible or is difficult to access.


A CDMA receiving apparatus includes a receiving section, a memory circuit, an estimating circuit and a generating circuit. The receiving section generates a baseband signal from a received radio signal, searches a path having the highest correlation with the received radio signal, generates a path delay quantity for the searched path and generates a demodulated signal as an object signal from the baseband signal based on the path delay quantity. The memory circuit stores at least one SIR value as a previous SIR value. The estimating circuit estimates the SIR value from the object signal and stores the estimated SIR value in the memory circuit. The generating circuit generates a TPC (transmission power control) bit signal for controlling transmission power from the estimated SIR value and the previous SIR value stored in the memory circuit based on the path delay quantity and a reference SIR value.

1. Field of the Invention
The present invention is a COMA (code division multiple access) receiving apparatus, and more particularly, to a COMA receiving apparatus which carries out a transmission power control.
2. Description of the Related Art
In a CDMA communication system, a transmission power control is carried out to keep reception quality on the receiving end. In the transmission power control used for the COMA communication system, a transmission power control bit (TPC bit) is generally used.
FIG. 1 shows a section for generating the TPC bit in a conventional CDMA receiving apparatus. The CDMA receiving apparatus is composed of a receiving antenna 101, a quasi-synchronization detecting circuit 102, an A/D (analog-to-digital) converter 103. a synchronization tracking circuit 104, a despreading circuit 105, a demodulating circuit 106, an SIR (signal-to-interference plus noise power ratio) estimating circuit 107, a TPC bit generating circuit 108. The receiving antenna 101 outputs a reception signal to the quasi-synchronization detecting circuit 102. The quasi-synchronization detecting circuit 102 converts a reception signal into a signal having a frequency band for a baseband process, i.e., a baseband signal, and outputs to the A/D converter 103. The A/D converter 103 A/D-converts the reception signal and outputs to the synchronization tracking circuit 104 and the despreading circuit 105.
The synchronization tracking circuit 104 carries out path searches using a spreading code for a specific user and outputs a path delay quantity of the path with the highest correlation with the spreading code among the searched paths to the despreading circuit 105. The despreading circuit 105 despreads the baseband signal based on the path delay quantity and outputs to the demodulating circuit 106. The demodulating circuit 106 carries out a bit phase adjustment to the reception signal and outputs to the SIR estimating circuit 107. The SIR estimating circuit 107 estimates an SIR value based on the demodulated reception signal and outputs the SIR value to the TPC bit generating circuit 108.
The TPC bit generating circuit 108 compares the SIR value and a reference SIR value supplied from a host apparatus (not illustrated) and generates a TPC bit signal based on the comparison result. That is, the TPC bit generating circuit 108 generates the TPC bit signal to increase transmission power, if (reference SIR value)>(estimated SIR value), and generates the TPC bit to decrease the transmission power, if (reference SIR value)<(estimated SIR value).
Such a CDMA receiving apparatus may be provided in a base station and a mobile station. In the transmission power control using the CDMA receiving apparatus, when the base station and the mobile station in a cell of the base station communicate with each other, the mobile station measures the SIR value of the signal transmitted from the base station, and determines the TPC bit signal for controlling the transmission power of the base station based on the measurement result. Then, the TPC bit signal is inserted in a transmission signal and transmitted to the base station. The base station receives the transmission signal from the mobile station, extracts the TPC bit signal from the transmission signal and updates the transmission power in accordance with the TPC bit signal.
The base station measures the SIR value of the transmission signal from the mobile station, and determines the TPC bit signal for controlling the transmission power of the mobile station based on the measurement result. Then, a TPC bit signal is inserted in a transmission signal and transmitted to the mobile station. The mobile station receives the transmission signal from the base station, extracts the TPC bit signal from the transmission signal and updates the transmission power in accordance with the TPC bit signal.
A pilot bit pattern of a known bit pattern is arranged in a transmission signal for every slot (periodically) and the TPC bit signal is arranged for every slot. Therefore, the pilot bit pattern is used as a reference phase signal to carry out quasi-synchronization detection to the transmission signal and to measure an SIR value.
The CDMA receiving apparatus extracts a pilot bit pattern from the reception slot received from the counter station, measures an SIR value from the pilot bit pattern, and generates a TPC bit signal based on the SIR value. Then, the TPC bit signal is inserted in the transmission slot and transmitted to the counter station. The reception slot used to measure the SIR value and the transmission slot used to insert the TPC bit signal generated based on the SIR value have a one-to-one correspondence relation.
In such a CDMA receiving apparatus, when the path delay quantity is large, the timing of reception of the pilot bit pattern is delayed. As a result, the timings of the generations of the SIR value and the TPC bit signal are delayed. Therefore, it sometimes becomes not possible to correctly insert the TPC bit signal in the transmission slot.
In conjunction with the above description, a transmission power control apparatus is disclosed in Japanese Laid Open Patent application (JP-A-Heisei 9-284205). In this reference, a reception SIR measuring apparatus uses a signal in which a known pilot signal is inserted in a data signal with a predetermined interval. A detecting section carries out interpolation synchronization detection using the pilot signal. A power value of data symbol determined through the interpolation is calculated. A summation of the power values of the data symbol is calculated over predetermined pilot signal intervals. A difference in the power value from a fading envelope at the same sampling time as the data symbol determined is calculated. The power value differences are summed over predetermined pilot signal intervals. Then, a ratio between the summation of power values of the data symbol and the summation of the power value differences is calculated, and the ratio is used as an SIR.
Also, a method of controlling transmission power in a CDMA mobile communication system Is disclosed in Japanese Laid Open Patent application (JP-A-Heisei 10-145293). In this reference, a first communication apparatus detects a signal level of a communication signal from a second communication apparatus at a predetermined timing. A transmission power control signal is generated based on the detected signal level and arranged in a transmission signal from the first communication apparatus to the second communication apparatus at a predetermined position.
Also, a method of measuring a reception SIR is disclosed in Japanese Laid Open Patent application (JP-A-Heisei 10-13364). In the reference, a synchronization detecting apparatus on a receiving side carries out synchronization detection to a signal in which a known pilot signal is inserted in an information signal in a predetermined in the transmission side. The synchronization detecting apparatus calculates a power value of a fading envelope obtained by interpolation on a complex signal space of a baseband. The power value is averaged in the predetermined pilot signal interval, and the average value is handled as a reception desired wave power. A ratio of the received data symbol and the fading envelope obtained by the interpolation is calculated on the complex signal space, and the ratio is multiplied by the square of the fading envelope. A signal point is determined based on the multiplying result and the fading envelope containing an interference ingredient is calculated using the received data symbol and the determining value. A difference between the calculated value and the interpolated fading envelope is calculated. The square of the differences is integrated over the pilot signal interval. The integrated values are averaged over a plurality of pilot intervals. The average value is handled as a reception interference wave power. Then, a ratio between the reception desired wave power and the reception interference wave power is set as a SIR value.
Also, a radio communication apparatus is disclosed in Japanese Laid Open Patent application (JP-A-Heisei 11-331071). In this reference, a data arrangement determining section determines the arrangement of pilot data and transmission power control data containing the transmission power control information which is based on the measurement result of a reception quality in the slot based on a processing delay and a propagation delay which are needed to control transmission power. A slot offset setting section sets an offset for the slot position relation between an upward channel and a downward channel.
Also, a mobile communications system is disclosed in Japanese Patent No. 2,785,804. In this reference, a carrier signal is expressed by an in-phase component and an orthogonal component and a carrier signal detecting section detects a carrier signal point for every constant period. An amplitude correcting section corrects the amplitude of the carrier signal point based on previous transmission power control values. An estimating section estimates the carrier signal point where the transmission power control is next carried out, using the carrier signal point with the amplitude corrected. A comparing section compares power at the estimated carrier signal point with a predetermined reference value. A transmission power control unit generates a transmission power control value when the transmission power control is next carried out based on the comparison result. A memory stores and supplies the transmission power control value to the amplitude correcting section as the previous transmission power control value. A transmitting section transmits the transmission power control value. A base station includes the above sections and a transmission power control circuit. Each of a plurality of mobile stations is connected with the base station using an identical frequency electric wave, and is controlled based on the transmission power control value transmitted from the base station such that the reception signal powers from the plurality of mobile stations in the base station are equal to each other.

CDMA receiving apparatus with transmission power control using previous SIR value


The present invention relates to an appliance connector device having an A plug contact, a B plug contact and a G plug contact, an A′ terminal, a B′ terminal and a G′ terminal, an electrically conducting filter jacket and a filter module, wherein the filter module has an A″ conductor, a B″ conductor and a G″ conductor, wherein the A contact is connected to the A′ terminal via the A″ conductor, wherein the B contact is connected to the B′ terminal via the B″ conductor, wherein the G contact is connected to the G′ terminal via the G″ conductor, wherein the G″ conductor of the filter module has a shielding plate extending in a cross-sectional plane of the filter jacket and wherein the filter module has capacitance elements on both sides of the shielding plate with conducting surfaces aligned parallel to the shielding plate to generate capacitances between the A″ conductor and the B″ conductor and between these conductors and the G″ conductor. With such a plug device, it is provided, in particular for improving the ground connection of the G″ conductor of the filter module, that the shielding plate is provided with a plurality of contact fingers at the edge along most of its circumference, these contact fingers being in contact with the filter jacket on the inside under elastic tension, and the filter element has a contact surface for establishing a ground connection.

1. Field of the Invention
The present invention relates to an appliance connector device, comprising an A plug contact, a B plug contact and a G plug contact, an A terminal, a B terminal and a G terminal, an electrically conducting filter jacket and a filter module, wherein the filter module has an A conductor, a B conductor and a G conductor; wherein the A contact is connected to the A terminal via the A conductor; wherein the B contact is connected to the B terminal via the B conductor; wherein the G contact is connected to the G conductor and the G terminal; wherein the G conductor of the filter module has a shielding plate extending in a cross-sectional plane of the filter jacket; and wherein the filter module has capacitance elements on both sides of the shielding plate with conducting surfaces aligned in parallel with the shielding plate for generating capacitances between the A conductor and the B conductor and between each of these conductors and the G conductor.
2. Description of the Prior Art
Such an appliance connector device is known from US 2005/0018374. Due to the specially balanced design of the filter module of this plug device, preventing parasitic inductances, very good damping over a wide frequency range of approx. 3 MHz up to several GHz can be achieved. However, the quality of the damping depends in a sensitive manner on the ground connection of the shielding plate and the parts electrically connected to it.
With the known device, this ground connection is accomplished over several steps. First the shielding plate is connected to an electrically conducting housing of the filter module. The filter housing is in turn wrapped with an external electrically conducting shield that forms the filter jacket. The external electrically conducting shield is additionally wrapped around an internal conducting shield which is curved over a front insulating housing part that holds the plug contacts. Only this internal shield is provided with contact surfaces for contacting an electrically conducting mounting board on which the plug device can be assembled

Appliance connector device with integrated filter module