Power quality detection, monitoring, reporting, recording and communication in a revenue accuracy electrical power meter is disclosed. Transient events are detected by monitoring the wave shape of the electrical power and comparing deviations to a known threshold. Sags and Swells are detected by computing root mean square value over a rolling window and comparing the computed value with a known threshold. Harmonic frequencies and symmetrical components are quantified by a known algorithm and compared with a known threshold. Incoming waveforms are stored to memory. All recorded and computed data is moved to non-volatile storage via direct memory access transfer in the event that a power quality event jeopardizes the operating power of the meter. Further, the meter provides a power supply utilizing high and low capacitive storage banks to supply sufficient energy to survive short duration power quality events which jeopardize the meter""s operating power.

A microfiche appendix, Appendix A, is included of a computer program listing. The total number of microfiche is 6. The total number of frames is 186. A second microfiche appendix, Appendix B, is also included of schematic diagrams. The total number of microfiche is 1 and the total number of frames is 23.
A portion of the disclosure of this patent document contains material which is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the Patent and Trademark Office patent file or records, but otherwise reserves all copyright rights whatsoever.
This invention relates to revenue meters of the type used by energy suppliers to accurately measure electrical energy delivered to consumers for the purposes of billing and/or collecting revenue and more particularly, this invention relates to revenue meters having power quality monitoring, detection, quantification and reporting capabilities.
In a typical electrical distribution system, electrical energy is generated by an electrical supplier or utility company and distributed to consumers via a power distribution network. The power distribution network is the network of electrical distribution wires which link the electrical supplier to its consumers. Typically, electricity from a utility is fed from a primary substation over a distribution cable to several local substations. At the substations, the supply is transformed by distribution transformers from a relatively high voltage on the distributor cable to a lower voltage at which it is supplied to the end consumer. From the substations, the power is provided to industrial users over a distributed power network that supplies power to various loads. Such loads may include, for example, various power machines.
At the consumer""s facility, there will typically be an electrical energy meter (xe2x80x9crevenue meterxe2x80x9d) connected between the consumer and the power distribution network so as to measure the consumer""s electrical demand. The revenue meter is an electrical energy measurement device which accurately measures the amount of electrical energy flowing to the consumer from the supplier. The amount of electrical energy measured by the meter is then used to determine the amount for which the energy supplier should be compensated.
Typically, the electrical energy is delivered to consumers as an alternating current (xe2x80x9cACxe2x80x9d) voltage that approximates a sine wave over a time period. The term xe2x80x9calternating waveformxe2x80x9d generally describes any symmetrical waveform, including square, sawtooth, triangular, and sinusoidal waves, whose polarity varies regularly with time. The term xe2x80x9cACxe2x80x9d (i.e., alternating current), however, almost always means that the current is produced from the application of a sinusoidal voltage, i.e., AC voltage. The expected frequency of the AC voltage, e.g., 50 Hertz (xe2x80x9cHzxe2x80x9d), 60 Hz, or 400 Hz, is usually referred to as the xe2x80x9cfundamentalxe2x80x9d frequency. Integer multiples of this fundamental frequency are usually referred to as harmonic frequencies.
While the fundamental frequency is the frequency that the electrical energy is expected to arrive with, various distribution system and environmental factors can distort the fundamental frequency, i.e., harmonic distortion, can cause spikes, surges, or sags, and can cause blackouts, brownouts, or other distribution system problems. These problems can greatly affect the quality of power received by the power consumer at its facility or residence as well as make accurate determination of the actual energy delivered to the consumer very difficult.
In order to solve these problems, revenue meters have been developed to provide improved techniques for accurately measuring the amount of power used by the consumer so that the consumer is charged an appropriate amount and so that the utility company receives appropriate compensation for the power delivered and used by the consumer. Examples of such metering systems are well known in the art.
While these conventional revenue accuracy type metering systems provide information about the quality of the power, i.e., frequency and duration of blackouts, brownouts, harmonic distortions, surges, sags, swells, imbalances, huntings, chronic overvoltages, spikes, transients, line noise, or the like, received by a power consumer at a particular consumer site, they fail to monitor and quantify the power quality with a sufficient level of detail. Blackouts, brownouts, harmonic distortions, surges, sags, swells, imbalances, huntings, chronic overvoltages, spikes, transients and line noise are all examples of power quality events. As utility companies become more and more deregulated, these companies will likely be competing more aggressively for various consumers, particularly heavy power users, and the quality of the power received by the power consumer is likely to be important. This, in turn, means that accurate and detailed reporting and quantification of power quality events and overall power quality will become more and more important as well.
For example, one competitive advantage that some utility companies may have over their competitors could be a higher quality of the power supplied to and received by the consumer during certain time periods. One company may promote the fact that it has fewer times during a month that power surges reached the consumer causing potential damage to computer systems or the like at the consumer site. Another company may promote that it has fewer times during a month when the voltage level delivered to the consumer was not within predetermined ranges which may be detrimental to electromagnetic devices such as motors or relays. Previous revenue accuracy meters which provide for measuring quality of power in general lack the necessary accuracy and features to provide the consumer and the power utility with the needed information.
Accordingly, there is a need for a revenue accuracy meter that is capable of monitoring, reporting and quantifying the quality of power with a high level of detail and accuracy. Further there is a need for a revenue accuracy meter that can continue to monitor and quantify data throughout the duration of a power quality event and prevent loss of recorded power quality information in the event of a catastrophic power quality event such as a complete power failure.
By way of introduction, the preferred embodiments described below relate to revenue accuracy electrical power metering devices with the ability to detect, monitor, report, quantify and communicate power quality information about the power which they are metering. More particularly, the preferred embodiments relate to revenue accuracy electrical metering devices having the capabilities of power quality event xe2x80x9cride thruxe2x80x9d, transient detection, wave shape quantification, sag/swell detection, harmonic content quantification, symmetrical component quantification, waveform recording and direct memory access data transfer. These capabilities provide a revenue accuracy meter which can continue to monitor and quantify data throughout the duration of a power quality event and prevent loss of recorded power quality information in the event of a catastrophic power quality event such as a complete power failure.

A-base revenue meter with power quality features


Disclosed is a display device for detecting working load of a CPU which includes a resistor having a low resistance connected in series between a power supply and the CPU. The voltage drop across the resistor is amplified by a differential amplifier. The amplified voltage is converted into digital signal by means of an A/D converter. A plurality of LEDs are driven by the digital signal to responsively show the working load state of the CPU.

For desktop and notebook computers, it becomes more and more important to manage power source. The more working load of a CPU has, the more electricity consumption it takes, i.e. the working load of the CPU is proportional to the electricity consumption. Therefore, the so-called environmental protection computer was developed and are available in the market. In the operation of the environmental protection computer, if for a period of time a user does not input a command, the computer enters an idle state automatically in order to save electrical power. No matter whether the environmental protection computer is in idle state or in operation state, the user cannot know the present working load of the CPU from the outside of the computer, thus, the optimum state of the CPU cannot be monitored and controlled.

Display device for detecting working load of a CPU


A method of initializing memory parameters of a main storage device at a time of starting an information processing apparatus includes acquiring a temperature at the time of starting the information processing apparatus; and initializing the memory parameters based on the temperature.

1. Field of the Invention
The present invention relates to a technology for ensuring a stable operation of an information processing apparatus by setting suitable memory parameters when activating at low and high temperature environments.
2. Description of the Related Art
Conventionally, there are initializing apparatuses that initialize memory parameters of a main storage device when activating an information processing apparatus. Before activating an operating system and setting the memory parameters of the main storage device, the initializing apparatus initializes preset fixed values as the memory parameters of the main storage device and activates the information processing apparatus.
In general information processing apparatuses, even within a guaranteed temperature range, setting of the memory parameter of the main storage device is not suitable for low-temperature or high-temperature environments. Therefore, operational errors frequently occur in accessing the memory when activating or during operation, so that the device does not activate. For example, Japanese Patent Application Laid-Open No. S62-247417 discloses a technique of, when the temperature at the time of activating the information processing apparatus is lower than a guaranteed temperature, stably activating a program when the temperature of the information processing apparatus reaches a preset temperature.
However, since the conventional technique is used for stably activating the program when the temperature of the information processing apparatus deviates from the range of the guaranteed temperature, and since memory parameter settings for the main storage device are not suitable for low-temperature or high-temperature environments even though the information processing apparatus is within the range of the guaranteed temperature, operational errors in accessing the memory occur at the time of activating or during operation so that the problem of failed activation remains unsolved.

Memory parameter initialization based on a temperature acquired at startup


Improved performance in reflectance photometry is obtained by employing an optical fiber to direct collimated light to a test area and to return both diffuse and specular light from the test area. Specular light is prevented from reaching a light detector by a spatial filter, while diffuse light is collected and measured.

Medical conditions are often diagnosed or monitored with the assistance of test strips that provide an optical response, (e.g., color) to reactions between analytes in a biological sample (e.g., glucose in whole blood) and reagents disposed on the test strip. Although an optical response can be read visually, frequently they are measured using reflectance photometry. In that method, light is directed onto a reagent-containing area on the test strip and light returned from the test area is detected and correlated with the amount of the analyte reacted on the test strip.
Many patents disclose arrangements of light sources and detectors intended to improve the performance of instruments employing reflectance photometry. Examples include U.S. Pat. Nos. 6,181,417; 5,611,999; 4,890,926; 5,155,628; 5,449,898 and 5,477,326. Typically, LEDs are used to provide a high intensity, narrow band width light source. Light returned from a test strip that has been affected by the optical properties of the test area, referred to as diffuse light, is collected and measured by a photo detector. Returning light, referred to as specular light herein, which is not affected by the test area, is prevented from reaching the light detector.
The light, as it travels between the light source and the light detector, has been handled with various methods familiar to those skilled in the art. Optical fibers have been employed in some methods. An example is found in U.S. Pat. No. 5,701,181 in which an LED supplies light through an optical fiber bundle at an angle of 30 degrees to a pad on a test strip. The reflected light is directed to a light detector via a bi-convex lens positioned behind a threaded light baffle to a second bundle of optical fibers.
Another sensing device of a completely different design is described in U.S. Pat. Nos. 6,157,472 and 6,535,753. It employs optical fibers in a self-contained unit to direct light into a very small sensing tip directly in contact with the subject being tested and to receive light reflected back from the tip. The sensing tip is extremely small and is intended to enter the skin of a patient with little or no sensation being felt. The tip is coated with materials that are selected to react with the analyte to be detected. An example given in U.S. Pat. No. 6,535,753 employs a glucose oxidase reagent system. Optical fibers tipped with reagents have been proposed for measuring other analytes, such as nitric oxide. Another example is found in U.S. Pat. No. 6,636,652.
Typical instruments have a number of limitations that relate to the handling of light. The amount of diffused light returned from the test area is small and therefore the test area must be relatively large, leading to larger equipment than would be desired. The arrangements of the optical elements of the instruments present problems for the designer. Further, eliminating specular light reflections, that is, light that has not been affected by the optical response of the test area, generally is not completely successful. Consequently, further improvements in such instruments are continually sought. The present invention employs fiber optics to overcome limitations found in conventional instruments, as will be seen in the description below.


A power receiving device includes a resonant coil, an electromagnetic coupling coil, a rectifier circuit, a smoothing circuit, a voltage converter circuit which converts a voltage value of DC power into another voltage value, a control circuit which obtains voltage and current values of the DC power input to the voltage converter circuit, calculates an impedance from the obtained voltage and current values, and generates a pulse width modulation signal for controlling an output voltage and an output current of the voltage converter circuit, and a load to which the output voltage and the output current of the voltage converter circuit are input. The duty ratio of the pulse width modulation signal is determined so that the impedance calculated by the control circuit becomes close to an impedance for the maximum efficiency in transferring the AC power. The power receiving device is included in a contactless power feeding system.

1. Field of the Invention
One embodiment of the invention disclosed herein relates to power receiving devices and contactless power feeding systems.
2. Description of the Related Art
Various electronic devices have spread, and a wide variety of products are in the marketplace. In recent years, portable electronic devices such as mobile phones and digital video cameras are used very commonly. Further, electric propulsion vehicles, such as electric vehicles, which are supplied with power based on electricity, are showing up in the market.
In such mobile phones, digital video cameras, or electric propulsion vehicles, batteries serving as power storage units (also referred to as storage batteries) are incorporated. Currently, such a battery is usually charged by being placed in direct contact with a household AC power source, which is one of power feeding units. In a structure which has no battery or which does not use power stored in a battery, a device is operated by power fed directly from a household AC power source via a wire or the like.
On the other hand, methods by which batteries are charged without contact or power is fed to loads without contact have been researched and developed. Typical methods are an electromagnetic coupling method (also referred to as an electromagnetic induction method) (see Reference 1), a radio wave method (also referred to as a microwave method), and a resonance method (also referred to as a resonant method) (see References 2 to 4).
As described in References 2 to 4, in a contactless power feeding technique using a resonance method, a device that receives power (hereinafter referred to as a power receiving device) and a device that feeds power (hereinafter referred to as a power transmitting device) each have a resonant coil. Further, in each of the power receiving device and the power transmitting device, an electromagnetic coupling coil is provided. Feeding power from a power source to the resonant coil in the power transmitting device and feeding power from the resonant coil to a load in the power receiving device are conducted by the electromagnetic coupling coils.
The resonant coil of the power transmitting device and the resonant coil of the power receiving device are adjusted to exhibit resonance (LC resonance) at the same frequency ƒ0.
When the resonant coil of the power transmitting device and the resonant coil of the power receiving device face each other, they exhibit a resonance (resonant) phenomenon, and thereby efficient power transfer is achieved even when the distance between the resonant coils is large (see Reference 5).

Power receiving device and contactless power feeding system

Semiconductor Energy Laboratory Co., Ltd.


An electric motor assembly has an inner-rotor configuration including a hollow space within the rotor hub. The hollow space houses at least part of a brake for providing a braking force between a rotor and a stator of the electric motor. The brake can be configured to provide a braking force when no power is flowing to the electric motor, and can have an outer diameter less than an inner diameter of the rotor.

1. Field of the Invention
The invention relates generally to the field of electric motors having brakes.
2. Description of Related Art
Many applications that require electric motors also require brakes, hence there are a multitude of inventions combining these two technologies. In particular, electrically motorized wheel hub applications often require a mechanism for slowing the wheel, or holding the wheel stationary.
In one example, U.S. Pat. No. 5,438,228 to Couture et al. describes an electrically motorized wheel assembly where the electric motor has an outer-rotor configuration, and a mechanical brake assembly includes a disc located adjacent to the stator and having a diameter smaller than an inner diameter of the rotor.
In another example, U.S. Pat. No. 5,465,802 to Yang discloses an electric motor located within a wheel and having means for disengaging the motor from the wheel axle. In particular, a rotor is fixed inside a wheel frame, and a stator is located within the rotor and is attached to an axle. A brake element fixes the stator relative to the axle when actuated, so that the stator and the axle rotate together. When the brake element is not actuated, the stator rotates freely about the axle with the wheel when no current is supplied to the motor. The brake does not brake the motor output, but instead engages and disengages the motor with respect to the wheel axle, thus allowing the wheel to rotate freely when no current is supplied to the motor.
U.S. Pat. No. 3,626,220 to Niculescu, U.S. Pat. No. 4,022,301 to Hansen, U.S. Pat. No. 4,103,763 to Glockner et al., U.S. Pat. No. 4,494,058 to Berti, No. 4,910,423 to Werber, U.S. Pat. No. 5,050,711 to Sawato, U.S. Pat. No. 5,121,018 to Oldakowski and U.S. Pat. Nos. 5,306,989 and 5,406,180 to Feller describe various electric motors each having an inner-rotor configuration and a brake mechanism that is larger in diameter than the motor rotor.
Such motor and brake combinations can be relatively bulky. They are also suboptimal for some applications, such as wheel drives, where it desirable to minimize an axial length of the electric motor and brake components.
Alternatively, electric current can be applied to the motor in a controlled fashion to generate a force between the rotor and the stator that maintains the position of the rotor relative to the stator and thus holds the wheel stationary. If the wheel is moving, the current can be controlled to generate a force between the rotor and the stator that reduces the velocity of the rotor relative to the stator, thus slowing the wheel.
However, it may not be desirable to expend electrical energy to hold the wheel parked and stationary. In addition, mechanical brakes are typically simpler, less expensive, more reliable and consume less electrical energy (if any) than electric motor systems that generate braking force by selectively applying electrical power to the motor.


A transmission component for processing priority packets supported by using a single chip's buffer structure. Packets of network data are divided into high priority packets and low priority packets. High priority packets in the component are sent first, followed by low priority packets in order to satisfy priority requirement. Moreover, packets are transmitted continuously without stopping to maintain packet transmission at high performance. Furthermore, the transmission component of the present invention is compatible with different kinds of chip structure, and therefore no hardware must be changed when applied to different kinds of chip structure.

The effectiveness of general purpose stand alone computers, such as the personal computer found in most office environments and the laptop computers increasingly used by professionals requiring portability, has been substantially improved by allowing communications between machines over a communications network. Such a network of computers allows the resources of one computer to be shared with other computers in the network. For example, storage areas that have files, printers, modems, and other resources may all be advantageously shared.
The data that is shared between computers is sent in packets across the physical network connection and read by destination computers. Such packetized network data may be requests for shared resources, data, such as a file, or other information that must be communicated from one computer to the other. As used herein, the term "network data" refers to data or information that is actually transmitted over the communications network between different computers.
On a particular computer or node of the network, a network interface card (NIC) or network card monitors the physical communications channel for packets destined for that computer, and transmits packets of network data destined for other computers. Software components run on the node computer under direction or control of the operating system or the structures for managing and controlling the network card operations. Furthermore, other software components exist to further abstract the network communications channel and provide more and more general networking interfaces for higher layers using their services. The layered approach allows compartmentalization and easier development of network applications. One model used to provide a structure for layered software component development is the seven-layer ISO model that is well known in the art. While actual implementations of the ISO model do not necessarily rigidly isolate each particular layer as a separate component exposing its own interface to layers above and below, the concepts of the model are generally applicable. The lower layers of the ISO model are the data link layer implemented by a network card device driver, and the transport and network layers implemented as a transport protocol driver layer.
Lower level networking functions, such as controlling a network card and the initial processing of packetized network data, are handled by special system software components called drivers. Drivers integrate with a host operating system according to a specific architecture and have special privileges for accessing system resources. Reference will be made to the Windows NT® or Windows 98® operating system available from the Mircrosoft Corporation.
Because there are different types of transport protocols developed over time by different entities for different reasons, there may be different types of transport protocol drivers acting as software components running on a single host computer system in order to provide the necessary networking capabilities for a given installation. Some common transport protocols include TCP/IP, IPX, AppleTalk®, and others. Each transport protocol driver will communicate with one or more individual network card device drivers in order to send network data over a communications network and to receive incoming packets from the communications network.
Furthermore, because there are a multitude of network cards provided by numerous manufacturers, there is a corresponding large number of potential network card device drivers for different chip structures, such as DC21140, DC21142, DC21143, etc., all of different network cards. In order to support full connectivity to the transport protocol drivers, each network card device driver must support the ability to communicate with each different type of transport protocol driver.
In addition, there are many instances where information between a transport protocol driver and a network card device driver may have to be communicated in order to properly process the network data either prior to transmitting the data over the network or after receiving the data from the network. A general method for transmitting or receiving the data will prepare two queue channels for this issue. Then the driver will place the packet into the proper queue channel. For example, a higher priority packet will be sent out in the higher priority queue channel. Likewise, a lower priority packet will be sent out in the lower priority queue channel. Therefore at least two hardware First-in-First-out (FIFO) queue channels must be provided for communicating network data.
What is needed and what would be an advancement in the art would be a process that allows user defined data related to the processing of packetized network data to be efficiently, communicated with an advanced computability through the transmission component.

Transmission components for processing VLAN tag and priority packets supported by using single chip's buffer structure


A tray table apparatus includes a table carrier structure releasably mountable to a console element, wherein the table carrier structure is configured as a housing. The tray table apparatus further includes an adjustment mechanism housed within the table carrier structure, wherein the adjustment mechanism has a table support element movable relative to the table carrier structure. The tray table apparatus also includes a table element coupled to the table support element and together movable between at least a retracted stowed position in which the table element is housed within the table carrier structure and a deployed use position in which the table element protrudes from the table carrier structure.

Seat units, such as for an aircraft, can have a seat and an adjacent console element. The console element in some configuration has a tray table for the adjacent seat. For example, some known configurations provide an aircraft seat device having a table device with at least two linear guidance elements directly mounted to a console to allow a linear translational movement. In this known configuration, at least two pivot joints implement different rotational axes to carry out rotational movement of the table device. This configuration can make assembly, installation, and/or maintenance of the component parts difficult and/or time consuming. Additionally, the configuration may have a less appealing look as a result of the exposed elements.

Tray table apparatus for a console element, console element and seat unit


A method of rendering an image one or more pixels at a time in scanline order, wherein the image includes objects described by one or more levels, includes the steps of identifying at least one edge of the objects, with the at least one edge intersecting a first scanline, and building a compositing list for at least one identified edge. The compositing list includes levels that are activated on the first scanline at the identified edge and that contribute to at least one pixel on the first scanline in the rendered image. Additional steps include caching one or more of the compositing lists, wherein each cached compositing list is associated with a corresponding edge, checking, for a current edge intersecting a second scanline subsequent to the first scanline, whether the cached compositing list associated with the current edge is valid for the current edge on the second scanline, retrieving the cached compositing list if the checking step indicates that the cached compositing list is valid, and rendering one or more pixels on the second scanline using the retrieved compositing list.

When a computer application provides data to a device for printing and/or display, an intermediate description of the page is often given to the device driver software in a page description language, such as PostScript™ or PCL, which provide descriptions of the objects to be rendered onto the page, rather than a raster image of the page to be printed. Equivalently, a set of descriptions of graphics objects may be provided in function calls to a graphics interface, such as the Graphics Device Interface (GDI) in the Microsoft Windows™ operating system, or the X-11 in the UniX™ operating system. The page is typically rendered for printing and/or display by an object-based graphics system (or Raster Image Processor).
Most of these object based graphics systems utilize a large area of memory, known to the art as a framestore or a page buffer, to hold a pixel-based image of the page or screen for subsequent printing and/or display. Typically, the outlines of the graphic objects are calculated, filled and written into the framestore in sequence. For two-dimensional graphics, objects that appear in front of other objects are simply written into the framestore after the background objects, thereby replacing the background on a pixel by pixel basis. Higher priority graphic objects take precedence because they are drawn later than those of lower priority. This is commonly known to the art as "Painter's algorithm". Objects are passed down through the graphics device interface in priority order, from the rearmost object to the foremost object. The rearmost object has the lowest priority (or z-order), and the foremost object has the highest priority (or z-order).
The usual conventions used to describe orientations on a page are shown in FIGS. 25A and 25B, for portrait and landscape pages respectively. Page 2504 has a portrait orientation and page 2508 is in landscape orientation. A three-dimensional coordinate system is used to describe directions. Typically the top left corner of the page is considered the origin. Across the page is an increasing x direction 2502, 2506, and down the page is an increasing y direction 2503, 2507. An axis 2501, 2505 comes out of the page in an increasing z direction. Even though pages 2504, 2508 are two-dimensional, it is useful to have a three dimensional coordinate system. Objects on the page can appear in front of and/or behind other objects so it is sometimes desirable to give objects a z-level to which reference can be made.
Typically, each object is rasterized in scanline order and pixels are written to the framestore in sequential runs (pixel spans) along each scanline. Some graphics interfaces allow a logical or arithmetic operation to be specified, which is performed between one or more graphics objects and the already rendered pixels in the framestore. In these cases, the principle remains the same; objects (or groups of objects) are rasterized in scanline order, and the result of the specified operation is calculated and written to the framestore in sequential runs along each scanline.
There are essentially two problems with this technique. The first is that the technique requires fast random access to all of the pixels in the framestore. This is because each new object could affect any pixel in the framestore. For this reason, the framestore is normally kept in semiconductor random access memory (RAM). For high-resolution color printers the amount of RAM required can be very large, typically in excess of 100 Mbytes, which is relatively costly and difficult to run at high speed. The second problem is that many pixels in the framestore are over-painted (re-rendered) by later objects, often many times. Painting these pixels with the earlier objects can result in considerable wasted computation effort and wasted memory bandwidth. Both result in lower rendering performance.
One method for overcoming the large framestore problem is the use of "banding". When banding is used, only part of the framestore exists in memory at any one time. All of the objects to be drawn are retained in an object list by the rendering application. This object list is considered in object order as above, but the only pixel operations performed are those which fall within the part of the page intersected by the band. After all objects in the object list have been drawn, the band is complete, and can be sent to the printer (or to intermediate storage) and the process repeats for the next band on the page. With this method, the bands are rendered in order, down the page. There are some penalties with this technique, however. It is necessary to retain in a list all objects to be drawn on the page. It may also be necessary to reconsider the objects being drawn many times, possibly once for each band. As the number of bands increases, so too does the repetitious examination of the objects being rendered. Also, the technique of banding does not solve the problem of the cost of over-painting. In some implementations, the overhead of dividing the page into bands can also result in a performance penalty.
In some graphics systems implementing this banding method, the input graphics objects are first converted into a 'simplified' intermediate format, and stored in a "display list". The format and ordering of this display list is chosen to make the rendering process more efficient. For example, the entries in the display list are usually sorted in terms of increasing y co-ordinates and then x co-ordinates. Such use of an intermediate display list can alleviate some of the problems described in earlier methods, but the over-painting problem remains.
Some other graphic systems consider the image in scanline order. Again, all of the objects on the page are retained in a list, which can be an intermediate display list. On each scanline the objects which intersect that scanline are considered in priority order and for each object, spans of pixels between the intersection points of the object edges with the scanline are filled in a line store. This technique overcomes the large framestore problem, but however still suffers from the over-painting problem.
Other graphic systems utilize pixel-sequential rendering to overcome both the large framestore problem and the over-painting problem. In these systems, each pixel is generated in raster order. Again, all objects to be drawn are retained in a list. On each scanline, the edges of objects which intersect that scanline, are held in increasing order of their intersection with the scanline. These points of intersection, or edge crossings, are considered in turn, and are used to decide whether the associated object is being 'activated' or 'de-activated' by the edge. The activation count toggles which object is the topmost object and allows only the contributing objects to be painted onto the page. Some objects may be transparent, in which case the transparent objects and objects lying directly below them in z-order need to be combined to yield the output pixel. This combination using the object's transparency is called Alpha compositing.
Alpha (α) compositing is a mechanism used in computer graphics and image processing as a means of overlaying and combining two layers of two-dimensional color data to obtain a single output layer. Each layer has an array of pixels, with each pixel being formed by a set of values or channels. In alpha compositing, one channel is always the "a channel", which describes the opacity of the pixel to be reproduced. Opacity is the extent to which a pixel in a layer will override or obscure colour information from pixels on layers behind the layer in question. Opacity is often referred to by its conjugate name, transparency. In a normalised system, opacity=(1−transparency).
The remaining channels describe the colour of the pixel. The number of these remaining channels and the manner in which they describe the colour of the pixel is implementation specific. For example, there may be just one colour channel (in the case of greyscale or colour separated images), or there may be multiple colour channels (for example red, green and blue). These different ways of describing colour are often referred to as the colourspace of the image. It is assumed that the colourspace is the same for all pixels on a layer.
Graphic systems which use pixel-sequential rendering have significant advantages in that there is no framestore or line store and no unnecessary over-painting. Inherently less memory and less work in rendering is a result.
In pixel-sequential rendering systems, each scanline has to process edge crossings and determine which levels will be active for the next span. Generally this is done for every edge crossing for every scanline. The retrieval of the levels and sorting into the active level list may be an expensive and time-consuming process in the whole rendering pipeline. Typically, the level retrieval and sorting may consume 20% of the total render time. There is accordingly a need for more efficient methods for managing the lists of active levels.

Compositing list caching for a raster image processor


Laser power control arrangements interrupt power to a laser used in electro-optical readers upon detection of an over-power condition not conforming to preestablished standards to meet prevalent safety standards.

1. Field of the Invention
The present invention generally relates to electro-optical readers, such as laser scanners for reading indicia, such as bar code symbols and, more particularly, to laser power control arrangements for enhancing safety.
2. Description of the Related Art
Various electro-optical systems or readers have been developed for reading indicia such as bar code symbols appearing on a label or on a surface of an article. The bar code symbol itself is a coded pattern of graphic indicia comprised of a series of bars of various widths spaced apart from one another to bound spaces of various widths, the bars and spaces having different light reflecting characteristics. The readers function by electro-optically transforming the pattern of the graphic indicia into a time-varying electrical signal, which is digitized and decoded into data relating to the symbol being read.
Typically, a laser beam from a laser is directed along a light path toward a target that includes the bar code symbol on a target surface. A moving-beam scanner operates by repetitively sweeping the laser beam in a scan line or a series of scan lines across the symbol by means of motion of a scanning component, such as the laser itself or a scan mirror disposed in the path of the laser beam. Optics focus the laser beam into a beam spot on the target surface, and the motion of the scanning component sweeps the beam spot across the symbol to trace a scan line across the symbol. Motion of the scanning component is typically effected by an electrical drive motor.
The readers also include a sensor or photodetector which detects light along the scan line that is reflected or scattered from the symbol. The photodetector or sensor is positioned such that it has a field of view which ensures the capture of the reflected or scattered light, and converts the latter into an electrical analog signal.
In retroreflective light collection, a single optical component, e.g., a reciprocally oscillatory mirror, such as described in U.S. Pat. Nos. 4,816,661 or 4,409,470, both herein incorporated by reference, sweeps the beam across the target surface and directs the collected light to the sensor. In non-retroreflective light collection, the reflected laser light is not collected by the same optical component used for scanning. Instead, the sensor is independent of the scanning beam and has a large field of view. The reflected laser light may trace across the sensor.
Electronic control circuitry and software decode the electrical analog signal from the sensor into a digital representation of the data represented by the symbol that has been scanned. For example, the analog electrical signal generated by the photodetector may be converted by a digitizer into a pulse width modulated digitized signal, with the widths corresponding to the physical widths of the bars and spaces. Alternatively, the analog electrical signal may be processed directly by a software decoder. See, for example, U.S. Pat. No. 5,504,318.
The decoding process usually works by applying the digitized signal to a microprocessor running a software algorithm, which attempts to decode the signal. If a symbol is decoded successfully and completely, the decoding terminates, and an indicator of a successful read (such as a green light and/or audible beep) is provided to a user. Otherwise, the microprocessor receives the next scan, and performs another decoding into a binary representation of the data encoded in the symbol, and to the alphanumeric characters so represented. Once a successful read is obtained, the binary data is communicated to a host computer for further processing, for example, information retrieval from a look-up table.
Although reading performance is enhanced when the output power of the laser is increased, government regulatory safety standards dictate the maximum power output of the laser for human safety. Some of these standards require that the output power of the laser does not exceed regulatory limits even when control circuitry that normally regulates the laser output power fails.
For example, a monitor photodiode inside the laser housing is normally operative for monitoring the laser output power. The monitor photodiode is part of a feedback circuit for maintaining the laser output power constant during operation. If the monitor photodiode were to fail, or to become electrically disconnected from the feedback circuit, then the feedback signal would be lost, and the feedback circuit would increase the laser output power, possibly to a level exceeding regulatory limits.
Another example involves a drive transistor electrically connected in series with the laser and normally operative to generate a drive current to energize the laser. If the drive transistor were to fail, or to become electrically disconnected from the laser, then the laser output power might increase to levels exceeding regulatory limits, again compromising user and bystander safety.

Laser power control arrangements in electro-optical readers


The invention relates to a positioning mechanism (1) for releasably fixing at least one position of a positioning means (3) which can be displaced more or less linearly relative to positioning means (2) fixedly connected to a structure (45), e.g. a shoe, which provides a mount for at least one displaceable coupling means (9) which engages under the action of a spring system (39) in a female coupling part (20) of the positioning means (2) connected to the structure (45) in a position which fixes the position of the positioning means (2, 3) relative to one another. The coupling means (9) is mounted in the displaceable positioning means (3) so that it can be linearly displaced in a direction perpendicular to the displacement direction of the positioning means (3) and, in a position fixing the position between the positioning means (2, 3), engages by means of a coupling projection (21) with the female coupling part (20) of the positioning means (2) connected to the structure (45) and in a positioning seat (42) disposed in the displaceable positioning means (3).

1. Field of the Invention
The invention relates to a positioning mechanism for releasably fixing at least one position of a positioning means which can be displaced more or less linearly relative to a positioning means fixedly connected to a structure, for example a shoe, which provides a mount for at least one displaceable coupling means, which, under the action of a spring arrangement, engages in a female coupling part of the positioning means connected to the structure in a position which fixes the position of the positioning means relative to one another.
2. The Prior Art
Patent specification EP 1 169 932 A2 discloses a fixing means which can be positioned in several positions spaced apart from one another in the linear direction, in particular a shoe clasp for a sports shoe. A base plate is used to mount a bearing means in a linear guide system, which mounts a positioning means provided with a toothed contour on a top face. The bearing means is provided with a pivotable catch element in the form of a rocker, which, under the action of a spring, engages by means of catch projections in catch recesses provided in the base plate spaced apart from one another in the direction in which the bearing means is moved. By pivoting the rocker against the action of the spring about a pivot axis of the bearing means, the catch element can be disengaged from the catch recesses and the positioning element can therefore be moved in a linear direction relative to the base plate.
Another document, U.S. Pat. No. 4,674,156 A, discloses a clasp arrangement for a shoe, whereby a positioning element provided with a toothed contour on a top face is mounted so that it can be moved in a linear direction on a base plate secured to a region of the shoe. The base plate and the positioning element have mutually facing sets of support teeth which engage to fix a position. The positioning element is of a rocker-type design and is pivotable about an axis. The teeth are held in engagement by a spring-biasing action. When a force is applied to the rocker-type positioning element opposing the spring bias, the engagement is released in order to move the positioning element in a linear direction with respect to the base plate, thereby enabling a new position to be assumed.
Another document, U.S. Pat. No. 5,630,253 A, likewise discloses a positioning mechanism for a positioning means, in particular a shoe clasp. In this instance, a tooth element can be moved in a linear direction between two positions on a base plate attached to the shoe. The base plate has two circular orifices spaced at a distance part from one another in the linear direction, which are connected to one another by a slit. Facing the shoe interior and adapted to the cross-section of the orifices, a locking bolt is mounted in the tooth element so that it can rotate. Depending on the respective position of the locking bolt, a lock can be obtained in one of the two circular orifices due to flattened regions in the side of the cylindrical cross-section and the locking bolt can be pivoted by an angle of 90°, permitting two possible positions.

Positioning mechanism for positioning means, in particular of a shoe


An artificial neuron integrated circuit including a polarizable circuit element having a first electrode, a second electrode, and a polarizable material layer disposed between the first and second electrodes, the polarizable material layer changeable between a first polarization state and a second polarization state, in response to receiving a number of voltage pulses across the first and second electrodes, the polarizable material layer to change from one of the first and second polarization states to the other of the first and second polarization states, where each of the number of voltage pulses individually is insufficient to change the polarization state.

This invention is related to neuromorphic electronic elements and more particularly to artificial neurons.
Neuromorphic computing refers to a broad range of devices, models and computing architectures, which are inspired by the computation of the biological brain. Neuromorphic architectures are seen as a solution for overcoming the limitations of the conventional computers, which rely on the von Neumann sequential paradigm. The separation between computing units and memory in the conventional computers causes a low bandwidth, known as the von Neumann bottleneck. Moreover, power consumption issues associated with Moor's law and the Dennard scaling urge for low power computing alternatives. Mimicking the architecture and computation of the human brain represents a compelling alternative in this regard due to the brain's massive parallelism, low power consumption even for extremely complex tasks, fault tolerance and speed of computation.
The fundamental building blocks of the biological nervous system are neurons and their interconnections, called synapses. A neuron receives signals (spikes) from other neurons in the network. These signals are accumulated in the form of a potential increase in the neuron membrane (synaptic excitation) and can elicit an output spike from the neuron (the neuron fires) when a certain threshold potential is reached. After the output spike is emitted, the neuron returns to its starting rest state and is again ready to integrate incoming spikes. This behavior is usually described by the so called integrate-and-fire (IF) models. FIG. 1a to FIG. 1c show a schematic representation of an IF neuron N1 (100) which receives input spikes filtered through a column of synapses (101). Each incoming spike coming from another neuron in the network is filtered through a corresponding synaptic weight w. Neuron N1 implements integration and threshold firing behaviors.
The accumulated post-synaptic excitation in neuron N1 can eventually induce the emitting of an output forward- and back-propagating spike. The back-propagating spikes can potentially modify the strength (weight) of the synapses (101).
The rate (frequency) of the output spikes from neuron N1 depends on the total input spike amplitude: the larger the amplitude, the higher the firing rate.
The amplitude of the output spikes is generally constant, it does not depend on the input amplitude/rate, and does not present intermediate states. This is usually referred to as all-or-nothing firing.
Known hardware realizations of neurons have mainly been limited to CMOS analog (and digital) circuits. These neuron circuits contain several CMOS transistors and usually a capacitor, which is intended to accumulate charge and emulate the integration behavior. This approach may be not suitable to map more than 1010 neurons of the human brain, both from power consumption and area related considerations. Emerging nanoelectronic elements, such as resistive memory cells (e.g. phase change memory cell) or metal-to-insulator transition devices, have recently been considered for implementing neuronal behavior. Physical realization of compact neural networks with such elements might not be advantageous over the pure CMOS circuit approach, due to their intrinsic two-terminal structure and the need for additional electronic components (such as driving transistors, comparators, amplifiers, low-pass filters etc.) and/or high power consumption and/or CMOS incompatible integration.
A Ferroelectric Field-Effect Transistor (FeFET) is a three or four terminal device, including gate, source and drain terminals, or gate, source, drain and bulk terminals, respectively. For a certain class of ferroelectric materials (e.g. binary oxides, including hafnium and hafnium-zirconium oxide) employed for the gate insulator, the FeFET is a fully CMOS compatible device and provides fast read and write access times and lower power consumption.

Artificial neuron based on ferroelectric circuit element


The conductor bars of stator windings of rotating electric machines are usually multiply wound around with two-layer mica strips as major insulation and then impregnated with synthetic resin. It is proposed to use as first layer (L1) a mica strip which is provided on both sides with a textile carrier (24, 25). The further layers (L2, L3, L4, . . .) are then wound with a mica strip (27) provided with a textile carrier (28) only on one side. A major insulation constructed in this way is very homogeneous. The textile carrier (24), preferably consisting of glass fabric, which bears directly on the conductor surface, optimizes the impregnation and produces an effective bond between the insulation and conductor.

1. Field of the Invention
The invention relates to a high-voltage insulation for stator windings of electric machines, comprising a component conductor insulation and a major insulation, in which the component conductors are combined to form bars and surrounded by a major insulation which is impregnated with impregnating resin, the major insulation having multilayer strips which contain mica and carrier material and are wound around the bars in a plurality of layers.
2. Discussion of Background
The electrical and mechanical characteristics of the major insulation are decisive in the insulation of the stator winding conductors of electric machines against the grounded laminate stack. In the case of nominal voltages, of a few 100 V up to 30,000 V, the thickness of the major insulation varies in the range from 0.5 to 8 mm in conjunction with a stress of approximately 2 kV/mm. Added to this are the high demands on the insulation, which result from the thermal stress and, in the case of long machines, from thermomechanical expansion forces in the longitudinal direction of the slot. It is therefore necessary for the slot insulation to be applied in a fashion as free from air as possible and firmly joined to the conductor.
In recent years, the production of continuous winding insulations has to a great extent seen the introduction of vacuum impregnation using curable, solvent-free resins in the case of power windings. It permits the use of fine-mica or laminated-mica strips of the most varied type, which can firstly be wound onto the bars in a virtually dry form using a low proportion of binder. For this purpose, mica strips between 20 and 40 mm wide are applied by hand or machine in thicknesses of 0.1 to 0.3 mm overlapping in a precisely prescribed number of layers. Laminated-mica strips are generally processed using two support layers. Layers made from paper, polyester nonwoven or glass fabric are customary. Fine-mica strips can also be used with one support layer (cf. H. Sequenz "Herstellung der Wicklungen elektrischer Machinen" ["Production of the Windings of Electric Machines"], Springer Verlag, Vienna--N.Y., 1973, pages 147 ff.).
Basically for reasons of mechanical strength, mica strips which have a single support layer are wound on in such a way that the mica layer is directed against the conductor. Because of the structure of the mica material, the adhesion of the innermost layer is not very permanent. Given the mechanical and thermal stresses which occur during operation, detachment phenomena occur which reduce the dielectric strength of the major insulation.
The total proportion of mica in the major insulation is reduced if use is made of mica strips covered all along on both sides by supports.

High-voltage insulation for stator windings of electric machines


In an OFDM receiver, a synchronisation pulse for defining a Fast Fourier Transform window is generated by examining the output of a correlator to find a sub-interval within which there is maximum correlation between samples of the symbol separated by the length of the useful part of the symbol. The synchronisation pulse is generated during this sub-interval (102). Adjustments to the timing of the synchronisation pulse are made only if the current error is significant and persistent. A signal representing the amount of adjustment is used to determine phase rotations applied to the output of the FFT circuit.

OFDM systems are well known. Various techniques have been used for synchronisation of OFDM receivers. Some of these techniques require transmission of a special synchronisation signal. Other techniques rely on a standard OFDM signal, in which a complete symbol comprises a "useful part" and a "guard space", the guard space sometimes being referred to as a guard interval, cyclic extension or cyclic prefix.
The guard space precedes the useful part of the symbol and contains a repeat of the data at the end of the useful part. (This is equivalent to having a guard space after the useful part, containing data which is the same as that at the beginning of the useful part.)
Synchronisation techniques which rely upon the duplicated data in the guard space generally operate by performing a cross correlation between complex samples spaced apart by the length of the useful part of the symbol. This generates a timing pulse which is used in Fourier Transformation of the received signal. The timing of the pulse is such that the Fourier Transform window contains only data from a single symbol.
If the timing is incorrect, inter-symbol-interference (ISI) occurs. However, the use of the guard space allows a certain amount of variation in the timing of the pulse while still avoiding ISI. The guard space should be longer than the longest expected spread of delays amongst signals received via different paths. The guard space is relatively small compared with the useful part of the signal; typically, the guard space may contain Nu/32, Nu/16, Nu/8 or Nu/4 samples, where Nu is the number of samples in the useful part of the symbol.
Various techniques exist for deriving the synchronisation pulse from the cross-correlation. Although these operate adequately in common reception conditions, there are circumstances in which the timing pulse is generated at an undesirable point, leading to ISI.
The cross-correlator, in the absence of noise or multi-path interference, produces an output which averages to zero except during the time that the guard space samples are cross correlated with the samples, in the useful part of the symbol, which are of equal value. During that period, the cross-correlator produces a high-level output. This high-level output terminates at the end of one symbol and the beginning of the next. One prior art arrangement integrates the output of the correlator, and then peak-detects the resultant signal to produce a timing pulse at the end of each symbol.
In the case of multi-path interference, wherein the same signal is received via different delays, in order to avoid ISI, the synchronisation pulse should be generated during a window which has a width equal to the overlap between the guard spaces of the two received signals. However, the cross-correlator will produce a significant output throughout the period in which samples of either one or both of the guard space samples are being processed by the cross-correlator. In some circumstances, this will result in the timing pulse being provided outside the optimum window, thus resulting in ISI.
EP-A-0 772 332 describes other techniques for generating a synchronisation pulse. One such disclosed technique relies upon feeding the output of the correlator to a phase locked loop (PLL). This can also result in the synchronisation pulse being generated outside the optimum window in the case of significant noise or multi-path interference. Furthermore, a PLL requires a substantial number of symbol periods in order to achieve lock, which therefore results in substantial acquisition time.
A further problem which can arise in prior art arrangements results from the fact that, when the synchronisation pulse is adjusted as a result of, for example, changing signal conditions, the complex values in the frequency bins at the output of the FFT suffer varying degrees of phase rotation. Although a subsequent channel estimator and corrector can handle these changes, this can result in a further increase of acquisition time and requires a significant amount of processing power.
It would therefore be desirable to provide a technique for generating a synchronisation pulse in which these problems are avoided or at least mitigated.

Synchronizing pulse generating method and method of receiving OFDM signal


A light-emitting element having high luminous efficiency is provided. The light-emitting element includes a first organic compound, a second organic compound, and a third organic compound. The first organic compound and the second organic compound, in combination, are capable of forming an exciplex. The first organic compound is a phosphorescent compound and the third organic compound is a fluorescent compound. Light emitted from the light-emitting element includes light emitted from the third organic compound to which excitation energy is supplied from the exciplex formed by the first organic compound and the second organic compound.

In recent years, research and development have been extensively conducted on light-emitting elements using electroluminescence (EL). In the basic structure of such a light-emitting element, a layer containing a light-emitting substance (an EL layer) is interposed between a pair of electrodes. By application of a voltage between the electrodes of this element, light emission from the light-emitting substance can be obtained.
Since the above light-emitting element is a self-luminous type, a display device using this light-emitting element has advantages such as high visibility, no necessity of a backlight, and low power consumption. Furthermore, such a light-emitting element also has advantages that the element can be manufactured to be thin and lightweight, and has high response speed.
In a light-emitting element whose EL layer contains a light-emitting organic compound as a light-emitting substance and is provided between a pair of electrodes (e.g., an organic EL element), application of a voltage between the pair of electrodes causes injection of electrons from a cathode and holes from an anode into the EL layer having a light-emitting property and thus a current flows. By recombination of the injected electrons and holes, the light-emitting organic compound is brought into an excited state to provide light emission.
Note that excited states that can be formed by an organic compound are a singlet excited state (S*) and a triplet excited state (T*). Light emission from the singlet-excited state is referred to as fluorescence, and light emission from the triplet excited state is referred to as phosphorescence. The formation ratio of S* to T* in the light-emitting element is 1:3. In other words, a light-emitting element containing a compound that emits phosphorescence (phosphorescent compound) has higher luminous efficiency than a light-emitting element containing a compound that emits fluorescence (fluorescent compound). Therefore, light-emitting elements containing phosphorescent compounds capable of converting energy of the triplet excited state into light emission have been actively developed in recent years. In Non-Patent Document 1, for example, the temperature dependence of the luminescence quantum yield of an Ir complex, which is a phosphorescent compound, is investigated in detail to find the relationship between the molecular structure of an Ir complex and its luminescence quantum yield and the reason thereof.
Among light-emitting elements containing phosphorescent compounds, a light-emitting element that emits blue light in particular has yet been put into practical use because it is difficult to develop a stable compound having a high triplet excitation energy level. For this reason, the development of a light-emitting element containing a fluorescent compound, which is more stable, has been conducted and a technique for increasing the luminous efficiency of a light-emitting element containing a fluorescent compound (fluorescent element) has been searched.
As a material capable of partly converting triplet excitation energy into light emission, a thermally activated delayed fluorescent (TADF) material is known in addition to a phosphorescent compound. In a thermally activated delayed fluorescent material, a singlet excited state is generated from a triplet excited state by reverse intersystem crossing, and the singlet excited state is converted into light emission.
In order to increase the luminous efficiency of a light-emitting element using a thermally activated delayed fluorescent material, not only efficient generation of a singlet excited state from a triplet excited state but also efficient light emission from a singlet excited state, that is, high fluorescence quantum yield is important in a thermally activated delayed fluorescent material. It is, however, difficult to design a light-emitting material that meets these two.
Then, Patent Document 1 discloses a method in which in a light-emitting element containing a thermally activated delayed fluorescent material and a fluorescent compound, singlet excitation energy of the thermally activated delayed fluorescent material is transferred to the fluorescent compound and light emission is obtained from the fluorescent compound.

Light-emitting element, display device, electronic device, and lighting device


A memory device and method of making the memory device. The memory device comprises a storage transistor at a surface of a substrate. The storage transistor comprises a body portion between first and second source/drain regions, wherein the source/drain regions are regions of a first conductivity type. The storage transistor also comprises a gate structure that wraps at least partially around the body portion in at least two spatial planes. A bit line is connected to the first source/drain region and a word line is connected to the gate structure.

Semiconductor memory, such as a random access memory (RAM), is an essential semiconductor device. A RAM device allows the user to execute both read and write operations on its memory cells. DRAM is a specific category of RAM containing an array of individual memory cells. DRAM devices are commonly used with computers and computer systems. Typically, each cell includes a capacitor for holding a charge and a transistor for accessing the charge held in the capacitor. The transistor is often referred to as the access transistor or the select device of the DRAM cell.
FIG. 1 illustrates a portion of a DRAM memory circuit containing two neighboring DRAM cells 100. Each cell 100 contains a storage capacitor 104 and an access field effect transistor (FET) 102. For each cell, one side of the storage capacitor 104 is connected to a reference voltage (illustrated as a ground potential). The other side of the storage capacitor 104 is connected to the drain of the transistor device 102. The gate of the transistor device 102 is connected to a word line 108. The source of the transistor device 102 is connected to a bit line 106 (also known as a digit line). With the memory cell 100 components connected in this manner, the word line 108 controls access to the storage capacitor 104 by allowing or preventing the signal (representing a logic "0" or a logic "1") carried on the bit line 106 to be written to or read from the storage capacitor 104. Thus, each cell 100 may contain one bit of data (i.e., a "0" or "1").
As DRAM devices continue to physically shrink in size, it is difficult to provide capacitors in a small area with sufficient capacitance, typically greater than 20 femtoFarads (fF), in the case of a stacked capacitor DRAM cell. In addition, it is difficult to provide an access transistor with good off-state leakage characteristics for refresh operations and good on-state characteristics to write into the cell. Several designs have been proposed to address these issues
One such design is a silicon-on-insulator (SOI) based memory cell that eliminates the need for a capacitor. See, H. Wann et al., "A Capacitorless DRAM Cell on SOI Substrate," Tech. Digest, Int'l Electron Device Mtg., pp. 635-638, December 1993; P. Fazan et al., "Capacitor-less 1-T DRAM," 2002 IEEE Int'l. SOI Conf., pp. 10-13, October 2002; K. Inoh et al., "FBC (Floating Body Cell) for Embedded DRAM on SOI," 2003 Symp. on VLSI Tech. Digest, June 2003. Such references discuss one-transistor capacitor-less (1T/0C) DRAM cells and the operation of a DRAM circuit employing such cells.
Such capacitor-less cells, however, can suffer from poor performance characteristics related to retention time, access time, distribution characteristics, and reliability. In a 1T/0C DRAM cell, carriers are generated in the substrate bulk to write a "1," and are pulled out from the substrate bulk to write a "0." In a 1T/0C DRAM cell employing a planar SOI device, carrier generation can present problems. For example, when impact ionization is essential for operation of such a DRAM cell, device reliability can be poor and efficiency can be reduced at higher temperatures due to a decrease in ionization rate and, therefore, quantum yield. Also, a planar device can result in limited operations that consume power because the transistor must be in an on-state. Further, when the planar SOI devices are physically reduced in size, charge storage can be limited due to the reduced active area.

Memory devices, transistor devices and related methods