A graphical mapping system configured to display mapping information on a handheld device is disclosed. The system includes an image map database configured to store map data for a plurality of geographic areas, which is useful for generating graphical maps. The system further includes a vector map database configured to store vector map data, which is useful for generating vector “overlays” that correspond to the graphical maps. In response to a mapping request from a handheld device, a set of image mapping data and a corresponding set of vector mapping data, both associated with a given geographic location, are retrievable.

Electronic location-based mapping systems are useful for allowing users to generate graphical map images for a wide variety of geographical locations. In general, in response to being provided with an address or other unique identifier (e.g., phone number), an electronic location-based mapping system generates a graphical map on a computer screen, for example, which the user can print, if desired. Many such mapping systems are accessible over wide area networks, such as the Internet. One exemplary known mapping service is at www.mapquest.com. Other known location-based mapping systems wirelessly provide graphical maps to automotive navigational systems, such as, for example, On-Star™.
There are also known location-based mapping systems that are configured to provide and display mapping information to handheld devices, such as cellular telephones, handheld computers, personal digital assistants (PDAs) and the like. These handheld devices may communicate with the mapping system wirelessly or through a wired connection to a computer, such as through a docking station or cradle, for example. While it is convenient for users to be able to obtain mapping information through a handheld device, the relatively small display screen on many handheld devices limits the size of the map image that can be displayed, and, as a result, limits their usefulness. For example, because of the limited area on the screen of a handheld device, relatively little mapping detail, such as roads, street names, city/town names, etc., can be shown at any given time without unduly crowding the map image on the screen. Typically, the name of the largest cites and streets are shown to the exclusion of smaller towns and streets.
Another limitation of known location-based mapping systems for handheld devices is that they do not customize the graphical mapping information to the various handheld devices available in the market. A wide variety of different types and models of handheld devices are commercially-available, each potentially having a different type of display screen with different performance specifications, such as different sizes, resolutions, accepted graphic compression formats, available memory and zoom capabilities. Accordingly, a map image may appear overly-congested and unintelligible on one handheld device and may not use the full space or resolution capabilities on another handheld device.
The embodiments described herein were developed in view of the drawbacks and limitations described above.

Dynamic location-based mapping system and method


A grid-based resist simulator predicts how a wafer coated with one or more resist layers will develop when exposed with a mask pattern. Image intensity values are calculated at a grid of points on the wafer, and the image intensity points are analyzed with a resist simulator that produces a resist surface function. A threshold contour of the resist surface function defines how the mask pattern will print on a wafer.

In conventional photolithographic processing, features are created on an integrated circuit or other device by exposing a mask pattern onto a wafer that is coated with light sensitive resist materials. After exposure, the wafer is chemically and mechanically processed to create the features defined by the exposure pattern.
As the features created on a wafer become increasingly small, optical and other process distortions occur whereby the pattern of features that is desired to be created on a wafer will not match the pattern of features that is actually created on the wafer. To compensate for distortions, many photolithographic processes use one or more resolution enhancement techniques to improve the fidelity with which the desired pattern is printed on the wafer.
In most resolution enhancement techniques such as optical and process correction (OPC), a simulation is made of how a feature will print on a wafer. The simulation is then used to adjust a pattern contained on a mask or reticle in a way that compensates for the expected distortions. As part of the simulation, a model can be used that predicts how the light sensitive resist materials will behave when exposed with a particular mask pattern. Typically, simulations are conducted at sparsely chosen sampling locations or sites to reduce the overall processing time spent on simulation. The local values of image intensity and related other properties, such as derivatives, are calculated at these simulation sites to estimate the behavior of the resist at that point. Suitable site selection procedures are the subject of other inventions in this field, see for example U.S. Pat. No. 7,073,162, and U.S. Patent Publication No. 2005/0278686, both of which are herein incorporated by reference, to ensure the best representation when a sampling approach is taken.


A microprocessor is provided for supporting reduction of codes in size, wherein instructions are extended in units of 0.5 word from a basic one word code. A word of instruction, fetched from an external memory, is transferred to a decoding register via instruction buffers and a selector both operate in units of half words, then is decoded by a decoder. A storage unit stores a state of an instruction stored in an instruction buffer. A controlling unit controls the selector so that the instructions are transferred from instruction buffers to the decoding register in units of half words based on a direction from the decoder and the states stored in the storage unit.

(1) Field of the Invention
This invention relates to a microprocessor that processes data according to directions in a program, specifically to a microprocessor for supporting reduction of program codes in size.
(2) Description of the Prior Art
In these days, high-performances are expected for new microprocessor-embedded products. In order to realize such high-performance products, the programs of the microprocessors grow larger and larger. However, in the microprocessor-embedded products, the program should be stored in one or more ROMs. As a result, if the codes used in the programs increase in size, the capacity of a ROM and/or the number of ROMs should also increase, which is an obstacle in developing low-cost products. Therefore, it is desired to compress the code size as much as possible when such products are developed.
<First Conventional Technique>
One conventional technique for compressing the code size compresses the code size of each instruction executed by the microprocessor (e.g. NEC's V800 series and Hitachi's SH7000 series). The microprocessors of this technique execute instructions whose size is smaller than that of a data bus, Arithmetic Logic Unit (ALU), or registers (hereinafter ALU size). For example, the microprocessors execute 16-bit instructions while the ALU size is 32 bits.
The technique enables the replacement of a 32-bit instruction by a 16-bit instruction, thereby excluding unnecessary bits and efficiently compressing the total code size for a program.
However, this First Conventional Technique has a problem as described below.
Although the instruction size is smaller than the ALU size, the instruction size should be equal to or n times as large as the size of the instruction decoder of the microprocessor (n is integer). That is, an instruction is extended in units of 8 bits. For example, if the decoder is 8 bits in size, the instruction size should be any of 8, 16, 24, 32, . . . bits. The unit for the extension cannot be reduced to below 8 bits. As a result, even if 8 bits are not required for representing a value, 8 bits must be used. This creates a waste in the size of program codes due to the required use of unnecessary bits.
FIG. 1 shows a format of an instruction used in a conventional microprocessor. The instruction, "add #4, d0," instructs the microprocessor to add immediate value "4" to a value stored in register d0. The instruction uses 16 bits in total including 8 bits for specifying operation code "add #n,d0" and 8 bits for the immediate value "#n" which is "4" in this case. However, 8 bits are more than required to represent the value "4." An integer ranging from "-8" to "+7" requires only 4 bits. That means, 16 bits are used for the instruction which requires only 12 bits. This creates a waste in the size of program codes due to the required use of necessary bits.
<Second Conventional Technique>
A second Conventional Technique for compressing the code size is a method for effectively reading/writing data from/into a memory. This is achieved, e.g., by improving an addressing mode used in a data transfer instruction.
Both of FIGS. 2A and 2B are programs by which data is read/written from/into a memory. Both instruct the microprocessor to read a value stored in a memory, compute with the value, and store the computation result in the memory.
Instruction a1 in FIG. 2A is a load instruction by which a value stored in a location in a memory specified by an absolute address is read into register D0. Instruction a2 is an add instruction by which a value stored in register D1 is added to a value in register D0, then the result value is stored in register D0. Instruction a3 is a store instruction by which a value stored in register D0 is stored in a location in a memory specified by an absolute address. The basic part of these instructions has a length of 8 bits. An absolute address has a length of 16 bits. Accordingly, the total code size of the FIG. 2A program is 7 bytes. That means, 7 bytes are used for a set of data reading and writing from/into the memory.
In the FIG. 2A program, a 16-bit absolute address is used for each of two memory accesses. In the FIG. 2B program, an address register is used for memory accesses.
The program in FIG. 2B differs from that in FIG. 2A in that first it transfers an absolute address of the memory to an address register (instruction b1), secondly it transfers data from the memory to register D0 by specifying the address register (instruction b2), and thirdly it stores the computation result in the memory by specifying the address register (instruction b4).
Although the FIG. 2B program additionally includes an instruction for transferring an absolute address to an address register, only instruction b2 includes an absolute address. As a result, the total code size is reduced by one byte compared with the FIG. 2A program.
A large amount of program space can be reduced in a microprocessor if the code size for a set of memory accesses is reduced.
However, a problem of the Second Conventional Technique is that address registers are occupied when they are used for specifying absolute addresses of a memory. Therefore, a processor having fewer address registers may not always be able to use this method. Also, since a microprocessor, specifically a built-in microprocessor, frequently reads/writes data from/into a memory, address registers may not be used for other operations.

Microprocessor for supporting reduction of program codes in size

Matsushita Electric Industrial Co., Ltd.


An apparatus and method for removing excess material from a container with a follower plate pump assembly comprising providing an air bladder, disposing the bladder within the container, connecting the bladder to the air source, and inflating the bladder via the source when the follower plate has reached a point in the container where it no longer has the ability to pump material, the air bladder forcing material up to the follower plate.

1. Field of the Invention
The present invention relates generally to extracting viscous materials from containers using a pump assembly that includes a follower plate which is lowered into the container as material is removed. More particularly, the present invention relates to a method and apparatus for extracting excess material from containers after the follower plate has moved into the container to the point where the pump has lost its ability to further remove material.
2. Description of the Related Art
Pumps for pumping viscous fluids from relatively large containers such as cylindrical drums conventionally employ a follower plate, with the pump mounted above an orifice through the follower plate. U.S. Pat. No. 4,792,063 to Moore, which is hereby incorporated by reference, describes such pumps. In such systems, the follower plate is introduced into the container as the liquid is evacuated via pneumatic, hydraulic, or spring-driven means or simply by the vacuum that results from the removal of material. The pumping action creates a partial vacuum as the follower plate is drawn into the container, until the pump loses the ability to withdraw further material from the drum. The descending follower plate scrapes excess material from the sides of the container and forces the liquid into the pump to prime it and keep it primed. Normally considerable excess material is left in the container at the point that no further material can be removed. A bag often is inserted into such containers prior to filling to facilitate removal of this excess material, but this does not provide an efficient way to remove that material.

Method and apparatus for extracting excess material from containers


The present invention relates to a capsule sized to contain a weapon for launching and to withstand depth pressures. A telescoping nose section of the capsule, normally unextended around the weapon, extends at launch along a longitudinal axis of the capsule to provide the buoyancy used to lift the capsule out of a stored state and to ascent the capsule towards the surface. Once the surface is reached, a nose cone of the capsule is jettisoned to allow the weapon to exit the capsule.

(1) Field of the Invention
The present invention provides a buoyancy capsule sized to contain a weapon for launching. A telescoping nose section of the launch capsule, normally unextended around the weapon, extends at launch along a longitudinal axis of the capsule to provide the buoyancy used to lift the capsule out of a stored state and to ascent the capsule towards the surface. Once the surface is reached, a nose cone of the capsule is jettisoned to allow the weapon to exit the capsule.
(2) Description of the Prior Art
Presently, no weapons/vehicles presently used by the Navy are designed for continuous seawater emersion. Therefore, all existing weapon/vehicles require a protective capsule, especially in the case of aerial missiles and vehicles.
Existing capsules are large in size because the capsules integrate the required buoyancy directly into the large size of the capsule, such that the volume of the capsule is usually much larger than the weapon/vehicle it contains. The larger size is needed to provide the buoyancy force that is necessary to lift the weapon/vehicle out of the payload bay and to carry the weapon/vehicle to the surface.
Protective capsules must also be capable of withstanding the launch depth pressure. However, based on a given capsule wall thickness, a smaller capsule can withstand greater depth pressures than a large one. Therefore, by minimizing the size of the protective capsule, launch depth capability can be improved.
In the Lynch reference (U.S. Pat. No. 5,092,222), a launch system is disclosed. The system is a float-up launching system for launching missiles from submerged submarines utilizing a lightweight rigid cylindrical tube 18 telescoped over the missile 14 (FIGS. 1 and 2) while stored in the launcher so as to not take up additional volume. At launch, the tube 18 is extended forward of the missile 14 by a gas generator 32 to form a floatation chamber 12 (FIGS. 3 and 4) which creates extra buoyancy forward of the missile's center of gravity. At the surface of the water, the floatation chamber 12 is disconnected (FIG. 5) and the missile booster is ignited.
In the Vass reference (U.S. Pat. No. 4,003,291), a launch apparatus is disclosed. The apparatus launches a plurality of underwater rocket missiles utilizing inflatable bags 30 and a gas bottle 34.
In the Brown reference (U.S. Pat. No. 3,137,203), a launch system is disclosed. The missile launching system operates where a capsule 13 containing the missile 14 is ejected from a vertical tube 11 of a missile launching submarine. As the capsule 13 leaves the tube 11, a tube 17 is inflated from a supply of air under pressure from accumulators 18.
An improvement to existing launching technology would be to provide a capsule that is not significantly larger that the size of the contents of the capsule yet can provide the necessary buoyancy to launch the contents (such as weapons and vehicles). The capsule would telescope a portion of the capsule that completely surrounds the weapon with the portion able to increase the buoyancy of the capsule with the minimal use of gas generation at launch. A launch capsule that minimizes gas generation and use stowage space would be a significant improvement over existing launch capsules.

The United States as represented by the Secretary of the Navy


Disclosed is a lamp for a vehicle, which includes: an inner lens; a light source unit configured to irradiate light toward the inner lens; and a mirror reflector configured to extend an image of the inner lens by reflecting one area of the inner lens. As a result, a large-area image of the inner lens is able to be implemented.

In general, a vehicle includes various types of vehicular lamps having an illumination function for easily verifying an object positioned around the vehicle when the vehicle is driven at night and a signal function for notifying a driving state of the vehicle to other vehicles or road users.
For example, a head lamp and a fog lamp primarily aim at the illumination function and a turn signal lamp, a tail lamp, a brake lamp, a side marker, and the like primarily aim at the signal function. Installation criteria and specifications of the vehicular lamps are regulated by the law so that the vehicular lamps sufficiently show the functions.
Meanwhile, in recent years, since the vehicular lamps are key components in an exterior of the vehicle in addition to the illumination function or the signal function, such that an overall exterior of the vehicle has been determined according to the shape of the vehicular lamp at night, a demand for the vehicular lamps associated with various exterior designs has been increased.
Among them, a rear combination lamp is limited in a design for improving exterior quality.
Accordingly, as illustrated in FIG. 1, the rear combination lamp adopts various designs and structures including a type in which a plurality of LEDs and optic lenses are adopted, a type in which individual inner lens modules are adopted, a type in which a bent area is extended, or the like.
However, the type in which the plurality of LEDs and optic lenses are adopted is limited in implementing a 3D-effect design due to an increase in manufacturing cost. The type in which the individual inner lens modules are adopted use the individual inner lens modules and consequently, the type increases cost.
As the related art associated with the rear combination lamp, there is Korean Patent No. 10-1342059 (Dec. 10, 2013) entitled 'Rear Lamp for Vehicle'.
The rear lamp for the vehicle serves to perform two or more lamp functions. The rear lamp for the vehicle is characterized in improving the exterior design by using an optic unit installed in the rear lamp for the vehicle.
However, the rear lamp for the vehicle just attempts to improve the exterior design by using the optic unit, but uses a lens bent to the front of the vehicle, and as a result, the rear lamp for the vehicle is limited in implementing visibility and various lamp shapes according to view positions of a driver of a rear vehicle.


The present subject matter is generally directed to fuel systems for a gas turbine and related methods for monitoring fluid separation in the fuel systems. More particularly, the systems and methods include measuring pressure differentials and comparing the measurements to a predetermined value.

Gas turbine systems are widely utilized in fields such as power generation. A conventional gas turbine system includes a compressor, one or more combustors, and a turbine. Compressed air is generated in the compressor and provided to the combustor where the compressed air is mixed with fuel and combusted. Hot combustion gases flow from the combustor to the turbine in order to drive the gas turbine system and generate power.
In gas turbine systems, a fuel system supplies fuel to the combustor. In order to avoid unintended combustion outside of the combustor, the fuel system is configured to segregate fuel bearing piping from piping bearing other system fluids such as hot air or secondary fuels. In many gas turbine systems, the fuel system utilizes an inert gas to segregate the fuel from other system fluids. In such gas turbine systems, to maintain fluid separation between the fuel and other system fluids, the fuel system fills a cavity between the piping bearing fuel and the piping bearing other system fluids with the inert gas and maintains the inert gas at a pressure greater than the pressures of the fuel and other system fluids.
Currently to maintain fluid separation in a gas turbine, the inert gas separating the fuel and other system fluids is kept at a constant predetermined pressure. The predetermined pressure is determined by adding a safety margin to a historical maximum pressure of the fuel and other system fluids based on a worst-case scenario of turbine operating conditions. This method has often resulted in very high and overly conservative inert gas pressure requirements because many factors can affect the pressures of the fuel and other system fluids such as the ambient temperature of air entering the turbine and the load on the turbine. In turn, the high inert gas pressure requirements of the current method have also resulted in high inert gas flow rates, large high pressure inert gas storage requirements, and non-flexible control limits for system operation.
Accordingly, new systems and methods for monitoring fluid separation in a gas turbine are needed that account for changes in the required pressure of the inert gas.
In addition, within the fuel system, valves are used to control the flow of the fuel and other system fluids. Maintenance of these valves is vital to the operational efficiency and safety of the gas turbine system. For example, a leaking valve may result in unscheduled shutdowns of the turbine system or dangerous mixing of fuel and other system fluids. Currently, physical inspection is the primary method of determining the maintenance condition of valves in the fuel system. However, physical inspections are expensive and time consuming because they often require taking the turbine out of operation. Also, it is difficult to account for certain valve maintenance issues via physical inspection.
Accordingly, new systems and methods for monitoring the health of valves in gas turbines are needed in order to avoid costly shutdowns.

Systems and methods for monitoring fluid separation and/or monitoring the health of a valve


A terminal and a method for charging and discharging is described. The terminal includes a first hardware system and a second hardware system. The first hardware system includes a first processing unit, a first charging unit, a first switching unit, and a first battery unit. The second hardware system includes a second processing unit and a second battery unit. On the basis of a first status information piece and/or a second status information piece, the first processing unit controls the first charging unit to charge the first battery unit and/or the second battery unit via the first switching unit, or, the first processing unit controls the first switching unit to select the first battery unit or the second battery unit to supply the first hardware system with electricity.

With the development of terminal technology, portable devices for personal computations are more and more popular, such as pads, portable displays or the like. These light personal computing devices all use rechargeable batteries to supply electricity for a certain period of time. However, limited by its volume, the provided rechargeable battery cannot provide sufficient electric power to meet the power needs in a portable state. For example, for a portable display, when the battery of its own is out of power and the user cannot recharge the portable display in time, it is obvious that the portable display cannot work, thereby losing the meaning of portable.
At present, although there are typical scenes where two portable devices are connected (for example, a notebook is connected to as mobile phone and the two can exchange data), when the notebook is working, it cannot acquire the state information of the battery of the mobile phone. Moreover, it cannot select its own charging circuit to charge the mobile phone or to charge both of its own battery and the battery of the mobile phone at the same time on the basis of the state information of its own battery and state information of the battery of the mobile phone. When the notebook's own battery is in the low battery status, the notebook cannot control the battery of the mobile phone to supply electricity for the notebook either.
Based on this, during the process of the research and practice of the prior art, the inventor of the present invention has found that by means of the prior implementation, after two portable devices are connected, the processing unit of one of the portable dives cannot acquire the status information of the batteries of the two portable devices, so it cannot control which battery should be charged or whether the both two batteries should be changed simultaneously by the charging circuit; similarly, the processing unit cannot flexibly control which one of the two batteries should supply electricity for the portable devices.

Terminal and method for charging and discharging thereof


A mounting bracket for removable securement to a portion of a boat for receipt of an accessory such as a rod holder, a lantern holder, or trolling motor holder or the like. The bracket is removably securable to a gunnel and may be moved along the length of the gunnel.

The present invention relates to a mounting bracket for installation on boats to permit various and sundry items to be removably secured to the boat for use by persons in the boat.
Leisure boats are frequently used by the owners for multiple purposes such as, for example, fishing, pleasure riding, towing skis and the like. Obviously, in such varied environs, various accessories may be desirably applied temporarily to the boat to facilitate fishing or other needs, though primarily fishing. It is likewise important to be able to readily remove such items from the boat when not needed and when the boat is to be used for other than fishing.
Accessories as generally set forth above include many items that are used routinely in fishing such as, for example, rod holders, trolling motor supports, lantern holders for night fishing, and the like. These and many other items are useful in the fishing operation to ease the burdens of the fishermen and/or to facilitate an improved fishing experience. By way of example, when night fishing, it is desirable, if not necessary, that some sort of an arrangement be provided from which a lantern or light can be suspended over the water to either attract fish or to afford light by which the fisherman can more readily bait a hook, remove a fish, net a fish, or the like. Such a device is taught in my U.S. Pat. No. Des. 285,124.
In a fishing mode, boats are frequently equipped with small trolling motors for use after the boat has reached a particular location where a slow speed trolling operation is to be achieved. Normally, the boat would be equipped with a primary, larger motor for driving the boat on the body of water, and with a smaller trolling motor mounted forward along one side of the boat to be used in the slow speed, trolling operation. In instances when the trolling motor is not needed, due to its mounting structure, it may be pivoted upwardly out of the water and maintained on the boat. In such instances, it is desirable to provide a further support for an end of the motor which will hold the end of the motor off of the transom, etc. of the boat and will alleviate vibration of the motor which could be experienced during normal movement of the boat. An example of such a mount for a trolling motor is set forth in my U.S Design application, Ser. No. 07/513,196, filed Apr. 23, 1990.
Likewise, in certain types of fishing, it is desirable, once the line is cast to simply secure the rod to the boat, leaving same unattended until a fish strikes. Rod holders, therefore, not only enable the fisherman to go about other duties while awaiting a strike, but also permits the use of multiple rods by a single fisherman. An example of such a rod holder is set forth in my U.S. Pat. No. Des. 283,909. Likewise there are various and sundry other items that may be necwssary or desirable for mounting on a fishing or pleasure craft to achieve a particular end.
With each of the items mentioned above, it is desirable that each be capable of removable securement to the boat. Such permits the items to be taken off and stored during transport of the boat to and from the body of water as well as use of the boat on the water for pleasurable activities where the items if mounted to the boat could interfere with the activities, pose safety hazards, and the like. Each of the items is thus desirably removably mounted to the gunnel or gunwale of a boat so as to be easily placed in position for intended use and easily removed after such use.
Various and sundry types of devices and techniques have been employed for the removable securement of accessories to a boat. In some instances, the gunwale of the boat is adapted during or after manufacture so that accessories of the types noted above may be removably secured thereto. By way of example, prior attempts include the permanent securement by bolting, adhesives, implanting, and the like of mounting brackets to the gunwale of a boat or a portion thereof such that the appurtenances may be removably secured thereto. My prior U.S. Pat. No. Des. 301,383 illustrates such a permanent mounting bracket. While this bracket is excellent for its intended purpose, in any instance where the mounting bracket is permanently secured to the gunwale of the boat, not only is the user restricted in placement of the accessory, but also in a non-fishing or non-intended environment, the mounting brackets remain visible, and become an extraneous device along the general run of the gunwale which could be inadvertently contacted by occupants of the boat.
The mounting bracket according to the present invention overcomes certain of the problems discussed above in that not only is it removable from the boat along with the accessory to be mounted thereon, but likewise the bracket may be moved along the gunwale of the boat to a location as desired and secured there for the particular use of the accessory. The mounting bracket according to the present invention is particularly useful with a boat that has a caprail on the gunwale as depicted in FIG. 1. By way of example, such a device is provided on Dura Craft boats though the caprail type structure does not per se form a part of the present invention.
Moreover, while the Dura Craft boats may be obtained with accessories that mount along the gunwale and interrelate with the caprail such as a trolling motor bracket, such structures neither anticipate nor suggest the mounting bracket of the present invention. Likewise no other prior art is known which teaches or suggests the mounting bracket of the present invention.


A computer operated process (30) for inspecting patterns (32, 34) on an object (31) includes establishing different mismatch margins for different patterns (32, 34). A strict margin is associated with the pattern (32) in a critical area (12), and a relaxed margin is associated with the pattern (34) in a non-critical area (14). The inspection process (30) rejects the object (31) as being defective if a mismatch between a pattern (32, 34) and its respective master pattern (42, 44) exceeds a corresponding mismatch margin. Therefore, the inspection process (30) maintains a high standard for the pattern (32) in the critical area (12) and eases the standard for the pattern (34) in the non-critical area (14).

1. Technical Field
The present invention relates, in general, to inspection processes and, more particularly, to mask defect inspection processes.
2. Background Art
Semiconductor devices and integrated circuits are fabricated on semiconductor chips. A fabricated semiconductor chip has both active and inactive areas. The active areas are the areas in which actual semiconductor device or circuit features are formed, whereas the inactive areas do not have an actual device or circuit formed thereon. An inactive area can be located between adjacent active areas and/or on the periphery of the chip.
Photolithography is widely used in semiconductor device fabrication. In a photolithography process, a pattern is formed on a photoresist layer over a semiconductor chip using a mask. Through the pattern in the photoresist layer, an etching process forms structures, e.g., openings in dielectric layers, trenches in the semiconductor substrate, etc., on the chip. The etching process is often followed by other fabrication steps such as, for example, dopant implantation, oxide growth, chemical vapor deposition, metal deposition, polishing, and the likes. The quality of the mask can have significant effects on the reliability, performance, and yield of the semiconductor devices and/or circuits fabricated on the chip. Therefore, the mask is routinely inspected for defects. A defective mask is either repaired to restore its quality or scrapped and replaced.
During a mask inspection process, the mask is compared with a design layout that generated the mask. If a mismatch between a pattern on the mask and the design layout data exceeds a predetermined criterion, the mask is considered defective. The inspection process does not distinguish between patterns in active areas and patterns in inactive areas. However, the semiconductor device fabrication process is significantly more sensitive or intolerable to mismatches in the active areas than to mismatches in the inactive areas. In addition, the fabrication process can have different sensitivities to mismatches in different portions of the active areas. In order to ensure high quality, performance, reliability, and yield, the mismatch criterion is conventionally established according to the most sensitive or least tolerable pattern features in the active areas. Consequently, a mismatch in the inactive areas that has insignificant effect on the device performance can render the mask defective. This will result in unnecessary scraps and/or repairs of the mask, thereby increasing the cost and cycle time of the semiconductor device fabrication process.
Accordingly, it would be advantageous to have a mask inspection process that improves the time efficiency and cost efficiency of semiconductor device fabrication processes. It is desirable for the process to be simple and easy to implement. It would of further advantage for the process to be compatible with existing mask inspection apparatuses.
Generally, the present invention provides a process for inspecting an object. By way of example, the object is a mask or a reticle used in a photolithography process, and the process inspects the mask to detect defects in the patterns on the mask. In accordance with the present invention, the inspection process establishes at least two defect criteria or margins. A first criterion or margin is associated with patterns in a more sensitive or critical area on the mask, and a second criterion or margin is associated with patterns in a less sensitive or critical area on the mask. The first criterion is stricter than the second criterion. In other words, the first margin is smaller than the second margin. The inspection process rejects the mask as defective if a mismatch between a pattern in the more critical area and the predetermined design data exceeds the strict first criterion. The inspection process also rejects the mask as defective only if a mismatch between a pattern in the less critical area and the predetermined design data exceeds the relaxed second criterion. Therefore, the inspection process is able to maintain a high standard on the mask in the more critical areas and relax the standard in the less critical areas. Consequently, the quality of the mask is ensured without incurring unnecessary repair and scrap costs of the mask and the photolithography process.

International Business Machines Corporation


The present invention provides methods for cryopreserving a population of cells with improved cell viability. In some aspects, the method comprises contacting a population of cells with a peptoid polymer comprising one or more polar peptoid monomers, e.g., formulated in a cryoprotectant solution, and cooling the population of cells at a temperature of from 0° C. to about −20° C. for a time period of at least about 3 hours to produce a population of supercooled cells. The supercooling methods of the present invention provide excellent post-thaw cell survival and recovery. In certain embodiments, the population of cells is present in a tissue or an organ that is cryopreserved by performing the supercooling methods of the present invention.

A key bottleneck to be addressed in regenerative medicine is poor cryopreservation. As cell and tissue therapies transition to pivotal trials and commercial manufacturing, the logistics of shipping fresh starting biological materials and final drug products has proven to be a critical hurdle. Central to the success of these therapies are systems that provide high and reproducible levels of survival and recovery after prolonged storage at sub-zero temperature. Hypothermic preservation (or cryopreservation) of cell and tissue therapies is necessary for early phase clinical trials, long-term storage prior to administration, and for late-phase therapies manufactured centrally and distributed over a large patient network. Such therapies administered as a cell suspension or grafted tissue demand the use of a cryopreservation solution as vehicle that is compatible with the cells, non-toxic to the recipient, and suitable for storage of the therapy for a sufficient time prior to administration with high viability and function.
Cryopreservation technology is aged, toxic and ineffective with typical cell survival post-thaw below 50% and unreliable potency, which greatly hinders standardized shipping, batch manufacturing, scheduling, and final product release testing. The widespread use of cryoprotective agents (CPAs), such as DMSO, improve post-thaw viability of cryopreserved biological specimens by blocking ice growth, but prevents the realization of on-demand biobanking and advanced regenerative medicine offerings because DMSO is toxic to the cell product and subsequently to the treated patient. See, Sauer-Heilborn et al., Transfusion, 44 (6):907-16 (20040; Hubel, Transfusion, 41 (5):579-580 (2001). Removing DMSO post-thaw has been inefficient and recovery remains at less than 60%. See, Calmels et al., Bone Marrow Transplant, 31 (9):823-828 (2000). As a strong solvent, DMSO dissolves and leaches transfusion tubing and containers, which increases risk for cGMP processes. Animal and human derived serum (e.g., fetal bovine serum, FBS) as a natural product with undefined structure and composition, introduces batch-to-batch variation, additional biohazards, and is greatly influenced by supply chain issues, and geographic restrictions. Other freezing media may contain protein that is unstable leading to reduced shelf-life, or polymers that are not chemically-defined as a single product. The FDA seeks to restrain the use of DMSO and serum via suitable alternatives, which are needed to enable a robust infrastructure for highly effective and off-the-shelf cell and tissue products.
As such, there is a need in the art for non-toxic and hyperactive ice prevention materials and methods for preserving cell- and tissue-based samples with high viability and function. The present disclosure satisfies this need and provides other advantages as well.

Supercooling methods for preservation of biological samples


Stator blade counts of an upper compressor casing for adjacent stages S0 and S1 are changed in the field to provide additional stator vanes and hence an increased vane count. Particularly, the upper casing half of the compressor is removed from the lower casing half. The original stator vanes on opposite axial sides of the first stage buckets are removed from the upper casing half and replaced by an additional sets of stator vanes providing a non-uniform vane spacing as between the upper and lower halves of the compressor as well as between axially adjacent stages S0 and S1. The unequal vane counts reduce the vibratory response of the rotating blades between stages S0 and S1.

In axial flow compressors, stator vanes alternate with rotating blades or buckets in the various stages of the compressor. The stator vanes are circumferentially spaced one from the other about the compressor axis and are secured to the upper and lower compressor casing halves. The upper and lower casing halves are joined one to the other at the compressor midline and provide a complete circumferential array of stator vanes for each compressor stage. As each rotating blade mounted on the rotor completes each revolution at a given rotational velocity, the rotating blade receives aerodynamic excitation pulses from each stator vane. This pulse can be generated from the wake of the upstream stator vane or the bow wave of the downstream stator vane. It is also possible to generate excitations in the rotating blade from differences between the upstream and downstream stator vane counts. These pulses induce a vibratory response in the rotating blade which can be deleterious to the rotating blade causing failure due to high cycle fatigue.
Typically the stator vane or blade count in the upper and lower halves of the compressor casing for a given stage are equal in number to one another. For example, in an initial stage S0 of a given compressor, the blade count for the stator vanes in each of the upper and lower compressor casing halves is 24/24. In the next stage S1, the blade count is 22/22. The first number represents the number of stator vanes in the upper casing half and the second number represents the number of stator vanes in the lower casing half of the same stage. The total stator vane count in S0 and S1 is therefore forty-eight and forty-four stator vanes respectively. However, because of the vibratory responses of the rotating blades, non-uniform vane spacings between upper and lower casing halves have been used in the past. Thus, different and alternative upper and lower blade counts in succeeding stages have been provided to reduce or eliminate the vibratory response. For example, in one compressor, stages S0 and S1 have had vane counts of 24/23 and 23/24, respectively. These non-uniform blade counts have been used in original equipment manufacture.
There are, however, a significant number of compressors in use in the field where there is an equal number of stator vanes in the upper and lower compressor halves for given stages. Certain other compressors in the field have an unequal number of stator vanes in the upper and lower compressor halves with adjacent stages, e.g. S0 and S1, having equal numbers of blades but alternate blade counts between the upper and lower halves of the compressor casing. Changing blade counts in the field was not previously considered practical since costly removal of the rotor in the field was required. Consequently there developed a need to retrofit compressors in the field with non-uniform blade counts among upper and lower compressor halves of the same stage to reduce vibratory response and without the necessity of removing the rotor.

Method of providing non-uniform stator vane spacing in a compressor


In a bending simulation apparatus, after a three-dimensional drawing generation portion generates a solid form from trihedral drawing data, a workpiece bending simulation portion places a workpiece for forming edge angles of a solid form on a die and carries out simulation operation for bending the workpiece completely up to the edge angle according to bending information including the edge angle of each side of the solid form, workpiece condition, tool condition and the like. An elongation amount of the workpiece is obtained by an elongation amount calculation portion and an elongation amount subtraction portion subtracts the elongation amount from a length of each side of the solid form. A development drawing generation portion creates a development drawing and an L-value calculation portion transmits Li value based on this development drawing to the press machine.

1. Field of the Invention
This invention relates to a method for generating a development drawing in which dimension of a solid form is changed according to an elongation amount presented when a sheet material is changed up to a target angle (including a spring-back) and entering a folding line taking into account the elongation amount into this development drawing.
2. Description of the Prior Art
FIG. 1 is a schematic structure diagram of a line control system for a bending machine. The line control system for the bending machine shown in FIG. 1 comprises a centralized station 1, CAE (computer-aided engineering) 2, automatic programming device 3 and NC (numeric control) apparatus 5 for controlling the bending machine 4, these components being connected through a LAN (local area network).
In this system, a processing program (also called NC program) for producing a desired product by bending is created by the automatic programming device 3 and filed in the centralized station 1 corresponding to processing schedule.
Then, the centralized station selects a processing program of a product which has reached a date of scheduled production from a processing schedule and transmits it to the NC apparatus 5 so as to operate the bending machine 4.
When the sheet material is bent using the bending machine 4, as shown in FIG. 2, the sheet material 7 (hereinafter referred to as workpiece 7) is placed on a die 9 while pressed against a back gauge 8 horizontally and a punch 10 is descended up to a target Di value so as to bend the workpiece 7.
At this time, the back gauge 8 is controlled so that when a tip 11 of the punch 10 makes contact with the workpiece 7, the tip 11 of the punch 10 is located on a bending line 12 (reach Li) of the workpiece 7.
It is known that with the aforementioned bending, the workpiece 7 is extended. Therefore, according to the prior art, when a processing program is created by an automatic programming apparatus 3, an operator enters a folding line into a development drawing according to a preliminarily prepared elongation amount table (punch type--material--bending angle--elongation amount) by operating the automatic programming apparatus 3.
However, when the operator enters a folding line taking into account an elongation amount, he must refer to the elongation amount table preliminarily prepared upon the entry. Thus, there is a possibility that the operator may enter the folding line into an improper position.
Although the elongation amount table is determined depending on punch type, material, bending angle and the like, there is not always prepared a punch and a die mentioned in the elongation amount table on a machine tool. In this case, bending is carried out using a substitute punch or a substitute die on the machine tool. Thus, even if the operator enters a folding line based on the elongation amount table, when a workpiece is actually processed, there is sometimes a case in which a desired product (dotted line) may be different from an actually produced product (solid line).

Folding line generation method for bending and bending system based thereon


A digital controlled oscillator (DCO) is provided that includes a plurality of selectable delay cells, a first load adjustment delay (LAD) cell, a second LAD cell, a first set of the load cells (LCs), a second set of the LCs and first and second capacitance elements. A number of the selectable delay cells that are part of a delay cell chain is configurable based on a delay cell number control vector. The delay cell chain generates a delay cell output signal that is received by the first LAD cell. The first set of the LCs generate a first load signal to control an amount of loading on the second LAD cell, and the second set of the LCs generate a second load signal to control loading on the first LAD cell. Substrate voltages of the first and second capacitance elements can be adjusted to adjust loading in the DCO.

PLL control circuits are widely used in radio, telecommunications, computers and other electronic applications. They may generate stable frequencies, recover a signal from a noisy communication channel, or distribute clock timing pulses in digital logic designs such as microprocessors. Traditionally, the PLL circuit has been an analog block, including the basic components of a voltage control oscillator (VCO), phase and frequency detector (PFD), charge pump, low pass filter (LPF) and a feedback path. However, such analog PLL circuits include a number of capacitors which require a significantly large chip area. Additionally these circuits are very sensitive to power noise.
More recently, PLL circuit design has evolved to a greater use of digital control. The first generation digital PLL uses one external high frequency clock to sample the reference clock, then generates the output clock by dividing or multiplying a certain number according to requirement. The frequency of an external clock having accuracy required by such PLL circuit is limited with respect to its capability for applying a sampling rate that can accommodate high frequency reference clock signals. As this design can only be used in low frequency applications, a hybridization of analog and digital elements has been pursued. With such approach, chip area has not been significantly reduced, while performance is markedly decreased.
A conventional DCO, used in such a PLL control system, typically adjusts the output clock frequency by digitally changing either the number of delay buffers or the delay cell's loading (e.g., shunt capacitor loading of load cells). However, using these techniques makes it very difficult to achieve very small tuning resolution because the minimum size of the devices is constrained. Tuning resolution is one of the key factors that influences jitter performance of the PLL control system, and therefore low frequency tuning resolution can make PLL jitter performance poor.
A need exists for an improved PLL control system that implements an improved DCO. Performance capabilities, such as high DCO frequency range, long term jitter control, low power consumption, low lock time, are highly desirable. Such a digital PLL circuit should encompass a small chip area and exemplify good performance.
Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description of the invention and the appended claims, taken in conjunction with the accompanying drawings and this background of the invention.
The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.

Digitally controlled oscillator (DCO) for a phase locked loop (PLL) system


Paint and coating compositions including a low molecular weight chitosan composition that may be incorporated in a coating composition at higher loading levels, which exhibits one or more of improved elongation, improved thermocycling characteristics, reduced leaching of coating components, are lesser susceptibility to fungal and mildew defacement than conventional coatings or coatings containing higher molecular weight chitosan compounds, articles coated in the same, and methods for making said coatings and coated articles.

Paints and coatings typically contain three essential ingredients: carrier liquid, binder, and additives. Pigment is also commonly added in many paints and coatings. Each of such ingredients may comprise a single component or several different items mixed into the paint or coating.
The carrier liquid is a fluid component of the paint which serves to carry all of the other paint components. The carrier liquid is part of the wet paint and usually evaporates as the paint forms a film and dries on a surface. In latex paints, the carrier liquid is usually water. In oil-based paints, the carrier liquid is usually an organic solvent. The amount and type of liquid is usually determined by features of the other paint components.
The binder component of a paint or coating is what causes the paint or coating to form a film on and adhere to a surface. In a latex paint, the binder comprises a latex resin, usually selected from acrylics, vinyl acrylics, styrene acrylics, or polyurethane dispersions ("PUDs"). In a latex paint or coating, the latex resin particles usually are in a dispersion with water as the carrier liquid.
Pigments provide the paint or coating with both decorative and protective features. Pigments are solid particles used to provide the paint or coating with various qualities, including but not limited to color, opacity, and durability. The paint or coating may also contain other solid particles such as polyurethane beads or other solids. Pigments and other solids add bulk to the paint or coating and their levels are related to the gloss or flatness of the paint or coating. Pigments may also impart color to a paint or coating.
A multitude of additives may be included in paints and coatings. The additives are typically used at relatively low levels in the paint/coating formulation, but contribute to various properties of paints and coatings, including rheology, stability, paint performance, in-can preservation, dry film preservation or protection, and application quality.
Biocides are additives that have antimildew, bacteriostatic and bactericidal properties. A variety of biocidal agents are well known and are used for various purposes including but not limited to preservation of wet paint or coatings ("in-can" preservation) and preservation or protection of dry films on coated articles. Such biocides include inorganic biocidal agents, for example, those containing metal ions, such as silver, zinc, and copper. Other inorganic biocides include phosphates, metal ion, metal or other biocide containing zeolites or hydroxyapatites. There are also organic biocides including organic acids, phenols, alcohols, and quaternary ammonium compounds.
Some biocides act specifically, such as mildewcidal or fungicidal agents, which are additives that have mildewcidal or fungicidal properties. Mildewcidal and fungicidal agents work to prevent, reduce, or forestall the formation of mildew in cured paint or coating films. Zinc compounds, including zinc oxide, are common fungicides and mildewcides, the use of which is effective at mildew, mold, and fungus prevention and/or reduction in cured films. Zinc oxide can have drawbacks and create issues in dispersibility of paints and coatings. Other known fungicides include iodopropynyl butylcarbamate (IPBC), 2-octyl-3 (2H)-isothiazolone (OIT), chlorothalonil, and the like.
Chitosan is a bio-based material that may be obtained in a renewable fashion from chitin coming from crustaceans, among other sources, and, if dispersible, would be a useful additive or filler in paint formulations. In conventional practice, despite its relatively low cost and relative renewability, chitosan is not used in paints and coatings due to its water insolubility, a negative effect on the quality of the paint and coatings, and the difficulty in adequately dispersing chitosan in latex and other waterborne, dispersion systems for paints and coatings. Providing a consistently dispersed paint or coating is important for ease of manufacturability but also for providing a high-quality paint without grit or other defects in consistency, application, appearance, or feel.
The relevant art has pursued alternative approaches in attempts at solubilizing or dispersing chitosan in water. One such approach involves providing chitosan in acidic solution. Acidic solutions are highly impractical for direct addition to waterborne paints and coatings, which are overwhelmingly basic in pH. Adding a significantly acidic solution to maintain acidity and thus maintain the chitosan in solution would greatly disturb the stability of a coating formulation and would require drastic reformulation. Other approaches require cost-prohibitive chemical modification to the chitosan polymer backbone with hydrophilic groups prior to addition to waterborne paints or coatings to provide water solubility.

Coating compositions containing low molecular weight chitosan composition


A semiconductor device includes a differential circuit for receiving a differential signal at an input terminal and a detection circuit for outputting a detection signal when a predetermined signal is inputted to the input terminal. The detection circuit detects whether the differential signal becomes outside an electric input standard and outputs the detection signal.

1. Field of the Invention
The present invention relates to a semiconductor device. In particular, the present invention relates to a semiconductor device that receives and outputs low amplitude differential signals.
2. Description of Related Art
Testing of an integrated circuit (hereinafter, termed "IC") has been conducted heretofore for an improvement in the reliability and quality thereof. In a case where an IC is to be tested, a signal for switching the IC from a normal operation mode to a test mode is inputted to the IC from the outside thereof.
As a method of switching an IC from a normal operation mode to a test mode as described above, the following technique is described in Patent Documents 1 and 2. In the technique described in Patent Document 1, a voltage higher than the power supply voltage is inputted to a normally-used input/output terminal, as shown in FIG. 15. The IC is set to the test mode upon detecting a voltage higher than the power supply voltage. On the other hand, in the technique described in Patent Document 2, a terminal used for setting a test mode is additionally provided, as shown in FIG. 16. In the case of Patent Document 2, the IC is set to the test mode when a signal having a predetermined voltage is inputted to this terminal from the outside of the IC.
In the technique described in Patent Document 1, however, since the signal to be inputted has a voltage higher than the power supply voltage, there is a possibility that a voltage greater than the element breakdown voltage is inputted. For this reason, the chip size becomes larger in order to allow the element breakdown voltage to have enough margin in some cases. Moreover, in the technique described in Patent Document 2, since the terminal used for the test mode is provided, that is, since a terminal unnecessary for the normal operation is formed, the chip size eventually becomes larger.
[Patent Document 1] Japanese Patent Application Laid-open Publication No. 2000-338145
[Patent Document 2] Japanese Patent Application Laid-open Publication No. 2002-123501
As described above, in order to make the semiconductor device capable of receiving a signal for setting it to a test mode or the like, the chip size thereof becomes larger in some cases.

Semiconductor device having differential signal detection circuit for entry into mode other than normal operation


Apparatus and methods allow users of software testing applications to obtain auto-generated reports. During use, one or more software test cases of a feature of a software target are identified for execution. A template, common to the software cases, autogenerate a first report in a first computing language, e.g., XML, based on test results obtained from the execution. A transformation into one or more second reports in a second computing language, e.g., HTML, occurs so that users can visually understand the report. Preferred aspects include utilizing an existing Java-based JUnit testing framework and an API of Apache Ant. Retrofitting existing software testing applications contemplates inserting executable code, in the form of a template, to obtain auto-generated reports. Executable code is available as a computer program product in the form of a download or on a computer-readable medium. Overall architecture in a virtual machine is another noteworthy aspect.

"Software Testing Applications," such as IBM's Rational Robot as well as the latest product, Functional Tester (RFT) have been known for some time for quality testing software targets, such as web or server applications, stand-alone computing applications, web services, computer program products, GUI interfaces, etc., to name a few. During use, test cases of the software target are written as to examine whether features of the target are operating properly. For example, it may be the situation that a web service providing stock market quotes with a GUI front end has need of determining whether a user fill-in box for stock symbols actually produces a stock quote for the symbol upon submission. In such instance, the software testing application uses code for an individual test case to determine whether the web service works as advertised. Regardless of success, it is important to the user of the software testing application to know and record the results of the test, e.g., whether the test passed, failed, met a predetermined metric, or other. (Of course, an infinite number of test cases per software targets are possible and the foregoing is merely a contextual illustration that skilled artisans will readily understand.)
One well known and open source testing framework, known commonly as JUnit, is another tool in the quality assurance of testing software targets. However, constructing test cases that integrate well with the JUnit framework and automatically generating HTML reports based upon test results can sometimes be cumbersome when using third party test tools, e.g., RFT. As is known, test case construction may involve many classes and methods in a language such as C, C++, or Java and problems exist when trying to integrate the JUnit test case execution followed by a user report generation in an automated fashion.
Another problem with using the JUnit framework to execute test cases requires extending the TestCase class by design. In turn, this may lead to programming issues when trying to modifying a third party test tool class hierarchy. For instance, the third party test tool's class loader may generate, or "throw," exceptions when trying to load the altered class hierarchy.
Still another problem lies with report generation in a format useful for users. Namely, JUnit typically generates reports in an XML format, which is non-visually recognized by users. Converting the XML to a visually useful format, such as HTML, requires several transformation classes. While this may be typically done using an Apache Ant script, which runs as a separate process, launching the Ant script requires still further programming code. In other words, it is not self-executing. Interoperability issues may also exist between Linux- and Windows-brand operating systems, for example.
Accordingly, there is need in the art of software testing applications to easily and conveniently generate user reports that are presented in useful format. There is further need to make the reporting "invisible" relative to the users and software testing applications to minimize inconvenience. It is also important to generate reports quickly and provide appropriate results. In that many users already own and/or use a software testing application, it is further desirable to retrofit existing applications to avoid the costs of providing wholly new products. Taking advantage of existing testing frameworks, such as JUnit, and transformation-of-languages programs, such as Ant, is another feature that would optimizes existing resources. Naturally, any improvements along such lines should further contemplate good engineering practices, such as relative inexpensiveness, stability, ease of implementation, low complexity, flexibility, etc.

Generic template to autogenerate reports for software target testing


Embodiments of the present invention may provide a receiver. The receiver may include an RF section and a quadrature mixture, coupled to the RF section, to downconvert a first group of wireless signals directly to baseband frequency quadrature signals and to downconvert a second group of wireless signals to intermediate frequency quadrature signals. The receiver may also include a pair of analog-to-digital converters (ADCs) to convert the downconverted quadrature signals to corresponding digital quadrature signals. Further, the receiver may include a digital section having two paths to perform signal processing on the digital baseband frequency quadrature signals and to downconvert the digital intermediate frequency signals to baseband cancelling a third order harmonic distortion therein. The receiver may be provided on a monolithically integrated circuit.

The present invention relates to wireless communication receivers, in particular to monolithically integrated receivers that are configurable for multi-carrier, multi-band operation.
Cellular technology is constantly evolving to support growing widespread wireless technology usage. Recently, popular wireless standardized technology has progressed from GSM (Global System for Mobile Communication) to WCDMA (Wideband Code Division Multiple Access) to LTE (Long Term Evolution). However, when a new wireless standard emerges, the previous standard version does not become obsolete because devices supporting the previous standard are still in use. In fact, two or more prior standard generation devices are typically still in circulation. Thus, wireless communication providers desire to support all standard generation devices that are in circulation concurrently.
In recent years, base station receivers capable of receiving multiple carriers with a single signal path have become commonplace. The advantage of these multi-carrier receivers is lower cost and smaller size as compared to a system made with receivers dedicated to each carrier.
Because different standards provide different signal characteristics, network equipment such as base station receivers have to be complex enough to support the different signal characteristics. Direct conversion receivers are emerging for WCDMA and LTE standards. Direct conversion refers to downconverting directly from radio frequency (RF) to baseband. While direct conversion eliminates circuit components, which lowers receiver costs, direct conversion also has drawbacks such as sensitivity to finite image rejection and harmonic distortion. WCDMA and LTE standard signals lend themselves for direct conversion because of their relatively low image-rejection requirement (˜70 dB). MC-GSM (Multi-Carrier GSM), on the other hand, has proved to be too difficult for direct conversion due to its large in-band blockers (−25 dBm in DCS/PCS bands and −16 dBM in GSM850/GSM900 bands) resulting in a ˜90 dB image rejection and harmonic distortion rejection requirement which isn't practical with known techniques.
Consequently, MC-GSM typically employs heterodyne conversion using intermediate frequency (IF) sampling. These conventional MC-GSM heterodyne receivers generally are not amenable to monolithic integration. For instance, IF filters and anti-aliasing filters used in heterodyne receivers typically require large inductors that are not practicable for silicon fabrication. In contrast, WCDMA and LTE receivers can use direct conversion receivers. The inability to support MC-GSM with a direct-conversion receiver prevents the development of a single platform that can support all standards.
Therefore, the inventors recognized a need in the art for a base station receiver that supports different standard signals, such as MC-GSM and WCDMA/LTE, with a single monolithic receiver.


An image decoding method includes a first storage step of sequentially decoding pictures in a stream, storing a picture to be used as a reference into a picture memory, and managing the picture. Further, the image decoding method includes a determination step of determining whether or not random access reproduction has been designated, a state change step of changing a management state for managing a picture in the picture memory, when the random access reproduction has been designated, and a second storage step of sequentially decoding each of the coded pictures from a random access reproduction destination, storing, into the picture memory, a picture to be used as a reference, and managing the picture. This image decoding method enables the decoding of pictures with reference to an appropriate picture even when random access reproduction is performed.

Recently, with the arrival of the age of multimedia in which audio, video and the like are integrally handled, existing information media such as newspapers, journals, TVs, radios and telephones and other means through which information is conveyed to people has come under the scope of multimedia. Generally speaking, multimedia refers to something that is represented by associating not only characters but also graphics, audio and especially images and the like together. However, in order to include the aforementioned existing information media in the scope of multimedia, it appears as a prerequisite to represent such information in digital form.
However, when estimating the amount of information contained in each of the aforementioned information media as the amount of digital information, the information amount per character requires 1 to 2 bytes whereas the audio requires more than 64 Kbits (telephone quality) per second, and when it comes to a moving picture, it requires more than 100 Mbits (present television reception quality) per second. Therefore, it is not realistic for the information media to handle such an enormous amount of information as it is in digital form. For example, although video phones are already in the actual use via Integrated Services Digital Network (ISDN) which offers a transmission speed of 64 Kbits/s to 1.5 Mbits/s, it is impossible to transmit images on televisions and images taken by cameras directly through ISDN.
This therefore requires information compression techniques, and for instance, in the case of the videophone, moving picture compression techniques compliant with H.261 and H.263 standards recommended by International Telecommunication Union-Telecommunication Standardization Sector (ITU-T) are employed. According to the information compression techniques compliant with the MPEG-1 standard, image information as well as audio information can be stored in an ordinary music Compact Disc (CD).
Here, Moving Picture Experts Group (MPEG) is an international standard for compression of moving picture signals standardized by International Standards Organization/International Electrotechnical Commission (ISO/IEC), and MPEG-1 is a standard to compress moving picture signals down to 1.5 Mbps, that is, to compress information of TV signals approximately down to a hundredth. The transmission rate within the scope of the MPEG-1 standard is set to about 1.5 Mbps to achieve the middle-quality picture, therefore, MPEG-2 which was standardized with the view to meet the requirements of high-quality picture allows data transmission of moving picture signals at a rate of 2 to 15 Mbps to achieve the quality of TV broadcasting. In the present circumstances, a working group (ISO/IEC JTC1/SC29/WG11) in charge of the standardization of the MPEG-1 and the MPEG-2 has achieved a compression rate which goes beyond what the MPEG-1 and the MPEG-2 have achieved, further enabled encoding/decoding operations on a per-object basis and standardized MPEG-4 in order to realize a new function required in the era of multimedia. In the process of the standardization of the MPEG-4, the standardization of encoding method for a low bit rate was aimed; however, the aim is presently extended to a more versatile coding of moving pictures at a high bit rate including interlaced pictures.
Furthermore, MPEG-4 AVC and ITU H.264 have been standardized since 2003 as a next-generation picture coding scheme with higher compression rate, which are jointly worked by the ISO/IEC and the ITU-T (for example, refer to Non-Patent Reference 1). Currently, regarding H.264 standard, a draft of its revised standard in compliance with a High Profile which is suited for High Definition (HD) pictures have been developed. Whereas a DVD player which reproduces a movie and the like are widely known as an application of using the MPEG-2 moving picture compression technology, the H.264 compression standard has been scheduled to be adapted to a player using a Blu-ray Disk ROM (BD-ROM). Currently, its format standard has been developed.
In general, in coding of a moving picture, the amount of information is compressed by reducing redundancy in temporal and spatial directions. Therefore, an inter-picture prediction coding, which aims at reducing the temporal redundancy, estimates a motion and generates a predictive picture on a block-by-block basis with reference to prior and subsequent pictures, and then codes a differential value between the obtained predictive picture and a current picture to be coded. Here, a "picture" is a term to represent a single screen and it represents a frame when used for a progressive picture whereas it represents a frame or fields when used for an interlaced picture. The interlaced picture here is a picture in which a single frame consists of two fields respectively having different time. For coding and decoding an interlaced picture, three ways are possible: processing a single frame either as a frame, as two fields or as a frame/field structure depending on a block in the frame.
A picture to which an intra-picture prediction coding is performed without reference pictures is referred to as an "I-picture". A picture to which the inter-picture prediction coding is performed with reference to only a single picture is referred to as a "P-picture". A picture to which the inter-picture prediction coding is performed by referring simultaneously to two pictures is referred to as a "B-picture". The B-picture can refer to two pictures, arbitrarily selected from the pictures which are displayed either before or after a current picture to be coded, as an arbitrary combination. Whereas the reference pictures can be specified for each block that is a fundamental unit of coding and decoding, they are distinguished as a first reference picture and a second reference picture. Here, the first reference picture is a first reference picture to be described in a coded bit stream and the second reference picture is a reference picture to be described after the first reference picture in the coded bit stream. However, the reference pictures need to be already coded and decoded as a condition to code and decode these I-picture, P-picture, and B-picture.
A motion compensation inter-picture prediction coding is used for coding the P-picture or the B-picture. The motion compensation inter-picture prediction coding is a coding method which adopts motion compensation to an inter-picture prediction coding. The motion compensation is a method of reducing the amount of data while increasing prediction precision by estimating an amount of motion (this is referred to as a motion vector, hereinafter) of each part in a picture not by simply predicting a picture from a pixel value of a reference frame, and by performing prediction in consideration of the estimated amount of data. For example, the amount data is reduced by estimating a motion vector of a current picture to be coded and coding a predictive difference between a predicted value which is shifted as much as the estimated motion vector and the current picture to be coded. Since this method requires information about the motion vector at the time of decoding, the motion vector is also coded and recorded or transmitted.
The motion vector is estimated on a macroblock basis. Specifically, a motion vector is estimated by fixing a macroblock of a current picture to be coded, moving a macroblock of the reference picture within a searching range, and finding a position of the reference block which is approximate to the standard block.
FIG. 1A and FIG. 1B are diagrams, each of which showing a configuration of a conventional MPEG-2 stream.
As shown in FIG. 1A and FIG. 1B, the MPEG-2 stream has a following hierarchical structure. A stream is made up of a plurality of Group of Pictures (GOP). A moving picture can be edited and randomly accessed by setting each GOP as a basic unit for coding. Each GOP is made up of plural pictures, each of which is one of an I picture, a P picture and a B picture. In addition, each stream, GOP and picture includes a synchronous signal (sync) indicating a boundary between respective units and a header that is data commonly included in respective units.
FIG. 2 is a diagram showing a configuration of another conventional stream.
This stream corresponds to a JVT (H.264/MPEG-4 AVC) which has been currently developed for standardization by a joint cooperation with ITU-T and ISO/IEC. In JVT, there is no concept of a header and common data is placed in a head of the stream with a name of a parameter set PS. Furthermore, while there is no concept corresponding to GOP, a randomly-accessible unit, which corresponds to GOP, can be structured by dividing data with a special picture unit which can be decoded without relying on other pictures. This unit is called as a random access unit RAU. As the parameter set PS, there are a picture parameter set PPS which is data corresponding to a header of each picture and a sequence parameter set SPS corresponding to a header of a unit that is equal to or greater than GOP in the MPEG-2. Each picture has an identifier attached which indicates one of the picture parameter set PPS and the sequence parameter set SPS to which the picture refers. Specifically, plural picture parameter sets PPS and sequence parameter sets SPS that are different from each other are coded only once, so that excess coding caused by coding the same parameter sets (headers) several times for each picture is omitted and the compression rate is increased, by indicating, with an identifier, one of the parameter sets to which a current picture refers. A picture number PN is an identification number for identifying a picture. Here, the picture number PN is a number indicating a display order of a picture, and is different from PictureNumber showing a decoding order as disclosed in the Non-Patent Reference 1. The sequence parameter set SPS includes the maximum number of reference-available pictures, picture size and the like. The picture parameter set PPS includes a type of variable length coding (switching between Huffman coding and arithmetic coding), an initial value of quantization step, the number of reference pictures, and the like.
FIG. 3A and FIG. 3B are diagrams for explaining a reference state between GOPs used for the conventional MPEG-2 and the like.
FIG. 3A shows a predictive configuration among pictures in a Closed GOP. In this diagram, the diagonally shaded pictures are pictures to be referred to by other pictures. Furthermore, each picture is arranged in display order. In the Closed GOP configuration, B pictures (B6 and B7), which are displayed before the displayed time of an Instantaneous Decoding Refresh (IDR) picture, can be predictive-coded with reference only to the IDR picture and cannot refer pictures that belong to a different GOP. In addition, FIG. 3B shows a predictive configuration among pictures in an Open GOP. In this diagram, the diagonally shaded pictures are pictures to be referred to by other pictures as in the case of FIG. 3A. Furthermore, each picture is arranged in display order. In the Open GOP configuration, B pictures (B6 and B7), which are displayed temporally before an I picture (I8), can be predictive-coded with reference to pictures in the same GOP3 and a P picture (P5) in a GOP4 which is positioned immediately before the GOP3.
In the MPEG-2, P pictures (P2, P5, P11, and P14) can be predictive-coded with reference to only an I picture or a P picture displayed temporally immediately before the current P picture. Furthermore, B pictures (B0, B1, B3, B4, B6, B7, B9, B10, B12 and B13) can be predictive-coded with reference to one of an I picture and a P picture displayed temporally immediately before the current B, and a one of an I picture and a P picture displayed temporally immediately after the current B picture, and their arrangement order in a stream has been determined.
On the other hand, the H.264 standard introduces a very flexible predictive structure among pictures in order to significantly increase coding efficiency (a compression rate). Specifically, a P picture is not restricted to refer to only one picture displayed immediately before the current P picture. A different reference picture for the P picture can be selected for each coded block from among I pictures, P pictures or B pictures despite the display order of these pictures, if those pictures have been decoded and managed in a buffer for reference pictures. Similarly, B picture is not restricted to refer to only one picture each displayed immediately before and after the B picture. Here, a different set of two pictures can be selected for each coded block from among I pictures, P pictures or B pictures despite the display order of those pictures.
In a BD-ROM format standard, pictures can be random access units RAUs even in the case where the pictures are arranged in a stream having the Open GOP structure as similar to the case of the conventional structure. However, following restrictions are for example set for predictive-coding among pictures under the H.264 standard.
(1) Since there is a possibility that B pictures (B6 and B7), which are displayed temporally immediately before an I picture designated as a random access reproduction start point, refer to pictures displayed temporally before and after the B pictures. Therefore, the B pictures are not displayed at the time of random access reproduction.
(2) A picture displayed temporally after the I picture designated as a random access reproduction start point must not refer to a picture displayed temporally before said I picture.
FIG. 4 is a block diagram of an image decoding apparatus which realizes a conventional image decoding method.
The image decoding apparatus shown in FIG. 4 includes a variable length decoding unit 901, a motion compensation unit 902, a picture memory 903, an adding unit 904 and a conversion unit 905.
The variable length decoding unit 901 decodes a stream Str, and outputs a quantized value Qco, a relative index Ind, a picture type Pty, and a motion vector MV. The quantized value Qco, the relative index Ind and the motion vector MV are respectively inputted into and decoded by the picture memory 903, the motion compensation unit 902, and the conversion unit 905.
The conversion unit 905 inverse quantizes the quantized value Qco so as to reconstruct a frequency coefficient, further inverse-frequency converts the frequency coefficient into a pixel differential value, and outputs the resultant to the adding unit 904.
The adding unit 904 adds the pixel differential value and a predictive image outputted from the motion compensation unit 902, and generates a decoded picture Vout. The generated decoded picture Vout is stored into the picture memory 903. Herein, as in the case where plural pictures can be used as reference pictures, each block requires a reference number (a relative index Ind) for specifying an identification number of a picture to be referred to. Accordingly, by obtaining a correspondence between a relative index Ind and a picture number of each picture stored in the picture memory 903, a reference picture can be specified based on the relative index Ind.
The picture memory 903 has a reference picture list, and reference pictures that are decoded and used as references are stored in the reference picture list. Furthermore, the reference picture list has a list (STRL=Short Term Reference List) for performing First In First Out (FIFO) management of reference pictures, and a list (LTRL=Long Term Reference List) for managing whether or not to store, into the list, or delete the explicitly specified reference pictures.
The motion compensation unit 902 extracts an optimum image region for a predictive image from the decoded picture stored in the picture memory 903, based on the motion vector and relative index Ind detected through the aforementioned processing. The motion compensation unit 902 then generates the predictive image and outputs it to the adding unit 904.
Next, it shall be explained about a method of generating a picture number PN which is to be attached to each picture for specifying a picture based on the relative index Ind. Here, summaries of two methods out of three picture number PN generation methods defined by the H. 264 are explained as examples.
(Picture Number Generation Method Example 1)
FIG. 5 is an explanatory diagram of a picture number generation method example 1.
Hereinafter, the picture number generation method example 1 shall be explained with reference to FIG. 5. In the generation method example 1, a picture number PN is generated by adding an offset value Msb managed as a variable in decoding processing and a difference value (a count value Isb) from the offset value Msb attached to each picture.
In FIG. 5, each picture Pic is one of I, P, and B picture, and is arranged in display order on a screen. However, in decoding order, it is assumed that pictures are decoded in the following order of IDR, . . . , P3, B1, B2, P6, B4, B5, I9, B7, B8, and . . . . Both Msb1 and Msb2 indicate values of offset values Msb, where Msb1=96 and Msb2=112.
As shown in a head of the picture Pic arrangement, an IDR picture is placed, as an I picture to be decoded at first in the access unit AU, at a start point of a stream or in a place where there is no reference relationship between a current GOP to be decoded and a GOP which is positioned immediately before the current GOP. First, when the IDR picture is decoded, an offset value Msb is initialized to 0 and the count value Isb is also 0. Therefore, a picture number PN of said IDR picture becomes 0. For example, when the count value Isb is 3 for the next P picture, Msb+Isb=0+3=3 is obtained. Therefore, a picture number PN for said P picture is 3.
Furthermore, when the count value Isb is 1 for the subsequent B picture, 0+1=1 is obtained so that a picture number PN for said B picture is 1. In addition, when the count value Isb is 2 for the next subsequent B picture, 0+2=2 is obtained so that a picture number PN for that B picture is 2.
Here, when the count value Isb reaches a predetermined value (a maximum count value Lsb) while repeating the aforementioned operations, the maximum count value Lsb is added to the offset value Msb and the count value Isb is managed so as not to exceed the maximum count value Lsb, in order to prevent an increase in the number of bits of the count value Isb and a decrease in coding efficiency. For example, in the case where the maximum count value Lsb=16, if the count value Isb reaches the maximum count value Lsb for six times, it indicates that the offset value Msb has been updated to the value of 0+16×6=96.
Furthermore, when the picture P3 is decoded, in the case where the offset value Msb has been updated to 96 and the count value Isb equals to 12, the picture number PN of the picture P3 is obtained as 96+12=108. Similarly, for B1, B2, P6, B4 and B5 pictures (in decoding order), when the respective count values Isb are 10, 11, 15, 13 and 14, the picture numbers PN are respectively 107, 108, 111, 109 and 110.
Furthermore, for I9, B7, B8, B10 and subsequent pictures, the count value Isb exceeds the maximum count value Lsb of 16 if the count value Isb is continued to be increased. Therefore, the count value Isb is controlled so as to be the value less than 16 by updating the offset value Msb as obtained by the offset value of Msb=Msb1+maximum count value Lsb=96+16=112. Accordingly, for the pictures I9, B7, B8 and B10, the respective count values Isb are 2, 0, 1 and 3, and the respective picture numbers PN are 114, 112, 113 and 115.
As described in the above, a picture number PN is generated using the count value Isb, which is attached to each picture, and the offset value Msb, which is updated and managed in decoding processing, and an order of displaying on a screen and reference pictures can be managed using the generated picture number PN.
(Picture Number Generation Method Example 2)
FIG. 6 is an explanatory diagram of the picture number generation method example 2.
In the picture number generation method example 2 shown in FIG. 6, the offset value FNO managed as a variable in decoding processing is added to the frame number (a count value) fn attached to each picture, and generates a picture number PN by doubling the sum. It should be noted that, in the case of an unreferenced picture, a picture number PN is generated for that picture by subtracting 1 from the calculated sum.
FNO1 and FNO2 are values of offset values FNO. In the example shown in FIG. 6, FNO1 is 96 and FNO2 is 112.
First, when an IDR picture is decoded, an offset value FNO is initialized to 0, and a frame number fn becomes 0 as well as the picture number PN for said IDR picture. When the frame number fn is 1 for the next B picture, 2×(offset value FNO+frame number fn)=2×(0+1)=2 is obtained and the picture number PN for said B picture becomes 2.
Furthermore, when the frame number fn is 2 for the subsequent B picture, 2×(0+2)=4 is obtained, and the picture number PN for that B picture becomes 4. When the frame number fn is 3 for the next subsequent P picture, 2×(0+3)=6 is obtained and the picture number PN for said P picture becomes 6.
In the case where the frame number fn of a current picture is smaller than the frame number of a picture which is decoded temporally immediately before the current picture, the offset value FNO is updated by adding the maximum frame number MFN to the offset value FNO.
This is a mechanism for reducing the amount of coded bits by restricting an available value range for the frame number to be equal to or smaller than a predetermined value, and for also indicating a large picture number PN. In FIG. 6, for example, it is indicated that the offset value FNO is FNO1 when the frame number fn of a current picture became smaller than the frame number of a picture that is decoded temporally immediately before the current picture for six times, and the offset value FNO1 is updated to the state of FNO2 when the above situation occurred for the seventh time.
For example, when a picture B1 in the picture Pic is decoded, if the offset value FNO is updated to 96 and the frame number fn is 10, the picture number PN of the picture B1 is obtained by 2×(96+10)=212. Similarly, in the case where pictures B2, P3, B4, B5 and P6 (in decoding order) have respective frame numbers fn of 11, 12, 13, 14 and 15, their picture numbers PN are respectively 214, 216, 218, 220 and 222.
Furthermore, when a picture B7 is decoded, if the frame number fn is 0 which is the value smaller than 15 that is the frame number of a picture positioned immediately before the picture B7, the offset value FNO is updated to FNO=FNO1+maximum frame number MFN=96+16=112. Accordingly, the picture number PN of the picture B7 becomes 2×(112+0)=224. Similarly, when the pictures B8, I9 and B10 have respective frame numbers fn of 1, 2 and 3, respective picture numbers PN of 226, 228 and 230 are obtained.
Thus, as similar to the case of the picture number generation method example 1, the picture number PN can be generated using a value of a frame number fn attached to each picture and an offset value FNO which is updated and managed in decoding processing. Therefore, the reference pictures can be managed using the generated picture number. It should be noted that, in the picture number generation method example 2, the decoding order is same as the display order.    Non-Patent Reference 1: ISO/IEC 14496-10, International Standard: "Information technology—Coding of audio-visual objects—Parts 10: Advanced video coding" (Dec. 1, 2003), pp. 82-100.